ipath_rc.c 50 KB

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  1. /*
  2. * Copyright (c) 2006, 2007 QLogic Corporation. All rights reserved.
  3. * Copyright (c) 2005, 2006 PathScale, Inc. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenIB.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. */
  33. #include "ipath_verbs.h"
  34. #include "ipath_kernel.h"
  35. /* cut down ridiculously long IB macro names */
  36. #define OP(x) IB_OPCODE_RC_##x
  37. static u32 restart_sge(struct ipath_sge_state *ss, struct ipath_swqe *wqe,
  38. u32 psn, u32 pmtu)
  39. {
  40. u32 len;
  41. len = ((psn - wqe->psn) & IPATH_PSN_MASK) * pmtu;
  42. ss->sge = wqe->sg_list[0];
  43. ss->sg_list = wqe->sg_list + 1;
  44. ss->num_sge = wqe->wr.num_sge;
  45. ipath_skip_sge(ss, len);
  46. return wqe->length - len;
  47. }
  48. /**
  49. * ipath_init_restart- initialize the qp->s_sge after a restart
  50. * @qp: the QP who's SGE we're restarting
  51. * @wqe: the work queue to initialize the QP's SGE from
  52. *
  53. * The QP s_lock should be held and interrupts disabled.
  54. */
  55. static void ipath_init_restart(struct ipath_qp *qp, struct ipath_swqe *wqe)
  56. {
  57. struct ipath_ibdev *dev;
  58. qp->s_len = restart_sge(&qp->s_sge, wqe, qp->s_psn,
  59. ib_mtu_enum_to_int(qp->path_mtu));
  60. dev = to_idev(qp->ibqp.device);
  61. spin_lock(&dev->pending_lock);
  62. if (list_empty(&qp->timerwait))
  63. list_add_tail(&qp->timerwait,
  64. &dev->pending[dev->pending_index]);
  65. spin_unlock(&dev->pending_lock);
  66. }
  67. /**
  68. * ipath_make_rc_ack - construct a response packet (ACK, NAK, or RDMA read)
  69. * @qp: a pointer to the QP
  70. * @ohdr: a pointer to the IB header being constructed
  71. * @pmtu: the path MTU
  72. *
  73. * Return 1 if constructed; otherwise, return 0.
  74. * Note that we are in the responder's side of the QP context.
  75. * Note the QP s_lock must be held.
  76. */
  77. static int ipath_make_rc_ack(struct ipath_qp *qp,
  78. struct ipath_other_headers *ohdr,
  79. u32 pmtu, u32 *bth0p, u32 *bth2p)
  80. {
  81. struct ipath_ack_entry *e;
  82. u32 hwords;
  83. u32 len;
  84. u32 bth0;
  85. u32 bth2;
  86. /* header size in 32-bit words LRH+BTH = (8+12)/4. */
  87. hwords = 5;
  88. switch (qp->s_ack_state) {
  89. case OP(RDMA_READ_RESPONSE_LAST):
  90. case OP(RDMA_READ_RESPONSE_ONLY):
  91. case OP(ATOMIC_ACKNOWLEDGE):
  92. /*
  93. * We can increment the tail pointer now that the last
  94. * response has been sent instead of only being
  95. * constructed.
  96. */
  97. if (++qp->s_tail_ack_queue > IPATH_MAX_RDMA_ATOMIC)
  98. qp->s_tail_ack_queue = 0;
  99. /* FALLTHROUGH */
  100. case OP(SEND_ONLY):
  101. case OP(ACKNOWLEDGE):
  102. /* Check for no next entry in the queue. */
  103. if (qp->r_head_ack_queue == qp->s_tail_ack_queue) {
  104. if (qp->s_flags & IPATH_S_ACK_PENDING)
  105. goto normal;
  106. qp->s_ack_state = OP(ACKNOWLEDGE);
  107. goto bail;
  108. }
  109. e = &qp->s_ack_queue[qp->s_tail_ack_queue];
  110. if (e->opcode == OP(RDMA_READ_REQUEST)) {
  111. /* Copy SGE state in case we need to resend */
  112. qp->s_ack_rdma_sge = e->rdma_sge;
  113. qp->s_cur_sge = &qp->s_ack_rdma_sge;
  114. len = e->rdma_sge.sge.sge_length;
  115. if (len > pmtu) {
  116. len = pmtu;
  117. qp->s_ack_state = OP(RDMA_READ_RESPONSE_FIRST);
  118. } else {
  119. qp->s_ack_state = OP(RDMA_READ_RESPONSE_ONLY);
  120. e->sent = 1;
  121. }
  122. ohdr->u.aeth = ipath_compute_aeth(qp);
  123. hwords++;
  124. qp->s_ack_rdma_psn = e->psn;
  125. bth2 = qp->s_ack_rdma_psn++ & IPATH_PSN_MASK;
  126. } else {
  127. /* COMPARE_SWAP or FETCH_ADD */
  128. qp->s_cur_sge = NULL;
  129. len = 0;
  130. qp->s_ack_state = OP(ATOMIC_ACKNOWLEDGE);
  131. ohdr->u.at.aeth = ipath_compute_aeth(qp);
  132. ohdr->u.at.atomic_ack_eth[0] =
  133. cpu_to_be32(e->atomic_data >> 32);
  134. ohdr->u.at.atomic_ack_eth[1] =
  135. cpu_to_be32(e->atomic_data);
  136. hwords += sizeof(ohdr->u.at) / sizeof(u32);
  137. bth2 = e->psn;
  138. e->sent = 1;
  139. }
  140. bth0 = qp->s_ack_state << 24;
  141. break;
  142. case OP(RDMA_READ_RESPONSE_FIRST):
  143. qp->s_ack_state = OP(RDMA_READ_RESPONSE_MIDDLE);
  144. /* FALLTHROUGH */
  145. case OP(RDMA_READ_RESPONSE_MIDDLE):
  146. len = qp->s_ack_rdma_sge.sge.sge_length;
  147. if (len > pmtu)
  148. len = pmtu;
  149. else {
  150. ohdr->u.aeth = ipath_compute_aeth(qp);
  151. hwords++;
  152. qp->s_ack_state = OP(RDMA_READ_RESPONSE_LAST);
  153. qp->s_ack_queue[qp->s_tail_ack_queue].sent = 1;
  154. }
  155. bth0 = qp->s_ack_state << 24;
  156. bth2 = qp->s_ack_rdma_psn++ & IPATH_PSN_MASK;
  157. break;
  158. default:
  159. normal:
  160. /*
  161. * Send a regular ACK.
  162. * Set the s_ack_state so we wait until after sending
  163. * the ACK before setting s_ack_state to ACKNOWLEDGE
  164. * (see above).
  165. */
  166. qp->s_ack_state = OP(SEND_ONLY);
  167. qp->s_flags &= ~IPATH_S_ACK_PENDING;
  168. qp->s_cur_sge = NULL;
  169. if (qp->s_nak_state)
  170. ohdr->u.aeth =
  171. cpu_to_be32((qp->r_msn & IPATH_MSN_MASK) |
  172. (qp->s_nak_state <<
  173. IPATH_AETH_CREDIT_SHIFT));
  174. else
  175. ohdr->u.aeth = ipath_compute_aeth(qp);
  176. hwords++;
  177. len = 0;
  178. bth0 = OP(ACKNOWLEDGE) << 24;
  179. bth2 = qp->s_ack_psn & IPATH_PSN_MASK;
  180. }
  181. qp->s_hdrwords = hwords;
  182. qp->s_cur_size = len;
  183. *bth0p = bth0 | (1 << 22); /* Set M bit */
  184. *bth2p = bth2;
  185. return 1;
  186. bail:
  187. return 0;
  188. }
  189. /**
  190. * ipath_make_rc_req - construct a request packet (SEND, RDMA r/w, ATOMIC)
  191. * @qp: a pointer to the QP
  192. * @ohdr: a pointer to the IB header being constructed
  193. * @pmtu: the path MTU
  194. * @bth0p: pointer to the BTH opcode word
  195. * @bth2p: pointer to the BTH PSN word
  196. *
  197. * Return 1 if constructed; otherwise, return 0.
  198. * Note the QP s_lock must be held and interrupts disabled.
  199. */
  200. int ipath_make_rc_req(struct ipath_qp *qp,
  201. struct ipath_other_headers *ohdr,
  202. u32 pmtu, u32 *bth0p, u32 *bth2p)
  203. {
  204. struct ipath_ibdev *dev = to_idev(qp->ibqp.device);
  205. struct ipath_sge_state *ss;
  206. struct ipath_swqe *wqe;
  207. u32 hwords;
  208. u32 len;
  209. u32 bth0;
  210. u32 bth2;
  211. char newreq;
  212. /* Sending responses has higher priority over sending requests. */
  213. if ((qp->r_head_ack_queue != qp->s_tail_ack_queue ||
  214. (qp->s_flags & IPATH_S_ACK_PENDING) ||
  215. qp->s_ack_state != OP(ACKNOWLEDGE)) &&
  216. ipath_make_rc_ack(qp, ohdr, pmtu, bth0p, bth2p))
  217. goto done;
  218. if (!(ib_ipath_state_ops[qp->state] & IPATH_PROCESS_SEND_OK) ||
  219. qp->s_rnr_timeout || qp->s_wait_credit)
  220. goto bail;
  221. /* Limit the number of packets sent without an ACK. */
  222. if (ipath_cmp24(qp->s_psn, qp->s_last_psn + IPATH_PSN_CREDIT) > 0) {
  223. qp->s_wait_credit = 1;
  224. dev->n_rc_stalls++;
  225. goto bail;
  226. }
  227. /* header size in 32-bit words LRH+BTH = (8+12)/4. */
  228. hwords = 5;
  229. bth0 = 1 << 22; /* Set M bit */
  230. /* Send a request. */
  231. wqe = get_swqe_ptr(qp, qp->s_cur);
  232. switch (qp->s_state) {
  233. default:
  234. /*
  235. * Resend an old request or start a new one.
  236. *
  237. * We keep track of the current SWQE so that
  238. * we don't reset the "furthest progress" state
  239. * if we need to back up.
  240. */
  241. newreq = 0;
  242. if (qp->s_cur == qp->s_tail) {
  243. /* Check if send work queue is empty. */
  244. if (qp->s_tail == qp->s_head)
  245. goto bail;
  246. /*
  247. * If a fence is requested, wait for previous
  248. * RDMA read and atomic operations to finish.
  249. */
  250. if ((wqe->wr.send_flags & IB_SEND_FENCE) &&
  251. qp->s_num_rd_atomic) {
  252. qp->s_flags |= IPATH_S_FENCE_PENDING;
  253. goto bail;
  254. }
  255. wqe->psn = qp->s_next_psn;
  256. newreq = 1;
  257. }
  258. /*
  259. * Note that we have to be careful not to modify the
  260. * original work request since we may need to resend
  261. * it.
  262. */
  263. len = wqe->length;
  264. ss = &qp->s_sge;
  265. bth2 = 0;
  266. switch (wqe->wr.opcode) {
  267. case IB_WR_SEND:
  268. case IB_WR_SEND_WITH_IMM:
  269. /* If no credit, return. */
  270. if (qp->s_lsn != (u32) -1 &&
  271. ipath_cmp24(wqe->ssn, qp->s_lsn + 1) > 0)
  272. goto bail;
  273. wqe->lpsn = wqe->psn;
  274. if (len > pmtu) {
  275. wqe->lpsn += (len - 1) / pmtu;
  276. qp->s_state = OP(SEND_FIRST);
  277. len = pmtu;
  278. break;
  279. }
  280. if (wqe->wr.opcode == IB_WR_SEND)
  281. qp->s_state = OP(SEND_ONLY);
  282. else {
  283. qp->s_state = OP(SEND_ONLY_WITH_IMMEDIATE);
  284. /* Immediate data comes after the BTH */
  285. ohdr->u.imm_data = wqe->wr.imm_data;
  286. hwords += 1;
  287. }
  288. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  289. bth0 |= 1 << 23;
  290. bth2 = 1 << 31; /* Request ACK. */
  291. if (++qp->s_cur == qp->s_size)
  292. qp->s_cur = 0;
  293. break;
  294. case IB_WR_RDMA_WRITE:
  295. if (newreq && qp->s_lsn != (u32) -1)
  296. qp->s_lsn++;
  297. /* FALLTHROUGH */
  298. case IB_WR_RDMA_WRITE_WITH_IMM:
  299. /* If no credit, return. */
  300. if (qp->s_lsn != (u32) -1 &&
  301. ipath_cmp24(wqe->ssn, qp->s_lsn + 1) > 0)
  302. goto bail;
  303. ohdr->u.rc.reth.vaddr =
  304. cpu_to_be64(wqe->wr.wr.rdma.remote_addr);
  305. ohdr->u.rc.reth.rkey =
  306. cpu_to_be32(wqe->wr.wr.rdma.rkey);
  307. ohdr->u.rc.reth.length = cpu_to_be32(len);
  308. hwords += sizeof(struct ib_reth) / sizeof(u32);
  309. wqe->lpsn = wqe->psn;
  310. if (len > pmtu) {
  311. wqe->lpsn += (len - 1) / pmtu;
  312. qp->s_state = OP(RDMA_WRITE_FIRST);
  313. len = pmtu;
  314. break;
  315. }
  316. if (wqe->wr.opcode == IB_WR_RDMA_WRITE)
  317. qp->s_state = OP(RDMA_WRITE_ONLY);
  318. else {
  319. qp->s_state =
  320. OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE);
  321. /* Immediate data comes after RETH */
  322. ohdr->u.rc.imm_data = wqe->wr.imm_data;
  323. hwords += 1;
  324. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  325. bth0 |= 1 << 23;
  326. }
  327. bth2 = 1 << 31; /* Request ACK. */
  328. if (++qp->s_cur == qp->s_size)
  329. qp->s_cur = 0;
  330. break;
  331. case IB_WR_RDMA_READ:
  332. /*
  333. * Don't allow more operations to be started
  334. * than the QP limits allow.
  335. */
  336. if (newreq) {
  337. if (qp->s_num_rd_atomic >=
  338. qp->s_max_rd_atomic) {
  339. qp->s_flags |= IPATH_S_RDMAR_PENDING;
  340. goto bail;
  341. }
  342. qp->s_num_rd_atomic++;
  343. if (qp->s_lsn != (u32) -1)
  344. qp->s_lsn++;
  345. /*
  346. * Adjust s_next_psn to count the
  347. * expected number of responses.
  348. */
  349. if (len > pmtu)
  350. qp->s_next_psn += (len - 1) / pmtu;
  351. wqe->lpsn = qp->s_next_psn++;
  352. }
  353. ohdr->u.rc.reth.vaddr =
  354. cpu_to_be64(wqe->wr.wr.rdma.remote_addr);
  355. ohdr->u.rc.reth.rkey =
  356. cpu_to_be32(wqe->wr.wr.rdma.rkey);
  357. ohdr->u.rc.reth.length = cpu_to_be32(len);
  358. qp->s_state = OP(RDMA_READ_REQUEST);
  359. hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32);
  360. ss = NULL;
  361. len = 0;
  362. if (++qp->s_cur == qp->s_size)
  363. qp->s_cur = 0;
  364. break;
  365. case IB_WR_ATOMIC_CMP_AND_SWP:
  366. case IB_WR_ATOMIC_FETCH_AND_ADD:
  367. /*
  368. * Don't allow more operations to be started
  369. * than the QP limits allow.
  370. */
  371. if (newreq) {
  372. if (qp->s_num_rd_atomic >=
  373. qp->s_max_rd_atomic) {
  374. qp->s_flags |= IPATH_S_RDMAR_PENDING;
  375. goto bail;
  376. }
  377. qp->s_num_rd_atomic++;
  378. if (qp->s_lsn != (u32) -1)
  379. qp->s_lsn++;
  380. wqe->lpsn = wqe->psn;
  381. }
  382. if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP) {
  383. qp->s_state = OP(COMPARE_SWAP);
  384. ohdr->u.atomic_eth.swap_data = cpu_to_be64(
  385. wqe->wr.wr.atomic.swap);
  386. ohdr->u.atomic_eth.compare_data = cpu_to_be64(
  387. wqe->wr.wr.atomic.compare_add);
  388. } else {
  389. qp->s_state = OP(FETCH_ADD);
  390. ohdr->u.atomic_eth.swap_data = cpu_to_be64(
  391. wqe->wr.wr.atomic.compare_add);
  392. ohdr->u.atomic_eth.compare_data = 0;
  393. }
  394. ohdr->u.atomic_eth.vaddr[0] = cpu_to_be32(
  395. wqe->wr.wr.atomic.remote_addr >> 32);
  396. ohdr->u.atomic_eth.vaddr[1] = cpu_to_be32(
  397. wqe->wr.wr.atomic.remote_addr);
  398. ohdr->u.atomic_eth.rkey = cpu_to_be32(
  399. wqe->wr.wr.atomic.rkey);
  400. hwords += sizeof(struct ib_atomic_eth) / sizeof(u32);
  401. ss = NULL;
  402. len = 0;
  403. if (++qp->s_cur == qp->s_size)
  404. qp->s_cur = 0;
  405. break;
  406. default:
  407. goto bail;
  408. }
  409. qp->s_sge.sge = wqe->sg_list[0];
  410. qp->s_sge.sg_list = wqe->sg_list + 1;
  411. qp->s_sge.num_sge = wqe->wr.num_sge;
  412. qp->s_len = wqe->length;
  413. if (newreq) {
  414. qp->s_tail++;
  415. if (qp->s_tail >= qp->s_size)
  416. qp->s_tail = 0;
  417. }
  418. bth2 |= qp->s_psn & IPATH_PSN_MASK;
  419. if (wqe->wr.opcode == IB_WR_RDMA_READ)
  420. qp->s_psn = wqe->lpsn + 1;
  421. else {
  422. qp->s_psn++;
  423. if (ipath_cmp24(qp->s_psn, qp->s_next_psn) > 0)
  424. qp->s_next_psn = qp->s_psn;
  425. }
  426. /*
  427. * Put the QP on the pending list so lost ACKs will cause
  428. * a retry. More than one request can be pending so the
  429. * QP may already be on the dev->pending list.
  430. */
  431. spin_lock(&dev->pending_lock);
  432. if (list_empty(&qp->timerwait))
  433. list_add_tail(&qp->timerwait,
  434. &dev->pending[dev->pending_index]);
  435. spin_unlock(&dev->pending_lock);
  436. break;
  437. case OP(RDMA_READ_RESPONSE_FIRST):
  438. /*
  439. * This case can only happen if a send is restarted.
  440. * See ipath_restart_rc().
  441. */
  442. ipath_init_restart(qp, wqe);
  443. /* FALLTHROUGH */
  444. case OP(SEND_FIRST):
  445. qp->s_state = OP(SEND_MIDDLE);
  446. /* FALLTHROUGH */
  447. case OP(SEND_MIDDLE):
  448. bth2 = qp->s_psn++ & IPATH_PSN_MASK;
  449. if (ipath_cmp24(qp->s_psn, qp->s_next_psn) > 0)
  450. qp->s_next_psn = qp->s_psn;
  451. ss = &qp->s_sge;
  452. len = qp->s_len;
  453. if (len > pmtu) {
  454. len = pmtu;
  455. break;
  456. }
  457. if (wqe->wr.opcode == IB_WR_SEND)
  458. qp->s_state = OP(SEND_LAST);
  459. else {
  460. qp->s_state = OP(SEND_LAST_WITH_IMMEDIATE);
  461. /* Immediate data comes after the BTH */
  462. ohdr->u.imm_data = wqe->wr.imm_data;
  463. hwords += 1;
  464. }
  465. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  466. bth0 |= 1 << 23;
  467. bth2 |= 1 << 31; /* Request ACK. */
  468. qp->s_cur++;
  469. if (qp->s_cur >= qp->s_size)
  470. qp->s_cur = 0;
  471. break;
  472. case OP(RDMA_READ_RESPONSE_LAST):
  473. /*
  474. * This case can only happen if a RDMA write is restarted.
  475. * See ipath_restart_rc().
  476. */
  477. ipath_init_restart(qp, wqe);
  478. /* FALLTHROUGH */
  479. case OP(RDMA_WRITE_FIRST):
  480. qp->s_state = OP(RDMA_WRITE_MIDDLE);
  481. /* FALLTHROUGH */
  482. case OP(RDMA_WRITE_MIDDLE):
  483. bth2 = qp->s_psn++ & IPATH_PSN_MASK;
  484. if (ipath_cmp24(qp->s_psn, qp->s_next_psn) > 0)
  485. qp->s_next_psn = qp->s_psn;
  486. ss = &qp->s_sge;
  487. len = qp->s_len;
  488. if (len > pmtu) {
  489. len = pmtu;
  490. break;
  491. }
  492. if (wqe->wr.opcode == IB_WR_RDMA_WRITE)
  493. qp->s_state = OP(RDMA_WRITE_LAST);
  494. else {
  495. qp->s_state = OP(RDMA_WRITE_LAST_WITH_IMMEDIATE);
  496. /* Immediate data comes after the BTH */
  497. ohdr->u.imm_data = wqe->wr.imm_data;
  498. hwords += 1;
  499. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  500. bth0 |= 1 << 23;
  501. }
  502. bth2 |= 1 << 31; /* Request ACK. */
  503. qp->s_cur++;
  504. if (qp->s_cur >= qp->s_size)
  505. qp->s_cur = 0;
  506. break;
  507. case OP(RDMA_READ_RESPONSE_MIDDLE):
  508. /*
  509. * This case can only happen if a RDMA read is restarted.
  510. * See ipath_restart_rc().
  511. */
  512. ipath_init_restart(qp, wqe);
  513. len = ((qp->s_psn - wqe->psn) & IPATH_PSN_MASK) * pmtu;
  514. ohdr->u.rc.reth.vaddr =
  515. cpu_to_be64(wqe->wr.wr.rdma.remote_addr + len);
  516. ohdr->u.rc.reth.rkey =
  517. cpu_to_be32(wqe->wr.wr.rdma.rkey);
  518. ohdr->u.rc.reth.length = cpu_to_be32(qp->s_len);
  519. qp->s_state = OP(RDMA_READ_REQUEST);
  520. hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32);
  521. bth2 = qp->s_psn++ & IPATH_PSN_MASK;
  522. if (ipath_cmp24(qp->s_psn, qp->s_next_psn) > 0)
  523. qp->s_next_psn = qp->s_psn;
  524. ss = NULL;
  525. len = 0;
  526. qp->s_cur++;
  527. if (qp->s_cur == qp->s_size)
  528. qp->s_cur = 0;
  529. break;
  530. }
  531. if (ipath_cmp24(qp->s_psn, qp->s_last_psn + IPATH_PSN_CREDIT - 1) >= 0)
  532. bth2 |= 1 << 31; /* Request ACK. */
  533. qp->s_len -= len;
  534. qp->s_hdrwords = hwords;
  535. qp->s_cur_sge = ss;
  536. qp->s_cur_size = len;
  537. *bth0p = bth0 | (qp->s_state << 24);
  538. *bth2p = bth2;
  539. done:
  540. return 1;
  541. bail:
  542. return 0;
  543. }
  544. /**
  545. * send_rc_ack - Construct an ACK packet and send it
  546. * @qp: a pointer to the QP
  547. *
  548. * This is called from ipath_rc_rcv() and only uses the receive
  549. * side QP state.
  550. * Note that RDMA reads and atomics are handled in the
  551. * send side QP state and tasklet.
  552. */
  553. static void send_rc_ack(struct ipath_qp *qp)
  554. {
  555. struct ipath_ibdev *dev = to_idev(qp->ibqp.device);
  556. u16 lrh0;
  557. u32 bth0;
  558. u32 hwords;
  559. struct ipath_ib_header hdr;
  560. struct ipath_other_headers *ohdr;
  561. unsigned long flags;
  562. /* Don't send ACK or NAK if a RDMA read or atomic is pending. */
  563. if (qp->r_head_ack_queue != qp->s_tail_ack_queue ||
  564. (qp->s_flags & IPATH_S_ACK_PENDING) ||
  565. qp->s_ack_state != OP(ACKNOWLEDGE))
  566. goto queue_ack;
  567. /* Construct the header. */
  568. ohdr = &hdr.u.oth;
  569. lrh0 = IPATH_LRH_BTH;
  570. /* header size in 32-bit words LRH+BTH+AETH = (8+12+4)/4. */
  571. hwords = 6;
  572. if (unlikely(qp->remote_ah_attr.ah_flags & IB_AH_GRH)) {
  573. hwords += ipath_make_grh(dev, &hdr.u.l.grh,
  574. &qp->remote_ah_attr.grh,
  575. hwords, 0);
  576. ohdr = &hdr.u.l.oth;
  577. lrh0 = IPATH_LRH_GRH;
  578. }
  579. /* read pkey_index w/o lock (its atomic) */
  580. bth0 = ipath_get_pkey(dev->dd, qp->s_pkey_index) |
  581. (OP(ACKNOWLEDGE) << 24) | (1 << 22);
  582. if (qp->r_nak_state)
  583. ohdr->u.aeth = cpu_to_be32((qp->r_msn & IPATH_MSN_MASK) |
  584. (qp->r_nak_state <<
  585. IPATH_AETH_CREDIT_SHIFT));
  586. else
  587. ohdr->u.aeth = ipath_compute_aeth(qp);
  588. lrh0 |= qp->remote_ah_attr.sl << 4;
  589. hdr.lrh[0] = cpu_to_be16(lrh0);
  590. hdr.lrh[1] = cpu_to_be16(qp->remote_ah_attr.dlid);
  591. hdr.lrh[2] = cpu_to_be16(hwords + SIZE_OF_CRC);
  592. hdr.lrh[3] = cpu_to_be16(dev->dd->ipath_lid);
  593. ohdr->bth[0] = cpu_to_be32(bth0);
  594. ohdr->bth[1] = cpu_to_be32(qp->remote_qpn);
  595. ohdr->bth[2] = cpu_to_be32(qp->r_ack_psn & IPATH_PSN_MASK);
  596. /*
  597. * If we can send the ACK, clear the ACK state.
  598. */
  599. if (ipath_verbs_send(dev->dd, hwords, (u32 *) &hdr, 0, NULL) == 0) {
  600. dev->n_unicast_xmit++;
  601. goto done;
  602. }
  603. /*
  604. * We are out of PIO buffers at the moment.
  605. * Pass responsibility for sending the ACK to the
  606. * send tasklet so that when a PIO buffer becomes
  607. * available, the ACK is sent ahead of other outgoing
  608. * packets.
  609. */
  610. dev->n_rc_qacks++;
  611. queue_ack:
  612. spin_lock_irqsave(&qp->s_lock, flags);
  613. qp->s_flags |= IPATH_S_ACK_PENDING;
  614. qp->s_nak_state = qp->r_nak_state;
  615. qp->s_ack_psn = qp->r_ack_psn;
  616. spin_unlock_irqrestore(&qp->s_lock, flags);
  617. /* Call ipath_do_rc_send() in another thread. */
  618. tasklet_hi_schedule(&qp->s_task);
  619. done:
  620. return;
  621. }
  622. /**
  623. * reset_psn - reset the QP state to send starting from PSN
  624. * @qp: the QP
  625. * @psn: the packet sequence number to restart at
  626. *
  627. * This is called from ipath_rc_rcv() to process an incoming RC ACK
  628. * for the given QP.
  629. * Called at interrupt level with the QP s_lock held.
  630. */
  631. static void reset_psn(struct ipath_qp *qp, u32 psn)
  632. {
  633. u32 n = qp->s_last;
  634. struct ipath_swqe *wqe = get_swqe_ptr(qp, n);
  635. u32 opcode;
  636. qp->s_cur = n;
  637. /*
  638. * If we are starting the request from the beginning,
  639. * let the normal send code handle initialization.
  640. */
  641. if (ipath_cmp24(psn, wqe->psn) <= 0) {
  642. qp->s_state = OP(SEND_LAST);
  643. goto done;
  644. }
  645. /* Find the work request opcode corresponding to the given PSN. */
  646. opcode = wqe->wr.opcode;
  647. for (;;) {
  648. int diff;
  649. if (++n == qp->s_size)
  650. n = 0;
  651. if (n == qp->s_tail)
  652. break;
  653. wqe = get_swqe_ptr(qp, n);
  654. diff = ipath_cmp24(psn, wqe->psn);
  655. if (diff < 0)
  656. break;
  657. qp->s_cur = n;
  658. /*
  659. * If we are starting the request from the beginning,
  660. * let the normal send code handle initialization.
  661. */
  662. if (diff == 0) {
  663. qp->s_state = OP(SEND_LAST);
  664. goto done;
  665. }
  666. opcode = wqe->wr.opcode;
  667. }
  668. /*
  669. * Set the state to restart in the middle of a request.
  670. * Don't change the s_sge, s_cur_sge, or s_cur_size.
  671. * See ipath_do_rc_send().
  672. */
  673. switch (opcode) {
  674. case IB_WR_SEND:
  675. case IB_WR_SEND_WITH_IMM:
  676. qp->s_state = OP(RDMA_READ_RESPONSE_FIRST);
  677. break;
  678. case IB_WR_RDMA_WRITE:
  679. case IB_WR_RDMA_WRITE_WITH_IMM:
  680. qp->s_state = OP(RDMA_READ_RESPONSE_LAST);
  681. break;
  682. case IB_WR_RDMA_READ:
  683. qp->s_state = OP(RDMA_READ_RESPONSE_MIDDLE);
  684. break;
  685. default:
  686. /*
  687. * This case shouldn't happen since its only
  688. * one PSN per req.
  689. */
  690. qp->s_state = OP(SEND_LAST);
  691. }
  692. done:
  693. qp->s_psn = psn;
  694. }
  695. /**
  696. * ipath_restart_rc - back up requester to resend the last un-ACKed request
  697. * @qp: the QP to restart
  698. * @psn: packet sequence number for the request
  699. * @wc: the work completion request
  700. *
  701. * The QP s_lock should be held and interrupts disabled.
  702. */
  703. void ipath_restart_rc(struct ipath_qp *qp, u32 psn, struct ib_wc *wc)
  704. {
  705. struct ipath_swqe *wqe = get_swqe_ptr(qp, qp->s_last);
  706. struct ipath_ibdev *dev;
  707. if (qp->s_retry == 0) {
  708. wc->wr_id = wqe->wr.wr_id;
  709. wc->status = IB_WC_RETRY_EXC_ERR;
  710. wc->opcode = ib_ipath_wc_opcode[wqe->wr.opcode];
  711. wc->vendor_err = 0;
  712. wc->byte_len = 0;
  713. wc->qp = &qp->ibqp;
  714. wc->src_qp = qp->remote_qpn;
  715. wc->pkey_index = 0;
  716. wc->slid = qp->remote_ah_attr.dlid;
  717. wc->sl = qp->remote_ah_attr.sl;
  718. wc->dlid_path_bits = 0;
  719. wc->port_num = 0;
  720. ipath_sqerror_qp(qp, wc);
  721. goto bail;
  722. }
  723. qp->s_retry--;
  724. /*
  725. * Remove the QP from the timeout queue.
  726. * Note: it may already have been removed by ipath_ib_timer().
  727. */
  728. dev = to_idev(qp->ibqp.device);
  729. spin_lock(&dev->pending_lock);
  730. if (!list_empty(&qp->timerwait))
  731. list_del_init(&qp->timerwait);
  732. spin_unlock(&dev->pending_lock);
  733. if (wqe->wr.opcode == IB_WR_RDMA_READ)
  734. dev->n_rc_resends++;
  735. else
  736. dev->n_rc_resends += (qp->s_psn - psn) & IPATH_PSN_MASK;
  737. reset_psn(qp, psn);
  738. tasklet_hi_schedule(&qp->s_task);
  739. bail:
  740. return;
  741. }
  742. static inline void update_last_psn(struct ipath_qp *qp, u32 psn)
  743. {
  744. if (qp->s_wait_credit) {
  745. qp->s_wait_credit = 0;
  746. tasklet_hi_schedule(&qp->s_task);
  747. }
  748. qp->s_last_psn = psn;
  749. }
  750. /**
  751. * do_rc_ack - process an incoming RC ACK
  752. * @qp: the QP the ACK came in on
  753. * @psn: the packet sequence number of the ACK
  754. * @opcode: the opcode of the request that resulted in the ACK
  755. *
  756. * This is called from ipath_rc_rcv_resp() to process an incoming RC ACK
  757. * for the given QP.
  758. * Called at interrupt level with the QP s_lock held and interrupts disabled.
  759. * Returns 1 if OK, 0 if current operation should be aborted (NAK).
  760. */
  761. static int do_rc_ack(struct ipath_qp *qp, u32 aeth, u32 psn, int opcode,
  762. u64 val)
  763. {
  764. struct ipath_ibdev *dev = to_idev(qp->ibqp.device);
  765. struct ib_wc wc;
  766. struct ipath_swqe *wqe;
  767. int ret = 0;
  768. u32 ack_psn;
  769. int diff;
  770. /*
  771. * Remove the QP from the timeout queue (or RNR timeout queue).
  772. * If ipath_ib_timer() has already removed it,
  773. * it's OK since we hold the QP s_lock and ipath_restart_rc()
  774. * just won't find anything to restart if we ACK everything.
  775. */
  776. spin_lock(&dev->pending_lock);
  777. if (!list_empty(&qp->timerwait))
  778. list_del_init(&qp->timerwait);
  779. spin_unlock(&dev->pending_lock);
  780. /*
  781. * Note that NAKs implicitly ACK outstanding SEND and RDMA write
  782. * requests and implicitly NAK RDMA read and atomic requests issued
  783. * before the NAK'ed request. The MSN won't include the NAK'ed
  784. * request but will include an ACK'ed request(s).
  785. */
  786. ack_psn = psn;
  787. if (aeth >> 29)
  788. ack_psn--;
  789. wqe = get_swqe_ptr(qp, qp->s_last);
  790. /*
  791. * The MSN might be for a later WQE than the PSN indicates so
  792. * only complete WQEs that the PSN finishes.
  793. */
  794. while ((diff = ipath_cmp24(ack_psn, wqe->lpsn)) >= 0) {
  795. /*
  796. * RDMA_READ_RESPONSE_ONLY is a special case since
  797. * we want to generate completion events for everything
  798. * before the RDMA read, copy the data, then generate
  799. * the completion for the read.
  800. */
  801. if (wqe->wr.opcode == IB_WR_RDMA_READ &&
  802. opcode == OP(RDMA_READ_RESPONSE_ONLY) &&
  803. diff == 0) {
  804. ret = 1;
  805. goto bail;
  806. }
  807. /*
  808. * If this request is a RDMA read or atomic, and the ACK is
  809. * for a later operation, this ACK NAKs the RDMA read or
  810. * atomic. In other words, only a RDMA_READ_LAST or ONLY
  811. * can ACK a RDMA read and likewise for atomic ops. Note
  812. * that the NAK case can only happen if relaxed ordering is
  813. * used and requests are sent after an RDMA read or atomic
  814. * is sent but before the response is received.
  815. */
  816. if ((wqe->wr.opcode == IB_WR_RDMA_READ &&
  817. (opcode != OP(RDMA_READ_RESPONSE_LAST) || diff != 0)) ||
  818. ((wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
  819. wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) &&
  820. (opcode != OP(ATOMIC_ACKNOWLEDGE) || diff != 0))) {
  821. /*
  822. * The last valid PSN seen is the previous
  823. * request's.
  824. */
  825. update_last_psn(qp, wqe->psn - 1);
  826. /* Retry this request. */
  827. ipath_restart_rc(qp, wqe->psn, &wc);
  828. /*
  829. * No need to process the ACK/NAK since we are
  830. * restarting an earlier request.
  831. */
  832. goto bail;
  833. }
  834. if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
  835. wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)
  836. *(u64 *) wqe->sg_list[0].vaddr = val;
  837. if (qp->s_num_rd_atomic &&
  838. (wqe->wr.opcode == IB_WR_RDMA_READ ||
  839. wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
  840. wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)) {
  841. qp->s_num_rd_atomic--;
  842. /* Restart sending task if fence is complete */
  843. if ((qp->s_flags & IPATH_S_FENCE_PENDING) &&
  844. !qp->s_num_rd_atomic) {
  845. qp->s_flags &= ~IPATH_S_FENCE_PENDING;
  846. tasklet_hi_schedule(&qp->s_task);
  847. } else if (qp->s_flags & IPATH_S_RDMAR_PENDING) {
  848. qp->s_flags &= ~IPATH_S_RDMAR_PENDING;
  849. tasklet_hi_schedule(&qp->s_task);
  850. }
  851. }
  852. /* Post a send completion queue entry if requested. */
  853. if (!(qp->s_flags & IPATH_S_SIGNAL_REQ_WR) ||
  854. (wqe->wr.send_flags & IB_SEND_SIGNALED)) {
  855. wc.wr_id = wqe->wr.wr_id;
  856. wc.status = IB_WC_SUCCESS;
  857. wc.opcode = ib_ipath_wc_opcode[wqe->wr.opcode];
  858. wc.vendor_err = 0;
  859. wc.byte_len = wqe->length;
  860. wc.imm_data = 0;
  861. wc.qp = &qp->ibqp;
  862. wc.src_qp = qp->remote_qpn;
  863. wc.wc_flags = 0;
  864. wc.pkey_index = 0;
  865. wc.slid = qp->remote_ah_attr.dlid;
  866. wc.sl = qp->remote_ah_attr.sl;
  867. wc.dlid_path_bits = 0;
  868. wc.port_num = 0;
  869. ipath_cq_enter(to_icq(qp->ibqp.send_cq), &wc, 0);
  870. }
  871. qp->s_retry = qp->s_retry_cnt;
  872. /*
  873. * If we are completing a request which is in the process of
  874. * being resent, we can stop resending it since we know the
  875. * responder has already seen it.
  876. */
  877. if (qp->s_last == qp->s_cur) {
  878. if (++qp->s_cur >= qp->s_size)
  879. qp->s_cur = 0;
  880. qp->s_last = qp->s_cur;
  881. if (qp->s_last == qp->s_tail)
  882. break;
  883. wqe = get_swqe_ptr(qp, qp->s_cur);
  884. qp->s_state = OP(SEND_LAST);
  885. qp->s_psn = wqe->psn;
  886. } else {
  887. if (++qp->s_last >= qp->s_size)
  888. qp->s_last = 0;
  889. if (qp->s_last == qp->s_tail)
  890. break;
  891. wqe = get_swqe_ptr(qp, qp->s_last);
  892. }
  893. }
  894. switch (aeth >> 29) {
  895. case 0: /* ACK */
  896. dev->n_rc_acks++;
  897. /* If this is a partial ACK, reset the retransmit timer. */
  898. if (qp->s_last != qp->s_tail) {
  899. spin_lock(&dev->pending_lock);
  900. list_add_tail(&qp->timerwait,
  901. &dev->pending[dev->pending_index]);
  902. spin_unlock(&dev->pending_lock);
  903. /*
  904. * If we get a partial ACK for a resent operation,
  905. * we can stop resending the earlier packets and
  906. * continue with the next packet the receiver wants.
  907. */
  908. if (ipath_cmp24(qp->s_psn, psn) <= 0) {
  909. reset_psn(qp, psn + 1);
  910. tasklet_hi_schedule(&qp->s_task);
  911. }
  912. } else if (ipath_cmp24(qp->s_psn, psn) <= 0) {
  913. qp->s_state = OP(SEND_LAST);
  914. qp->s_psn = psn + 1;
  915. }
  916. ipath_get_credit(qp, aeth);
  917. qp->s_rnr_retry = qp->s_rnr_retry_cnt;
  918. qp->s_retry = qp->s_retry_cnt;
  919. update_last_psn(qp, psn);
  920. ret = 1;
  921. goto bail;
  922. case 1: /* RNR NAK */
  923. dev->n_rnr_naks++;
  924. if (qp->s_last == qp->s_tail)
  925. goto bail;
  926. if (qp->s_rnr_retry == 0) {
  927. wc.status = IB_WC_RNR_RETRY_EXC_ERR;
  928. goto class_b;
  929. }
  930. if (qp->s_rnr_retry_cnt < 7)
  931. qp->s_rnr_retry--;
  932. /* The last valid PSN is the previous PSN. */
  933. update_last_psn(qp, psn - 1);
  934. if (wqe->wr.opcode == IB_WR_RDMA_READ)
  935. dev->n_rc_resends++;
  936. else
  937. dev->n_rc_resends +=
  938. (qp->s_psn - psn) & IPATH_PSN_MASK;
  939. reset_psn(qp, psn);
  940. qp->s_rnr_timeout =
  941. ib_ipath_rnr_table[(aeth >> IPATH_AETH_CREDIT_SHIFT) &
  942. IPATH_AETH_CREDIT_MASK];
  943. ipath_insert_rnr_queue(qp);
  944. goto bail;
  945. case 3: /* NAK */
  946. if (qp->s_last == qp->s_tail)
  947. goto bail;
  948. /* The last valid PSN is the previous PSN. */
  949. update_last_psn(qp, psn - 1);
  950. switch ((aeth >> IPATH_AETH_CREDIT_SHIFT) &
  951. IPATH_AETH_CREDIT_MASK) {
  952. case 0: /* PSN sequence error */
  953. dev->n_seq_naks++;
  954. /*
  955. * Back up to the responder's expected PSN.
  956. * Note that we might get a NAK in the middle of an
  957. * RDMA READ response which terminates the RDMA
  958. * READ.
  959. */
  960. ipath_restart_rc(qp, psn, &wc);
  961. break;
  962. case 1: /* Invalid Request */
  963. wc.status = IB_WC_REM_INV_REQ_ERR;
  964. dev->n_other_naks++;
  965. goto class_b;
  966. case 2: /* Remote Access Error */
  967. wc.status = IB_WC_REM_ACCESS_ERR;
  968. dev->n_other_naks++;
  969. goto class_b;
  970. case 3: /* Remote Operation Error */
  971. wc.status = IB_WC_REM_OP_ERR;
  972. dev->n_other_naks++;
  973. class_b:
  974. wc.wr_id = wqe->wr.wr_id;
  975. wc.opcode = ib_ipath_wc_opcode[wqe->wr.opcode];
  976. wc.vendor_err = 0;
  977. wc.byte_len = 0;
  978. wc.qp = &qp->ibqp;
  979. wc.src_qp = qp->remote_qpn;
  980. wc.pkey_index = 0;
  981. wc.slid = qp->remote_ah_attr.dlid;
  982. wc.sl = qp->remote_ah_attr.sl;
  983. wc.dlid_path_bits = 0;
  984. wc.port_num = 0;
  985. ipath_sqerror_qp(qp, &wc);
  986. break;
  987. default:
  988. /* Ignore other reserved NAK error codes */
  989. goto reserved;
  990. }
  991. qp->s_rnr_retry = qp->s_rnr_retry_cnt;
  992. goto bail;
  993. default: /* 2: reserved */
  994. reserved:
  995. /* Ignore reserved NAK codes. */
  996. goto bail;
  997. }
  998. bail:
  999. return ret;
  1000. }
  1001. /**
  1002. * ipath_rc_rcv_resp - process an incoming RC response packet
  1003. * @dev: the device this packet came in on
  1004. * @ohdr: the other headers for this packet
  1005. * @data: the packet data
  1006. * @tlen: the packet length
  1007. * @qp: the QP for this packet
  1008. * @opcode: the opcode for this packet
  1009. * @psn: the packet sequence number for this packet
  1010. * @hdrsize: the header length
  1011. * @pmtu: the path MTU
  1012. * @header_in_data: true if part of the header data is in the data buffer
  1013. *
  1014. * This is called from ipath_rc_rcv() to process an incoming RC response
  1015. * packet for the given QP.
  1016. * Called at interrupt level.
  1017. */
  1018. static inline void ipath_rc_rcv_resp(struct ipath_ibdev *dev,
  1019. struct ipath_other_headers *ohdr,
  1020. void *data, u32 tlen,
  1021. struct ipath_qp *qp,
  1022. u32 opcode,
  1023. u32 psn, u32 hdrsize, u32 pmtu,
  1024. int header_in_data)
  1025. {
  1026. struct ipath_swqe *wqe;
  1027. unsigned long flags;
  1028. struct ib_wc wc;
  1029. int diff;
  1030. u32 pad;
  1031. u32 aeth;
  1032. u64 val;
  1033. spin_lock_irqsave(&qp->s_lock, flags);
  1034. /* Ignore invalid responses. */
  1035. if (ipath_cmp24(psn, qp->s_next_psn) >= 0)
  1036. goto ack_done;
  1037. /* Ignore duplicate responses. */
  1038. diff = ipath_cmp24(psn, qp->s_last_psn);
  1039. if (unlikely(diff <= 0)) {
  1040. /* Update credits for "ghost" ACKs */
  1041. if (diff == 0 && opcode == OP(ACKNOWLEDGE)) {
  1042. if (!header_in_data)
  1043. aeth = be32_to_cpu(ohdr->u.aeth);
  1044. else {
  1045. aeth = be32_to_cpu(((__be32 *) data)[0]);
  1046. data += sizeof(__be32);
  1047. }
  1048. if ((aeth >> 29) == 0)
  1049. ipath_get_credit(qp, aeth);
  1050. }
  1051. goto ack_done;
  1052. }
  1053. if (unlikely(qp->s_last == qp->s_tail))
  1054. goto ack_done;
  1055. wqe = get_swqe_ptr(qp, qp->s_last);
  1056. switch (opcode) {
  1057. case OP(ACKNOWLEDGE):
  1058. case OP(ATOMIC_ACKNOWLEDGE):
  1059. case OP(RDMA_READ_RESPONSE_FIRST):
  1060. if (!header_in_data)
  1061. aeth = be32_to_cpu(ohdr->u.aeth);
  1062. else {
  1063. aeth = be32_to_cpu(((__be32 *) data)[0]);
  1064. data += sizeof(__be32);
  1065. }
  1066. if (opcode == OP(ATOMIC_ACKNOWLEDGE)) {
  1067. if (!header_in_data) {
  1068. __be32 *p = ohdr->u.at.atomic_ack_eth;
  1069. val = ((u64) be32_to_cpu(p[0]) << 32) |
  1070. be32_to_cpu(p[1]);
  1071. } else
  1072. val = be64_to_cpu(((__be64 *) data)[0]);
  1073. } else
  1074. val = 0;
  1075. if (!do_rc_ack(qp, aeth, psn, opcode, val) ||
  1076. opcode != OP(RDMA_READ_RESPONSE_FIRST))
  1077. goto ack_done;
  1078. hdrsize += 4;
  1079. wqe = get_swqe_ptr(qp, qp->s_last);
  1080. if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
  1081. goto ack_op_err;
  1082. /*
  1083. * If this is a response to a resent RDMA read, we
  1084. * have to be careful to copy the data to the right
  1085. * location.
  1086. */
  1087. qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge,
  1088. wqe, psn, pmtu);
  1089. goto read_middle;
  1090. case OP(RDMA_READ_RESPONSE_MIDDLE):
  1091. /* no AETH, no ACK */
  1092. if (unlikely(ipath_cmp24(psn, qp->s_last_psn + 1))) {
  1093. dev->n_rdma_seq++;
  1094. ipath_restart_rc(qp, qp->s_last_psn + 1, &wc);
  1095. goto ack_done;
  1096. }
  1097. if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
  1098. goto ack_op_err;
  1099. read_middle:
  1100. if (unlikely(tlen != (hdrsize + pmtu + 4)))
  1101. goto ack_len_err;
  1102. if (unlikely(pmtu >= qp->s_rdma_read_len))
  1103. goto ack_len_err;
  1104. /* We got a response so update the timeout. */
  1105. spin_lock(&dev->pending_lock);
  1106. if (qp->s_rnr_timeout == 0 && !list_empty(&qp->timerwait))
  1107. list_move_tail(&qp->timerwait,
  1108. &dev->pending[dev->pending_index]);
  1109. spin_unlock(&dev->pending_lock);
  1110. /*
  1111. * Update the RDMA receive state but do the copy w/o
  1112. * holding the locks and blocking interrupts.
  1113. */
  1114. qp->s_rdma_read_len -= pmtu;
  1115. update_last_psn(qp, psn);
  1116. spin_unlock_irqrestore(&qp->s_lock, flags);
  1117. ipath_copy_sge(&qp->s_rdma_read_sge, data, pmtu);
  1118. goto bail;
  1119. case OP(RDMA_READ_RESPONSE_ONLY):
  1120. if (!header_in_data)
  1121. aeth = be32_to_cpu(ohdr->u.aeth);
  1122. else
  1123. aeth = be32_to_cpu(((__be32 *) data)[0]);
  1124. if (!do_rc_ack(qp, aeth, psn, opcode, 0))
  1125. goto ack_done;
  1126. /* Get the number of bytes the message was padded by. */
  1127. pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
  1128. /*
  1129. * Check that the data size is >= 0 && <= pmtu.
  1130. * Remember to account for the AETH header (4) and
  1131. * ICRC (4).
  1132. */
  1133. if (unlikely(tlen < (hdrsize + pad + 8)))
  1134. goto ack_len_err;
  1135. /*
  1136. * If this is a response to a resent RDMA read, we
  1137. * have to be careful to copy the data to the right
  1138. * location.
  1139. */
  1140. wqe = get_swqe_ptr(qp, qp->s_last);
  1141. qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge,
  1142. wqe, psn, pmtu);
  1143. goto read_last;
  1144. case OP(RDMA_READ_RESPONSE_LAST):
  1145. /* ACKs READ req. */
  1146. if (unlikely(ipath_cmp24(psn, qp->s_last_psn + 1))) {
  1147. dev->n_rdma_seq++;
  1148. ipath_restart_rc(qp, qp->s_last_psn + 1, &wc);
  1149. goto ack_done;
  1150. }
  1151. if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
  1152. goto ack_op_err;
  1153. /* Get the number of bytes the message was padded by. */
  1154. pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
  1155. /*
  1156. * Check that the data size is >= 1 && <= pmtu.
  1157. * Remember to account for the AETH header (4) and
  1158. * ICRC (4).
  1159. */
  1160. if (unlikely(tlen <= (hdrsize + pad + 8)))
  1161. goto ack_len_err;
  1162. read_last:
  1163. tlen -= hdrsize + pad + 8;
  1164. if (unlikely(tlen != qp->s_rdma_read_len))
  1165. goto ack_len_err;
  1166. if (!header_in_data)
  1167. aeth = be32_to_cpu(ohdr->u.aeth);
  1168. else {
  1169. aeth = be32_to_cpu(((__be32 *) data)[0]);
  1170. data += sizeof(__be32);
  1171. }
  1172. ipath_copy_sge(&qp->s_rdma_read_sge, data, tlen);
  1173. (void) do_rc_ack(qp, aeth, psn,
  1174. OP(RDMA_READ_RESPONSE_LAST), 0);
  1175. goto ack_done;
  1176. }
  1177. ack_done:
  1178. spin_unlock_irqrestore(&qp->s_lock, flags);
  1179. goto bail;
  1180. ack_op_err:
  1181. wc.status = IB_WC_LOC_QP_OP_ERR;
  1182. goto ack_err;
  1183. ack_len_err:
  1184. wc.status = IB_WC_LOC_LEN_ERR;
  1185. ack_err:
  1186. wc.wr_id = wqe->wr.wr_id;
  1187. wc.opcode = ib_ipath_wc_opcode[wqe->wr.opcode];
  1188. wc.vendor_err = 0;
  1189. wc.byte_len = 0;
  1190. wc.imm_data = 0;
  1191. wc.qp = &qp->ibqp;
  1192. wc.src_qp = qp->remote_qpn;
  1193. wc.wc_flags = 0;
  1194. wc.pkey_index = 0;
  1195. wc.slid = qp->remote_ah_attr.dlid;
  1196. wc.sl = qp->remote_ah_attr.sl;
  1197. wc.dlid_path_bits = 0;
  1198. wc.port_num = 0;
  1199. ipath_sqerror_qp(qp, &wc);
  1200. spin_unlock_irqrestore(&qp->s_lock, flags);
  1201. bail:
  1202. return;
  1203. }
  1204. /**
  1205. * ipath_rc_rcv_error - process an incoming duplicate or error RC packet
  1206. * @dev: the device this packet came in on
  1207. * @ohdr: the other headers for this packet
  1208. * @data: the packet data
  1209. * @qp: the QP for this packet
  1210. * @opcode: the opcode for this packet
  1211. * @psn: the packet sequence number for this packet
  1212. * @diff: the difference between the PSN and the expected PSN
  1213. * @header_in_data: true if part of the header data is in the data buffer
  1214. *
  1215. * This is called from ipath_rc_rcv() to process an unexpected
  1216. * incoming RC packet for the given QP.
  1217. * Called at interrupt level.
  1218. * Return 1 if no more processing is needed; otherwise return 0 to
  1219. * schedule a response to be sent.
  1220. */
  1221. static inline int ipath_rc_rcv_error(struct ipath_ibdev *dev,
  1222. struct ipath_other_headers *ohdr,
  1223. void *data,
  1224. struct ipath_qp *qp,
  1225. u32 opcode,
  1226. u32 psn,
  1227. int diff,
  1228. int header_in_data)
  1229. {
  1230. struct ipath_ack_entry *e;
  1231. u8 i, prev;
  1232. int old_req;
  1233. unsigned long flags;
  1234. if (diff > 0) {
  1235. /*
  1236. * Packet sequence error.
  1237. * A NAK will ACK earlier sends and RDMA writes.
  1238. * Don't queue the NAK if we already sent one.
  1239. */
  1240. if (!qp->r_nak_state) {
  1241. qp->r_nak_state = IB_NAK_PSN_ERROR;
  1242. /* Use the expected PSN. */
  1243. qp->r_ack_psn = qp->r_psn;
  1244. goto send_ack;
  1245. }
  1246. goto done;
  1247. }
  1248. /*
  1249. * Handle a duplicate request. Don't re-execute SEND, RDMA
  1250. * write or atomic op. Don't NAK errors, just silently drop
  1251. * the duplicate request. Note that r_sge, r_len, and
  1252. * r_rcv_len may be in use so don't modify them.
  1253. *
  1254. * We are supposed to ACK the earliest duplicate PSN but we
  1255. * can coalesce an outstanding duplicate ACK. We have to
  1256. * send the earliest so that RDMA reads can be restarted at
  1257. * the requester's expected PSN.
  1258. *
  1259. * First, find where this duplicate PSN falls within the
  1260. * ACKs previously sent.
  1261. */
  1262. psn &= IPATH_PSN_MASK;
  1263. e = NULL;
  1264. old_req = 1;
  1265. spin_lock_irqsave(&qp->s_lock, flags);
  1266. for (i = qp->r_head_ack_queue; ; i = prev) {
  1267. if (i == qp->s_tail_ack_queue)
  1268. old_req = 0;
  1269. if (i)
  1270. prev = i - 1;
  1271. else
  1272. prev = IPATH_MAX_RDMA_ATOMIC;
  1273. if (prev == qp->r_head_ack_queue) {
  1274. e = NULL;
  1275. break;
  1276. }
  1277. e = &qp->s_ack_queue[prev];
  1278. if (!e->opcode) {
  1279. e = NULL;
  1280. break;
  1281. }
  1282. if (ipath_cmp24(psn, e->psn) >= 0) {
  1283. if (prev == qp->s_tail_ack_queue)
  1284. old_req = 0;
  1285. break;
  1286. }
  1287. }
  1288. switch (opcode) {
  1289. case OP(RDMA_READ_REQUEST): {
  1290. struct ib_reth *reth;
  1291. u32 offset;
  1292. u32 len;
  1293. /*
  1294. * If we didn't find the RDMA read request in the ack queue,
  1295. * or the send tasklet is already backed up to send an
  1296. * earlier entry, we can ignore this request.
  1297. */
  1298. if (!e || e->opcode != OP(RDMA_READ_REQUEST) || old_req)
  1299. goto unlock_done;
  1300. /* RETH comes after BTH */
  1301. if (!header_in_data)
  1302. reth = &ohdr->u.rc.reth;
  1303. else {
  1304. reth = (struct ib_reth *)data;
  1305. data += sizeof(*reth);
  1306. }
  1307. /*
  1308. * Address range must be a subset of the original
  1309. * request and start on pmtu boundaries.
  1310. * We reuse the old ack_queue slot since the requester
  1311. * should not back up and request an earlier PSN for the
  1312. * same request.
  1313. */
  1314. offset = ((psn - e->psn) & IPATH_PSN_MASK) *
  1315. ib_mtu_enum_to_int(qp->path_mtu);
  1316. len = be32_to_cpu(reth->length);
  1317. if (unlikely(offset + len > e->rdma_sge.sge.sge_length))
  1318. goto unlock_done;
  1319. if (len != 0) {
  1320. u32 rkey = be32_to_cpu(reth->rkey);
  1321. u64 vaddr = be64_to_cpu(reth->vaddr);
  1322. int ok;
  1323. ok = ipath_rkey_ok(qp, &e->rdma_sge,
  1324. len, vaddr, rkey,
  1325. IB_ACCESS_REMOTE_READ);
  1326. if (unlikely(!ok))
  1327. goto unlock_done;
  1328. } else {
  1329. e->rdma_sge.sg_list = NULL;
  1330. e->rdma_sge.num_sge = 0;
  1331. e->rdma_sge.sge.mr = NULL;
  1332. e->rdma_sge.sge.vaddr = NULL;
  1333. e->rdma_sge.sge.length = 0;
  1334. e->rdma_sge.sge.sge_length = 0;
  1335. }
  1336. e->psn = psn;
  1337. qp->s_ack_state = OP(ACKNOWLEDGE);
  1338. qp->s_tail_ack_queue = prev;
  1339. break;
  1340. }
  1341. case OP(COMPARE_SWAP):
  1342. case OP(FETCH_ADD): {
  1343. /*
  1344. * If we didn't find the atomic request in the ack queue
  1345. * or the send tasklet is already backed up to send an
  1346. * earlier entry, we can ignore this request.
  1347. */
  1348. if (!e || e->opcode != (u8) opcode || old_req)
  1349. goto unlock_done;
  1350. qp->s_ack_state = OP(ACKNOWLEDGE);
  1351. qp->s_tail_ack_queue = prev;
  1352. break;
  1353. }
  1354. default:
  1355. if (old_req)
  1356. goto unlock_done;
  1357. /*
  1358. * Resend the most recent ACK if this request is
  1359. * after all the previous RDMA reads and atomics.
  1360. */
  1361. if (i == qp->r_head_ack_queue) {
  1362. spin_unlock_irqrestore(&qp->s_lock, flags);
  1363. qp->r_nak_state = 0;
  1364. qp->r_ack_psn = qp->r_psn - 1;
  1365. goto send_ack;
  1366. }
  1367. /*
  1368. * Resend the RDMA read or atomic op which
  1369. * ACKs this duplicate request.
  1370. */
  1371. qp->s_ack_state = OP(ACKNOWLEDGE);
  1372. qp->s_tail_ack_queue = i;
  1373. break;
  1374. }
  1375. qp->r_nak_state = 0;
  1376. tasklet_hi_schedule(&qp->s_task);
  1377. unlock_done:
  1378. spin_unlock_irqrestore(&qp->s_lock, flags);
  1379. done:
  1380. return 1;
  1381. send_ack:
  1382. return 0;
  1383. }
  1384. static void ipath_rc_error(struct ipath_qp *qp, enum ib_wc_status err)
  1385. {
  1386. unsigned long flags;
  1387. spin_lock_irqsave(&qp->s_lock, flags);
  1388. qp->state = IB_QPS_ERR;
  1389. ipath_error_qp(qp, err);
  1390. spin_unlock_irqrestore(&qp->s_lock, flags);
  1391. }
  1392. static inline void ipath_update_ack_queue(struct ipath_qp *qp, unsigned n)
  1393. {
  1394. unsigned long flags;
  1395. unsigned next;
  1396. next = n + 1;
  1397. if (next > IPATH_MAX_RDMA_ATOMIC)
  1398. next = 0;
  1399. spin_lock_irqsave(&qp->s_lock, flags);
  1400. if (n == qp->s_tail_ack_queue) {
  1401. qp->s_tail_ack_queue = next;
  1402. qp->s_ack_state = OP(ACKNOWLEDGE);
  1403. }
  1404. spin_unlock_irqrestore(&qp->s_lock, flags);
  1405. }
  1406. /**
  1407. * ipath_rc_rcv - process an incoming RC packet
  1408. * @dev: the device this packet came in on
  1409. * @hdr: the header of this packet
  1410. * @has_grh: true if the header has a GRH
  1411. * @data: the packet data
  1412. * @tlen: the packet length
  1413. * @qp: the QP for this packet
  1414. *
  1415. * This is called from ipath_qp_rcv() to process an incoming RC packet
  1416. * for the given QP.
  1417. * Called at interrupt level.
  1418. */
  1419. void ipath_rc_rcv(struct ipath_ibdev *dev, struct ipath_ib_header *hdr,
  1420. int has_grh, void *data, u32 tlen, struct ipath_qp *qp)
  1421. {
  1422. struct ipath_other_headers *ohdr;
  1423. u32 opcode;
  1424. u32 hdrsize;
  1425. u32 psn;
  1426. u32 pad;
  1427. struct ib_wc wc;
  1428. u32 pmtu = ib_mtu_enum_to_int(qp->path_mtu);
  1429. int diff;
  1430. struct ib_reth *reth;
  1431. int header_in_data;
  1432. /* Validate the SLID. See Ch. 9.6.1.5 */
  1433. if (unlikely(be16_to_cpu(hdr->lrh[3]) != qp->remote_ah_attr.dlid))
  1434. goto done;
  1435. /* Check for GRH */
  1436. if (!has_grh) {
  1437. ohdr = &hdr->u.oth;
  1438. hdrsize = 8 + 12; /* LRH + BTH */
  1439. psn = be32_to_cpu(ohdr->bth[2]);
  1440. header_in_data = 0;
  1441. } else {
  1442. ohdr = &hdr->u.l.oth;
  1443. hdrsize = 8 + 40 + 12; /* LRH + GRH + BTH */
  1444. /*
  1445. * The header with GRH is 60 bytes and the core driver sets
  1446. * the eager header buffer size to 56 bytes so the last 4
  1447. * bytes of the BTH header (PSN) is in the data buffer.
  1448. */
  1449. header_in_data = dev->dd->ipath_rcvhdrentsize == 16;
  1450. if (header_in_data) {
  1451. psn = be32_to_cpu(((__be32 *) data)[0]);
  1452. data += sizeof(__be32);
  1453. } else
  1454. psn = be32_to_cpu(ohdr->bth[2]);
  1455. }
  1456. /*
  1457. * Process responses (ACKs) before anything else. Note that the
  1458. * packet sequence number will be for something in the send work
  1459. * queue rather than the expected receive packet sequence number.
  1460. * In other words, this QP is the requester.
  1461. */
  1462. opcode = be32_to_cpu(ohdr->bth[0]) >> 24;
  1463. if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) &&
  1464. opcode <= OP(ATOMIC_ACKNOWLEDGE)) {
  1465. ipath_rc_rcv_resp(dev, ohdr, data, tlen, qp, opcode, psn,
  1466. hdrsize, pmtu, header_in_data);
  1467. goto done;
  1468. }
  1469. /* Compute 24 bits worth of difference. */
  1470. diff = ipath_cmp24(psn, qp->r_psn);
  1471. if (unlikely(diff)) {
  1472. if (ipath_rc_rcv_error(dev, ohdr, data, qp, opcode,
  1473. psn, diff, header_in_data))
  1474. goto done;
  1475. goto send_ack;
  1476. }
  1477. /* Check for opcode sequence errors. */
  1478. switch (qp->r_state) {
  1479. case OP(SEND_FIRST):
  1480. case OP(SEND_MIDDLE):
  1481. if (opcode == OP(SEND_MIDDLE) ||
  1482. opcode == OP(SEND_LAST) ||
  1483. opcode == OP(SEND_LAST_WITH_IMMEDIATE))
  1484. break;
  1485. nack_inv:
  1486. ipath_rc_error(qp, IB_WC_REM_INV_REQ_ERR);
  1487. qp->r_nak_state = IB_NAK_INVALID_REQUEST;
  1488. qp->r_ack_psn = qp->r_psn;
  1489. goto send_ack;
  1490. case OP(RDMA_WRITE_FIRST):
  1491. case OP(RDMA_WRITE_MIDDLE):
  1492. if (opcode == OP(RDMA_WRITE_MIDDLE) ||
  1493. opcode == OP(RDMA_WRITE_LAST) ||
  1494. opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
  1495. break;
  1496. goto nack_inv;
  1497. default:
  1498. if (opcode == OP(SEND_MIDDLE) ||
  1499. opcode == OP(SEND_LAST) ||
  1500. opcode == OP(SEND_LAST_WITH_IMMEDIATE) ||
  1501. opcode == OP(RDMA_WRITE_MIDDLE) ||
  1502. opcode == OP(RDMA_WRITE_LAST) ||
  1503. opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
  1504. goto nack_inv;
  1505. /*
  1506. * Note that it is up to the requester to not send a new
  1507. * RDMA read or atomic operation before receiving an ACK
  1508. * for the previous operation.
  1509. */
  1510. break;
  1511. }
  1512. wc.imm_data = 0;
  1513. wc.wc_flags = 0;
  1514. /* OK, process the packet. */
  1515. switch (opcode) {
  1516. case OP(SEND_FIRST):
  1517. if (!ipath_get_rwqe(qp, 0)) {
  1518. rnr_nak:
  1519. /*
  1520. * A RNR NAK will ACK earlier sends and RDMA writes.
  1521. * Don't queue the NAK if a RDMA read or atomic
  1522. * is pending though.
  1523. */
  1524. if (qp->r_nak_state)
  1525. goto done;
  1526. qp->r_nak_state = IB_RNR_NAK | qp->r_min_rnr_timer;
  1527. qp->r_ack_psn = qp->r_psn;
  1528. goto send_ack;
  1529. }
  1530. qp->r_rcv_len = 0;
  1531. /* FALLTHROUGH */
  1532. case OP(SEND_MIDDLE):
  1533. case OP(RDMA_WRITE_MIDDLE):
  1534. send_middle:
  1535. /* Check for invalid length PMTU or posted rwqe len. */
  1536. if (unlikely(tlen != (hdrsize + pmtu + 4)))
  1537. goto nack_inv;
  1538. qp->r_rcv_len += pmtu;
  1539. if (unlikely(qp->r_rcv_len > qp->r_len))
  1540. goto nack_inv;
  1541. ipath_copy_sge(&qp->r_sge, data, pmtu);
  1542. break;
  1543. case OP(RDMA_WRITE_LAST_WITH_IMMEDIATE):
  1544. /* consume RWQE */
  1545. if (!ipath_get_rwqe(qp, 1))
  1546. goto rnr_nak;
  1547. goto send_last_imm;
  1548. case OP(SEND_ONLY):
  1549. case OP(SEND_ONLY_WITH_IMMEDIATE):
  1550. if (!ipath_get_rwqe(qp, 0))
  1551. goto rnr_nak;
  1552. qp->r_rcv_len = 0;
  1553. if (opcode == OP(SEND_ONLY))
  1554. goto send_last;
  1555. /* FALLTHROUGH */
  1556. case OP(SEND_LAST_WITH_IMMEDIATE):
  1557. send_last_imm:
  1558. if (header_in_data) {
  1559. wc.imm_data = *(__be32 *) data;
  1560. data += sizeof(__be32);
  1561. } else {
  1562. /* Immediate data comes after BTH */
  1563. wc.imm_data = ohdr->u.imm_data;
  1564. }
  1565. hdrsize += 4;
  1566. wc.wc_flags = IB_WC_WITH_IMM;
  1567. /* FALLTHROUGH */
  1568. case OP(SEND_LAST):
  1569. case OP(RDMA_WRITE_LAST):
  1570. send_last:
  1571. /* Get the number of bytes the message was padded by. */
  1572. pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
  1573. /* Check for invalid length. */
  1574. /* XXX LAST len should be >= 1 */
  1575. if (unlikely(tlen < (hdrsize + pad + 4)))
  1576. goto nack_inv;
  1577. /* Don't count the CRC. */
  1578. tlen -= (hdrsize + pad + 4);
  1579. wc.byte_len = tlen + qp->r_rcv_len;
  1580. if (unlikely(wc.byte_len > qp->r_len))
  1581. goto nack_inv;
  1582. ipath_copy_sge(&qp->r_sge, data, tlen);
  1583. qp->r_msn++;
  1584. if (!qp->r_wrid_valid)
  1585. break;
  1586. qp->r_wrid_valid = 0;
  1587. wc.wr_id = qp->r_wr_id;
  1588. wc.status = IB_WC_SUCCESS;
  1589. wc.opcode = IB_WC_RECV;
  1590. wc.vendor_err = 0;
  1591. wc.qp = &qp->ibqp;
  1592. wc.src_qp = qp->remote_qpn;
  1593. wc.pkey_index = 0;
  1594. wc.slid = qp->remote_ah_attr.dlid;
  1595. wc.sl = qp->remote_ah_attr.sl;
  1596. wc.dlid_path_bits = 0;
  1597. wc.port_num = 0;
  1598. /* Signal completion event if the solicited bit is set. */
  1599. ipath_cq_enter(to_icq(qp->ibqp.recv_cq), &wc,
  1600. (ohdr->bth[0] &
  1601. __constant_cpu_to_be32(1 << 23)) != 0);
  1602. break;
  1603. case OP(RDMA_WRITE_FIRST):
  1604. case OP(RDMA_WRITE_ONLY):
  1605. case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE):
  1606. if (unlikely(!(qp->qp_access_flags &
  1607. IB_ACCESS_REMOTE_WRITE)))
  1608. goto nack_inv;
  1609. /* consume RWQE */
  1610. /* RETH comes after BTH */
  1611. if (!header_in_data)
  1612. reth = &ohdr->u.rc.reth;
  1613. else {
  1614. reth = (struct ib_reth *)data;
  1615. data += sizeof(*reth);
  1616. }
  1617. hdrsize += sizeof(*reth);
  1618. qp->r_len = be32_to_cpu(reth->length);
  1619. qp->r_rcv_len = 0;
  1620. if (qp->r_len != 0) {
  1621. u32 rkey = be32_to_cpu(reth->rkey);
  1622. u64 vaddr = be64_to_cpu(reth->vaddr);
  1623. int ok;
  1624. /* Check rkey & NAK */
  1625. ok = ipath_rkey_ok(qp, &qp->r_sge,
  1626. qp->r_len, vaddr, rkey,
  1627. IB_ACCESS_REMOTE_WRITE);
  1628. if (unlikely(!ok))
  1629. goto nack_acc;
  1630. } else {
  1631. qp->r_sge.sg_list = NULL;
  1632. qp->r_sge.sge.mr = NULL;
  1633. qp->r_sge.sge.vaddr = NULL;
  1634. qp->r_sge.sge.length = 0;
  1635. qp->r_sge.sge.sge_length = 0;
  1636. }
  1637. if (opcode == OP(RDMA_WRITE_FIRST))
  1638. goto send_middle;
  1639. else if (opcode == OP(RDMA_WRITE_ONLY))
  1640. goto send_last;
  1641. if (!ipath_get_rwqe(qp, 1))
  1642. goto rnr_nak;
  1643. goto send_last_imm;
  1644. case OP(RDMA_READ_REQUEST): {
  1645. struct ipath_ack_entry *e;
  1646. u32 len;
  1647. u8 next;
  1648. if (unlikely(!(qp->qp_access_flags &
  1649. IB_ACCESS_REMOTE_READ)))
  1650. goto nack_inv;
  1651. next = qp->r_head_ack_queue + 1;
  1652. if (next > IPATH_MAX_RDMA_ATOMIC)
  1653. next = 0;
  1654. if (unlikely(next == qp->s_tail_ack_queue)) {
  1655. if (!qp->s_ack_queue[next].sent)
  1656. goto nack_inv;
  1657. ipath_update_ack_queue(qp, next);
  1658. }
  1659. e = &qp->s_ack_queue[qp->r_head_ack_queue];
  1660. /* RETH comes after BTH */
  1661. if (!header_in_data)
  1662. reth = &ohdr->u.rc.reth;
  1663. else {
  1664. reth = (struct ib_reth *)data;
  1665. data += sizeof(*reth);
  1666. }
  1667. len = be32_to_cpu(reth->length);
  1668. if (len) {
  1669. u32 rkey = be32_to_cpu(reth->rkey);
  1670. u64 vaddr = be64_to_cpu(reth->vaddr);
  1671. int ok;
  1672. /* Check rkey & NAK */
  1673. ok = ipath_rkey_ok(qp, &e->rdma_sge, len, vaddr,
  1674. rkey, IB_ACCESS_REMOTE_READ);
  1675. if (unlikely(!ok))
  1676. goto nack_acc;
  1677. /*
  1678. * Update the next expected PSN. We add 1 later
  1679. * below, so only add the remainder here.
  1680. */
  1681. if (len > pmtu)
  1682. qp->r_psn += (len - 1) / pmtu;
  1683. } else {
  1684. e->rdma_sge.sg_list = NULL;
  1685. e->rdma_sge.num_sge = 0;
  1686. e->rdma_sge.sge.mr = NULL;
  1687. e->rdma_sge.sge.vaddr = NULL;
  1688. e->rdma_sge.sge.length = 0;
  1689. e->rdma_sge.sge.sge_length = 0;
  1690. }
  1691. e->opcode = opcode;
  1692. e->sent = 0;
  1693. e->psn = psn;
  1694. /*
  1695. * We need to increment the MSN here instead of when we
  1696. * finish sending the result since a duplicate request would
  1697. * increment it more than once.
  1698. */
  1699. qp->r_msn++;
  1700. qp->r_psn++;
  1701. qp->r_state = opcode;
  1702. qp->r_nak_state = 0;
  1703. barrier();
  1704. qp->r_head_ack_queue = next;
  1705. /* Call ipath_do_rc_send() in another thread. */
  1706. tasklet_hi_schedule(&qp->s_task);
  1707. goto done;
  1708. }
  1709. case OP(COMPARE_SWAP):
  1710. case OP(FETCH_ADD): {
  1711. struct ib_atomic_eth *ateth;
  1712. struct ipath_ack_entry *e;
  1713. u64 vaddr;
  1714. atomic64_t *maddr;
  1715. u64 sdata;
  1716. u32 rkey;
  1717. u8 next;
  1718. if (unlikely(!(qp->qp_access_flags &
  1719. IB_ACCESS_REMOTE_ATOMIC)))
  1720. goto nack_inv;
  1721. next = qp->r_head_ack_queue + 1;
  1722. if (next > IPATH_MAX_RDMA_ATOMIC)
  1723. next = 0;
  1724. if (unlikely(next == qp->s_tail_ack_queue)) {
  1725. if (!qp->s_ack_queue[next].sent)
  1726. goto nack_inv;
  1727. ipath_update_ack_queue(qp, next);
  1728. }
  1729. if (!header_in_data)
  1730. ateth = &ohdr->u.atomic_eth;
  1731. else
  1732. ateth = (struct ib_atomic_eth *)data;
  1733. vaddr = ((u64) be32_to_cpu(ateth->vaddr[0]) << 32) |
  1734. be32_to_cpu(ateth->vaddr[1]);
  1735. if (unlikely(vaddr & (sizeof(u64) - 1)))
  1736. goto nack_inv;
  1737. rkey = be32_to_cpu(ateth->rkey);
  1738. /* Check rkey & NAK */
  1739. if (unlikely(!ipath_rkey_ok(qp, &qp->r_sge,
  1740. sizeof(u64), vaddr, rkey,
  1741. IB_ACCESS_REMOTE_ATOMIC)))
  1742. goto nack_acc;
  1743. /* Perform atomic OP and save result. */
  1744. maddr = (atomic64_t *) qp->r_sge.sge.vaddr;
  1745. sdata = be64_to_cpu(ateth->swap_data);
  1746. e = &qp->s_ack_queue[qp->r_head_ack_queue];
  1747. e->atomic_data = (opcode == OP(FETCH_ADD)) ?
  1748. (u64) atomic64_add_return(sdata, maddr) - sdata :
  1749. (u64) cmpxchg((u64 *) qp->r_sge.sge.vaddr,
  1750. be64_to_cpu(ateth->compare_data),
  1751. sdata);
  1752. e->opcode = opcode;
  1753. e->sent = 0;
  1754. e->psn = psn & IPATH_PSN_MASK;
  1755. qp->r_msn++;
  1756. qp->r_psn++;
  1757. qp->r_state = opcode;
  1758. qp->r_nak_state = 0;
  1759. barrier();
  1760. qp->r_head_ack_queue = next;
  1761. /* Call ipath_do_rc_send() in another thread. */
  1762. tasklet_hi_schedule(&qp->s_task);
  1763. goto done;
  1764. }
  1765. default:
  1766. /* NAK unknown opcodes. */
  1767. goto nack_inv;
  1768. }
  1769. qp->r_psn++;
  1770. qp->r_state = opcode;
  1771. qp->r_ack_psn = psn;
  1772. qp->r_nak_state = 0;
  1773. /* Send an ACK if requested or required. */
  1774. if (psn & (1 << 31))
  1775. goto send_ack;
  1776. goto done;
  1777. nack_acc:
  1778. ipath_rc_error(qp, IB_WC_REM_ACCESS_ERR);
  1779. qp->r_nak_state = IB_NAK_REMOTE_ACCESS_ERROR;
  1780. qp->r_ack_psn = qp->r_psn;
  1781. send_ack:
  1782. send_rc_ack(qp);
  1783. done:
  1784. return;
  1785. }