ehca_classes.h 9.7 KB

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  1. /*
  2. * IBM eServer eHCA Infiniband device driver for Linux on POWER
  3. *
  4. * Struct definition for eHCA internal structures
  5. *
  6. * Authors: Heiko J Schick <schickhj@de.ibm.com>
  7. * Christoph Raisch <raisch@de.ibm.com>
  8. * Joachim Fenkes <fenkes@de.ibm.com>
  9. *
  10. * Copyright (c) 2005 IBM Corporation
  11. *
  12. * All rights reserved.
  13. *
  14. * This source code is distributed under a dual license of GPL v2.0 and OpenIB
  15. * BSD.
  16. *
  17. * OpenIB BSD License
  18. *
  19. * Redistribution and use in source and binary forms, with or without
  20. * modification, are permitted provided that the following conditions are met:
  21. *
  22. * Redistributions of source code must retain the above copyright notice, this
  23. * list of conditions and the following disclaimer.
  24. *
  25. * Redistributions in binary form must reproduce the above copyright notice,
  26. * this list of conditions and the following disclaimer in the documentation
  27. * and/or other materials
  28. * provided with the distribution.
  29. *
  30. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  31. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  32. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  33. * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  34. * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  35. * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  36. * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
  37. * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
  38. * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  39. * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  40. * POSSIBILITY OF SUCH DAMAGE.
  41. */
  42. #ifndef __EHCA_CLASSES_H__
  43. #define __EHCA_CLASSES_H__
  44. struct ehca_module;
  45. struct ehca_qp;
  46. struct ehca_cq;
  47. struct ehca_eq;
  48. struct ehca_mr;
  49. struct ehca_mw;
  50. struct ehca_pd;
  51. struct ehca_av;
  52. #include <linux/wait.h>
  53. #include <rdma/ib_verbs.h>
  54. #include <rdma/ib_user_verbs.h>
  55. #ifdef CONFIG_PPC64
  56. #include "ehca_classes_pSeries.h"
  57. #endif
  58. #include "ipz_pt_fn.h"
  59. #include "ehca_qes.h"
  60. #include "ehca_irq.h"
  61. #define EHCA_EQE_CACHE_SIZE 20
  62. struct ehca_eqe_cache_entry {
  63. struct ehca_eqe *eqe;
  64. struct ehca_cq *cq;
  65. };
  66. struct ehca_eq {
  67. u32 length;
  68. struct ipz_queue ipz_queue;
  69. struct ipz_eq_handle ipz_eq_handle;
  70. struct work_struct work;
  71. struct h_galpas galpas;
  72. int is_initialized;
  73. struct ehca_pfeq pf;
  74. spinlock_t spinlock;
  75. struct tasklet_struct interrupt_task;
  76. u32 ist;
  77. spinlock_t irq_spinlock;
  78. struct ehca_eqe_cache_entry eqe_cache[EHCA_EQE_CACHE_SIZE];
  79. };
  80. struct ehca_sma_attr {
  81. u16 lid, lmc, sm_sl, sm_lid;
  82. u16 pkey_tbl_len, pkeys[16];
  83. };
  84. struct ehca_sport {
  85. struct ib_cq *ibcq_aqp1;
  86. struct ib_qp *ibqp_aqp1;
  87. enum ib_rate rate;
  88. enum ib_port_state port_state;
  89. struct ehca_sma_attr saved_attr;
  90. };
  91. struct ehca_shca {
  92. struct ib_device ib_device;
  93. struct ibmebus_dev *ibmebus_dev;
  94. u8 num_ports;
  95. int hw_level;
  96. struct list_head shca_list;
  97. struct ipz_adapter_handle ipz_hca_handle;
  98. struct ehca_sport sport[2];
  99. struct ehca_eq eq;
  100. struct ehca_eq neq;
  101. struct ehca_mr *maxmr;
  102. struct ehca_pd *pd;
  103. struct h_galpas galpas;
  104. struct mutex modify_mutex;
  105. u64 hca_cap;
  106. int max_mtu;
  107. };
  108. struct ehca_pd {
  109. struct ib_pd ib_pd;
  110. struct ipz_pd fw_pd;
  111. u32 ownpid;
  112. };
  113. enum ehca_ext_qp_type {
  114. EQPT_NORMAL = 0,
  115. EQPT_LLQP = 1,
  116. EQPT_SRQBASE = 2,
  117. EQPT_SRQ = 3,
  118. };
  119. struct ehca_qp {
  120. union {
  121. struct ib_qp ib_qp;
  122. struct ib_srq ib_srq;
  123. };
  124. u32 qp_type;
  125. enum ehca_ext_qp_type ext_type;
  126. struct ipz_queue ipz_squeue;
  127. struct ipz_queue ipz_rqueue;
  128. struct h_galpas galpas;
  129. u32 qkey;
  130. u32 real_qp_num;
  131. u32 token;
  132. spinlock_t spinlock_s;
  133. spinlock_t spinlock_r;
  134. u32 sq_max_inline_data_size;
  135. struct ipz_qp_handle ipz_qp_handle;
  136. struct ehca_pfqp pf;
  137. struct ib_qp_init_attr init_attr;
  138. struct ehca_cq *send_cq;
  139. struct ehca_cq *recv_cq;
  140. unsigned int sqerr_purgeflag;
  141. struct hlist_node list_entries;
  142. /* mmap counter for resources mapped into user space */
  143. u32 mm_count_squeue;
  144. u32 mm_count_rqueue;
  145. u32 mm_count_galpa;
  146. };
  147. #define IS_SRQ(qp) (qp->ext_type == EQPT_SRQ)
  148. #define HAS_SQ(qp) (qp->ext_type != EQPT_SRQ)
  149. #define HAS_RQ(qp) (qp->ext_type != EQPT_SRQBASE)
  150. /* must be power of 2 */
  151. #define QP_HASHTAB_LEN 8
  152. struct ehca_cq {
  153. struct ib_cq ib_cq;
  154. struct ipz_queue ipz_queue;
  155. struct h_galpas galpas;
  156. spinlock_t spinlock;
  157. u32 cq_number;
  158. u32 token;
  159. u32 nr_of_entries;
  160. struct ipz_cq_handle ipz_cq_handle;
  161. struct ehca_pfcq pf;
  162. spinlock_t cb_lock;
  163. struct hlist_head qp_hashtab[QP_HASHTAB_LEN];
  164. struct list_head entry;
  165. u32 nr_callbacks; /* #events assigned to cpu by scaling code */
  166. atomic_t nr_events; /* #events seen */
  167. wait_queue_head_t wait_completion;
  168. spinlock_t task_lock;
  169. u32 ownpid;
  170. /* mmap counter for resources mapped into user space */
  171. u32 mm_count_queue;
  172. u32 mm_count_galpa;
  173. };
  174. enum ehca_mr_flag {
  175. EHCA_MR_FLAG_FMR = 0x80000000, /* FMR, created with ehca_alloc_fmr */
  176. EHCA_MR_FLAG_MAXMR = 0x40000000, /* max-MR */
  177. };
  178. struct ehca_mr {
  179. union {
  180. struct ib_mr ib_mr; /* must always be first in ehca_mr */
  181. struct ib_fmr ib_fmr; /* must always be first in ehca_mr */
  182. } ib;
  183. struct ib_umem *umem;
  184. spinlock_t mrlock;
  185. enum ehca_mr_flag flags;
  186. u32 num_pages; /* number of MR pages */
  187. u32 num_4k; /* number of 4k "page" portions to form MR */
  188. int acl; /* ACL (stored here for usage in reregister) */
  189. u64 *start; /* virtual start address (stored here for */
  190. /* usage in reregister) */
  191. u64 size; /* size (stored here for usage in reregister) */
  192. u32 fmr_page_size; /* page size for FMR */
  193. u32 fmr_max_pages; /* max pages for FMR */
  194. u32 fmr_max_maps; /* max outstanding maps for FMR */
  195. u32 fmr_map_cnt; /* map counter for FMR */
  196. /* fw specific data */
  197. struct ipz_mrmw_handle ipz_mr_handle; /* MR handle for h-calls */
  198. struct h_galpas galpas;
  199. /* data for userspace bridge */
  200. u32 nr_of_pages;
  201. void *pagearray;
  202. };
  203. struct ehca_mw {
  204. struct ib_mw ib_mw; /* gen2 mw, must always be first in ehca_mw */
  205. spinlock_t mwlock;
  206. u8 never_bound; /* indication MW was never bound */
  207. struct ipz_mrmw_handle ipz_mw_handle; /* MW handle for h-calls */
  208. struct h_galpas galpas;
  209. };
  210. enum ehca_mr_pgi_type {
  211. EHCA_MR_PGI_PHYS = 1, /* type of ehca_reg_phys_mr,
  212. * ehca_rereg_phys_mr,
  213. * ehca_reg_internal_maxmr */
  214. EHCA_MR_PGI_USER = 2, /* type of ehca_reg_user_mr */
  215. EHCA_MR_PGI_FMR = 3 /* type of ehca_map_phys_fmr */
  216. };
  217. struct ehca_mr_pginfo {
  218. enum ehca_mr_pgi_type type;
  219. u64 num_pages;
  220. u64 page_cnt;
  221. u64 num_4k; /* number of 4k "page" portions */
  222. u64 page_4k_cnt; /* counter for 4k "page" portions */
  223. u64 next_4k; /* next 4k "page" portion in buffer/chunk/listelem */
  224. /* type EHCA_MR_PGI_PHYS section */
  225. int num_phys_buf;
  226. struct ib_phys_buf *phys_buf_array;
  227. u64 next_buf;
  228. /* type EHCA_MR_PGI_USER section */
  229. struct ib_umem *region;
  230. struct ib_umem_chunk *next_chunk;
  231. u64 next_nmap;
  232. /* type EHCA_MR_PGI_FMR section */
  233. u64 *page_list;
  234. u64 next_listelem;
  235. /* next_4k also used within EHCA_MR_PGI_FMR */
  236. };
  237. /* output parameters for MR/FMR hipz calls */
  238. struct ehca_mr_hipzout_parms {
  239. struct ipz_mrmw_handle handle;
  240. u32 lkey;
  241. u32 rkey;
  242. u64 len;
  243. u64 vaddr;
  244. u32 acl;
  245. };
  246. /* output parameters for MW hipz calls */
  247. struct ehca_mw_hipzout_parms {
  248. struct ipz_mrmw_handle handle;
  249. u32 rkey;
  250. };
  251. struct ehca_av {
  252. struct ib_ah ib_ah;
  253. struct ehca_ud_av av;
  254. };
  255. struct ehca_ucontext {
  256. struct ib_ucontext ib_ucontext;
  257. };
  258. int ehca_init_pd_cache(void);
  259. void ehca_cleanup_pd_cache(void);
  260. int ehca_init_cq_cache(void);
  261. void ehca_cleanup_cq_cache(void);
  262. int ehca_init_qp_cache(void);
  263. void ehca_cleanup_qp_cache(void);
  264. int ehca_init_av_cache(void);
  265. void ehca_cleanup_av_cache(void);
  266. int ehca_init_mrmw_cache(void);
  267. void ehca_cleanup_mrmw_cache(void);
  268. extern rwlock_t ehca_qp_idr_lock;
  269. extern rwlock_t ehca_cq_idr_lock;
  270. extern struct idr ehca_qp_idr;
  271. extern struct idr ehca_cq_idr;
  272. extern int ehca_static_rate;
  273. extern int ehca_port_act_time;
  274. extern int ehca_use_hp_mr;
  275. extern int ehca_scaling_code;
  276. struct ipzu_queue_resp {
  277. u32 qe_size; /* queue entry size */
  278. u32 act_nr_of_sg;
  279. u32 queue_length; /* queue length allocated in bytes */
  280. u32 pagesize;
  281. u32 toggle_state;
  282. u32 dummy; /* padding for 8 byte alignment */
  283. };
  284. struct ehca_create_cq_resp {
  285. u32 cq_number;
  286. u32 token;
  287. struct ipzu_queue_resp ipz_queue;
  288. };
  289. struct ehca_create_qp_resp {
  290. u32 qp_num;
  291. u32 token;
  292. u32 qp_type;
  293. u32 ext_type;
  294. u32 qkey;
  295. /* qp_num assigned by ehca: sqp0/1 may have got different numbers */
  296. u32 real_qp_num;
  297. u32 dummy; /* padding for 8 byte alignment */
  298. struct ipzu_queue_resp ipz_squeue;
  299. struct ipzu_queue_resp ipz_rqueue;
  300. };
  301. struct ehca_alloc_cq_parms {
  302. u32 nr_cqe;
  303. u32 act_nr_of_entries;
  304. u32 act_pages;
  305. struct ipz_eq_handle eq_handle;
  306. };
  307. enum ehca_service_type {
  308. ST_RC = 0,
  309. ST_UC = 1,
  310. ST_RD = 2,
  311. ST_UD = 3,
  312. };
  313. enum ehca_ll_comp_flags {
  314. LLQP_SEND_COMP = 0x20,
  315. LLQP_RECV_COMP = 0x40,
  316. LLQP_COMP_MASK = 0x60,
  317. };
  318. struct ehca_alloc_qp_parms {
  319. /* input parameters */
  320. enum ehca_service_type servicetype;
  321. int sigtype;
  322. enum ehca_ext_qp_type ext_type;
  323. enum ehca_ll_comp_flags ll_comp_flags;
  324. int max_send_wr, max_recv_wr;
  325. int max_send_sge, max_recv_sge;
  326. int ud_av_l_key_ctl;
  327. u32 token;
  328. struct ipz_eq_handle eq_handle;
  329. struct ipz_pd pd;
  330. struct ipz_cq_handle send_cq_handle, recv_cq_handle;
  331. u32 srq_qpn, srq_token, srq_limit;
  332. /* output parameters */
  333. u32 real_qp_num;
  334. struct ipz_qp_handle qp_handle;
  335. struct h_galpas galpas;
  336. u16 act_nr_send_wqes;
  337. u16 act_nr_recv_wqes;
  338. u8 act_nr_recv_sges;
  339. u8 act_nr_send_sges;
  340. u32 nr_rq_pages;
  341. u32 nr_sq_pages;
  342. };
  343. int ehca_cq_assign_qp(struct ehca_cq *cq, struct ehca_qp *qp);
  344. int ehca_cq_unassign_qp(struct ehca_cq *cq, unsigned int qp_num);
  345. struct ehca_qp* ehca_cq_get_qp(struct ehca_cq *cq, int qp_num);
  346. #endif