qd65xx.c 13 KB

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  1. /*
  2. * linux/drivers/ide/legacy/qd65xx.c Version 0.07 Sep 30, 2001
  3. *
  4. * Copyright (C) 1996-2001 Linus Torvalds & author (see below)
  5. */
  6. /*
  7. * Version 0.03 Cleaned auto-tune, added probe
  8. * Version 0.04 Added second channel tuning
  9. * Version 0.05 Enhanced tuning ; added qd6500 support
  10. * Version 0.06 Added dos driver's list
  11. * Version 0.07 Second channel bug fix
  12. *
  13. * QDI QD6500/QD6580 EIDE controller fast support
  14. *
  15. * Please set local bus speed using kernel parameter idebus
  16. * for example, "idebus=33" stands for 33Mhz VLbus
  17. * To activate controller support, use "ide0=qd65xx"
  18. * To enable tuning, use "hda=autotune hdb=autotune"
  19. * To enable 2nd channel tuning (qd6580 only), use "hdc=autotune hdd=autotune"
  20. */
  21. /*
  22. * Rewritten from the work of Colten Edwards <pje120@cs.usask.ca> by
  23. * Samuel Thibault <samuel.thibault@fnac.net>
  24. */
  25. #include <linux/module.h>
  26. #include <linux/types.h>
  27. #include <linux/kernel.h>
  28. #include <linux/delay.h>
  29. #include <linux/timer.h>
  30. #include <linux/mm.h>
  31. #include <linux/ioport.h>
  32. #include <linux/blkdev.h>
  33. #include <linux/hdreg.h>
  34. #include <linux/ide.h>
  35. #include <linux/init.h>
  36. #include <asm/system.h>
  37. #include <asm/io.h>
  38. #include "qd65xx.h"
  39. /*
  40. * I/O ports are 0x30-0x31 (and 0x32-0x33 for qd6580)
  41. * or 0xb0-0xb1 (and 0xb2-0xb3 for qd6580)
  42. * -- qd6500 is a single IDE interface
  43. * -- qd6580 is a dual IDE interface
  44. *
  45. * More research on qd6580 being done by willmore@cig.mot.com (David)
  46. * More Information given by Petr Soucek (petr@ryston.cz)
  47. * http://www.ryston.cz/petr/vlb
  48. */
  49. /*
  50. * base: Timer1
  51. *
  52. *
  53. * base+0x01: Config (R/O)
  54. *
  55. * bit 0: ide baseport: 1 = 0x1f0 ; 0 = 0x170 (only useful for qd6500)
  56. * bit 1: qd65xx baseport: 1 = 0xb0 ; 0 = 0x30
  57. * bit 2: ID3: bus speed: 1 = <=33MHz ; 0 = >33MHz
  58. * bit 3: qd6500: 1 = disabled, 0 = enabled
  59. * qd6580: 1
  60. * upper nibble:
  61. * qd6500: 1100
  62. * qd6580: either 1010 or 0101
  63. *
  64. *
  65. * base+0x02: Timer2 (qd6580 only)
  66. *
  67. *
  68. * base+0x03: Control (qd6580 only)
  69. *
  70. * bits 0-3 must always be set 1
  71. * bit 4 must be set 1, but is set 0 by dos driver while measuring vlb clock
  72. * bit 0 : 1 = Only primary port enabled : channel 0 for hda, channel 1 for hdb
  73. * 0 = Primary and Secondary ports enabled : channel 0 for hda & hdb
  74. * channel 1 for hdc & hdd
  75. * bit 1 : 1 = only disks on primary port
  76. * 0 = disks & ATAPI devices on primary port
  77. * bit 2-4 : always 0
  78. * bit 5 : status, but of what ?
  79. * bit 6 : always set 1 by dos driver
  80. * bit 7 : set 1 for non-ATAPI devices on primary port
  81. * (maybe read-ahead and post-write buffer ?)
  82. */
  83. static int timings[4]={-1,-1,-1,-1}; /* stores current timing for each timer */
  84. static void qd_write_reg (u8 content, unsigned long reg)
  85. {
  86. unsigned long flags;
  87. spin_lock_irqsave(&ide_lock, flags);
  88. outb(content,reg);
  89. spin_unlock_irqrestore(&ide_lock, flags);
  90. }
  91. static u8 __init qd_read_reg (unsigned long reg)
  92. {
  93. unsigned long flags;
  94. u8 read;
  95. spin_lock_irqsave(&ide_lock, flags);
  96. read = inb(reg);
  97. spin_unlock_irqrestore(&ide_lock, flags);
  98. return read;
  99. }
  100. /*
  101. * qd_select:
  102. *
  103. * This routine is invoked from ide.c to prepare for access to a given drive.
  104. */
  105. static void qd_select (ide_drive_t *drive)
  106. {
  107. u8 index = (( (QD_TIMREG(drive)) & 0x80 ) >> 7) |
  108. (QD_TIMREG(drive) & 0x02);
  109. if (timings[index] != QD_TIMING(drive))
  110. qd_write_reg(timings[index] = QD_TIMING(drive), QD_TIMREG(drive));
  111. }
  112. /*
  113. * qd6500_compute_timing
  114. *
  115. * computes the timing value where
  116. * lower nibble represents active time, in count of VLB clocks
  117. * upper nibble represents recovery time, in count of VLB clocks
  118. */
  119. static u8 qd6500_compute_timing (ide_hwif_t *hwif, int active_time, int recovery_time)
  120. {
  121. u8 active_cycle,recovery_cycle;
  122. if (system_bus_clock()<=33) {
  123. active_cycle = 9 - IDE_IN(active_time * system_bus_clock() / 1000 + 1, 2, 9);
  124. recovery_cycle = 15 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 0, 15);
  125. } else {
  126. active_cycle = 8 - IDE_IN(active_time * system_bus_clock() / 1000 + 1, 1, 8);
  127. recovery_cycle = 18 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 3, 18);
  128. }
  129. return((recovery_cycle<<4) | 0x08 | active_cycle);
  130. }
  131. /*
  132. * qd6580_compute_timing
  133. *
  134. * idem for qd6580
  135. */
  136. static u8 qd6580_compute_timing (int active_time, int recovery_time)
  137. {
  138. u8 active_cycle = 17 - IDE_IN(active_time * system_bus_clock() / 1000 + 1, 2, 17);
  139. u8 recovery_cycle = 15 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 2, 15);
  140. return((recovery_cycle<<4) | active_cycle);
  141. }
  142. /*
  143. * qd_find_disk_type
  144. *
  145. * tries to find timing from dos driver's table
  146. */
  147. static int qd_find_disk_type (ide_drive_t *drive,
  148. int *active_time, int *recovery_time)
  149. {
  150. struct qd65xx_timing_s *p;
  151. char model[40];
  152. if (!*drive->id->model) return 0;
  153. strncpy(model,drive->id->model,40);
  154. ide_fixstring(model,40,1); /* byte-swap */
  155. for (p = qd65xx_timing ; p->offset != -1 ; p++) {
  156. if (!strncmp(p->model, model+p->offset, 4)) {
  157. printk(KERN_DEBUG "%s: listed !\n", drive->name);
  158. *active_time = p->active;
  159. *recovery_time = p->recovery;
  160. return 1;
  161. }
  162. }
  163. return 0;
  164. }
  165. /*
  166. * qd_timing_ok:
  167. *
  168. * check whether timings don't conflict
  169. */
  170. static int qd_timing_ok (ide_drive_t drives[])
  171. {
  172. return (IDE_IMPLY(drives[0].present && drives[1].present,
  173. IDE_IMPLY(QD_TIMREG(drives) == QD_TIMREG(drives+1),
  174. QD_TIMING(drives) == QD_TIMING(drives+1))));
  175. /* if same timing register, must be same timing */
  176. }
  177. /*
  178. * qd_set_timing:
  179. *
  180. * records the timing, and enables selectproc as needed
  181. */
  182. static void qd_set_timing (ide_drive_t *drive, u8 timing)
  183. {
  184. ide_hwif_t *hwif = HWIF(drive);
  185. drive->drive_data &= 0xff00;
  186. drive->drive_data |= timing;
  187. if (qd_timing_ok(hwif->drives)) {
  188. qd_select(drive); /* selects once */
  189. hwif->selectproc = NULL;
  190. } else
  191. hwif->selectproc = &qd_select;
  192. printk(KERN_DEBUG "%s: %#x\n", drive->name, timing);
  193. }
  194. /*
  195. * qd6500_tune_drive
  196. */
  197. static void qd6500_tune_drive (ide_drive_t *drive, u8 pio)
  198. {
  199. int active_time = 175;
  200. int recovery_time = 415; /* worst case values from the dos driver */
  201. if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)
  202. && drive->id->tPIO && (drive->id->field_valid & 0x02)
  203. && drive->id->eide_pio >= 240) {
  204. printk(KERN_INFO "%s: PIO mode%d\n", drive->name,
  205. drive->id->tPIO);
  206. active_time = 110;
  207. recovery_time = drive->id->eide_pio - 120;
  208. }
  209. qd_set_timing(drive, qd6500_compute_timing(HWIF(drive), active_time, recovery_time));
  210. }
  211. /*
  212. * qd6580_tune_drive
  213. */
  214. static void qd6580_tune_drive (ide_drive_t *drive, u8 pio)
  215. {
  216. ide_pio_data_t d;
  217. int base = HWIF(drive)->select_data;
  218. int active_time = 175;
  219. int recovery_time = 415; /* worst case values from the dos driver */
  220. if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)) {
  221. pio = ide_get_best_pio_mode(drive, pio, 4, &d);
  222. switch (pio) {
  223. case 0: break;
  224. case 3:
  225. if (d.cycle_time >= 110) {
  226. active_time = 86;
  227. recovery_time = d.cycle_time - 102;
  228. } else
  229. printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
  230. break;
  231. case 4:
  232. if (d.cycle_time >= 69) {
  233. active_time = 70;
  234. recovery_time = d.cycle_time - 61;
  235. } else
  236. printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
  237. break;
  238. default:
  239. if (d.cycle_time >= 180) {
  240. active_time = 110;
  241. recovery_time = d.cycle_time - 120;
  242. } else {
  243. active_time = ide_pio_timings[pio].active_time;
  244. recovery_time = d.cycle_time
  245. -active_time;
  246. }
  247. }
  248. printk(KERN_INFO "%s: PIO mode%d\n", drive->name,pio);
  249. }
  250. if (!HWIF(drive)->channel && drive->media != ide_disk) {
  251. qd_write_reg(0x5f, QD_CONTROL_PORT);
  252. printk(KERN_WARNING "%s: ATAPI: disabled read-ahead FIFO "
  253. "and post-write buffer on %s.\n",
  254. drive->name, HWIF(drive)->name);
  255. }
  256. qd_set_timing(drive, qd6580_compute_timing(active_time, recovery_time));
  257. }
  258. /*
  259. * qd_testreg
  260. *
  261. * tests if the given port is a register
  262. */
  263. static int __init qd_testreg(int port)
  264. {
  265. u8 savereg;
  266. u8 readreg;
  267. unsigned long flags;
  268. spin_lock_irqsave(&ide_lock, flags);
  269. savereg = inb_p(port);
  270. outb_p(QD_TESTVAL, port); /* safe value */
  271. readreg = inb_p(port);
  272. outb(savereg, port);
  273. spin_unlock_irqrestore(&ide_lock, flags);
  274. if (savereg == QD_TESTVAL) {
  275. printk(KERN_ERR "Outch ! the probe for qd65xx isn't reliable !\n");
  276. printk(KERN_ERR "Please contact maintainers to tell about your hardware\n");
  277. printk(KERN_ERR "Assuming qd65xx is not present.\n");
  278. return 1;
  279. }
  280. return (readreg != QD_TESTVAL);
  281. }
  282. /*
  283. * qd_setup:
  284. *
  285. * called to setup an ata channel : adjusts attributes & links for tuning
  286. */
  287. static void __init qd_setup(ide_hwif_t *hwif, int base, int config,
  288. unsigned int data0, unsigned int data1,
  289. void (*tuneproc) (ide_drive_t *, u8 pio))
  290. {
  291. hwif->chipset = ide_qd65xx;
  292. hwif->channel = hwif->index;
  293. hwif->select_data = base;
  294. hwif->config_data = config;
  295. hwif->drives[0].drive_data = data0;
  296. hwif->drives[1].drive_data = data1;
  297. hwif->drives[0].io_32bit =
  298. hwif->drives[1].io_32bit = 1;
  299. hwif->tuneproc = tuneproc;
  300. probe_hwif_init(hwif);
  301. }
  302. /*
  303. * qd_unsetup:
  304. *
  305. * called to unsetup an ata channel : back to default values, unlinks tuning
  306. */
  307. /*
  308. static void __exit qd_unsetup(ide_hwif_t *hwif)
  309. {
  310. u8 config = hwif->config_data;
  311. int base = hwif->select_data;
  312. void *tuneproc = (void *) hwif->tuneproc;
  313. if (hwif->chipset != ide_qd65xx)
  314. return;
  315. printk(KERN_NOTICE "%s: back to defaults\n", hwif->name);
  316. hwif->selectproc = NULL;
  317. hwif->tuneproc = NULL;
  318. if (tuneproc == (void *) qd6500_tune_drive) {
  319. // will do it for both
  320. qd_write_reg(QD6500_DEF_DATA, QD_TIMREG(&hwif->drives[0]));
  321. } else if (tuneproc == (void *) qd6580_tune_drive) {
  322. if (QD_CONTROL(hwif) & QD_CONTR_SEC_DISABLED) {
  323. qd_write_reg(QD6580_DEF_DATA, QD_TIMREG(&hwif->drives[0]));
  324. qd_write_reg(QD6580_DEF_DATA2, QD_TIMREG(&hwif->drives[1]));
  325. } else {
  326. qd_write_reg(hwif->channel ? QD6580_DEF_DATA2 : QD6580_DEF_DATA, QD_TIMREG(&hwif->drives[0]));
  327. }
  328. } else {
  329. printk(KERN_WARNING "Unknown qd65xx tuning fonction !\n");
  330. printk(KERN_WARNING "keeping settings !\n");
  331. }
  332. }
  333. */
  334. /*
  335. * qd_probe:
  336. *
  337. * looks at the specified baseport, and if qd found, registers & initialises it
  338. * return 1 if another qd may be probed
  339. */
  340. static int __init qd_probe(int base)
  341. {
  342. ide_hwif_t *hwif;
  343. u8 config;
  344. u8 unit;
  345. config = qd_read_reg(QD_CONFIG_PORT);
  346. if (! ((config & QD_CONFIG_BASEPORT) >> 1 == (base == 0xb0)) )
  347. return 1;
  348. unit = ! (config & QD_CONFIG_IDE_BASEPORT);
  349. if ((config & 0xf0) == QD_CONFIG_QD6500) {
  350. if (qd_testreg(base)) return 1; /* bad register */
  351. /* qd6500 found */
  352. hwif = &ide_hwifs[unit];
  353. printk(KERN_NOTICE "%s: qd6500 at %#x\n", hwif->name, base);
  354. printk(KERN_DEBUG "qd6500: config=%#x, ID3=%u\n",
  355. config, QD_ID3);
  356. if (config & QD_CONFIG_DISABLED) {
  357. printk(KERN_WARNING "qd6500 is disabled !\n");
  358. return 1;
  359. }
  360. qd_setup(hwif, base, config, QD6500_DEF_DATA, QD6500_DEF_DATA,
  361. &qd6500_tune_drive);
  362. ide_proc_register_port(hwif);
  363. return 1;
  364. }
  365. if (((config & 0xf0) == QD_CONFIG_QD6580_A) ||
  366. ((config & 0xf0) == QD_CONFIG_QD6580_B)) {
  367. u8 control;
  368. if (qd_testreg(base) || qd_testreg(base+0x02)) return 1;
  369. /* bad registers */
  370. /* qd6580 found */
  371. control = qd_read_reg(QD_CONTROL_PORT);
  372. printk(KERN_NOTICE "qd6580 at %#x\n", base);
  373. printk(KERN_DEBUG "qd6580: config=%#x, control=%#x, ID3=%u\n",
  374. config, control, QD_ID3);
  375. if (control & QD_CONTR_SEC_DISABLED) {
  376. /* secondary disabled */
  377. hwif = &ide_hwifs[unit];
  378. printk(KERN_INFO "%s: qd6580: single IDE board\n",
  379. hwif->name);
  380. qd_setup(hwif, base, config | (control << 8),
  381. QD6580_DEF_DATA, QD6580_DEF_DATA2,
  382. &qd6580_tune_drive);
  383. qd_write_reg(QD_DEF_CONTR,QD_CONTROL_PORT);
  384. ide_proc_register_port(hwif);
  385. return 1;
  386. } else {
  387. ide_hwif_t *mate;
  388. hwif = &ide_hwifs[0];
  389. mate = &ide_hwifs[1];
  390. /* secondary enabled */
  391. printk(KERN_INFO "%s&%s: qd6580: dual IDE board\n",
  392. hwif->name, mate->name);
  393. qd_setup(hwif, base, config | (control << 8),
  394. QD6580_DEF_DATA, QD6580_DEF_DATA,
  395. &qd6580_tune_drive);
  396. qd_setup(mate, base, config | (control << 8),
  397. QD6580_DEF_DATA2, QD6580_DEF_DATA2,
  398. &qd6580_tune_drive);
  399. qd_write_reg(QD_DEF_CONTR,QD_CONTROL_PORT);
  400. ide_proc_register_port(hwif);
  401. ide_proc_register_port(mate);
  402. return 0; /* no other qd65xx possible */
  403. }
  404. }
  405. /* no qd65xx found */
  406. return 1;
  407. }
  408. int probe_qd65xx = 0;
  409. module_param_named(probe, probe_qd65xx, bool, 0);
  410. MODULE_PARM_DESC(probe, "probe for QD65xx chipsets");
  411. /* Can be called directly from ide.c. */
  412. int __init qd65xx_init(void)
  413. {
  414. if (probe_qd65xx == 0)
  415. return -ENODEV;
  416. if (qd_probe(0x30))
  417. qd_probe(0xb0);
  418. if (ide_hwifs[0].chipset != ide_qd65xx &&
  419. ide_hwifs[1].chipset != ide_qd65xx)
  420. return -ENODEV;
  421. return 0;
  422. }
  423. #ifdef MODULE
  424. module_init(qd65xx_init);
  425. #endif
  426. MODULE_AUTHOR("Samuel Thibault");
  427. MODULE_DESCRIPTION("support of qd65xx vlb ide chipset");
  428. MODULE_LICENSE("GPL");