synclink_cs.c 115 KB

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  1. /*
  2. * linux/drivers/char/pcmcia/synclink_cs.c
  3. *
  4. * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $
  5. *
  6. * Device driver for Microgate SyncLink PC Card
  7. * multiprotocol serial adapter.
  8. *
  9. * written by Paul Fulghum for Microgate Corporation
  10. * paulkf@microgate.com
  11. *
  12. * Microgate and SyncLink are trademarks of Microgate Corporation
  13. *
  14. * This code is released under the GNU General Public License (GPL)
  15. *
  16. * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  17. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  18. * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  19. * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
  20. * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  21. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  22. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  24. * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  25. * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
  26. * OF THE POSSIBILITY OF SUCH DAMAGE.
  27. */
  28. #define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
  29. #if defined(__i386__)
  30. # define BREAKPOINT() asm(" int $3");
  31. #else
  32. # define BREAKPOINT() { }
  33. #endif
  34. #define MAX_DEVICE_COUNT 4
  35. #include <linux/module.h>
  36. #include <linux/errno.h>
  37. #include <linux/signal.h>
  38. #include <linux/sched.h>
  39. #include <linux/timer.h>
  40. #include <linux/time.h>
  41. #include <linux/interrupt.h>
  42. #include <linux/tty.h>
  43. #include <linux/tty_flip.h>
  44. #include <linux/serial.h>
  45. #include <linux/major.h>
  46. #include <linux/string.h>
  47. #include <linux/fcntl.h>
  48. #include <linux/ptrace.h>
  49. #include <linux/ioport.h>
  50. #include <linux/mm.h>
  51. #include <linux/slab.h>
  52. #include <linux/netdevice.h>
  53. #include <linux/vmalloc.h>
  54. #include <linux/init.h>
  55. #include <linux/delay.h>
  56. #include <linux/ioctl.h>
  57. #include <asm/system.h>
  58. #include <asm/io.h>
  59. #include <asm/irq.h>
  60. #include <asm/dma.h>
  61. #include <linux/bitops.h>
  62. #include <asm/types.h>
  63. #include <linux/termios.h>
  64. #include <linux/workqueue.h>
  65. #include <linux/hdlc.h>
  66. #include <pcmcia/cs_types.h>
  67. #include <pcmcia/cs.h>
  68. #include <pcmcia/cistpl.h>
  69. #include <pcmcia/cisreg.h>
  70. #include <pcmcia/ds.h>
  71. #if defined(CONFIG_HDLC) || (defined(CONFIG_HDLC_MODULE) && defined(CONFIG_SYNCLINK_CS_MODULE))
  72. #define SYNCLINK_GENERIC_HDLC 1
  73. #else
  74. #define SYNCLINK_GENERIC_HDLC 0
  75. #endif
  76. #define GET_USER(error,value,addr) error = get_user(value,addr)
  77. #define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
  78. #define PUT_USER(error,value,addr) error = put_user(value,addr)
  79. #define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
  80. #include <asm/uaccess.h>
  81. #include "linux/synclink.h"
  82. static MGSL_PARAMS default_params = {
  83. MGSL_MODE_HDLC, /* unsigned long mode */
  84. 0, /* unsigned char loopback; */
  85. HDLC_FLAG_UNDERRUN_ABORT15, /* unsigned short flags; */
  86. HDLC_ENCODING_NRZI_SPACE, /* unsigned char encoding; */
  87. 0, /* unsigned long clock_speed; */
  88. 0xff, /* unsigned char addr_filter; */
  89. HDLC_CRC_16_CCITT, /* unsigned short crc_type; */
  90. HDLC_PREAMBLE_LENGTH_8BITS, /* unsigned char preamble_length; */
  91. HDLC_PREAMBLE_PATTERN_NONE, /* unsigned char preamble; */
  92. 9600, /* unsigned long data_rate; */
  93. 8, /* unsigned char data_bits; */
  94. 1, /* unsigned char stop_bits; */
  95. ASYNC_PARITY_NONE /* unsigned char parity; */
  96. };
  97. typedef struct
  98. {
  99. int count;
  100. unsigned char status;
  101. char data[1];
  102. } RXBUF;
  103. /* The queue of BH actions to be performed */
  104. #define BH_RECEIVE 1
  105. #define BH_TRANSMIT 2
  106. #define BH_STATUS 4
  107. #define IO_PIN_SHUTDOWN_LIMIT 100
  108. #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
  109. struct _input_signal_events {
  110. int ri_up;
  111. int ri_down;
  112. int dsr_up;
  113. int dsr_down;
  114. int dcd_up;
  115. int dcd_down;
  116. int cts_up;
  117. int cts_down;
  118. };
  119. /*
  120. * Device instance data structure
  121. */
  122. typedef struct _mgslpc_info {
  123. void *if_ptr; /* General purpose pointer (used by SPPP) */
  124. int magic;
  125. int flags;
  126. int count; /* count of opens */
  127. int line;
  128. unsigned short close_delay;
  129. unsigned short closing_wait; /* time to wait before closing */
  130. struct mgsl_icount icount;
  131. struct tty_struct *tty;
  132. int timeout;
  133. int x_char; /* xon/xoff character */
  134. int blocked_open; /* # of blocked opens */
  135. unsigned char read_status_mask;
  136. unsigned char ignore_status_mask;
  137. unsigned char *tx_buf;
  138. int tx_put;
  139. int tx_get;
  140. int tx_count;
  141. /* circular list of fixed length rx buffers */
  142. unsigned char *rx_buf; /* memory allocated for all rx buffers */
  143. int rx_buf_total_size; /* size of memory allocated for rx buffers */
  144. int rx_put; /* index of next empty rx buffer */
  145. int rx_get; /* index of next full rx buffer */
  146. int rx_buf_size; /* size in bytes of single rx buffer */
  147. int rx_buf_count; /* total number of rx buffers */
  148. int rx_frame_count; /* number of full rx buffers */
  149. wait_queue_head_t open_wait;
  150. wait_queue_head_t close_wait;
  151. wait_queue_head_t status_event_wait_q;
  152. wait_queue_head_t event_wait_q;
  153. struct timer_list tx_timer; /* HDLC transmit timeout timer */
  154. struct _mgslpc_info *next_device; /* device list link */
  155. unsigned short imra_value;
  156. unsigned short imrb_value;
  157. unsigned char pim_value;
  158. spinlock_t lock;
  159. struct work_struct task; /* task structure for scheduling bh */
  160. u32 max_frame_size;
  161. u32 pending_bh;
  162. int bh_running;
  163. int bh_requested;
  164. int dcd_chkcount; /* check counts to prevent */
  165. int cts_chkcount; /* too many IRQs if a signal */
  166. int dsr_chkcount; /* is floating */
  167. int ri_chkcount;
  168. int rx_enabled;
  169. int rx_overflow;
  170. int tx_enabled;
  171. int tx_active;
  172. int tx_aborting;
  173. u32 idle_mode;
  174. int if_mode; /* serial interface selection (RS-232, v.35 etc) */
  175. char device_name[25]; /* device instance name */
  176. unsigned int io_base; /* base I/O address of adapter */
  177. unsigned int irq_level;
  178. MGSL_PARAMS params; /* communications parameters */
  179. unsigned char serial_signals; /* current serial signal states */
  180. char irq_occurred; /* for diagnostics use */
  181. char testing_irq;
  182. unsigned int init_error; /* startup error (DIAGS) */
  183. char flag_buf[MAX_ASYNC_BUFFER_SIZE];
  184. BOOLEAN drop_rts_on_tx_done;
  185. struct _input_signal_events input_signal_events;
  186. /* PCMCIA support */
  187. struct pcmcia_device *p_dev;
  188. dev_node_t node;
  189. int stop;
  190. /* SPPP/Cisco HDLC device parts */
  191. int netcount;
  192. int dosyncppp;
  193. spinlock_t netlock;
  194. #if SYNCLINK_GENERIC_HDLC
  195. struct net_device *netdev;
  196. #endif
  197. } MGSLPC_INFO;
  198. #define MGSLPC_MAGIC 0x5402
  199. /*
  200. * The size of the serial xmit buffer is 1 page, or 4096 bytes
  201. */
  202. #define TXBUFSIZE 4096
  203. #define CHA 0x00 /* channel A offset */
  204. #define CHB 0x40 /* channel B offset */
  205. /*
  206. * FIXME: PPC has PVR defined in asm/reg.h. For now we just undef it.
  207. */
  208. #undef PVR
  209. #define RXFIFO 0
  210. #define TXFIFO 0
  211. #define STAR 0x20
  212. #define CMDR 0x20
  213. #define RSTA 0x21
  214. #define PRE 0x21
  215. #define MODE 0x22
  216. #define TIMR 0x23
  217. #define XAD1 0x24
  218. #define XAD2 0x25
  219. #define RAH1 0x26
  220. #define RAH2 0x27
  221. #define DAFO 0x27
  222. #define RAL1 0x28
  223. #define RFC 0x28
  224. #define RHCR 0x29
  225. #define RAL2 0x29
  226. #define RBCL 0x2a
  227. #define XBCL 0x2a
  228. #define RBCH 0x2b
  229. #define XBCH 0x2b
  230. #define CCR0 0x2c
  231. #define CCR1 0x2d
  232. #define CCR2 0x2e
  233. #define CCR3 0x2f
  234. #define VSTR 0x34
  235. #define BGR 0x34
  236. #define RLCR 0x35
  237. #define AML 0x36
  238. #define AMH 0x37
  239. #define GIS 0x38
  240. #define IVA 0x38
  241. #define IPC 0x39
  242. #define ISR 0x3a
  243. #define IMR 0x3a
  244. #define PVR 0x3c
  245. #define PIS 0x3d
  246. #define PIM 0x3d
  247. #define PCR 0x3e
  248. #define CCR4 0x3f
  249. // IMR/ISR
  250. #define IRQ_BREAK_ON BIT15 // rx break detected
  251. #define IRQ_DATAOVERRUN BIT14 // receive data overflow
  252. #define IRQ_ALLSENT BIT13 // all sent
  253. #define IRQ_UNDERRUN BIT12 // transmit data underrun
  254. #define IRQ_TIMER BIT11 // timer interrupt
  255. #define IRQ_CTS BIT10 // CTS status change
  256. #define IRQ_TXREPEAT BIT9 // tx message repeat
  257. #define IRQ_TXFIFO BIT8 // transmit pool ready
  258. #define IRQ_RXEOM BIT7 // receive message end
  259. #define IRQ_EXITHUNT BIT6 // receive frame start
  260. #define IRQ_RXTIME BIT6 // rx char timeout
  261. #define IRQ_DCD BIT2 // carrier detect status change
  262. #define IRQ_OVERRUN BIT1 // receive frame overflow
  263. #define IRQ_RXFIFO BIT0 // receive pool full
  264. // STAR
  265. #define XFW BIT6 // transmit FIFO write enable
  266. #define CEC BIT2 // command executing
  267. #define CTS BIT1 // CTS state
  268. #define PVR_DTR BIT0
  269. #define PVR_DSR BIT1
  270. #define PVR_RI BIT2
  271. #define PVR_AUTOCTS BIT3
  272. #define PVR_RS232 0x20 /* 0010b */
  273. #define PVR_V35 0xe0 /* 1110b */
  274. #define PVR_RS422 0x40 /* 0100b */
  275. /* Register access functions */
  276. #define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
  277. #define read_reg(info, reg) inb((info)->io_base + (reg))
  278. #define read_reg16(info, reg) inw((info)->io_base + (reg))
  279. #define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
  280. #define set_reg_bits(info, reg, mask) \
  281. write_reg(info, (reg), \
  282. (unsigned char) (read_reg(info, (reg)) | (mask)))
  283. #define clear_reg_bits(info, reg, mask) \
  284. write_reg(info, (reg), \
  285. (unsigned char) (read_reg(info, (reg)) & ~(mask)))
  286. /*
  287. * interrupt enable/disable routines
  288. */
  289. static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
  290. {
  291. if (channel == CHA) {
  292. info->imra_value |= mask;
  293. write_reg16(info, CHA + IMR, info->imra_value);
  294. } else {
  295. info->imrb_value |= mask;
  296. write_reg16(info, CHB + IMR, info->imrb_value);
  297. }
  298. }
  299. static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
  300. {
  301. if (channel == CHA) {
  302. info->imra_value &= ~mask;
  303. write_reg16(info, CHA + IMR, info->imra_value);
  304. } else {
  305. info->imrb_value &= ~mask;
  306. write_reg16(info, CHB + IMR, info->imrb_value);
  307. }
  308. }
  309. #define port_irq_disable(info, mask) \
  310. { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); }
  311. #define port_irq_enable(info, mask) \
  312. { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); }
  313. static void rx_start(MGSLPC_INFO *info);
  314. static void rx_stop(MGSLPC_INFO *info);
  315. static void tx_start(MGSLPC_INFO *info);
  316. static void tx_stop(MGSLPC_INFO *info);
  317. static void tx_set_idle(MGSLPC_INFO *info);
  318. static void get_signals(MGSLPC_INFO *info);
  319. static void set_signals(MGSLPC_INFO *info);
  320. static void reset_device(MGSLPC_INFO *info);
  321. static void hdlc_mode(MGSLPC_INFO *info);
  322. static void async_mode(MGSLPC_INFO *info);
  323. static void tx_timeout(unsigned long context);
  324. static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg);
  325. #if SYNCLINK_GENERIC_HDLC
  326. #define dev_to_port(D) (dev_to_hdlc(D)->priv)
  327. static void hdlcdev_tx_done(MGSLPC_INFO *info);
  328. static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size);
  329. static int hdlcdev_init(MGSLPC_INFO *info);
  330. static void hdlcdev_exit(MGSLPC_INFO *info);
  331. #endif
  332. static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit);
  333. static BOOLEAN register_test(MGSLPC_INFO *info);
  334. static BOOLEAN irq_test(MGSLPC_INFO *info);
  335. static int adapter_test(MGSLPC_INFO *info);
  336. static int claim_resources(MGSLPC_INFO *info);
  337. static void release_resources(MGSLPC_INFO *info);
  338. static void mgslpc_add_device(MGSLPC_INFO *info);
  339. static void mgslpc_remove_device(MGSLPC_INFO *info);
  340. static int rx_get_frame(MGSLPC_INFO *info);
  341. static void rx_reset_buffers(MGSLPC_INFO *info);
  342. static int rx_alloc_buffers(MGSLPC_INFO *info);
  343. static void rx_free_buffers(MGSLPC_INFO *info);
  344. static irqreturn_t mgslpc_isr(int irq, void *dev_id);
  345. /*
  346. * Bottom half interrupt handlers
  347. */
  348. static void bh_handler(struct work_struct *work);
  349. static void bh_transmit(MGSLPC_INFO *info);
  350. static void bh_status(MGSLPC_INFO *info);
  351. /*
  352. * ioctl handlers
  353. */
  354. static int tiocmget(struct tty_struct *tty, struct file *file);
  355. static int tiocmset(struct tty_struct *tty, struct file *file,
  356. unsigned int set, unsigned int clear);
  357. static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount);
  358. static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params);
  359. static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params);
  360. static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode);
  361. static int set_txidle(MGSLPC_INFO *info, int idle_mode);
  362. static int set_txenable(MGSLPC_INFO *info, int enable);
  363. static int tx_abort(MGSLPC_INFO *info);
  364. static int set_rxenable(MGSLPC_INFO *info, int enable);
  365. static int wait_events(MGSLPC_INFO *info, int __user *mask);
  366. static MGSLPC_INFO *mgslpc_device_list = NULL;
  367. static int mgslpc_device_count = 0;
  368. /*
  369. * Set this param to non-zero to load eax with the
  370. * .text section address and breakpoint on module load.
  371. * This is useful for use with gdb and add-symbol-file command.
  372. */
  373. static int break_on_load=0;
  374. /*
  375. * Driver major number, defaults to zero to get auto
  376. * assigned major number. May be forced as module parameter.
  377. */
  378. static int ttymajor=0;
  379. static int debug_level = 0;
  380. static int maxframe[MAX_DEVICE_COUNT] = {0,};
  381. static int dosyncppp[MAX_DEVICE_COUNT] = {1,1,1,1};
  382. module_param(break_on_load, bool, 0);
  383. module_param(ttymajor, int, 0);
  384. module_param(debug_level, int, 0);
  385. module_param_array(maxframe, int, NULL, 0);
  386. module_param_array(dosyncppp, int, NULL, 0);
  387. MODULE_LICENSE("GPL");
  388. static char *driver_name = "SyncLink PC Card driver";
  389. static char *driver_version = "$Revision: 4.34 $";
  390. static struct tty_driver *serial_driver;
  391. /* number of characters left in xmit buffer before we ask for more */
  392. #define WAKEUP_CHARS 256
  393. static void mgslpc_change_params(MGSLPC_INFO *info);
  394. static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout);
  395. /* PCMCIA prototypes */
  396. static int mgslpc_config(struct pcmcia_device *link);
  397. static void mgslpc_release(u_long arg);
  398. static void mgslpc_detach(struct pcmcia_device *p_dev);
  399. /*
  400. * 1st function defined in .text section. Calling this function in
  401. * init_module() followed by a breakpoint allows a remote debugger
  402. * (gdb) to get the .text address for the add-symbol-file command.
  403. * This allows remote debugging of dynamically loadable modules.
  404. */
  405. static void* mgslpc_get_text_ptr(void)
  406. {
  407. return mgslpc_get_text_ptr;
  408. }
  409. /**
  410. * line discipline callback wrappers
  411. *
  412. * The wrappers maintain line discipline references
  413. * while calling into the line discipline.
  414. *
  415. * ldisc_flush_buffer - flush line discipline receive buffers
  416. * ldisc_receive_buf - pass receive data to line discipline
  417. */
  418. static void ldisc_flush_buffer(struct tty_struct *tty)
  419. {
  420. struct tty_ldisc *ld = tty_ldisc_ref(tty);
  421. if (ld) {
  422. if (ld->flush_buffer)
  423. ld->flush_buffer(tty);
  424. tty_ldisc_deref(ld);
  425. }
  426. }
  427. static void ldisc_receive_buf(struct tty_struct *tty,
  428. const __u8 *data, char *flags, int count)
  429. {
  430. struct tty_ldisc *ld;
  431. if (!tty)
  432. return;
  433. ld = tty_ldisc_ref(tty);
  434. if (ld) {
  435. if (ld->receive_buf)
  436. ld->receive_buf(tty, data, flags, count);
  437. tty_ldisc_deref(ld);
  438. }
  439. }
  440. static int mgslpc_probe(struct pcmcia_device *link)
  441. {
  442. MGSLPC_INFO *info;
  443. int ret;
  444. if (debug_level >= DEBUG_LEVEL_INFO)
  445. printk("mgslpc_attach\n");
  446. info = kmalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
  447. if (!info) {
  448. printk("Error can't allocate device instance data\n");
  449. return -ENOMEM;
  450. }
  451. memset(info, 0, sizeof(MGSLPC_INFO));
  452. info->magic = MGSLPC_MAGIC;
  453. INIT_WORK(&info->task, bh_handler);
  454. info->max_frame_size = 4096;
  455. info->close_delay = 5*HZ/10;
  456. info->closing_wait = 30*HZ;
  457. init_waitqueue_head(&info->open_wait);
  458. init_waitqueue_head(&info->close_wait);
  459. init_waitqueue_head(&info->status_event_wait_q);
  460. init_waitqueue_head(&info->event_wait_q);
  461. spin_lock_init(&info->lock);
  462. spin_lock_init(&info->netlock);
  463. memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
  464. info->idle_mode = HDLC_TXIDLE_FLAGS;
  465. info->imra_value = 0xffff;
  466. info->imrb_value = 0xffff;
  467. info->pim_value = 0xff;
  468. info->p_dev = link;
  469. link->priv = info;
  470. /* Initialize the struct pcmcia_device structure */
  471. /* Interrupt setup */
  472. link->irq.Attributes = IRQ_TYPE_EXCLUSIVE;
  473. link->irq.IRQInfo1 = IRQ_LEVEL_ID;
  474. link->irq.Handler = NULL;
  475. link->conf.Attributes = 0;
  476. link->conf.IntType = INT_MEMORY_AND_IO;
  477. ret = mgslpc_config(link);
  478. if (ret)
  479. return ret;
  480. mgslpc_add_device(info);
  481. return 0;
  482. }
  483. /* Card has been inserted.
  484. */
  485. #define CS_CHECK(fn, ret) \
  486. do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
  487. static int mgslpc_config(struct pcmcia_device *link)
  488. {
  489. MGSLPC_INFO *info = link->priv;
  490. tuple_t tuple;
  491. cisparse_t parse;
  492. int last_fn, last_ret;
  493. u_char buf[64];
  494. cistpl_cftable_entry_t dflt = { 0 };
  495. cistpl_cftable_entry_t *cfg;
  496. if (debug_level >= DEBUG_LEVEL_INFO)
  497. printk("mgslpc_config(0x%p)\n", link);
  498. tuple.Attributes = 0;
  499. tuple.TupleData = buf;
  500. tuple.TupleDataMax = sizeof(buf);
  501. tuple.TupleOffset = 0;
  502. /* get CIS configuration entry */
  503. tuple.DesiredTuple = CISTPL_CFTABLE_ENTRY;
  504. CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(link, &tuple));
  505. cfg = &(parse.cftable_entry);
  506. CS_CHECK(GetTupleData, pcmcia_get_tuple_data(link, &tuple));
  507. CS_CHECK(ParseTuple, pcmcia_parse_tuple(link, &tuple, &parse));
  508. if (cfg->flags & CISTPL_CFTABLE_DEFAULT) dflt = *cfg;
  509. if (cfg->index == 0)
  510. goto cs_failed;
  511. link->conf.ConfigIndex = cfg->index;
  512. link->conf.Attributes |= CONF_ENABLE_IRQ;
  513. /* IO window settings */
  514. link->io.NumPorts1 = 0;
  515. if ((cfg->io.nwin > 0) || (dflt.io.nwin > 0)) {
  516. cistpl_io_t *io = (cfg->io.nwin) ? &cfg->io : &dflt.io;
  517. link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
  518. if (!(io->flags & CISTPL_IO_8BIT))
  519. link->io.Attributes1 = IO_DATA_PATH_WIDTH_16;
  520. if (!(io->flags & CISTPL_IO_16BIT))
  521. link->io.Attributes1 = IO_DATA_PATH_WIDTH_8;
  522. link->io.IOAddrLines = io->flags & CISTPL_IO_LINES_MASK;
  523. link->io.BasePort1 = io->win[0].base;
  524. link->io.NumPorts1 = io->win[0].len;
  525. CS_CHECK(RequestIO, pcmcia_request_io(link, &link->io));
  526. }
  527. link->conf.Attributes = CONF_ENABLE_IRQ;
  528. link->conf.IntType = INT_MEMORY_AND_IO;
  529. link->conf.ConfigIndex = 8;
  530. link->conf.Present = PRESENT_OPTION;
  531. link->irq.Attributes |= IRQ_HANDLE_PRESENT;
  532. link->irq.Handler = mgslpc_isr;
  533. link->irq.Instance = info;
  534. CS_CHECK(RequestIRQ, pcmcia_request_irq(link, &link->irq));
  535. CS_CHECK(RequestConfiguration, pcmcia_request_configuration(link, &link->conf));
  536. info->io_base = link->io.BasePort1;
  537. info->irq_level = link->irq.AssignedIRQ;
  538. /* add to linked list of devices */
  539. sprintf(info->node.dev_name, "mgslpc0");
  540. info->node.major = info->node.minor = 0;
  541. link->dev_node = &info->node;
  542. printk(KERN_INFO "%s: index 0x%02x:",
  543. info->node.dev_name, link->conf.ConfigIndex);
  544. if (link->conf.Attributes & CONF_ENABLE_IRQ)
  545. printk(", irq %d", link->irq.AssignedIRQ);
  546. if (link->io.NumPorts1)
  547. printk(", io 0x%04x-0x%04x", link->io.BasePort1,
  548. link->io.BasePort1+link->io.NumPorts1-1);
  549. printk("\n");
  550. return 0;
  551. cs_failed:
  552. cs_error(link, last_fn, last_ret);
  553. mgslpc_release((u_long)link);
  554. return -ENODEV;
  555. }
  556. /* Card has been removed.
  557. * Unregister device and release PCMCIA configuration.
  558. * If device is open, postpone until it is closed.
  559. */
  560. static void mgslpc_release(u_long arg)
  561. {
  562. struct pcmcia_device *link = (struct pcmcia_device *)arg;
  563. if (debug_level >= DEBUG_LEVEL_INFO)
  564. printk("mgslpc_release(0x%p)\n", link);
  565. pcmcia_disable_device(link);
  566. }
  567. static void mgslpc_detach(struct pcmcia_device *link)
  568. {
  569. if (debug_level >= DEBUG_LEVEL_INFO)
  570. printk("mgslpc_detach(0x%p)\n", link);
  571. ((MGSLPC_INFO *)link->priv)->stop = 1;
  572. mgslpc_release((u_long)link);
  573. mgslpc_remove_device((MGSLPC_INFO *)link->priv);
  574. }
  575. static int mgslpc_suspend(struct pcmcia_device *link)
  576. {
  577. MGSLPC_INFO *info = link->priv;
  578. info->stop = 1;
  579. return 0;
  580. }
  581. static int mgslpc_resume(struct pcmcia_device *link)
  582. {
  583. MGSLPC_INFO *info = link->priv;
  584. info->stop = 0;
  585. return 0;
  586. }
  587. static inline int mgslpc_paranoia_check(MGSLPC_INFO *info,
  588. char *name, const char *routine)
  589. {
  590. #ifdef MGSLPC_PARANOIA_CHECK
  591. static const char *badmagic =
  592. "Warning: bad magic number for mgsl struct (%s) in %s\n";
  593. static const char *badinfo =
  594. "Warning: null mgslpc_info for (%s) in %s\n";
  595. if (!info) {
  596. printk(badinfo, name, routine);
  597. return 1;
  598. }
  599. if (info->magic != MGSLPC_MAGIC) {
  600. printk(badmagic, name, routine);
  601. return 1;
  602. }
  603. #else
  604. if (!info)
  605. return 1;
  606. #endif
  607. return 0;
  608. }
  609. #define CMD_RXFIFO BIT7 // release current rx FIFO
  610. #define CMD_RXRESET BIT6 // receiver reset
  611. #define CMD_RXFIFO_READ BIT5
  612. #define CMD_START_TIMER BIT4
  613. #define CMD_TXFIFO BIT3 // release current tx FIFO
  614. #define CMD_TXEOM BIT1 // transmit end message
  615. #define CMD_TXRESET BIT0 // transmit reset
  616. static BOOLEAN wait_command_complete(MGSLPC_INFO *info, unsigned char channel)
  617. {
  618. int i = 0;
  619. /* wait for command completion */
  620. while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
  621. udelay(1);
  622. if (i++ == 1000)
  623. return FALSE;
  624. }
  625. return TRUE;
  626. }
  627. static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd)
  628. {
  629. wait_command_complete(info, channel);
  630. write_reg(info, (unsigned char) (channel + CMDR), cmd);
  631. }
  632. static void tx_pause(struct tty_struct *tty)
  633. {
  634. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  635. unsigned long flags;
  636. if (mgslpc_paranoia_check(info, tty->name, "tx_pause"))
  637. return;
  638. if (debug_level >= DEBUG_LEVEL_INFO)
  639. printk("tx_pause(%s)\n",info->device_name);
  640. spin_lock_irqsave(&info->lock,flags);
  641. if (info->tx_enabled)
  642. tx_stop(info);
  643. spin_unlock_irqrestore(&info->lock,flags);
  644. }
  645. static void tx_release(struct tty_struct *tty)
  646. {
  647. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  648. unsigned long flags;
  649. if (mgslpc_paranoia_check(info, tty->name, "tx_release"))
  650. return;
  651. if (debug_level >= DEBUG_LEVEL_INFO)
  652. printk("tx_release(%s)\n",info->device_name);
  653. spin_lock_irqsave(&info->lock,flags);
  654. if (!info->tx_enabled)
  655. tx_start(info);
  656. spin_unlock_irqrestore(&info->lock,flags);
  657. }
  658. /* Return next bottom half action to perform.
  659. * or 0 if nothing to do.
  660. */
  661. static int bh_action(MGSLPC_INFO *info)
  662. {
  663. unsigned long flags;
  664. int rc = 0;
  665. spin_lock_irqsave(&info->lock,flags);
  666. if (info->pending_bh & BH_RECEIVE) {
  667. info->pending_bh &= ~BH_RECEIVE;
  668. rc = BH_RECEIVE;
  669. } else if (info->pending_bh & BH_TRANSMIT) {
  670. info->pending_bh &= ~BH_TRANSMIT;
  671. rc = BH_TRANSMIT;
  672. } else if (info->pending_bh & BH_STATUS) {
  673. info->pending_bh &= ~BH_STATUS;
  674. rc = BH_STATUS;
  675. }
  676. if (!rc) {
  677. /* Mark BH routine as complete */
  678. info->bh_running = 0;
  679. info->bh_requested = 0;
  680. }
  681. spin_unlock_irqrestore(&info->lock,flags);
  682. return rc;
  683. }
  684. static void bh_handler(struct work_struct *work)
  685. {
  686. MGSLPC_INFO *info = container_of(work, MGSLPC_INFO, task);
  687. int action;
  688. if (!info)
  689. return;
  690. if (debug_level >= DEBUG_LEVEL_BH)
  691. printk( "%s(%d):bh_handler(%s) entry\n",
  692. __FILE__,__LINE__,info->device_name);
  693. info->bh_running = 1;
  694. while((action = bh_action(info)) != 0) {
  695. /* Process work item */
  696. if ( debug_level >= DEBUG_LEVEL_BH )
  697. printk( "%s(%d):bh_handler() work item action=%d\n",
  698. __FILE__,__LINE__,action);
  699. switch (action) {
  700. case BH_RECEIVE:
  701. while(rx_get_frame(info));
  702. break;
  703. case BH_TRANSMIT:
  704. bh_transmit(info);
  705. break;
  706. case BH_STATUS:
  707. bh_status(info);
  708. break;
  709. default:
  710. /* unknown work item ID */
  711. printk("Unknown work item ID=%08X!\n", action);
  712. break;
  713. }
  714. }
  715. if (debug_level >= DEBUG_LEVEL_BH)
  716. printk( "%s(%d):bh_handler(%s) exit\n",
  717. __FILE__,__LINE__,info->device_name);
  718. }
  719. static void bh_transmit(MGSLPC_INFO *info)
  720. {
  721. struct tty_struct *tty = info->tty;
  722. if (debug_level >= DEBUG_LEVEL_BH)
  723. printk("bh_transmit() entry on %s\n", info->device_name);
  724. if (tty)
  725. tty_wakeup(tty);
  726. }
  727. static void bh_status(MGSLPC_INFO *info)
  728. {
  729. info->ri_chkcount = 0;
  730. info->dsr_chkcount = 0;
  731. info->dcd_chkcount = 0;
  732. info->cts_chkcount = 0;
  733. }
  734. /* eom: non-zero = end of frame */
  735. static void rx_ready_hdlc(MGSLPC_INFO *info, int eom)
  736. {
  737. unsigned char data[2];
  738. unsigned char fifo_count, read_count, i;
  739. RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size));
  740. if (debug_level >= DEBUG_LEVEL_ISR)
  741. printk("%s(%d):rx_ready_hdlc(eom=%d)\n",__FILE__,__LINE__,eom);
  742. if (!info->rx_enabled)
  743. return;
  744. if (info->rx_frame_count >= info->rx_buf_count) {
  745. /* no more free buffers */
  746. issue_command(info, CHA, CMD_RXRESET);
  747. info->pending_bh |= BH_RECEIVE;
  748. info->rx_overflow = 1;
  749. info->icount.buf_overrun++;
  750. return;
  751. }
  752. if (eom) {
  753. /* end of frame, get FIFO count from RBCL register */
  754. if (!(fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f)))
  755. fifo_count = 32;
  756. } else
  757. fifo_count = 32;
  758. do {
  759. if (fifo_count == 1) {
  760. read_count = 1;
  761. data[0] = read_reg(info, CHA + RXFIFO);
  762. } else {
  763. read_count = 2;
  764. *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO);
  765. }
  766. fifo_count -= read_count;
  767. if (!fifo_count && eom)
  768. buf->status = data[--read_count];
  769. for (i = 0; i < read_count; i++) {
  770. if (buf->count >= info->max_frame_size) {
  771. /* frame too large, reset receiver and reset current buffer */
  772. issue_command(info, CHA, CMD_RXRESET);
  773. buf->count = 0;
  774. return;
  775. }
  776. *(buf->data + buf->count) = data[i];
  777. buf->count++;
  778. }
  779. } while (fifo_count);
  780. if (eom) {
  781. info->pending_bh |= BH_RECEIVE;
  782. info->rx_frame_count++;
  783. info->rx_put++;
  784. if (info->rx_put >= info->rx_buf_count)
  785. info->rx_put = 0;
  786. }
  787. issue_command(info, CHA, CMD_RXFIFO);
  788. }
  789. static void rx_ready_async(MGSLPC_INFO *info, int tcd)
  790. {
  791. unsigned char data, status, flag;
  792. int fifo_count;
  793. int work = 0;
  794. struct tty_struct *tty = info->tty;
  795. struct mgsl_icount *icount = &info->icount;
  796. if (tcd) {
  797. /* early termination, get FIFO count from RBCL register */
  798. fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
  799. /* Zero fifo count could mean 0 or 32 bytes available.
  800. * If BIT5 of STAR is set then at least 1 byte is available.
  801. */
  802. if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5))
  803. fifo_count = 32;
  804. } else
  805. fifo_count = 32;
  806. tty_buffer_request_room(tty, fifo_count);
  807. /* Flush received async data to receive data buffer. */
  808. while (fifo_count) {
  809. data = read_reg(info, CHA + RXFIFO);
  810. status = read_reg(info, CHA + RXFIFO);
  811. fifo_count -= 2;
  812. icount->rx++;
  813. flag = TTY_NORMAL;
  814. // if no frameing/crc error then save data
  815. // BIT7:parity error
  816. // BIT6:framing error
  817. if (status & (BIT7 + BIT6)) {
  818. if (status & BIT7)
  819. icount->parity++;
  820. else
  821. icount->frame++;
  822. /* discard char if tty control flags say so */
  823. if (status & info->ignore_status_mask)
  824. continue;
  825. status &= info->read_status_mask;
  826. if (status & BIT7)
  827. flag = TTY_PARITY;
  828. else if (status & BIT6)
  829. flag = TTY_FRAME;
  830. }
  831. work += tty_insert_flip_char(tty, data, flag);
  832. }
  833. issue_command(info, CHA, CMD_RXFIFO);
  834. if (debug_level >= DEBUG_LEVEL_ISR) {
  835. printk("%s(%d):rx_ready_async",
  836. __FILE__,__LINE__);
  837. printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
  838. __FILE__,__LINE__,icount->rx,icount->brk,
  839. icount->parity,icount->frame,icount->overrun);
  840. }
  841. if (work)
  842. tty_flip_buffer_push(tty);
  843. }
  844. static void tx_done(MGSLPC_INFO *info)
  845. {
  846. if (!info->tx_active)
  847. return;
  848. info->tx_active = 0;
  849. info->tx_aborting = 0;
  850. if (info->params.mode == MGSL_MODE_ASYNC)
  851. return;
  852. info->tx_count = info->tx_put = info->tx_get = 0;
  853. del_timer(&info->tx_timer);
  854. if (info->drop_rts_on_tx_done) {
  855. get_signals(info);
  856. if (info->serial_signals & SerialSignal_RTS) {
  857. info->serial_signals &= ~SerialSignal_RTS;
  858. set_signals(info);
  859. }
  860. info->drop_rts_on_tx_done = 0;
  861. }
  862. #if SYNCLINK_GENERIC_HDLC
  863. if (info->netcount)
  864. hdlcdev_tx_done(info);
  865. else
  866. #endif
  867. {
  868. if (info->tty->stopped || info->tty->hw_stopped) {
  869. tx_stop(info);
  870. return;
  871. }
  872. info->pending_bh |= BH_TRANSMIT;
  873. }
  874. }
  875. static void tx_ready(MGSLPC_INFO *info)
  876. {
  877. unsigned char fifo_count = 32;
  878. int c;
  879. if (debug_level >= DEBUG_LEVEL_ISR)
  880. printk("%s(%d):tx_ready(%s)\n", __FILE__,__LINE__,info->device_name);
  881. if (info->params.mode == MGSL_MODE_HDLC) {
  882. if (!info->tx_active)
  883. return;
  884. } else {
  885. if (info->tty->stopped || info->tty->hw_stopped) {
  886. tx_stop(info);
  887. return;
  888. }
  889. if (!info->tx_count)
  890. info->tx_active = 0;
  891. }
  892. if (!info->tx_count)
  893. return;
  894. while (info->tx_count && fifo_count) {
  895. c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get)));
  896. if (c == 1) {
  897. write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get));
  898. } else {
  899. write_reg16(info, CHA + TXFIFO,
  900. *((unsigned short*)(info->tx_buf + info->tx_get)));
  901. }
  902. info->tx_count -= c;
  903. info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1);
  904. fifo_count -= c;
  905. }
  906. if (info->params.mode == MGSL_MODE_ASYNC) {
  907. if (info->tx_count < WAKEUP_CHARS)
  908. info->pending_bh |= BH_TRANSMIT;
  909. issue_command(info, CHA, CMD_TXFIFO);
  910. } else {
  911. if (info->tx_count)
  912. issue_command(info, CHA, CMD_TXFIFO);
  913. else
  914. issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM);
  915. }
  916. }
  917. static void cts_change(MGSLPC_INFO *info)
  918. {
  919. get_signals(info);
  920. if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  921. irq_disable(info, CHB, IRQ_CTS);
  922. info->icount.cts++;
  923. if (info->serial_signals & SerialSignal_CTS)
  924. info->input_signal_events.cts_up++;
  925. else
  926. info->input_signal_events.cts_down++;
  927. wake_up_interruptible(&info->status_event_wait_q);
  928. wake_up_interruptible(&info->event_wait_q);
  929. if (info->flags & ASYNC_CTS_FLOW) {
  930. if (info->tty->hw_stopped) {
  931. if (info->serial_signals & SerialSignal_CTS) {
  932. if (debug_level >= DEBUG_LEVEL_ISR)
  933. printk("CTS tx start...");
  934. if (info->tty)
  935. info->tty->hw_stopped = 0;
  936. tx_start(info);
  937. info->pending_bh |= BH_TRANSMIT;
  938. return;
  939. }
  940. } else {
  941. if (!(info->serial_signals & SerialSignal_CTS)) {
  942. if (debug_level >= DEBUG_LEVEL_ISR)
  943. printk("CTS tx stop...");
  944. if (info->tty)
  945. info->tty->hw_stopped = 1;
  946. tx_stop(info);
  947. }
  948. }
  949. }
  950. info->pending_bh |= BH_STATUS;
  951. }
  952. static void dcd_change(MGSLPC_INFO *info)
  953. {
  954. get_signals(info);
  955. if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  956. irq_disable(info, CHB, IRQ_DCD);
  957. info->icount.dcd++;
  958. if (info->serial_signals & SerialSignal_DCD) {
  959. info->input_signal_events.dcd_up++;
  960. }
  961. else
  962. info->input_signal_events.dcd_down++;
  963. #if SYNCLINK_GENERIC_HDLC
  964. if (info->netcount) {
  965. if (info->serial_signals & SerialSignal_DCD)
  966. netif_carrier_on(info->netdev);
  967. else
  968. netif_carrier_off(info->netdev);
  969. }
  970. #endif
  971. wake_up_interruptible(&info->status_event_wait_q);
  972. wake_up_interruptible(&info->event_wait_q);
  973. if (info->flags & ASYNC_CHECK_CD) {
  974. if (debug_level >= DEBUG_LEVEL_ISR)
  975. printk("%s CD now %s...", info->device_name,
  976. (info->serial_signals & SerialSignal_DCD) ? "on" : "off");
  977. if (info->serial_signals & SerialSignal_DCD)
  978. wake_up_interruptible(&info->open_wait);
  979. else {
  980. if (debug_level >= DEBUG_LEVEL_ISR)
  981. printk("doing serial hangup...");
  982. if (info->tty)
  983. tty_hangup(info->tty);
  984. }
  985. }
  986. info->pending_bh |= BH_STATUS;
  987. }
  988. static void dsr_change(MGSLPC_INFO *info)
  989. {
  990. get_signals(info);
  991. if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  992. port_irq_disable(info, PVR_DSR);
  993. info->icount.dsr++;
  994. if (info->serial_signals & SerialSignal_DSR)
  995. info->input_signal_events.dsr_up++;
  996. else
  997. info->input_signal_events.dsr_down++;
  998. wake_up_interruptible(&info->status_event_wait_q);
  999. wake_up_interruptible(&info->event_wait_q);
  1000. info->pending_bh |= BH_STATUS;
  1001. }
  1002. static void ri_change(MGSLPC_INFO *info)
  1003. {
  1004. get_signals(info);
  1005. if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  1006. port_irq_disable(info, PVR_RI);
  1007. info->icount.rng++;
  1008. if (info->serial_signals & SerialSignal_RI)
  1009. info->input_signal_events.ri_up++;
  1010. else
  1011. info->input_signal_events.ri_down++;
  1012. wake_up_interruptible(&info->status_event_wait_q);
  1013. wake_up_interruptible(&info->event_wait_q);
  1014. info->pending_bh |= BH_STATUS;
  1015. }
  1016. /* Interrupt service routine entry point.
  1017. *
  1018. * Arguments:
  1019. *
  1020. * irq interrupt number that caused interrupt
  1021. * dev_id device ID supplied during interrupt registration
  1022. */
  1023. static irqreturn_t mgslpc_isr(int irq, void *dev_id)
  1024. {
  1025. MGSLPC_INFO * info = (MGSLPC_INFO *)dev_id;
  1026. unsigned short isr;
  1027. unsigned char gis, pis;
  1028. int count=0;
  1029. if (debug_level >= DEBUG_LEVEL_ISR)
  1030. printk("mgslpc_isr(%d) entry.\n", irq);
  1031. if (!info)
  1032. return IRQ_NONE;
  1033. if (!(info->p_dev->_locked))
  1034. return IRQ_HANDLED;
  1035. spin_lock(&info->lock);
  1036. while ((gis = read_reg(info, CHA + GIS))) {
  1037. if (debug_level >= DEBUG_LEVEL_ISR)
  1038. printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis);
  1039. if ((gis & 0x70) || count > 1000) {
  1040. printk("synclink_cs:hardware failed or ejected\n");
  1041. break;
  1042. }
  1043. count++;
  1044. if (gis & (BIT1 + BIT0)) {
  1045. isr = read_reg16(info, CHB + ISR);
  1046. if (isr & IRQ_DCD)
  1047. dcd_change(info);
  1048. if (isr & IRQ_CTS)
  1049. cts_change(info);
  1050. }
  1051. if (gis & (BIT3 + BIT2))
  1052. {
  1053. isr = read_reg16(info, CHA + ISR);
  1054. if (isr & IRQ_TIMER) {
  1055. info->irq_occurred = 1;
  1056. irq_disable(info, CHA, IRQ_TIMER);
  1057. }
  1058. /* receive IRQs */
  1059. if (isr & IRQ_EXITHUNT) {
  1060. info->icount.exithunt++;
  1061. wake_up_interruptible(&info->event_wait_q);
  1062. }
  1063. if (isr & IRQ_BREAK_ON) {
  1064. info->icount.brk++;
  1065. if (info->flags & ASYNC_SAK)
  1066. do_SAK(info->tty);
  1067. }
  1068. if (isr & IRQ_RXTIME) {
  1069. issue_command(info, CHA, CMD_RXFIFO_READ);
  1070. }
  1071. if (isr & (IRQ_RXEOM + IRQ_RXFIFO)) {
  1072. if (info->params.mode == MGSL_MODE_HDLC)
  1073. rx_ready_hdlc(info, isr & IRQ_RXEOM);
  1074. else
  1075. rx_ready_async(info, isr & IRQ_RXEOM);
  1076. }
  1077. /* transmit IRQs */
  1078. if (isr & IRQ_UNDERRUN) {
  1079. if (info->tx_aborting)
  1080. info->icount.txabort++;
  1081. else
  1082. info->icount.txunder++;
  1083. tx_done(info);
  1084. }
  1085. else if (isr & IRQ_ALLSENT) {
  1086. info->icount.txok++;
  1087. tx_done(info);
  1088. }
  1089. else if (isr & IRQ_TXFIFO)
  1090. tx_ready(info);
  1091. }
  1092. if (gis & BIT7) {
  1093. pis = read_reg(info, CHA + PIS);
  1094. if (pis & BIT1)
  1095. dsr_change(info);
  1096. if (pis & BIT2)
  1097. ri_change(info);
  1098. }
  1099. }
  1100. /* Request bottom half processing if there's something
  1101. * for it to do and the bh is not already running
  1102. */
  1103. if (info->pending_bh && !info->bh_running && !info->bh_requested) {
  1104. if ( debug_level >= DEBUG_LEVEL_ISR )
  1105. printk("%s(%d):%s queueing bh task.\n",
  1106. __FILE__,__LINE__,info->device_name);
  1107. schedule_work(&info->task);
  1108. info->bh_requested = 1;
  1109. }
  1110. spin_unlock(&info->lock);
  1111. if (debug_level >= DEBUG_LEVEL_ISR)
  1112. printk("%s(%d):mgslpc_isr(%d)exit.\n",
  1113. __FILE__,__LINE__,irq);
  1114. return IRQ_HANDLED;
  1115. }
  1116. /* Initialize and start device.
  1117. */
  1118. static int startup(MGSLPC_INFO * info)
  1119. {
  1120. int retval = 0;
  1121. if (debug_level >= DEBUG_LEVEL_INFO)
  1122. printk("%s(%d):startup(%s)\n",__FILE__,__LINE__,info->device_name);
  1123. if (info->flags & ASYNC_INITIALIZED)
  1124. return 0;
  1125. if (!info->tx_buf) {
  1126. /* allocate a page of memory for a transmit buffer */
  1127. info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
  1128. if (!info->tx_buf) {
  1129. printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
  1130. __FILE__,__LINE__,info->device_name);
  1131. return -ENOMEM;
  1132. }
  1133. }
  1134. info->pending_bh = 0;
  1135. memset(&info->icount, 0, sizeof(info->icount));
  1136. setup_timer(&info->tx_timer, tx_timeout, (unsigned long)info);
  1137. /* Allocate and claim adapter resources */
  1138. retval = claim_resources(info);
  1139. /* perform existance check and diagnostics */
  1140. if ( !retval )
  1141. retval = adapter_test(info);
  1142. if ( retval ) {
  1143. if (capable(CAP_SYS_ADMIN) && info->tty)
  1144. set_bit(TTY_IO_ERROR, &info->tty->flags);
  1145. release_resources(info);
  1146. return retval;
  1147. }
  1148. /* program hardware for current parameters */
  1149. mgslpc_change_params(info);
  1150. if (info->tty)
  1151. clear_bit(TTY_IO_ERROR, &info->tty->flags);
  1152. info->flags |= ASYNC_INITIALIZED;
  1153. return 0;
  1154. }
  1155. /* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware
  1156. */
  1157. static void shutdown(MGSLPC_INFO * info)
  1158. {
  1159. unsigned long flags;
  1160. if (!(info->flags & ASYNC_INITIALIZED))
  1161. return;
  1162. if (debug_level >= DEBUG_LEVEL_INFO)
  1163. printk("%s(%d):mgslpc_shutdown(%s)\n",
  1164. __FILE__,__LINE__, info->device_name );
  1165. /* clear status wait queue because status changes */
  1166. /* can't happen after shutting down the hardware */
  1167. wake_up_interruptible(&info->status_event_wait_q);
  1168. wake_up_interruptible(&info->event_wait_q);
  1169. del_timer_sync(&info->tx_timer);
  1170. if (info->tx_buf) {
  1171. free_page((unsigned long) info->tx_buf);
  1172. info->tx_buf = NULL;
  1173. }
  1174. spin_lock_irqsave(&info->lock,flags);
  1175. rx_stop(info);
  1176. tx_stop(info);
  1177. /* TODO:disable interrupts instead of reset to preserve signal states */
  1178. reset_device(info);
  1179. if (!info->tty || info->tty->termios->c_cflag & HUPCL) {
  1180. info->serial_signals &= ~(SerialSignal_DTR + SerialSignal_RTS);
  1181. set_signals(info);
  1182. }
  1183. spin_unlock_irqrestore(&info->lock,flags);
  1184. release_resources(info);
  1185. if (info->tty)
  1186. set_bit(TTY_IO_ERROR, &info->tty->flags);
  1187. info->flags &= ~ASYNC_INITIALIZED;
  1188. }
  1189. static void mgslpc_program_hw(MGSLPC_INFO *info)
  1190. {
  1191. unsigned long flags;
  1192. spin_lock_irqsave(&info->lock,flags);
  1193. rx_stop(info);
  1194. tx_stop(info);
  1195. info->tx_count = info->tx_put = info->tx_get = 0;
  1196. if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
  1197. hdlc_mode(info);
  1198. else
  1199. async_mode(info);
  1200. set_signals(info);
  1201. info->dcd_chkcount = 0;
  1202. info->cts_chkcount = 0;
  1203. info->ri_chkcount = 0;
  1204. info->dsr_chkcount = 0;
  1205. irq_enable(info, CHB, IRQ_DCD | IRQ_CTS);
  1206. port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI);
  1207. get_signals(info);
  1208. if (info->netcount || info->tty->termios->c_cflag & CREAD)
  1209. rx_start(info);
  1210. spin_unlock_irqrestore(&info->lock,flags);
  1211. }
  1212. /* Reconfigure adapter based on new parameters
  1213. */
  1214. static void mgslpc_change_params(MGSLPC_INFO *info)
  1215. {
  1216. unsigned cflag;
  1217. int bits_per_char;
  1218. if (!info->tty || !info->tty->termios)
  1219. return;
  1220. if (debug_level >= DEBUG_LEVEL_INFO)
  1221. printk("%s(%d):mgslpc_change_params(%s)\n",
  1222. __FILE__,__LINE__, info->device_name );
  1223. cflag = info->tty->termios->c_cflag;
  1224. /* if B0 rate (hangup) specified then negate DTR and RTS */
  1225. /* otherwise assert DTR and RTS */
  1226. if (cflag & CBAUD)
  1227. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  1228. else
  1229. info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
  1230. /* byte size and parity */
  1231. switch (cflag & CSIZE) {
  1232. case CS5: info->params.data_bits = 5; break;
  1233. case CS6: info->params.data_bits = 6; break;
  1234. case CS7: info->params.data_bits = 7; break;
  1235. case CS8: info->params.data_bits = 8; break;
  1236. default: info->params.data_bits = 7; break;
  1237. }
  1238. if (cflag & CSTOPB)
  1239. info->params.stop_bits = 2;
  1240. else
  1241. info->params.stop_bits = 1;
  1242. info->params.parity = ASYNC_PARITY_NONE;
  1243. if (cflag & PARENB) {
  1244. if (cflag & PARODD)
  1245. info->params.parity = ASYNC_PARITY_ODD;
  1246. else
  1247. info->params.parity = ASYNC_PARITY_EVEN;
  1248. #ifdef CMSPAR
  1249. if (cflag & CMSPAR)
  1250. info->params.parity = ASYNC_PARITY_SPACE;
  1251. #endif
  1252. }
  1253. /* calculate number of jiffies to transmit a full
  1254. * FIFO (32 bytes) at specified data rate
  1255. */
  1256. bits_per_char = info->params.data_bits +
  1257. info->params.stop_bits + 1;
  1258. /* if port data rate is set to 460800 or less then
  1259. * allow tty settings to override, otherwise keep the
  1260. * current data rate.
  1261. */
  1262. if (info->params.data_rate <= 460800) {
  1263. info->params.data_rate = tty_get_baud_rate(info->tty);
  1264. }
  1265. if ( info->params.data_rate ) {
  1266. info->timeout = (32*HZ*bits_per_char) /
  1267. info->params.data_rate;
  1268. }
  1269. info->timeout += HZ/50; /* Add .02 seconds of slop */
  1270. if (cflag & CRTSCTS)
  1271. info->flags |= ASYNC_CTS_FLOW;
  1272. else
  1273. info->flags &= ~ASYNC_CTS_FLOW;
  1274. if (cflag & CLOCAL)
  1275. info->flags &= ~ASYNC_CHECK_CD;
  1276. else
  1277. info->flags |= ASYNC_CHECK_CD;
  1278. /* process tty input control flags */
  1279. info->read_status_mask = 0;
  1280. if (I_INPCK(info->tty))
  1281. info->read_status_mask |= BIT7 | BIT6;
  1282. if (I_IGNPAR(info->tty))
  1283. info->ignore_status_mask |= BIT7 | BIT6;
  1284. mgslpc_program_hw(info);
  1285. }
  1286. /* Add a character to the transmit buffer
  1287. */
  1288. static void mgslpc_put_char(struct tty_struct *tty, unsigned char ch)
  1289. {
  1290. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1291. unsigned long flags;
  1292. if (debug_level >= DEBUG_LEVEL_INFO) {
  1293. printk( "%s(%d):mgslpc_put_char(%d) on %s\n",
  1294. __FILE__,__LINE__,ch,info->device_name);
  1295. }
  1296. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char"))
  1297. return;
  1298. if (!info->tx_buf)
  1299. return;
  1300. spin_lock_irqsave(&info->lock,flags);
  1301. if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) {
  1302. if (info->tx_count < TXBUFSIZE - 1) {
  1303. info->tx_buf[info->tx_put++] = ch;
  1304. info->tx_put &= TXBUFSIZE-1;
  1305. info->tx_count++;
  1306. }
  1307. }
  1308. spin_unlock_irqrestore(&info->lock,flags);
  1309. }
  1310. /* Enable transmitter so remaining characters in the
  1311. * transmit buffer are sent.
  1312. */
  1313. static void mgslpc_flush_chars(struct tty_struct *tty)
  1314. {
  1315. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1316. unsigned long flags;
  1317. if (debug_level >= DEBUG_LEVEL_INFO)
  1318. printk( "%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n",
  1319. __FILE__,__LINE__,info->device_name,info->tx_count);
  1320. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars"))
  1321. return;
  1322. if (info->tx_count <= 0 || tty->stopped ||
  1323. tty->hw_stopped || !info->tx_buf)
  1324. return;
  1325. if (debug_level >= DEBUG_LEVEL_INFO)
  1326. printk( "%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n",
  1327. __FILE__,__LINE__,info->device_name);
  1328. spin_lock_irqsave(&info->lock,flags);
  1329. if (!info->tx_active)
  1330. tx_start(info);
  1331. spin_unlock_irqrestore(&info->lock,flags);
  1332. }
  1333. /* Send a block of data
  1334. *
  1335. * Arguments:
  1336. *
  1337. * tty pointer to tty information structure
  1338. * buf pointer to buffer containing send data
  1339. * count size of send data in bytes
  1340. *
  1341. * Returns: number of characters written
  1342. */
  1343. static int mgslpc_write(struct tty_struct * tty,
  1344. const unsigned char *buf, int count)
  1345. {
  1346. int c, ret = 0;
  1347. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1348. unsigned long flags;
  1349. if (debug_level >= DEBUG_LEVEL_INFO)
  1350. printk( "%s(%d):mgslpc_write(%s) count=%d\n",
  1351. __FILE__,__LINE__,info->device_name,count);
  1352. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") ||
  1353. !info->tx_buf)
  1354. goto cleanup;
  1355. if (info->params.mode == MGSL_MODE_HDLC) {
  1356. if (count > TXBUFSIZE) {
  1357. ret = -EIO;
  1358. goto cleanup;
  1359. }
  1360. if (info->tx_active)
  1361. goto cleanup;
  1362. else if (info->tx_count)
  1363. goto start;
  1364. }
  1365. for (;;) {
  1366. c = min(count,
  1367. min(TXBUFSIZE - info->tx_count - 1,
  1368. TXBUFSIZE - info->tx_put));
  1369. if (c <= 0)
  1370. break;
  1371. memcpy(info->tx_buf + info->tx_put, buf, c);
  1372. spin_lock_irqsave(&info->lock,flags);
  1373. info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1);
  1374. info->tx_count += c;
  1375. spin_unlock_irqrestore(&info->lock,flags);
  1376. buf += c;
  1377. count -= c;
  1378. ret += c;
  1379. }
  1380. start:
  1381. if (info->tx_count && !tty->stopped && !tty->hw_stopped) {
  1382. spin_lock_irqsave(&info->lock,flags);
  1383. if (!info->tx_active)
  1384. tx_start(info);
  1385. spin_unlock_irqrestore(&info->lock,flags);
  1386. }
  1387. cleanup:
  1388. if (debug_level >= DEBUG_LEVEL_INFO)
  1389. printk( "%s(%d):mgslpc_write(%s) returning=%d\n",
  1390. __FILE__,__LINE__,info->device_name,ret);
  1391. return ret;
  1392. }
  1393. /* Return the count of free bytes in transmit buffer
  1394. */
  1395. static int mgslpc_write_room(struct tty_struct *tty)
  1396. {
  1397. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1398. int ret;
  1399. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room"))
  1400. return 0;
  1401. if (info->params.mode == MGSL_MODE_HDLC) {
  1402. /* HDLC (frame oriented) mode */
  1403. if (info->tx_active)
  1404. return 0;
  1405. else
  1406. return HDLC_MAX_FRAME_SIZE;
  1407. } else {
  1408. ret = TXBUFSIZE - info->tx_count - 1;
  1409. if (ret < 0)
  1410. ret = 0;
  1411. }
  1412. if (debug_level >= DEBUG_LEVEL_INFO)
  1413. printk("%s(%d):mgslpc_write_room(%s)=%d\n",
  1414. __FILE__,__LINE__, info->device_name, ret);
  1415. return ret;
  1416. }
  1417. /* Return the count of bytes in transmit buffer
  1418. */
  1419. static int mgslpc_chars_in_buffer(struct tty_struct *tty)
  1420. {
  1421. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1422. int rc;
  1423. if (debug_level >= DEBUG_LEVEL_INFO)
  1424. printk("%s(%d):mgslpc_chars_in_buffer(%s)\n",
  1425. __FILE__,__LINE__, info->device_name );
  1426. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer"))
  1427. return 0;
  1428. if (info->params.mode == MGSL_MODE_HDLC)
  1429. rc = info->tx_active ? info->max_frame_size : 0;
  1430. else
  1431. rc = info->tx_count;
  1432. if (debug_level >= DEBUG_LEVEL_INFO)
  1433. printk("%s(%d):mgslpc_chars_in_buffer(%s)=%d\n",
  1434. __FILE__,__LINE__, info->device_name, rc);
  1435. return rc;
  1436. }
  1437. /* Discard all data in the send buffer
  1438. */
  1439. static void mgslpc_flush_buffer(struct tty_struct *tty)
  1440. {
  1441. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1442. unsigned long flags;
  1443. if (debug_level >= DEBUG_LEVEL_INFO)
  1444. printk("%s(%d):mgslpc_flush_buffer(%s) entry\n",
  1445. __FILE__,__LINE__, info->device_name );
  1446. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer"))
  1447. return;
  1448. spin_lock_irqsave(&info->lock,flags);
  1449. info->tx_count = info->tx_put = info->tx_get = 0;
  1450. del_timer(&info->tx_timer);
  1451. spin_unlock_irqrestore(&info->lock,flags);
  1452. wake_up_interruptible(&tty->write_wait);
  1453. tty_wakeup(tty);
  1454. }
  1455. /* Send a high-priority XON/XOFF character
  1456. */
  1457. static void mgslpc_send_xchar(struct tty_struct *tty, char ch)
  1458. {
  1459. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1460. unsigned long flags;
  1461. if (debug_level >= DEBUG_LEVEL_INFO)
  1462. printk("%s(%d):mgslpc_send_xchar(%s,%d)\n",
  1463. __FILE__,__LINE__, info->device_name, ch );
  1464. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar"))
  1465. return;
  1466. info->x_char = ch;
  1467. if (ch) {
  1468. spin_lock_irqsave(&info->lock,flags);
  1469. if (!info->tx_enabled)
  1470. tx_start(info);
  1471. spin_unlock_irqrestore(&info->lock,flags);
  1472. }
  1473. }
  1474. /* Signal remote device to throttle send data (our receive data)
  1475. */
  1476. static void mgslpc_throttle(struct tty_struct * tty)
  1477. {
  1478. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1479. unsigned long flags;
  1480. if (debug_level >= DEBUG_LEVEL_INFO)
  1481. printk("%s(%d):mgslpc_throttle(%s) entry\n",
  1482. __FILE__,__LINE__, info->device_name );
  1483. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle"))
  1484. return;
  1485. if (I_IXOFF(tty))
  1486. mgslpc_send_xchar(tty, STOP_CHAR(tty));
  1487. if (tty->termios->c_cflag & CRTSCTS) {
  1488. spin_lock_irqsave(&info->lock,flags);
  1489. info->serial_signals &= ~SerialSignal_RTS;
  1490. set_signals(info);
  1491. spin_unlock_irqrestore(&info->lock,flags);
  1492. }
  1493. }
  1494. /* Signal remote device to stop throttling send data (our receive data)
  1495. */
  1496. static void mgslpc_unthrottle(struct tty_struct * tty)
  1497. {
  1498. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1499. unsigned long flags;
  1500. if (debug_level >= DEBUG_LEVEL_INFO)
  1501. printk("%s(%d):mgslpc_unthrottle(%s) entry\n",
  1502. __FILE__,__LINE__, info->device_name );
  1503. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle"))
  1504. return;
  1505. if (I_IXOFF(tty)) {
  1506. if (info->x_char)
  1507. info->x_char = 0;
  1508. else
  1509. mgslpc_send_xchar(tty, START_CHAR(tty));
  1510. }
  1511. if (tty->termios->c_cflag & CRTSCTS) {
  1512. spin_lock_irqsave(&info->lock,flags);
  1513. info->serial_signals |= SerialSignal_RTS;
  1514. set_signals(info);
  1515. spin_unlock_irqrestore(&info->lock,flags);
  1516. }
  1517. }
  1518. /* get the current serial statistics
  1519. */
  1520. static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount)
  1521. {
  1522. int err;
  1523. if (debug_level >= DEBUG_LEVEL_INFO)
  1524. printk("get_params(%s)\n", info->device_name);
  1525. if (!user_icount) {
  1526. memset(&info->icount, 0, sizeof(info->icount));
  1527. } else {
  1528. COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
  1529. if (err)
  1530. return -EFAULT;
  1531. }
  1532. return 0;
  1533. }
  1534. /* get the current serial parameters
  1535. */
  1536. static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params)
  1537. {
  1538. int err;
  1539. if (debug_level >= DEBUG_LEVEL_INFO)
  1540. printk("get_params(%s)\n", info->device_name);
  1541. COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
  1542. if (err)
  1543. return -EFAULT;
  1544. return 0;
  1545. }
  1546. /* set the serial parameters
  1547. *
  1548. * Arguments:
  1549. *
  1550. * info pointer to device instance data
  1551. * new_params user buffer containing new serial params
  1552. *
  1553. * Returns: 0 if success, otherwise error code
  1554. */
  1555. static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params)
  1556. {
  1557. unsigned long flags;
  1558. MGSL_PARAMS tmp_params;
  1559. int err;
  1560. if (debug_level >= DEBUG_LEVEL_INFO)
  1561. printk("%s(%d):set_params %s\n", __FILE__,__LINE__,
  1562. info->device_name );
  1563. COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
  1564. if (err) {
  1565. if ( debug_level >= DEBUG_LEVEL_INFO )
  1566. printk( "%s(%d):set_params(%s) user buffer copy failed\n",
  1567. __FILE__,__LINE__,info->device_name);
  1568. return -EFAULT;
  1569. }
  1570. spin_lock_irqsave(&info->lock,flags);
  1571. memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
  1572. spin_unlock_irqrestore(&info->lock,flags);
  1573. mgslpc_change_params(info);
  1574. return 0;
  1575. }
  1576. static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode)
  1577. {
  1578. int err;
  1579. if (debug_level >= DEBUG_LEVEL_INFO)
  1580. printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode);
  1581. COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
  1582. if (err)
  1583. return -EFAULT;
  1584. return 0;
  1585. }
  1586. static int set_txidle(MGSLPC_INFO * info, int idle_mode)
  1587. {
  1588. unsigned long flags;
  1589. if (debug_level >= DEBUG_LEVEL_INFO)
  1590. printk("set_txidle(%s,%d)\n", info->device_name, idle_mode);
  1591. spin_lock_irqsave(&info->lock,flags);
  1592. info->idle_mode = idle_mode;
  1593. tx_set_idle(info);
  1594. spin_unlock_irqrestore(&info->lock,flags);
  1595. return 0;
  1596. }
  1597. static int get_interface(MGSLPC_INFO * info, int __user *if_mode)
  1598. {
  1599. int err;
  1600. if (debug_level >= DEBUG_LEVEL_INFO)
  1601. printk("get_interface(%s)=%d\n", info->device_name, info->if_mode);
  1602. COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int));
  1603. if (err)
  1604. return -EFAULT;
  1605. return 0;
  1606. }
  1607. static int set_interface(MGSLPC_INFO * info, int if_mode)
  1608. {
  1609. unsigned long flags;
  1610. unsigned char val;
  1611. if (debug_level >= DEBUG_LEVEL_INFO)
  1612. printk("set_interface(%s,%d)\n", info->device_name, if_mode);
  1613. spin_lock_irqsave(&info->lock,flags);
  1614. info->if_mode = if_mode;
  1615. val = read_reg(info, PVR) & 0x0f;
  1616. switch (info->if_mode)
  1617. {
  1618. case MGSL_INTERFACE_RS232: val |= PVR_RS232; break;
  1619. case MGSL_INTERFACE_V35: val |= PVR_V35; break;
  1620. case MGSL_INTERFACE_RS422: val |= PVR_RS422; break;
  1621. }
  1622. write_reg(info, PVR, val);
  1623. spin_unlock_irqrestore(&info->lock,flags);
  1624. return 0;
  1625. }
  1626. static int set_txenable(MGSLPC_INFO * info, int enable)
  1627. {
  1628. unsigned long flags;
  1629. if (debug_level >= DEBUG_LEVEL_INFO)
  1630. printk("set_txenable(%s,%d)\n", info->device_name, enable);
  1631. spin_lock_irqsave(&info->lock,flags);
  1632. if (enable) {
  1633. if (!info->tx_enabled)
  1634. tx_start(info);
  1635. } else {
  1636. if (info->tx_enabled)
  1637. tx_stop(info);
  1638. }
  1639. spin_unlock_irqrestore(&info->lock,flags);
  1640. return 0;
  1641. }
  1642. static int tx_abort(MGSLPC_INFO * info)
  1643. {
  1644. unsigned long flags;
  1645. if (debug_level >= DEBUG_LEVEL_INFO)
  1646. printk("tx_abort(%s)\n", info->device_name);
  1647. spin_lock_irqsave(&info->lock,flags);
  1648. if (info->tx_active && info->tx_count &&
  1649. info->params.mode == MGSL_MODE_HDLC) {
  1650. /* clear data count so FIFO is not filled on next IRQ.
  1651. * This results in underrun and abort transmission.
  1652. */
  1653. info->tx_count = info->tx_put = info->tx_get = 0;
  1654. info->tx_aborting = TRUE;
  1655. }
  1656. spin_unlock_irqrestore(&info->lock,flags);
  1657. return 0;
  1658. }
  1659. static int set_rxenable(MGSLPC_INFO * info, int enable)
  1660. {
  1661. unsigned long flags;
  1662. if (debug_level >= DEBUG_LEVEL_INFO)
  1663. printk("set_rxenable(%s,%d)\n", info->device_name, enable);
  1664. spin_lock_irqsave(&info->lock,flags);
  1665. if (enable) {
  1666. if (!info->rx_enabled)
  1667. rx_start(info);
  1668. } else {
  1669. if (info->rx_enabled)
  1670. rx_stop(info);
  1671. }
  1672. spin_unlock_irqrestore(&info->lock,flags);
  1673. return 0;
  1674. }
  1675. /* wait for specified event to occur
  1676. *
  1677. * Arguments: info pointer to device instance data
  1678. * mask pointer to bitmask of events to wait for
  1679. * Return Value: 0 if successful and bit mask updated with
  1680. * of events triggerred,
  1681. * otherwise error code
  1682. */
  1683. static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr)
  1684. {
  1685. unsigned long flags;
  1686. int s;
  1687. int rc=0;
  1688. struct mgsl_icount cprev, cnow;
  1689. int events;
  1690. int mask;
  1691. struct _input_signal_events oldsigs, newsigs;
  1692. DECLARE_WAITQUEUE(wait, current);
  1693. COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
  1694. if (rc)
  1695. return -EFAULT;
  1696. if (debug_level >= DEBUG_LEVEL_INFO)
  1697. printk("wait_events(%s,%d)\n", info->device_name, mask);
  1698. spin_lock_irqsave(&info->lock,flags);
  1699. /* return immediately if state matches requested events */
  1700. get_signals(info);
  1701. s = info->serial_signals;
  1702. events = mask &
  1703. ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
  1704. ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
  1705. ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
  1706. ((s & SerialSignal_RI) ? MgslEvent_RiActive :MgslEvent_RiInactive) );
  1707. if (events) {
  1708. spin_unlock_irqrestore(&info->lock,flags);
  1709. goto exit;
  1710. }
  1711. /* save current irq counts */
  1712. cprev = info->icount;
  1713. oldsigs = info->input_signal_events;
  1714. if ((info->params.mode == MGSL_MODE_HDLC) &&
  1715. (mask & MgslEvent_ExitHuntMode))
  1716. irq_enable(info, CHA, IRQ_EXITHUNT);
  1717. set_current_state(TASK_INTERRUPTIBLE);
  1718. add_wait_queue(&info->event_wait_q, &wait);
  1719. spin_unlock_irqrestore(&info->lock,flags);
  1720. for(;;) {
  1721. schedule();
  1722. if (signal_pending(current)) {
  1723. rc = -ERESTARTSYS;
  1724. break;
  1725. }
  1726. /* get current irq counts */
  1727. spin_lock_irqsave(&info->lock,flags);
  1728. cnow = info->icount;
  1729. newsigs = info->input_signal_events;
  1730. set_current_state(TASK_INTERRUPTIBLE);
  1731. spin_unlock_irqrestore(&info->lock,flags);
  1732. /* if no change, wait aborted for some reason */
  1733. if (newsigs.dsr_up == oldsigs.dsr_up &&
  1734. newsigs.dsr_down == oldsigs.dsr_down &&
  1735. newsigs.dcd_up == oldsigs.dcd_up &&
  1736. newsigs.dcd_down == oldsigs.dcd_down &&
  1737. newsigs.cts_up == oldsigs.cts_up &&
  1738. newsigs.cts_down == oldsigs.cts_down &&
  1739. newsigs.ri_up == oldsigs.ri_up &&
  1740. newsigs.ri_down == oldsigs.ri_down &&
  1741. cnow.exithunt == cprev.exithunt &&
  1742. cnow.rxidle == cprev.rxidle) {
  1743. rc = -EIO;
  1744. break;
  1745. }
  1746. events = mask &
  1747. ( (newsigs.dsr_up != oldsigs.dsr_up ? MgslEvent_DsrActive:0) +
  1748. (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
  1749. (newsigs.dcd_up != oldsigs.dcd_up ? MgslEvent_DcdActive:0) +
  1750. (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
  1751. (newsigs.cts_up != oldsigs.cts_up ? MgslEvent_CtsActive:0) +
  1752. (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
  1753. (newsigs.ri_up != oldsigs.ri_up ? MgslEvent_RiActive:0) +
  1754. (newsigs.ri_down != oldsigs.ri_down ? MgslEvent_RiInactive:0) +
  1755. (cnow.exithunt != cprev.exithunt ? MgslEvent_ExitHuntMode:0) +
  1756. (cnow.rxidle != cprev.rxidle ? MgslEvent_IdleReceived:0) );
  1757. if (events)
  1758. break;
  1759. cprev = cnow;
  1760. oldsigs = newsigs;
  1761. }
  1762. remove_wait_queue(&info->event_wait_q, &wait);
  1763. set_current_state(TASK_RUNNING);
  1764. if (mask & MgslEvent_ExitHuntMode) {
  1765. spin_lock_irqsave(&info->lock,flags);
  1766. if (!waitqueue_active(&info->event_wait_q))
  1767. irq_disable(info, CHA, IRQ_EXITHUNT);
  1768. spin_unlock_irqrestore(&info->lock,flags);
  1769. }
  1770. exit:
  1771. if (rc == 0)
  1772. PUT_USER(rc, events, mask_ptr);
  1773. return rc;
  1774. }
  1775. static int modem_input_wait(MGSLPC_INFO *info,int arg)
  1776. {
  1777. unsigned long flags;
  1778. int rc;
  1779. struct mgsl_icount cprev, cnow;
  1780. DECLARE_WAITQUEUE(wait, current);
  1781. /* save current irq counts */
  1782. spin_lock_irqsave(&info->lock,flags);
  1783. cprev = info->icount;
  1784. add_wait_queue(&info->status_event_wait_q, &wait);
  1785. set_current_state(TASK_INTERRUPTIBLE);
  1786. spin_unlock_irqrestore(&info->lock,flags);
  1787. for(;;) {
  1788. schedule();
  1789. if (signal_pending(current)) {
  1790. rc = -ERESTARTSYS;
  1791. break;
  1792. }
  1793. /* get new irq counts */
  1794. spin_lock_irqsave(&info->lock,flags);
  1795. cnow = info->icount;
  1796. set_current_state(TASK_INTERRUPTIBLE);
  1797. spin_unlock_irqrestore(&info->lock,flags);
  1798. /* if no change, wait aborted for some reason */
  1799. if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
  1800. cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
  1801. rc = -EIO;
  1802. break;
  1803. }
  1804. /* check for change in caller specified modem input */
  1805. if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
  1806. (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
  1807. (arg & TIOCM_CD && cnow.dcd != cprev.dcd) ||
  1808. (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
  1809. rc = 0;
  1810. break;
  1811. }
  1812. cprev = cnow;
  1813. }
  1814. remove_wait_queue(&info->status_event_wait_q, &wait);
  1815. set_current_state(TASK_RUNNING);
  1816. return rc;
  1817. }
  1818. /* return the state of the serial control and status signals
  1819. */
  1820. static int tiocmget(struct tty_struct *tty, struct file *file)
  1821. {
  1822. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1823. unsigned int result;
  1824. unsigned long flags;
  1825. spin_lock_irqsave(&info->lock,flags);
  1826. get_signals(info);
  1827. spin_unlock_irqrestore(&info->lock,flags);
  1828. result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
  1829. ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
  1830. ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
  1831. ((info->serial_signals & SerialSignal_RI) ? TIOCM_RNG:0) +
  1832. ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
  1833. ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
  1834. if (debug_level >= DEBUG_LEVEL_INFO)
  1835. printk("%s(%d):%s tiocmget() value=%08X\n",
  1836. __FILE__,__LINE__, info->device_name, result );
  1837. return result;
  1838. }
  1839. /* set modem control signals (DTR/RTS)
  1840. */
  1841. static int tiocmset(struct tty_struct *tty, struct file *file,
  1842. unsigned int set, unsigned int clear)
  1843. {
  1844. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1845. unsigned long flags;
  1846. if (debug_level >= DEBUG_LEVEL_INFO)
  1847. printk("%s(%d):%s tiocmset(%x,%x)\n",
  1848. __FILE__,__LINE__,info->device_name, set, clear);
  1849. if (set & TIOCM_RTS)
  1850. info->serial_signals |= SerialSignal_RTS;
  1851. if (set & TIOCM_DTR)
  1852. info->serial_signals |= SerialSignal_DTR;
  1853. if (clear & TIOCM_RTS)
  1854. info->serial_signals &= ~SerialSignal_RTS;
  1855. if (clear & TIOCM_DTR)
  1856. info->serial_signals &= ~SerialSignal_DTR;
  1857. spin_lock_irqsave(&info->lock,flags);
  1858. set_signals(info);
  1859. spin_unlock_irqrestore(&info->lock,flags);
  1860. return 0;
  1861. }
  1862. /* Set or clear transmit break condition
  1863. *
  1864. * Arguments: tty pointer to tty instance data
  1865. * break_state -1=set break condition, 0=clear
  1866. */
  1867. static void mgslpc_break(struct tty_struct *tty, int break_state)
  1868. {
  1869. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  1870. unsigned long flags;
  1871. if (debug_level >= DEBUG_LEVEL_INFO)
  1872. printk("%s(%d):mgslpc_break(%s,%d)\n",
  1873. __FILE__,__LINE__, info->device_name, break_state);
  1874. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break"))
  1875. return;
  1876. spin_lock_irqsave(&info->lock,flags);
  1877. if (break_state == -1)
  1878. set_reg_bits(info, CHA+DAFO, BIT6);
  1879. else
  1880. clear_reg_bits(info, CHA+DAFO, BIT6);
  1881. spin_unlock_irqrestore(&info->lock,flags);
  1882. }
  1883. /* Service an IOCTL request
  1884. *
  1885. * Arguments:
  1886. *
  1887. * tty pointer to tty instance data
  1888. * file pointer to associated file object for device
  1889. * cmd IOCTL command code
  1890. * arg command argument/context
  1891. *
  1892. * Return Value: 0 if success, otherwise error code
  1893. */
  1894. static int mgslpc_ioctl(struct tty_struct *tty, struct file * file,
  1895. unsigned int cmd, unsigned long arg)
  1896. {
  1897. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  1898. if (debug_level >= DEBUG_LEVEL_INFO)
  1899. printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__,__LINE__,
  1900. info->device_name, cmd );
  1901. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl"))
  1902. return -ENODEV;
  1903. if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
  1904. (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
  1905. if (tty->flags & (1 << TTY_IO_ERROR))
  1906. return -EIO;
  1907. }
  1908. return ioctl_common(info, cmd, arg);
  1909. }
  1910. static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg)
  1911. {
  1912. int error;
  1913. struct mgsl_icount cnow; /* kernel counter temps */
  1914. struct serial_icounter_struct __user *p_cuser; /* user space */
  1915. void __user *argp = (void __user *)arg;
  1916. unsigned long flags;
  1917. switch (cmd) {
  1918. case MGSL_IOCGPARAMS:
  1919. return get_params(info, argp);
  1920. case MGSL_IOCSPARAMS:
  1921. return set_params(info, argp);
  1922. case MGSL_IOCGTXIDLE:
  1923. return get_txidle(info, argp);
  1924. case MGSL_IOCSTXIDLE:
  1925. return set_txidle(info, (int)arg);
  1926. case MGSL_IOCGIF:
  1927. return get_interface(info, argp);
  1928. case MGSL_IOCSIF:
  1929. return set_interface(info,(int)arg);
  1930. case MGSL_IOCTXENABLE:
  1931. return set_txenable(info,(int)arg);
  1932. case MGSL_IOCRXENABLE:
  1933. return set_rxenable(info,(int)arg);
  1934. case MGSL_IOCTXABORT:
  1935. return tx_abort(info);
  1936. case MGSL_IOCGSTATS:
  1937. return get_stats(info, argp);
  1938. case MGSL_IOCWAITEVENT:
  1939. return wait_events(info, argp);
  1940. case TIOCMIWAIT:
  1941. return modem_input_wait(info,(int)arg);
  1942. case TIOCGICOUNT:
  1943. spin_lock_irqsave(&info->lock,flags);
  1944. cnow = info->icount;
  1945. spin_unlock_irqrestore(&info->lock,flags);
  1946. p_cuser = argp;
  1947. PUT_USER(error,cnow.cts, &p_cuser->cts);
  1948. if (error) return error;
  1949. PUT_USER(error,cnow.dsr, &p_cuser->dsr);
  1950. if (error) return error;
  1951. PUT_USER(error,cnow.rng, &p_cuser->rng);
  1952. if (error) return error;
  1953. PUT_USER(error,cnow.dcd, &p_cuser->dcd);
  1954. if (error) return error;
  1955. PUT_USER(error,cnow.rx, &p_cuser->rx);
  1956. if (error) return error;
  1957. PUT_USER(error,cnow.tx, &p_cuser->tx);
  1958. if (error) return error;
  1959. PUT_USER(error,cnow.frame, &p_cuser->frame);
  1960. if (error) return error;
  1961. PUT_USER(error,cnow.overrun, &p_cuser->overrun);
  1962. if (error) return error;
  1963. PUT_USER(error,cnow.parity, &p_cuser->parity);
  1964. if (error) return error;
  1965. PUT_USER(error,cnow.brk, &p_cuser->brk);
  1966. if (error) return error;
  1967. PUT_USER(error,cnow.buf_overrun, &p_cuser->buf_overrun);
  1968. if (error) return error;
  1969. return 0;
  1970. default:
  1971. return -ENOIOCTLCMD;
  1972. }
  1973. return 0;
  1974. }
  1975. /* Set new termios settings
  1976. *
  1977. * Arguments:
  1978. *
  1979. * tty pointer to tty structure
  1980. * termios pointer to buffer to hold returned old termios
  1981. */
  1982. static void mgslpc_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
  1983. {
  1984. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1985. unsigned long flags;
  1986. if (debug_level >= DEBUG_LEVEL_INFO)
  1987. printk("%s(%d):mgslpc_set_termios %s\n", __FILE__,__LINE__,
  1988. tty->driver->name );
  1989. /* just return if nothing has changed */
  1990. if ((tty->termios->c_cflag == old_termios->c_cflag)
  1991. && (RELEVANT_IFLAG(tty->termios->c_iflag)
  1992. == RELEVANT_IFLAG(old_termios->c_iflag)))
  1993. return;
  1994. mgslpc_change_params(info);
  1995. /* Handle transition to B0 status */
  1996. if (old_termios->c_cflag & CBAUD &&
  1997. !(tty->termios->c_cflag & CBAUD)) {
  1998. info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
  1999. spin_lock_irqsave(&info->lock,flags);
  2000. set_signals(info);
  2001. spin_unlock_irqrestore(&info->lock,flags);
  2002. }
  2003. /* Handle transition away from B0 status */
  2004. if (!(old_termios->c_cflag & CBAUD) &&
  2005. tty->termios->c_cflag & CBAUD) {
  2006. info->serial_signals |= SerialSignal_DTR;
  2007. if (!(tty->termios->c_cflag & CRTSCTS) ||
  2008. !test_bit(TTY_THROTTLED, &tty->flags)) {
  2009. info->serial_signals |= SerialSignal_RTS;
  2010. }
  2011. spin_lock_irqsave(&info->lock,flags);
  2012. set_signals(info);
  2013. spin_unlock_irqrestore(&info->lock,flags);
  2014. }
  2015. /* Handle turning off CRTSCTS */
  2016. if (old_termios->c_cflag & CRTSCTS &&
  2017. !(tty->termios->c_cflag & CRTSCTS)) {
  2018. tty->hw_stopped = 0;
  2019. tx_release(tty);
  2020. }
  2021. }
  2022. static void mgslpc_close(struct tty_struct *tty, struct file * filp)
  2023. {
  2024. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  2025. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close"))
  2026. return;
  2027. if (debug_level >= DEBUG_LEVEL_INFO)
  2028. printk("%s(%d):mgslpc_close(%s) entry, count=%d\n",
  2029. __FILE__,__LINE__, info->device_name, info->count);
  2030. if (!info->count)
  2031. return;
  2032. if (tty_hung_up_p(filp))
  2033. goto cleanup;
  2034. if ((tty->count == 1) && (info->count != 1)) {
  2035. /*
  2036. * tty->count is 1 and the tty structure will be freed.
  2037. * info->count should be one in this case.
  2038. * if it's not, correct it so that the port is shutdown.
  2039. */
  2040. printk("mgslpc_close: bad refcount; tty->count is 1, "
  2041. "info->count is %d\n", info->count);
  2042. info->count = 1;
  2043. }
  2044. info->count--;
  2045. /* if at least one open remaining, leave hardware active */
  2046. if (info->count)
  2047. goto cleanup;
  2048. info->flags |= ASYNC_CLOSING;
  2049. /* set tty->closing to notify line discipline to
  2050. * only process XON/XOFF characters. Only the N_TTY
  2051. * discipline appears to use this (ppp does not).
  2052. */
  2053. tty->closing = 1;
  2054. /* wait for transmit data to clear all layers */
  2055. if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE) {
  2056. if (debug_level >= DEBUG_LEVEL_INFO)
  2057. printk("%s(%d):mgslpc_close(%s) calling tty_wait_until_sent\n",
  2058. __FILE__,__LINE__, info->device_name );
  2059. tty_wait_until_sent(tty, info->closing_wait);
  2060. }
  2061. if (info->flags & ASYNC_INITIALIZED)
  2062. mgslpc_wait_until_sent(tty, info->timeout);
  2063. if (tty->driver->flush_buffer)
  2064. tty->driver->flush_buffer(tty);
  2065. ldisc_flush_buffer(tty);
  2066. shutdown(info);
  2067. tty->closing = 0;
  2068. info->tty = NULL;
  2069. if (info->blocked_open) {
  2070. if (info->close_delay) {
  2071. msleep_interruptible(jiffies_to_msecs(info->close_delay));
  2072. }
  2073. wake_up_interruptible(&info->open_wait);
  2074. }
  2075. info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
  2076. wake_up_interruptible(&info->close_wait);
  2077. cleanup:
  2078. if (debug_level >= DEBUG_LEVEL_INFO)
  2079. printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__,__LINE__,
  2080. tty->driver->name, info->count);
  2081. }
  2082. /* Wait until the transmitter is empty.
  2083. */
  2084. static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout)
  2085. {
  2086. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  2087. unsigned long orig_jiffies, char_time;
  2088. if (!info )
  2089. return;
  2090. if (debug_level >= DEBUG_LEVEL_INFO)
  2091. printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n",
  2092. __FILE__,__LINE__, info->device_name );
  2093. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent"))
  2094. return;
  2095. if (!(info->flags & ASYNC_INITIALIZED))
  2096. goto exit;
  2097. orig_jiffies = jiffies;
  2098. /* Set check interval to 1/5 of estimated time to
  2099. * send a character, and make it at least 1. The check
  2100. * interval should also be less than the timeout.
  2101. * Note: use tight timings here to satisfy the NIST-PCTS.
  2102. */
  2103. if ( info->params.data_rate ) {
  2104. char_time = info->timeout/(32 * 5);
  2105. if (!char_time)
  2106. char_time++;
  2107. } else
  2108. char_time = 1;
  2109. if (timeout)
  2110. char_time = min_t(unsigned long, char_time, timeout);
  2111. if (info->params.mode == MGSL_MODE_HDLC) {
  2112. while (info->tx_active) {
  2113. msleep_interruptible(jiffies_to_msecs(char_time));
  2114. if (signal_pending(current))
  2115. break;
  2116. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  2117. break;
  2118. }
  2119. } else {
  2120. while ((info->tx_count || info->tx_active) &&
  2121. info->tx_enabled) {
  2122. msleep_interruptible(jiffies_to_msecs(char_time));
  2123. if (signal_pending(current))
  2124. break;
  2125. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  2126. break;
  2127. }
  2128. }
  2129. exit:
  2130. if (debug_level >= DEBUG_LEVEL_INFO)
  2131. printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n",
  2132. __FILE__,__LINE__, info->device_name );
  2133. }
  2134. /* Called by tty_hangup() when a hangup is signaled.
  2135. * This is the same as closing all open files for the port.
  2136. */
  2137. static void mgslpc_hangup(struct tty_struct *tty)
  2138. {
  2139. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  2140. if (debug_level >= DEBUG_LEVEL_INFO)
  2141. printk("%s(%d):mgslpc_hangup(%s)\n",
  2142. __FILE__,__LINE__, info->device_name );
  2143. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup"))
  2144. return;
  2145. mgslpc_flush_buffer(tty);
  2146. shutdown(info);
  2147. info->count = 0;
  2148. info->flags &= ~ASYNC_NORMAL_ACTIVE;
  2149. info->tty = NULL;
  2150. wake_up_interruptible(&info->open_wait);
  2151. }
  2152. /* Block the current process until the specified port
  2153. * is ready to be opened.
  2154. */
  2155. static int block_til_ready(struct tty_struct *tty, struct file *filp,
  2156. MGSLPC_INFO *info)
  2157. {
  2158. DECLARE_WAITQUEUE(wait, current);
  2159. int retval;
  2160. int do_clocal = 0, extra_count = 0;
  2161. unsigned long flags;
  2162. if (debug_level >= DEBUG_LEVEL_INFO)
  2163. printk("%s(%d):block_til_ready on %s\n",
  2164. __FILE__,__LINE__, tty->driver->name );
  2165. if (filp->f_flags & O_NONBLOCK || tty->flags & (1 << TTY_IO_ERROR)){
  2166. /* nonblock mode is set or port is not enabled */
  2167. /* just verify that callout device is not active */
  2168. info->flags |= ASYNC_NORMAL_ACTIVE;
  2169. return 0;
  2170. }
  2171. if (tty->termios->c_cflag & CLOCAL)
  2172. do_clocal = 1;
  2173. /* Wait for carrier detect and the line to become
  2174. * free (i.e., not in use by the callout). While we are in
  2175. * this loop, info->count is dropped by one, so that
  2176. * mgslpc_close() knows when to free things. We restore it upon
  2177. * exit, either normal or abnormal.
  2178. */
  2179. retval = 0;
  2180. add_wait_queue(&info->open_wait, &wait);
  2181. if (debug_level >= DEBUG_LEVEL_INFO)
  2182. printk("%s(%d):block_til_ready before block on %s count=%d\n",
  2183. __FILE__,__LINE__, tty->driver->name, info->count );
  2184. spin_lock_irqsave(&info->lock, flags);
  2185. if (!tty_hung_up_p(filp)) {
  2186. extra_count = 1;
  2187. info->count--;
  2188. }
  2189. spin_unlock_irqrestore(&info->lock, flags);
  2190. info->blocked_open++;
  2191. while (1) {
  2192. if ((tty->termios->c_cflag & CBAUD)) {
  2193. spin_lock_irqsave(&info->lock,flags);
  2194. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  2195. set_signals(info);
  2196. spin_unlock_irqrestore(&info->lock,flags);
  2197. }
  2198. set_current_state(TASK_INTERRUPTIBLE);
  2199. if (tty_hung_up_p(filp) || !(info->flags & ASYNC_INITIALIZED)){
  2200. retval = (info->flags & ASYNC_HUP_NOTIFY) ?
  2201. -EAGAIN : -ERESTARTSYS;
  2202. break;
  2203. }
  2204. spin_lock_irqsave(&info->lock,flags);
  2205. get_signals(info);
  2206. spin_unlock_irqrestore(&info->lock,flags);
  2207. if (!(info->flags & ASYNC_CLOSING) &&
  2208. (do_clocal || (info->serial_signals & SerialSignal_DCD)) ) {
  2209. break;
  2210. }
  2211. if (signal_pending(current)) {
  2212. retval = -ERESTARTSYS;
  2213. break;
  2214. }
  2215. if (debug_level >= DEBUG_LEVEL_INFO)
  2216. printk("%s(%d):block_til_ready blocking on %s count=%d\n",
  2217. __FILE__,__LINE__, tty->driver->name, info->count );
  2218. schedule();
  2219. }
  2220. set_current_state(TASK_RUNNING);
  2221. remove_wait_queue(&info->open_wait, &wait);
  2222. if (extra_count)
  2223. info->count++;
  2224. info->blocked_open--;
  2225. if (debug_level >= DEBUG_LEVEL_INFO)
  2226. printk("%s(%d):block_til_ready after blocking on %s count=%d\n",
  2227. __FILE__,__LINE__, tty->driver->name, info->count );
  2228. if (!retval)
  2229. info->flags |= ASYNC_NORMAL_ACTIVE;
  2230. return retval;
  2231. }
  2232. static int mgslpc_open(struct tty_struct *tty, struct file * filp)
  2233. {
  2234. MGSLPC_INFO *info;
  2235. int retval, line;
  2236. unsigned long flags;
  2237. /* verify range of specified line number */
  2238. line = tty->index;
  2239. if ((line < 0) || (line >= mgslpc_device_count)) {
  2240. printk("%s(%d):mgslpc_open with invalid line #%d.\n",
  2241. __FILE__,__LINE__,line);
  2242. return -ENODEV;
  2243. }
  2244. /* find the info structure for the specified line */
  2245. info = mgslpc_device_list;
  2246. while(info && info->line != line)
  2247. info = info->next_device;
  2248. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open"))
  2249. return -ENODEV;
  2250. tty->driver_data = info;
  2251. info->tty = tty;
  2252. if (debug_level >= DEBUG_LEVEL_INFO)
  2253. printk("%s(%d):mgslpc_open(%s), old ref count = %d\n",
  2254. __FILE__,__LINE__,tty->driver->name, info->count);
  2255. /* If port is closing, signal caller to try again */
  2256. if (tty_hung_up_p(filp) || info->flags & ASYNC_CLOSING){
  2257. if (info->flags & ASYNC_CLOSING)
  2258. interruptible_sleep_on(&info->close_wait);
  2259. retval = ((info->flags & ASYNC_HUP_NOTIFY) ?
  2260. -EAGAIN : -ERESTARTSYS);
  2261. goto cleanup;
  2262. }
  2263. info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
  2264. spin_lock_irqsave(&info->netlock, flags);
  2265. if (info->netcount) {
  2266. retval = -EBUSY;
  2267. spin_unlock_irqrestore(&info->netlock, flags);
  2268. goto cleanup;
  2269. }
  2270. info->count++;
  2271. spin_unlock_irqrestore(&info->netlock, flags);
  2272. if (info->count == 1) {
  2273. /* 1st open on this device, init hardware */
  2274. retval = startup(info);
  2275. if (retval < 0)
  2276. goto cleanup;
  2277. }
  2278. retval = block_til_ready(tty, filp, info);
  2279. if (retval) {
  2280. if (debug_level >= DEBUG_LEVEL_INFO)
  2281. printk("%s(%d):block_til_ready(%s) returned %d\n",
  2282. __FILE__,__LINE__, info->device_name, retval);
  2283. goto cleanup;
  2284. }
  2285. if (debug_level >= DEBUG_LEVEL_INFO)
  2286. printk("%s(%d):mgslpc_open(%s) success\n",
  2287. __FILE__,__LINE__, info->device_name);
  2288. retval = 0;
  2289. cleanup:
  2290. if (retval) {
  2291. if (tty->count == 1)
  2292. info->tty = NULL; /* tty layer will release tty struct */
  2293. if(info->count)
  2294. info->count--;
  2295. }
  2296. return retval;
  2297. }
  2298. /*
  2299. * /proc fs routines....
  2300. */
  2301. static inline int line_info(char *buf, MGSLPC_INFO *info)
  2302. {
  2303. char stat_buf[30];
  2304. int ret;
  2305. unsigned long flags;
  2306. ret = sprintf(buf, "%s:io:%04X irq:%d",
  2307. info->device_name, info->io_base, info->irq_level);
  2308. /* output current serial signal states */
  2309. spin_lock_irqsave(&info->lock,flags);
  2310. get_signals(info);
  2311. spin_unlock_irqrestore(&info->lock,flags);
  2312. stat_buf[0] = 0;
  2313. stat_buf[1] = 0;
  2314. if (info->serial_signals & SerialSignal_RTS)
  2315. strcat(stat_buf, "|RTS");
  2316. if (info->serial_signals & SerialSignal_CTS)
  2317. strcat(stat_buf, "|CTS");
  2318. if (info->serial_signals & SerialSignal_DTR)
  2319. strcat(stat_buf, "|DTR");
  2320. if (info->serial_signals & SerialSignal_DSR)
  2321. strcat(stat_buf, "|DSR");
  2322. if (info->serial_signals & SerialSignal_DCD)
  2323. strcat(stat_buf, "|CD");
  2324. if (info->serial_signals & SerialSignal_RI)
  2325. strcat(stat_buf, "|RI");
  2326. if (info->params.mode == MGSL_MODE_HDLC) {
  2327. ret += sprintf(buf+ret, " HDLC txok:%d rxok:%d",
  2328. info->icount.txok, info->icount.rxok);
  2329. if (info->icount.txunder)
  2330. ret += sprintf(buf+ret, " txunder:%d", info->icount.txunder);
  2331. if (info->icount.txabort)
  2332. ret += sprintf(buf+ret, " txabort:%d", info->icount.txabort);
  2333. if (info->icount.rxshort)
  2334. ret += sprintf(buf+ret, " rxshort:%d", info->icount.rxshort);
  2335. if (info->icount.rxlong)
  2336. ret += sprintf(buf+ret, " rxlong:%d", info->icount.rxlong);
  2337. if (info->icount.rxover)
  2338. ret += sprintf(buf+ret, " rxover:%d", info->icount.rxover);
  2339. if (info->icount.rxcrc)
  2340. ret += sprintf(buf+ret, " rxcrc:%d", info->icount.rxcrc);
  2341. } else {
  2342. ret += sprintf(buf+ret, " ASYNC tx:%d rx:%d",
  2343. info->icount.tx, info->icount.rx);
  2344. if (info->icount.frame)
  2345. ret += sprintf(buf+ret, " fe:%d", info->icount.frame);
  2346. if (info->icount.parity)
  2347. ret += sprintf(buf+ret, " pe:%d", info->icount.parity);
  2348. if (info->icount.brk)
  2349. ret += sprintf(buf+ret, " brk:%d", info->icount.brk);
  2350. if (info->icount.overrun)
  2351. ret += sprintf(buf+ret, " oe:%d", info->icount.overrun);
  2352. }
  2353. /* Append serial signal status to end */
  2354. ret += sprintf(buf+ret, " %s\n", stat_buf+1);
  2355. ret += sprintf(buf+ret, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
  2356. info->tx_active,info->bh_requested,info->bh_running,
  2357. info->pending_bh);
  2358. return ret;
  2359. }
  2360. /* Called to print information about devices
  2361. */
  2362. static int mgslpc_read_proc(char *page, char **start, off_t off, int count,
  2363. int *eof, void *data)
  2364. {
  2365. int len = 0, l;
  2366. off_t begin = 0;
  2367. MGSLPC_INFO *info;
  2368. len += sprintf(page, "synclink driver:%s\n", driver_version);
  2369. info = mgslpc_device_list;
  2370. while( info ) {
  2371. l = line_info(page + len, info);
  2372. len += l;
  2373. if (len+begin > off+count)
  2374. goto done;
  2375. if (len+begin < off) {
  2376. begin += len;
  2377. len = 0;
  2378. }
  2379. info = info->next_device;
  2380. }
  2381. *eof = 1;
  2382. done:
  2383. if (off >= len+begin)
  2384. return 0;
  2385. *start = page + (off-begin);
  2386. return ((count < begin+len-off) ? count : begin+len-off);
  2387. }
  2388. static int rx_alloc_buffers(MGSLPC_INFO *info)
  2389. {
  2390. /* each buffer has header and data */
  2391. info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size;
  2392. /* calculate total allocation size for 8 buffers */
  2393. info->rx_buf_total_size = info->rx_buf_size * 8;
  2394. /* limit total allocated memory */
  2395. if (info->rx_buf_total_size > 0x10000)
  2396. info->rx_buf_total_size = 0x10000;
  2397. /* calculate number of buffers */
  2398. info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size;
  2399. info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL);
  2400. if (info->rx_buf == NULL)
  2401. return -ENOMEM;
  2402. rx_reset_buffers(info);
  2403. return 0;
  2404. }
  2405. static void rx_free_buffers(MGSLPC_INFO *info)
  2406. {
  2407. kfree(info->rx_buf);
  2408. info->rx_buf = NULL;
  2409. }
  2410. static int claim_resources(MGSLPC_INFO *info)
  2411. {
  2412. if (rx_alloc_buffers(info) < 0 ) {
  2413. printk( "Cant allocate rx buffer %s\n", info->device_name);
  2414. release_resources(info);
  2415. return -ENODEV;
  2416. }
  2417. return 0;
  2418. }
  2419. static void release_resources(MGSLPC_INFO *info)
  2420. {
  2421. if (debug_level >= DEBUG_LEVEL_INFO)
  2422. printk("release_resources(%s)\n", info->device_name);
  2423. rx_free_buffers(info);
  2424. }
  2425. /* Add the specified device instance data structure to the
  2426. * global linked list of devices and increment the device count.
  2427. *
  2428. * Arguments: info pointer to device instance data
  2429. */
  2430. static void mgslpc_add_device(MGSLPC_INFO *info)
  2431. {
  2432. info->next_device = NULL;
  2433. info->line = mgslpc_device_count;
  2434. sprintf(info->device_name,"ttySLP%d",info->line);
  2435. if (info->line < MAX_DEVICE_COUNT) {
  2436. if (maxframe[info->line])
  2437. info->max_frame_size = maxframe[info->line];
  2438. info->dosyncppp = dosyncppp[info->line];
  2439. }
  2440. mgslpc_device_count++;
  2441. if (!mgslpc_device_list)
  2442. mgslpc_device_list = info;
  2443. else {
  2444. MGSLPC_INFO *current_dev = mgslpc_device_list;
  2445. while( current_dev->next_device )
  2446. current_dev = current_dev->next_device;
  2447. current_dev->next_device = info;
  2448. }
  2449. if (info->max_frame_size < 4096)
  2450. info->max_frame_size = 4096;
  2451. else if (info->max_frame_size > 65535)
  2452. info->max_frame_size = 65535;
  2453. printk( "SyncLink PC Card %s:IO=%04X IRQ=%d\n",
  2454. info->device_name, info->io_base, info->irq_level);
  2455. #if SYNCLINK_GENERIC_HDLC
  2456. hdlcdev_init(info);
  2457. #endif
  2458. }
  2459. static void mgslpc_remove_device(MGSLPC_INFO *remove_info)
  2460. {
  2461. MGSLPC_INFO *info = mgslpc_device_list;
  2462. MGSLPC_INFO *last = NULL;
  2463. while(info) {
  2464. if (info == remove_info) {
  2465. if (last)
  2466. last->next_device = info->next_device;
  2467. else
  2468. mgslpc_device_list = info->next_device;
  2469. #if SYNCLINK_GENERIC_HDLC
  2470. hdlcdev_exit(info);
  2471. #endif
  2472. release_resources(info);
  2473. kfree(info);
  2474. mgslpc_device_count--;
  2475. return;
  2476. }
  2477. last = info;
  2478. info = info->next_device;
  2479. }
  2480. }
  2481. static struct pcmcia_device_id mgslpc_ids[] = {
  2482. PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050),
  2483. PCMCIA_DEVICE_NULL
  2484. };
  2485. MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids);
  2486. static struct pcmcia_driver mgslpc_driver = {
  2487. .owner = THIS_MODULE,
  2488. .drv = {
  2489. .name = "synclink_cs",
  2490. },
  2491. .probe = mgslpc_probe,
  2492. .remove = mgslpc_detach,
  2493. .id_table = mgslpc_ids,
  2494. .suspend = mgslpc_suspend,
  2495. .resume = mgslpc_resume,
  2496. };
  2497. static const struct tty_operations mgslpc_ops = {
  2498. .open = mgslpc_open,
  2499. .close = mgslpc_close,
  2500. .write = mgslpc_write,
  2501. .put_char = mgslpc_put_char,
  2502. .flush_chars = mgslpc_flush_chars,
  2503. .write_room = mgslpc_write_room,
  2504. .chars_in_buffer = mgslpc_chars_in_buffer,
  2505. .flush_buffer = mgslpc_flush_buffer,
  2506. .ioctl = mgslpc_ioctl,
  2507. .throttle = mgslpc_throttle,
  2508. .unthrottle = mgslpc_unthrottle,
  2509. .send_xchar = mgslpc_send_xchar,
  2510. .break_ctl = mgslpc_break,
  2511. .wait_until_sent = mgslpc_wait_until_sent,
  2512. .read_proc = mgslpc_read_proc,
  2513. .set_termios = mgslpc_set_termios,
  2514. .stop = tx_pause,
  2515. .start = tx_release,
  2516. .hangup = mgslpc_hangup,
  2517. .tiocmget = tiocmget,
  2518. .tiocmset = tiocmset,
  2519. };
  2520. static void synclink_cs_cleanup(void)
  2521. {
  2522. int rc;
  2523. printk("Unloading %s: version %s\n", driver_name, driver_version);
  2524. while(mgslpc_device_list)
  2525. mgslpc_remove_device(mgslpc_device_list);
  2526. if (serial_driver) {
  2527. if ((rc = tty_unregister_driver(serial_driver)))
  2528. printk("%s(%d) failed to unregister tty driver err=%d\n",
  2529. __FILE__,__LINE__,rc);
  2530. put_tty_driver(serial_driver);
  2531. }
  2532. pcmcia_unregister_driver(&mgslpc_driver);
  2533. }
  2534. static int __init synclink_cs_init(void)
  2535. {
  2536. int rc;
  2537. if (break_on_load) {
  2538. mgslpc_get_text_ptr();
  2539. BREAKPOINT();
  2540. }
  2541. printk("%s %s\n", driver_name, driver_version);
  2542. if ((rc = pcmcia_register_driver(&mgslpc_driver)) < 0)
  2543. return rc;
  2544. serial_driver = alloc_tty_driver(MAX_DEVICE_COUNT);
  2545. if (!serial_driver) {
  2546. rc = -ENOMEM;
  2547. goto error;
  2548. }
  2549. /* Initialize the tty_driver structure */
  2550. serial_driver->owner = THIS_MODULE;
  2551. serial_driver->driver_name = "synclink_cs";
  2552. serial_driver->name = "ttySLP";
  2553. serial_driver->major = ttymajor;
  2554. serial_driver->minor_start = 64;
  2555. serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
  2556. serial_driver->subtype = SERIAL_TYPE_NORMAL;
  2557. serial_driver->init_termios = tty_std_termios;
  2558. serial_driver->init_termios.c_cflag =
  2559. B9600 | CS8 | CREAD | HUPCL | CLOCAL;
  2560. serial_driver->flags = TTY_DRIVER_REAL_RAW;
  2561. tty_set_operations(serial_driver, &mgslpc_ops);
  2562. if ((rc = tty_register_driver(serial_driver)) < 0) {
  2563. printk("%s(%d):Couldn't register serial driver\n",
  2564. __FILE__,__LINE__);
  2565. put_tty_driver(serial_driver);
  2566. serial_driver = NULL;
  2567. goto error;
  2568. }
  2569. printk("%s %s, tty major#%d\n",
  2570. driver_name, driver_version,
  2571. serial_driver->major);
  2572. return 0;
  2573. error:
  2574. synclink_cs_cleanup();
  2575. return rc;
  2576. }
  2577. static void __exit synclink_cs_exit(void)
  2578. {
  2579. synclink_cs_cleanup();
  2580. }
  2581. module_init(synclink_cs_init);
  2582. module_exit(synclink_cs_exit);
  2583. static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate)
  2584. {
  2585. unsigned int M, N;
  2586. unsigned char val;
  2587. /* note:standard BRG mode is broken in V3.2 chip
  2588. * so enhanced mode is always used
  2589. */
  2590. if (rate) {
  2591. N = 3686400 / rate;
  2592. if (!N)
  2593. N = 1;
  2594. N >>= 1;
  2595. for (M = 1; N > 64 && M < 16; M++)
  2596. N >>= 1;
  2597. N--;
  2598. /* BGR[5..0] = N
  2599. * BGR[9..6] = M
  2600. * BGR[7..0] contained in BGR register
  2601. * BGR[9..8] contained in CCR2[7..6]
  2602. * divisor = (N+1)*2^M
  2603. *
  2604. * Note: M *must* not be zero (causes asymetric duty cycle)
  2605. */
  2606. write_reg(info, (unsigned char) (channel + BGR),
  2607. (unsigned char) ((M << 6) + N));
  2608. val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
  2609. val |= ((M << 4) & 0xc0);
  2610. write_reg(info, (unsigned char) (channel + CCR2), val);
  2611. }
  2612. }
  2613. /* Enabled the AUX clock output at the specified frequency.
  2614. */
  2615. static void enable_auxclk(MGSLPC_INFO *info)
  2616. {
  2617. unsigned char val;
  2618. /* MODE
  2619. *
  2620. * 07..06 MDS[1..0] 10 = transparent HDLC mode
  2621. * 05 ADM Address Mode, 0 = no addr recognition
  2622. * 04 TMD Timer Mode, 0 = external
  2623. * 03 RAC Receiver Active, 0 = inactive
  2624. * 02 RTS 0=RTS active during xmit, 1=RTS always active
  2625. * 01 TRS Timer Resolution, 1=512
  2626. * 00 TLP Test Loop, 0 = no loop
  2627. *
  2628. * 1000 0010
  2629. */
  2630. val = 0x82;
  2631. /* channel B RTS is used to enable AUXCLK driver on SP505 */
  2632. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2633. val |= BIT2;
  2634. write_reg(info, CHB + MODE, val);
  2635. /* CCR0
  2636. *
  2637. * 07 PU Power Up, 1=active, 0=power down
  2638. * 06 MCE Master Clock Enable, 1=enabled
  2639. * 05 Reserved, 0
  2640. * 04..02 SC[2..0] Encoding
  2641. * 01..00 SM[1..0] Serial Mode, 00=HDLC
  2642. *
  2643. * 11000000
  2644. */
  2645. write_reg(info, CHB + CCR0, 0xc0);
  2646. /* CCR1
  2647. *
  2648. * 07 SFLG Shared Flag, 0 = disable shared flags
  2649. * 06 GALP Go Active On Loop, 0 = not used
  2650. * 05 GLP Go On Loop, 0 = not used
  2651. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  2652. * 03 ITF Interframe Time Fill, 0=mark, 1=flag
  2653. * 02..00 CM[2..0] Clock Mode
  2654. *
  2655. * 0001 0111
  2656. */
  2657. write_reg(info, CHB + CCR1, 0x17);
  2658. /* CCR2 (Channel B)
  2659. *
  2660. * 07..06 BGR[9..8] Baud rate bits 9..8
  2661. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  2662. * 04 SSEL Clock source select, 1=submode b
  2663. * 03 TOE 0=TxCLK is input, 1=TxCLK is output
  2664. * 02 RWX Read/Write Exchange 0=disabled
  2665. * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
  2666. * 00 DIV, data inversion 0=disabled, 1=enabled
  2667. *
  2668. * 0011 1000
  2669. */
  2670. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2671. write_reg(info, CHB + CCR2, 0x38);
  2672. else
  2673. write_reg(info, CHB + CCR2, 0x30);
  2674. /* CCR4
  2675. *
  2676. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  2677. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  2678. * 05 TST1 Test Pin, 0=normal operation
  2679. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  2680. * 03..02 Reserved, must be 0
  2681. * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
  2682. *
  2683. * 0101 0000
  2684. */
  2685. write_reg(info, CHB + CCR4, 0x50);
  2686. /* if auxclk not enabled, set internal BRG so
  2687. * CTS transitions can be detected (requires TxC)
  2688. */
  2689. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2690. mgslpc_set_rate(info, CHB, info->params.clock_speed);
  2691. else
  2692. mgslpc_set_rate(info, CHB, 921600);
  2693. }
  2694. static void loopback_enable(MGSLPC_INFO *info)
  2695. {
  2696. unsigned char val;
  2697. /* CCR1:02..00 CM[2..0] Clock Mode = 111 (clock mode 7) */
  2698. val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0);
  2699. write_reg(info, CHA + CCR1, val);
  2700. /* CCR2:04 SSEL Clock source select, 1=submode b */
  2701. val = read_reg(info, CHA + CCR2) | (BIT4 + BIT5);
  2702. write_reg(info, CHA + CCR2, val);
  2703. /* set LinkSpeed if available, otherwise default to 2Mbps */
  2704. if (info->params.clock_speed)
  2705. mgslpc_set_rate(info, CHA, info->params.clock_speed);
  2706. else
  2707. mgslpc_set_rate(info, CHA, 1843200);
  2708. /* MODE:00 TLP Test Loop, 1=loopback enabled */
  2709. val = read_reg(info, CHA + MODE) | BIT0;
  2710. write_reg(info, CHA + MODE, val);
  2711. }
  2712. static void hdlc_mode(MGSLPC_INFO *info)
  2713. {
  2714. unsigned char val;
  2715. unsigned char clkmode, clksubmode;
  2716. /* disable all interrupts */
  2717. irq_disable(info, CHA, 0xffff);
  2718. irq_disable(info, CHB, 0xffff);
  2719. port_irq_disable(info, 0xff);
  2720. /* assume clock mode 0a, rcv=RxC xmt=TxC */
  2721. clkmode = clksubmode = 0;
  2722. if (info->params.flags & HDLC_FLAG_RXC_DPLL
  2723. && info->params.flags & HDLC_FLAG_TXC_DPLL) {
  2724. /* clock mode 7a, rcv = DPLL, xmt = DPLL */
  2725. clkmode = 7;
  2726. } else if (info->params.flags & HDLC_FLAG_RXC_BRG
  2727. && info->params.flags & HDLC_FLAG_TXC_BRG) {
  2728. /* clock mode 7b, rcv = BRG, xmt = BRG */
  2729. clkmode = 7;
  2730. clksubmode = 1;
  2731. } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) {
  2732. if (info->params.flags & HDLC_FLAG_TXC_BRG) {
  2733. /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */
  2734. clkmode = 6;
  2735. clksubmode = 1;
  2736. } else {
  2737. /* clock mode 6a, rcv = DPLL, xmt = TxC */
  2738. clkmode = 6;
  2739. }
  2740. } else if (info->params.flags & HDLC_FLAG_TXC_BRG) {
  2741. /* clock mode 0b, rcv = RxC, xmt = BRG */
  2742. clksubmode = 1;
  2743. }
  2744. /* MODE
  2745. *
  2746. * 07..06 MDS[1..0] 10 = transparent HDLC mode
  2747. * 05 ADM Address Mode, 0 = no addr recognition
  2748. * 04 TMD Timer Mode, 0 = external
  2749. * 03 RAC Receiver Active, 0 = inactive
  2750. * 02 RTS 0=RTS active during xmit, 1=RTS always active
  2751. * 01 TRS Timer Resolution, 1=512
  2752. * 00 TLP Test Loop, 0 = no loop
  2753. *
  2754. * 1000 0010
  2755. */
  2756. val = 0x82;
  2757. if (info->params.loopback)
  2758. val |= BIT0;
  2759. /* preserve RTS state */
  2760. if (info->serial_signals & SerialSignal_RTS)
  2761. val |= BIT2;
  2762. write_reg(info, CHA + MODE, val);
  2763. /* CCR0
  2764. *
  2765. * 07 PU Power Up, 1=active, 0=power down
  2766. * 06 MCE Master Clock Enable, 1=enabled
  2767. * 05 Reserved, 0
  2768. * 04..02 SC[2..0] Encoding
  2769. * 01..00 SM[1..0] Serial Mode, 00=HDLC
  2770. *
  2771. * 11000000
  2772. */
  2773. val = 0xc0;
  2774. switch (info->params.encoding)
  2775. {
  2776. case HDLC_ENCODING_NRZI:
  2777. val |= BIT3;
  2778. break;
  2779. case HDLC_ENCODING_BIPHASE_SPACE:
  2780. val |= BIT4;
  2781. break; // FM0
  2782. case HDLC_ENCODING_BIPHASE_MARK:
  2783. val |= BIT4 + BIT2;
  2784. break; // FM1
  2785. case HDLC_ENCODING_BIPHASE_LEVEL:
  2786. val |= BIT4 + BIT3;
  2787. break; // Manchester
  2788. }
  2789. write_reg(info, CHA + CCR0, val);
  2790. /* CCR1
  2791. *
  2792. * 07 SFLG Shared Flag, 0 = disable shared flags
  2793. * 06 GALP Go Active On Loop, 0 = not used
  2794. * 05 GLP Go On Loop, 0 = not used
  2795. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  2796. * 03 ITF Interframe Time Fill, 0=mark, 1=flag
  2797. * 02..00 CM[2..0] Clock Mode
  2798. *
  2799. * 0001 0000
  2800. */
  2801. val = 0x10 + clkmode;
  2802. write_reg(info, CHA + CCR1, val);
  2803. /* CCR2
  2804. *
  2805. * 07..06 BGR[9..8] Baud rate bits 9..8
  2806. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  2807. * 04 SSEL Clock source select, 1=submode b
  2808. * 03 TOE 0=TxCLK is input, 0=TxCLK is input
  2809. * 02 RWX Read/Write Exchange 0=disabled
  2810. * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
  2811. * 00 DIV, data inversion 0=disabled, 1=enabled
  2812. *
  2813. * 0000 0000
  2814. */
  2815. val = 0x00;
  2816. if (clkmode == 2 || clkmode == 3 || clkmode == 6
  2817. || clkmode == 7 || (clkmode == 0 && clksubmode == 1))
  2818. val |= BIT5;
  2819. if (clksubmode)
  2820. val |= BIT4;
  2821. if (info->params.crc_type == HDLC_CRC_32_CCITT)
  2822. val |= BIT1;
  2823. if (info->params.encoding == HDLC_ENCODING_NRZB)
  2824. val |= BIT0;
  2825. write_reg(info, CHA + CCR2, val);
  2826. /* CCR3
  2827. *
  2828. * 07..06 PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8
  2829. * 05 EPT Enable preamble transmission, 1=enabled
  2830. * 04 RADD Receive address pushed to FIFO, 0=disabled
  2831. * 03 CRL CRC Reset Level, 0=FFFF
  2832. * 02 RCRC Rx CRC 0=On 1=Off
  2833. * 01 TCRC Tx CRC 0=On 1=Off
  2834. * 00 PSD DPLL Phase Shift Disable
  2835. *
  2836. * 0000 0000
  2837. */
  2838. val = 0x00;
  2839. if (info->params.crc_type == HDLC_CRC_NONE)
  2840. val |= BIT2 + BIT1;
  2841. if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
  2842. val |= BIT5;
  2843. switch (info->params.preamble_length)
  2844. {
  2845. case HDLC_PREAMBLE_LENGTH_16BITS:
  2846. val |= BIT6;
  2847. break;
  2848. case HDLC_PREAMBLE_LENGTH_32BITS:
  2849. val |= BIT6;
  2850. break;
  2851. case HDLC_PREAMBLE_LENGTH_64BITS:
  2852. val |= BIT7 + BIT6;
  2853. break;
  2854. }
  2855. write_reg(info, CHA + CCR3, val);
  2856. /* PRE - Preamble pattern */
  2857. val = 0;
  2858. switch (info->params.preamble)
  2859. {
  2860. case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
  2861. case HDLC_PREAMBLE_PATTERN_10: val = 0xaa; break;
  2862. case HDLC_PREAMBLE_PATTERN_01: val = 0x55; break;
  2863. case HDLC_PREAMBLE_PATTERN_ONES: val = 0xff; break;
  2864. }
  2865. write_reg(info, CHA + PRE, val);
  2866. /* CCR4
  2867. *
  2868. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  2869. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  2870. * 05 TST1 Test Pin, 0=normal operation
  2871. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  2872. * 03..02 Reserved, must be 0
  2873. * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
  2874. *
  2875. * 0101 0000
  2876. */
  2877. val = 0x50;
  2878. write_reg(info, CHA + CCR4, val);
  2879. if (info->params.flags & HDLC_FLAG_RXC_DPLL)
  2880. mgslpc_set_rate(info, CHA, info->params.clock_speed * 16);
  2881. else
  2882. mgslpc_set_rate(info, CHA, info->params.clock_speed);
  2883. /* RLCR Receive length check register
  2884. *
  2885. * 7 1=enable receive length check
  2886. * 6..0 Max frame length = (RL + 1) * 32
  2887. */
  2888. write_reg(info, CHA + RLCR, 0);
  2889. /* XBCH Transmit Byte Count High
  2890. *
  2891. * 07 DMA mode, 0 = interrupt driven
  2892. * 06 NRM, 0=ABM (ignored)
  2893. * 05 CAS Carrier Auto Start
  2894. * 04 XC Transmit Continuously (ignored)
  2895. * 03..00 XBC[10..8] Transmit byte count bits 10..8
  2896. *
  2897. * 0000 0000
  2898. */
  2899. val = 0x00;
  2900. if (info->params.flags & HDLC_FLAG_AUTO_DCD)
  2901. val |= BIT5;
  2902. write_reg(info, CHA + XBCH, val);
  2903. enable_auxclk(info);
  2904. if (info->params.loopback || info->testing_irq)
  2905. loopback_enable(info);
  2906. if (info->params.flags & HDLC_FLAG_AUTO_CTS)
  2907. {
  2908. irq_enable(info, CHB, IRQ_CTS);
  2909. /* PVR[3] 1=AUTO CTS active */
  2910. set_reg_bits(info, CHA + PVR, BIT3);
  2911. } else
  2912. clear_reg_bits(info, CHA + PVR, BIT3);
  2913. irq_enable(info, CHA,
  2914. IRQ_RXEOM + IRQ_RXFIFO + IRQ_ALLSENT +
  2915. IRQ_UNDERRUN + IRQ_TXFIFO);
  2916. issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
  2917. wait_command_complete(info, CHA);
  2918. read_reg16(info, CHA + ISR); /* clear pending IRQs */
  2919. /* Master clock mode enabled above to allow reset commands
  2920. * to complete even if no data clocks are present.
  2921. *
  2922. * Disable master clock mode for normal communications because
  2923. * V3.2 of the ESCC2 has a bug that prevents the transmit all sent
  2924. * IRQ when in master clock mode.
  2925. *
  2926. * Leave master clock mode enabled for IRQ test because the
  2927. * timer IRQ used by the test can only happen in master clock mode.
  2928. */
  2929. if (!info->testing_irq)
  2930. clear_reg_bits(info, CHA + CCR0, BIT6);
  2931. tx_set_idle(info);
  2932. tx_stop(info);
  2933. rx_stop(info);
  2934. }
  2935. static void rx_stop(MGSLPC_INFO *info)
  2936. {
  2937. if (debug_level >= DEBUG_LEVEL_ISR)
  2938. printk("%s(%d):rx_stop(%s)\n",
  2939. __FILE__,__LINE__, info->device_name );
  2940. /* MODE:03 RAC Receiver Active, 0=inactive */
  2941. clear_reg_bits(info, CHA + MODE, BIT3);
  2942. info->rx_enabled = 0;
  2943. info->rx_overflow = 0;
  2944. }
  2945. static void rx_start(MGSLPC_INFO *info)
  2946. {
  2947. if (debug_level >= DEBUG_LEVEL_ISR)
  2948. printk("%s(%d):rx_start(%s)\n",
  2949. __FILE__,__LINE__, info->device_name );
  2950. rx_reset_buffers(info);
  2951. info->rx_enabled = 0;
  2952. info->rx_overflow = 0;
  2953. /* MODE:03 RAC Receiver Active, 1=active */
  2954. set_reg_bits(info, CHA + MODE, BIT3);
  2955. info->rx_enabled = 1;
  2956. }
  2957. static void tx_start(MGSLPC_INFO *info)
  2958. {
  2959. if (debug_level >= DEBUG_LEVEL_ISR)
  2960. printk("%s(%d):tx_start(%s)\n",
  2961. __FILE__,__LINE__, info->device_name );
  2962. if (info->tx_count) {
  2963. /* If auto RTS enabled and RTS is inactive, then assert */
  2964. /* RTS and set a flag indicating that the driver should */
  2965. /* negate RTS when the transmission completes. */
  2966. info->drop_rts_on_tx_done = 0;
  2967. if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
  2968. get_signals(info);
  2969. if (!(info->serial_signals & SerialSignal_RTS)) {
  2970. info->serial_signals |= SerialSignal_RTS;
  2971. set_signals(info);
  2972. info->drop_rts_on_tx_done = 1;
  2973. }
  2974. }
  2975. if (info->params.mode == MGSL_MODE_ASYNC) {
  2976. if (!info->tx_active) {
  2977. info->tx_active = 1;
  2978. tx_ready(info);
  2979. }
  2980. } else {
  2981. info->tx_active = 1;
  2982. tx_ready(info);
  2983. mod_timer(&info->tx_timer, jiffies +
  2984. msecs_to_jiffies(5000));
  2985. }
  2986. }
  2987. if (!info->tx_enabled)
  2988. info->tx_enabled = 1;
  2989. }
  2990. static void tx_stop(MGSLPC_INFO *info)
  2991. {
  2992. if (debug_level >= DEBUG_LEVEL_ISR)
  2993. printk("%s(%d):tx_stop(%s)\n",
  2994. __FILE__,__LINE__, info->device_name );
  2995. del_timer(&info->tx_timer);
  2996. info->tx_enabled = 0;
  2997. info->tx_active = 0;
  2998. }
  2999. /* Reset the adapter to a known state and prepare it for further use.
  3000. */
  3001. static void reset_device(MGSLPC_INFO *info)
  3002. {
  3003. /* power up both channels (set BIT7) */
  3004. write_reg(info, CHA + CCR0, 0x80);
  3005. write_reg(info, CHB + CCR0, 0x80);
  3006. write_reg(info, CHA + MODE, 0);
  3007. write_reg(info, CHB + MODE, 0);
  3008. /* disable all interrupts */
  3009. irq_disable(info, CHA, 0xffff);
  3010. irq_disable(info, CHB, 0xffff);
  3011. port_irq_disable(info, 0xff);
  3012. /* PCR Port Configuration Register
  3013. *
  3014. * 07..04 DEC[3..0] Serial I/F select outputs
  3015. * 03 output, 1=AUTO CTS control enabled
  3016. * 02 RI Ring Indicator input 0=active
  3017. * 01 DSR input 0=active
  3018. * 00 DTR output 0=active
  3019. *
  3020. * 0000 0110
  3021. */
  3022. write_reg(info, PCR, 0x06);
  3023. /* PVR Port Value Register
  3024. *
  3025. * 07..04 DEC[3..0] Serial I/F select (0000=disabled)
  3026. * 03 AUTO CTS output 1=enabled
  3027. * 02 RI Ring Indicator input
  3028. * 01 DSR input
  3029. * 00 DTR output (1=inactive)
  3030. *
  3031. * 0000 0001
  3032. */
  3033. // write_reg(info, PVR, PVR_DTR);
  3034. /* IPC Interrupt Port Configuration
  3035. *
  3036. * 07 VIS 1=Masked interrupts visible
  3037. * 06..05 Reserved, 0
  3038. * 04..03 SLA Slave address, 00 ignored
  3039. * 02 CASM Cascading Mode, 1=daisy chain
  3040. * 01..00 IC[1..0] Interrupt Config, 01=push-pull output, active low
  3041. *
  3042. * 0000 0101
  3043. */
  3044. write_reg(info, IPC, 0x05);
  3045. }
  3046. static void async_mode(MGSLPC_INFO *info)
  3047. {
  3048. unsigned char val;
  3049. /* disable all interrupts */
  3050. irq_disable(info, CHA, 0xffff);
  3051. irq_disable(info, CHB, 0xffff);
  3052. port_irq_disable(info, 0xff);
  3053. /* MODE
  3054. *
  3055. * 07 Reserved, 0
  3056. * 06 FRTS RTS State, 0=active
  3057. * 05 FCTS Flow Control on CTS
  3058. * 04 FLON Flow Control Enable
  3059. * 03 RAC Receiver Active, 0 = inactive
  3060. * 02 RTS 0=Auto RTS, 1=manual RTS
  3061. * 01 TRS Timer Resolution, 1=512
  3062. * 00 TLP Test Loop, 0 = no loop
  3063. *
  3064. * 0000 0110
  3065. */
  3066. val = 0x06;
  3067. if (info->params.loopback)
  3068. val |= BIT0;
  3069. /* preserve RTS state */
  3070. if (!(info->serial_signals & SerialSignal_RTS))
  3071. val |= BIT6;
  3072. write_reg(info, CHA + MODE, val);
  3073. /* CCR0
  3074. *
  3075. * 07 PU Power Up, 1=active, 0=power down
  3076. * 06 MCE Master Clock Enable, 1=enabled
  3077. * 05 Reserved, 0
  3078. * 04..02 SC[2..0] Encoding, 000=NRZ
  3079. * 01..00 SM[1..0] Serial Mode, 11=Async
  3080. *
  3081. * 1000 0011
  3082. */
  3083. write_reg(info, CHA + CCR0, 0x83);
  3084. /* CCR1
  3085. *
  3086. * 07..05 Reserved, 0
  3087. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  3088. * 03 BCR Bit Clock Rate, 1=16x
  3089. * 02..00 CM[2..0] Clock Mode, 111=BRG
  3090. *
  3091. * 0001 1111
  3092. */
  3093. write_reg(info, CHA + CCR1, 0x1f);
  3094. /* CCR2 (channel A)
  3095. *
  3096. * 07..06 BGR[9..8] Baud rate bits 9..8
  3097. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  3098. * 04 SSEL Clock source select, 1=submode b
  3099. * 03 TOE 0=TxCLK is input, 0=TxCLK is input
  3100. * 02 RWX Read/Write Exchange 0=disabled
  3101. * 01 Reserved, 0
  3102. * 00 DIV, data inversion 0=disabled, 1=enabled
  3103. *
  3104. * 0001 0000
  3105. */
  3106. write_reg(info, CHA + CCR2, 0x10);
  3107. /* CCR3
  3108. *
  3109. * 07..01 Reserved, 0
  3110. * 00 PSD DPLL Phase Shift Disable
  3111. *
  3112. * 0000 0000
  3113. */
  3114. write_reg(info, CHA + CCR3, 0);
  3115. /* CCR4
  3116. *
  3117. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  3118. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  3119. * 05 TST1 Test Pin, 0=normal operation
  3120. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  3121. * 03..00 Reserved, must be 0
  3122. *
  3123. * 0101 0000
  3124. */
  3125. write_reg(info, CHA + CCR4, 0x50);
  3126. mgslpc_set_rate(info, CHA, info->params.data_rate * 16);
  3127. /* DAFO Data Format
  3128. *
  3129. * 07 Reserved, 0
  3130. * 06 XBRK transmit break, 0=normal operation
  3131. * 05 Stop bits (0=1, 1=2)
  3132. * 04..03 PAR[1..0] Parity (01=odd, 10=even)
  3133. * 02 PAREN Parity Enable
  3134. * 01..00 CHL[1..0] Character Length (00=8, 01=7)
  3135. *
  3136. */
  3137. val = 0x00;
  3138. if (info->params.data_bits != 8)
  3139. val |= BIT0; /* 7 bits */
  3140. if (info->params.stop_bits != 1)
  3141. val |= BIT5;
  3142. if (info->params.parity != ASYNC_PARITY_NONE)
  3143. {
  3144. val |= BIT2; /* Parity enable */
  3145. if (info->params.parity == ASYNC_PARITY_ODD)
  3146. val |= BIT3;
  3147. else
  3148. val |= BIT4;
  3149. }
  3150. write_reg(info, CHA + DAFO, val);
  3151. /* RFC Rx FIFO Control
  3152. *
  3153. * 07 Reserved, 0
  3154. * 06 DPS, 1=parity bit not stored in data byte
  3155. * 05 DXS, 0=all data stored in FIFO (including XON/XOFF)
  3156. * 04 RFDF Rx FIFO Data Format, 1=status byte stored in FIFO
  3157. * 03..02 RFTH[1..0], rx threshold, 11=16 status + 16 data byte
  3158. * 01 Reserved, 0
  3159. * 00 TCDE Terminate Char Detect Enable, 0=disabled
  3160. *
  3161. * 0101 1100
  3162. */
  3163. write_reg(info, CHA + RFC, 0x5c);
  3164. /* RLCR Receive length check register
  3165. *
  3166. * Max frame length = (RL + 1) * 32
  3167. */
  3168. write_reg(info, CHA + RLCR, 0);
  3169. /* XBCH Transmit Byte Count High
  3170. *
  3171. * 07 DMA mode, 0 = interrupt driven
  3172. * 06 NRM, 0=ABM (ignored)
  3173. * 05 CAS Carrier Auto Start
  3174. * 04 XC Transmit Continuously (ignored)
  3175. * 03..00 XBC[10..8] Transmit byte count bits 10..8
  3176. *
  3177. * 0000 0000
  3178. */
  3179. val = 0x00;
  3180. if (info->params.flags & HDLC_FLAG_AUTO_DCD)
  3181. val |= BIT5;
  3182. write_reg(info, CHA + XBCH, val);
  3183. if (info->params.flags & HDLC_FLAG_AUTO_CTS)
  3184. irq_enable(info, CHA, IRQ_CTS);
  3185. /* MODE:03 RAC Receiver Active, 1=active */
  3186. set_reg_bits(info, CHA + MODE, BIT3);
  3187. enable_auxclk(info);
  3188. if (info->params.flags & HDLC_FLAG_AUTO_CTS) {
  3189. irq_enable(info, CHB, IRQ_CTS);
  3190. /* PVR[3] 1=AUTO CTS active */
  3191. set_reg_bits(info, CHA + PVR, BIT3);
  3192. } else
  3193. clear_reg_bits(info, CHA + PVR, BIT3);
  3194. irq_enable(info, CHA,
  3195. IRQ_RXEOM + IRQ_RXFIFO + IRQ_BREAK_ON + IRQ_RXTIME +
  3196. IRQ_ALLSENT + IRQ_TXFIFO);
  3197. issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
  3198. wait_command_complete(info, CHA);
  3199. read_reg16(info, CHA + ISR); /* clear pending IRQs */
  3200. }
  3201. /* Set the HDLC idle mode for the transmitter.
  3202. */
  3203. static void tx_set_idle(MGSLPC_INFO *info)
  3204. {
  3205. /* Note: ESCC2 only supports flags and one idle modes */
  3206. if (info->idle_mode == HDLC_TXIDLE_FLAGS)
  3207. set_reg_bits(info, CHA + CCR1, BIT3);
  3208. else
  3209. clear_reg_bits(info, CHA + CCR1, BIT3);
  3210. }
  3211. /* get state of the V24 status (input) signals.
  3212. */
  3213. static void get_signals(MGSLPC_INFO *info)
  3214. {
  3215. unsigned char status = 0;
  3216. /* preserve DTR and RTS */
  3217. info->serial_signals &= SerialSignal_DTR + SerialSignal_RTS;
  3218. if (read_reg(info, CHB + VSTR) & BIT7)
  3219. info->serial_signals |= SerialSignal_DCD;
  3220. if (read_reg(info, CHB + STAR) & BIT1)
  3221. info->serial_signals |= SerialSignal_CTS;
  3222. status = read_reg(info, CHA + PVR);
  3223. if (!(status & PVR_RI))
  3224. info->serial_signals |= SerialSignal_RI;
  3225. if (!(status & PVR_DSR))
  3226. info->serial_signals |= SerialSignal_DSR;
  3227. }
  3228. /* Set the state of DTR and RTS based on contents of
  3229. * serial_signals member of device extension.
  3230. */
  3231. static void set_signals(MGSLPC_INFO *info)
  3232. {
  3233. unsigned char val;
  3234. val = read_reg(info, CHA + MODE);
  3235. if (info->params.mode == MGSL_MODE_ASYNC) {
  3236. if (info->serial_signals & SerialSignal_RTS)
  3237. val &= ~BIT6;
  3238. else
  3239. val |= BIT6;
  3240. } else {
  3241. if (info->serial_signals & SerialSignal_RTS)
  3242. val |= BIT2;
  3243. else
  3244. val &= ~BIT2;
  3245. }
  3246. write_reg(info, CHA + MODE, val);
  3247. if (info->serial_signals & SerialSignal_DTR)
  3248. clear_reg_bits(info, CHA + PVR, PVR_DTR);
  3249. else
  3250. set_reg_bits(info, CHA + PVR, PVR_DTR);
  3251. }
  3252. static void rx_reset_buffers(MGSLPC_INFO *info)
  3253. {
  3254. RXBUF *buf;
  3255. int i;
  3256. info->rx_put = 0;
  3257. info->rx_get = 0;
  3258. info->rx_frame_count = 0;
  3259. for (i=0 ; i < info->rx_buf_count ; i++) {
  3260. buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size));
  3261. buf->status = buf->count = 0;
  3262. }
  3263. }
  3264. /* Attempt to return a received HDLC frame
  3265. * Only frames received without errors are returned.
  3266. *
  3267. * Returns 1 if frame returned, otherwise 0
  3268. */
  3269. static int rx_get_frame(MGSLPC_INFO *info)
  3270. {
  3271. unsigned short status;
  3272. RXBUF *buf;
  3273. unsigned int framesize = 0;
  3274. unsigned long flags;
  3275. struct tty_struct *tty = info->tty;
  3276. int return_frame = 0;
  3277. if (info->rx_frame_count == 0)
  3278. return 0;
  3279. buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size));
  3280. status = buf->status;
  3281. /* 07 VFR 1=valid frame
  3282. * 06 RDO 1=data overrun
  3283. * 05 CRC 1=OK, 0=error
  3284. * 04 RAB 1=frame aborted
  3285. */
  3286. if ((status & 0xf0) != 0xA0) {
  3287. if (!(status & BIT7) || (status & BIT4))
  3288. info->icount.rxabort++;
  3289. else if (status & BIT6)
  3290. info->icount.rxover++;
  3291. else if (!(status & BIT5)) {
  3292. info->icount.rxcrc++;
  3293. if (info->params.crc_type & HDLC_CRC_RETURN_EX)
  3294. return_frame = 1;
  3295. }
  3296. framesize = 0;
  3297. #if SYNCLINK_GENERIC_HDLC
  3298. {
  3299. struct net_device_stats *stats = hdlc_stats(info->netdev);
  3300. stats->rx_errors++;
  3301. stats->rx_frame_errors++;
  3302. }
  3303. #endif
  3304. } else
  3305. return_frame = 1;
  3306. if (return_frame)
  3307. framesize = buf->count;
  3308. if (debug_level >= DEBUG_LEVEL_BH)
  3309. printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n",
  3310. __FILE__,__LINE__,info->device_name,status,framesize);
  3311. if (debug_level >= DEBUG_LEVEL_DATA)
  3312. trace_block(info, buf->data, framesize, 0);
  3313. if (framesize) {
  3314. if ((info->params.crc_type & HDLC_CRC_RETURN_EX &&
  3315. framesize+1 > info->max_frame_size) ||
  3316. framesize > info->max_frame_size)
  3317. info->icount.rxlong++;
  3318. else {
  3319. if (status & BIT5)
  3320. info->icount.rxok++;
  3321. if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
  3322. *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR;
  3323. ++framesize;
  3324. }
  3325. #if SYNCLINK_GENERIC_HDLC
  3326. if (info->netcount)
  3327. hdlcdev_rx(info, buf->data, framesize);
  3328. else
  3329. #endif
  3330. ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize);
  3331. }
  3332. }
  3333. spin_lock_irqsave(&info->lock,flags);
  3334. buf->status = buf->count = 0;
  3335. info->rx_frame_count--;
  3336. info->rx_get++;
  3337. if (info->rx_get >= info->rx_buf_count)
  3338. info->rx_get = 0;
  3339. spin_unlock_irqrestore(&info->lock,flags);
  3340. return 1;
  3341. }
  3342. static BOOLEAN register_test(MGSLPC_INFO *info)
  3343. {
  3344. static unsigned char patterns[] =
  3345. { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f };
  3346. static unsigned int count = ARRAY_SIZE(patterns);
  3347. unsigned int i;
  3348. BOOLEAN rc = TRUE;
  3349. unsigned long flags;
  3350. spin_lock_irqsave(&info->lock,flags);
  3351. reset_device(info);
  3352. for (i = 0; i < count; i++) {
  3353. write_reg(info, XAD1, patterns[i]);
  3354. write_reg(info, XAD2, patterns[(i + 1) % count]);
  3355. if ((read_reg(info, XAD1) != patterns[i]) ||
  3356. (read_reg(info, XAD2) != patterns[(i + 1) % count])) {
  3357. rc = FALSE;
  3358. break;
  3359. }
  3360. }
  3361. spin_unlock_irqrestore(&info->lock,flags);
  3362. return rc;
  3363. }
  3364. static BOOLEAN irq_test(MGSLPC_INFO *info)
  3365. {
  3366. unsigned long end_time;
  3367. unsigned long flags;
  3368. spin_lock_irqsave(&info->lock,flags);
  3369. reset_device(info);
  3370. info->testing_irq = TRUE;
  3371. hdlc_mode(info);
  3372. info->irq_occurred = FALSE;
  3373. /* init hdlc mode */
  3374. irq_enable(info, CHA, IRQ_TIMER);
  3375. write_reg(info, CHA + TIMR, 0); /* 512 cycles */
  3376. issue_command(info, CHA, CMD_START_TIMER);
  3377. spin_unlock_irqrestore(&info->lock,flags);
  3378. end_time=100;
  3379. while(end_time-- && !info->irq_occurred) {
  3380. msleep_interruptible(10);
  3381. }
  3382. info->testing_irq = FALSE;
  3383. spin_lock_irqsave(&info->lock,flags);
  3384. reset_device(info);
  3385. spin_unlock_irqrestore(&info->lock,flags);
  3386. return info->irq_occurred ? TRUE : FALSE;
  3387. }
  3388. static int adapter_test(MGSLPC_INFO *info)
  3389. {
  3390. if (!register_test(info)) {
  3391. info->init_error = DiagStatus_AddressFailure;
  3392. printk( "%s(%d):Register test failure for device %s Addr=%04X\n",
  3393. __FILE__,__LINE__,info->device_name, (unsigned short)(info->io_base) );
  3394. return -ENODEV;
  3395. }
  3396. if (!irq_test(info)) {
  3397. info->init_error = DiagStatus_IrqFailure;
  3398. printk( "%s(%d):Interrupt test failure for device %s IRQ=%d\n",
  3399. __FILE__,__LINE__,info->device_name, (unsigned short)(info->irq_level) );
  3400. return -ENODEV;
  3401. }
  3402. if (debug_level >= DEBUG_LEVEL_INFO)
  3403. printk("%s(%d):device %s passed diagnostics\n",
  3404. __FILE__,__LINE__,info->device_name);
  3405. return 0;
  3406. }
  3407. static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit)
  3408. {
  3409. int i;
  3410. int linecount;
  3411. if (xmit)
  3412. printk("%s tx data:\n",info->device_name);
  3413. else
  3414. printk("%s rx data:\n",info->device_name);
  3415. while(count) {
  3416. if (count > 16)
  3417. linecount = 16;
  3418. else
  3419. linecount = count;
  3420. for(i=0;i<linecount;i++)
  3421. printk("%02X ",(unsigned char)data[i]);
  3422. for(;i<17;i++)
  3423. printk(" ");
  3424. for(i=0;i<linecount;i++) {
  3425. if (data[i]>=040 && data[i]<=0176)
  3426. printk("%c",data[i]);
  3427. else
  3428. printk(".");
  3429. }
  3430. printk("\n");
  3431. data += linecount;
  3432. count -= linecount;
  3433. }
  3434. }
  3435. /* HDLC frame time out
  3436. * update stats and do tx completion processing
  3437. */
  3438. static void tx_timeout(unsigned long context)
  3439. {
  3440. MGSLPC_INFO *info = (MGSLPC_INFO*)context;
  3441. unsigned long flags;
  3442. if ( debug_level >= DEBUG_LEVEL_INFO )
  3443. printk( "%s(%d):tx_timeout(%s)\n",
  3444. __FILE__,__LINE__,info->device_name);
  3445. if(info->tx_active &&
  3446. info->params.mode == MGSL_MODE_HDLC) {
  3447. info->icount.txtimeout++;
  3448. }
  3449. spin_lock_irqsave(&info->lock,flags);
  3450. info->tx_active = 0;
  3451. info->tx_count = info->tx_put = info->tx_get = 0;
  3452. spin_unlock_irqrestore(&info->lock,flags);
  3453. #if SYNCLINK_GENERIC_HDLC
  3454. if (info->netcount)
  3455. hdlcdev_tx_done(info);
  3456. else
  3457. #endif
  3458. bh_transmit(info);
  3459. }
  3460. #if SYNCLINK_GENERIC_HDLC
  3461. /**
  3462. * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
  3463. * set encoding and frame check sequence (FCS) options
  3464. *
  3465. * dev pointer to network device structure
  3466. * encoding serial encoding setting
  3467. * parity FCS setting
  3468. *
  3469. * returns 0 if success, otherwise error code
  3470. */
  3471. static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
  3472. unsigned short parity)
  3473. {
  3474. MGSLPC_INFO *info = dev_to_port(dev);
  3475. unsigned char new_encoding;
  3476. unsigned short new_crctype;
  3477. /* return error if TTY interface open */
  3478. if (info->count)
  3479. return -EBUSY;
  3480. switch (encoding)
  3481. {
  3482. case ENCODING_NRZ: new_encoding = HDLC_ENCODING_NRZ; break;
  3483. case ENCODING_NRZI: new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
  3484. case ENCODING_FM_MARK: new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
  3485. case ENCODING_FM_SPACE: new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
  3486. case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
  3487. default: return -EINVAL;
  3488. }
  3489. switch (parity)
  3490. {
  3491. case PARITY_NONE: new_crctype = HDLC_CRC_NONE; break;
  3492. case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
  3493. case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
  3494. default: return -EINVAL;
  3495. }
  3496. info->params.encoding = new_encoding;
  3497. info->params.crc_type = new_crctype;
  3498. /* if network interface up, reprogram hardware */
  3499. if (info->netcount)
  3500. mgslpc_program_hw(info);
  3501. return 0;
  3502. }
  3503. /**
  3504. * called by generic HDLC layer to send frame
  3505. *
  3506. * skb socket buffer containing HDLC frame
  3507. * dev pointer to network device structure
  3508. *
  3509. * returns 0 if success, otherwise error code
  3510. */
  3511. static int hdlcdev_xmit(struct sk_buff *skb, struct net_device *dev)
  3512. {
  3513. MGSLPC_INFO *info = dev_to_port(dev);
  3514. struct net_device_stats *stats = hdlc_stats(dev);
  3515. unsigned long flags;
  3516. if (debug_level >= DEBUG_LEVEL_INFO)
  3517. printk(KERN_INFO "%s:hdlc_xmit(%s)\n",__FILE__,dev->name);
  3518. /* stop sending until this frame completes */
  3519. netif_stop_queue(dev);
  3520. /* copy data to device buffers */
  3521. skb_copy_from_linear_data(skb, info->tx_buf, skb->len);
  3522. info->tx_get = 0;
  3523. info->tx_put = info->tx_count = skb->len;
  3524. /* update network statistics */
  3525. stats->tx_packets++;
  3526. stats->tx_bytes += skb->len;
  3527. /* done with socket buffer, so free it */
  3528. dev_kfree_skb(skb);
  3529. /* save start time for transmit timeout detection */
  3530. dev->trans_start = jiffies;
  3531. /* start hardware transmitter if necessary */
  3532. spin_lock_irqsave(&info->lock,flags);
  3533. if (!info->tx_active)
  3534. tx_start(info);
  3535. spin_unlock_irqrestore(&info->lock,flags);
  3536. return 0;
  3537. }
  3538. /**
  3539. * called by network layer when interface enabled
  3540. * claim resources and initialize hardware
  3541. *
  3542. * dev pointer to network device structure
  3543. *
  3544. * returns 0 if success, otherwise error code
  3545. */
  3546. static int hdlcdev_open(struct net_device *dev)
  3547. {
  3548. MGSLPC_INFO *info = dev_to_port(dev);
  3549. int rc;
  3550. unsigned long flags;
  3551. if (debug_level >= DEBUG_LEVEL_INFO)
  3552. printk("%s:hdlcdev_open(%s)\n",__FILE__,dev->name);
  3553. /* generic HDLC layer open processing */
  3554. if ((rc = hdlc_open(dev)))
  3555. return rc;
  3556. /* arbitrate between network and tty opens */
  3557. spin_lock_irqsave(&info->netlock, flags);
  3558. if (info->count != 0 || info->netcount != 0) {
  3559. printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
  3560. spin_unlock_irqrestore(&info->netlock, flags);
  3561. return -EBUSY;
  3562. }
  3563. info->netcount=1;
  3564. spin_unlock_irqrestore(&info->netlock, flags);
  3565. /* claim resources and init adapter */
  3566. if ((rc = startup(info)) != 0) {
  3567. spin_lock_irqsave(&info->netlock, flags);
  3568. info->netcount=0;
  3569. spin_unlock_irqrestore(&info->netlock, flags);
  3570. return rc;
  3571. }
  3572. /* assert DTR and RTS, apply hardware settings */
  3573. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  3574. mgslpc_program_hw(info);
  3575. /* enable network layer transmit */
  3576. dev->trans_start = jiffies;
  3577. netif_start_queue(dev);
  3578. /* inform generic HDLC layer of current DCD status */
  3579. spin_lock_irqsave(&info->lock, flags);
  3580. get_signals(info);
  3581. spin_unlock_irqrestore(&info->lock, flags);
  3582. if (info->serial_signals & SerialSignal_DCD)
  3583. netif_carrier_on(dev);
  3584. else
  3585. netif_carrier_off(dev);
  3586. return 0;
  3587. }
  3588. /**
  3589. * called by network layer when interface is disabled
  3590. * shutdown hardware and release resources
  3591. *
  3592. * dev pointer to network device structure
  3593. *
  3594. * returns 0 if success, otherwise error code
  3595. */
  3596. static int hdlcdev_close(struct net_device *dev)
  3597. {
  3598. MGSLPC_INFO *info = dev_to_port(dev);
  3599. unsigned long flags;
  3600. if (debug_level >= DEBUG_LEVEL_INFO)
  3601. printk("%s:hdlcdev_close(%s)\n",__FILE__,dev->name);
  3602. netif_stop_queue(dev);
  3603. /* shutdown adapter and release resources */
  3604. shutdown(info);
  3605. hdlc_close(dev);
  3606. spin_lock_irqsave(&info->netlock, flags);
  3607. info->netcount=0;
  3608. spin_unlock_irqrestore(&info->netlock, flags);
  3609. return 0;
  3610. }
  3611. /**
  3612. * called by network layer to process IOCTL call to network device
  3613. *
  3614. * dev pointer to network device structure
  3615. * ifr pointer to network interface request structure
  3616. * cmd IOCTL command code
  3617. *
  3618. * returns 0 if success, otherwise error code
  3619. */
  3620. static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  3621. {
  3622. const size_t size = sizeof(sync_serial_settings);
  3623. sync_serial_settings new_line;
  3624. sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
  3625. MGSLPC_INFO *info = dev_to_port(dev);
  3626. unsigned int flags;
  3627. if (debug_level >= DEBUG_LEVEL_INFO)
  3628. printk("%s:hdlcdev_ioctl(%s)\n",__FILE__,dev->name);
  3629. /* return error if TTY interface open */
  3630. if (info->count)
  3631. return -EBUSY;
  3632. if (cmd != SIOCWANDEV)
  3633. return hdlc_ioctl(dev, ifr, cmd);
  3634. switch(ifr->ifr_settings.type) {
  3635. case IF_GET_IFACE: /* return current sync_serial_settings */
  3636. ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
  3637. if (ifr->ifr_settings.size < size) {
  3638. ifr->ifr_settings.size = size; /* data size wanted */
  3639. return -ENOBUFS;
  3640. }
  3641. flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3642. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3643. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3644. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
  3645. switch (flags){
  3646. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
  3647. case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break;
  3648. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break;
  3649. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
  3650. default: new_line.clock_type = CLOCK_DEFAULT;
  3651. }
  3652. new_line.clock_rate = info->params.clock_speed;
  3653. new_line.loopback = info->params.loopback ? 1:0;
  3654. if (copy_to_user(line, &new_line, size))
  3655. return -EFAULT;
  3656. return 0;
  3657. case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
  3658. if(!capable(CAP_NET_ADMIN))
  3659. return -EPERM;
  3660. if (copy_from_user(&new_line, line, size))
  3661. return -EFAULT;
  3662. switch (new_line.clock_type)
  3663. {
  3664. case CLOCK_EXT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
  3665. case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
  3666. case CLOCK_INT: flags = HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG; break;
  3667. case CLOCK_TXINT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG; break;
  3668. case CLOCK_DEFAULT: flags = info->params.flags &
  3669. (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3670. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3671. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3672. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN); break;
  3673. default: return -EINVAL;
  3674. }
  3675. if (new_line.loopback != 0 && new_line.loopback != 1)
  3676. return -EINVAL;
  3677. info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3678. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3679. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3680. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
  3681. info->params.flags |= flags;
  3682. info->params.loopback = new_line.loopback;
  3683. if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
  3684. info->params.clock_speed = new_line.clock_rate;
  3685. else
  3686. info->params.clock_speed = 0;
  3687. /* if network interface up, reprogram hardware */
  3688. if (info->netcount)
  3689. mgslpc_program_hw(info);
  3690. return 0;
  3691. default:
  3692. return hdlc_ioctl(dev, ifr, cmd);
  3693. }
  3694. }
  3695. /**
  3696. * called by network layer when transmit timeout is detected
  3697. *
  3698. * dev pointer to network device structure
  3699. */
  3700. static void hdlcdev_tx_timeout(struct net_device *dev)
  3701. {
  3702. MGSLPC_INFO *info = dev_to_port(dev);
  3703. struct net_device_stats *stats = hdlc_stats(dev);
  3704. unsigned long flags;
  3705. if (debug_level >= DEBUG_LEVEL_INFO)
  3706. printk("hdlcdev_tx_timeout(%s)\n",dev->name);
  3707. stats->tx_errors++;
  3708. stats->tx_aborted_errors++;
  3709. spin_lock_irqsave(&info->lock,flags);
  3710. tx_stop(info);
  3711. spin_unlock_irqrestore(&info->lock,flags);
  3712. netif_wake_queue(dev);
  3713. }
  3714. /**
  3715. * called by device driver when transmit completes
  3716. * reenable network layer transmit if stopped
  3717. *
  3718. * info pointer to device instance information
  3719. */
  3720. static void hdlcdev_tx_done(MGSLPC_INFO *info)
  3721. {
  3722. if (netif_queue_stopped(info->netdev))
  3723. netif_wake_queue(info->netdev);
  3724. }
  3725. /**
  3726. * called by device driver when frame received
  3727. * pass frame to network layer
  3728. *
  3729. * info pointer to device instance information
  3730. * buf pointer to buffer contianing frame data
  3731. * size count of data bytes in buf
  3732. */
  3733. static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
  3734. {
  3735. struct sk_buff *skb = dev_alloc_skb(size);
  3736. struct net_device *dev = info->netdev;
  3737. struct net_device_stats *stats = hdlc_stats(dev);
  3738. if (debug_level >= DEBUG_LEVEL_INFO)
  3739. printk("hdlcdev_rx(%s)\n",dev->name);
  3740. if (skb == NULL) {
  3741. printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
  3742. stats->rx_dropped++;
  3743. return;
  3744. }
  3745. memcpy(skb_put(skb, size),buf,size);
  3746. skb->protocol = hdlc_type_trans(skb, info->netdev);
  3747. stats->rx_packets++;
  3748. stats->rx_bytes += size;
  3749. netif_rx(skb);
  3750. info->netdev->last_rx = jiffies;
  3751. }
  3752. /**
  3753. * called by device driver when adding device instance
  3754. * do generic HDLC initialization
  3755. *
  3756. * info pointer to device instance information
  3757. *
  3758. * returns 0 if success, otherwise error code
  3759. */
  3760. static int hdlcdev_init(MGSLPC_INFO *info)
  3761. {
  3762. int rc;
  3763. struct net_device *dev;
  3764. hdlc_device *hdlc;
  3765. /* allocate and initialize network and HDLC layer objects */
  3766. if (!(dev = alloc_hdlcdev(info))) {
  3767. printk(KERN_ERR "%s:hdlc device allocation failure\n",__FILE__);
  3768. return -ENOMEM;
  3769. }
  3770. /* for network layer reporting purposes only */
  3771. dev->base_addr = info->io_base;
  3772. dev->irq = info->irq_level;
  3773. /* network layer callbacks and settings */
  3774. dev->do_ioctl = hdlcdev_ioctl;
  3775. dev->open = hdlcdev_open;
  3776. dev->stop = hdlcdev_close;
  3777. dev->tx_timeout = hdlcdev_tx_timeout;
  3778. dev->watchdog_timeo = 10*HZ;
  3779. dev->tx_queue_len = 50;
  3780. /* generic HDLC layer callbacks and settings */
  3781. hdlc = dev_to_hdlc(dev);
  3782. hdlc->attach = hdlcdev_attach;
  3783. hdlc->xmit = hdlcdev_xmit;
  3784. /* register objects with HDLC layer */
  3785. if ((rc = register_hdlc_device(dev))) {
  3786. printk(KERN_WARNING "%s:unable to register hdlc device\n",__FILE__);
  3787. free_netdev(dev);
  3788. return rc;
  3789. }
  3790. info->netdev = dev;
  3791. return 0;
  3792. }
  3793. /**
  3794. * called by device driver when removing device instance
  3795. * do generic HDLC cleanup
  3796. *
  3797. * info pointer to device instance information
  3798. */
  3799. static void hdlcdev_exit(MGSLPC_INFO *info)
  3800. {
  3801. unregister_hdlc_device(info->netdev);
  3802. free_netdev(info->netdev);
  3803. info->netdev = NULL;
  3804. }
  3805. #endif /* CONFIG_HDLC */