setup.c 18 KB

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  1. /*
  2. * Copyright (c) 2000 Mike Corrigan <mikejc@us.ibm.com>
  3. * Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
  4. *
  5. * Description:
  6. * Architecture- / platform-specific boot-time initialization code for
  7. * the IBM iSeries LPAR. Adapted from original code by Grant Erickson and
  8. * code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek
  9. * <dan@net4x.com>.
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License
  13. * as published by the Free Software Foundation; either version
  14. * 2 of the License, or (at your option) any later version.
  15. */
  16. #undef DEBUG
  17. #include <linux/init.h>
  18. #include <linux/threads.h>
  19. #include <linux/smp.h>
  20. #include <linux/param.h>
  21. #include <linux/string.h>
  22. #include <linux/seq_file.h>
  23. #include <linux/kdev_t.h>
  24. #include <linux/major.h>
  25. #include <linux/root_dev.h>
  26. #include <linux/kernel.h>
  27. #include <asm/processor.h>
  28. #include <asm/machdep.h>
  29. #include <asm/page.h>
  30. #include <asm/mmu.h>
  31. #include <asm/pgtable.h>
  32. #include <asm/mmu_context.h>
  33. #include <asm/cputable.h>
  34. #include <asm/sections.h>
  35. #include <asm/iommu.h>
  36. #include <asm/firmware.h>
  37. #include <asm/system.h>
  38. #include <asm/time.h>
  39. #include <asm/paca.h>
  40. #include <asm/cache.h>
  41. #include <asm/sections.h>
  42. #include <asm/abs_addr.h>
  43. #include <asm/iseries/hv_lp_config.h>
  44. #include <asm/iseries/hv_call_event.h>
  45. #include <asm/iseries/hv_call_xm.h>
  46. #include <asm/iseries/it_lp_queue.h>
  47. #include <asm/iseries/mf.h>
  48. #include <asm/iseries/hv_lp_event.h>
  49. #include <asm/iseries/lpar_map.h>
  50. #include <asm/udbg.h>
  51. #include <asm/irq.h>
  52. #include "naca.h"
  53. #include "setup.h"
  54. #include "irq.h"
  55. #include "vpd_areas.h"
  56. #include "processor_vpd.h"
  57. #include "it_lp_naca.h"
  58. #include "main_store.h"
  59. #include "call_sm.h"
  60. #include "call_hpt.h"
  61. #ifdef DEBUG
  62. #define DBG(fmt...) udbg_printf(fmt)
  63. #else
  64. #define DBG(fmt...)
  65. #endif
  66. /* Function Prototypes */
  67. static unsigned long build_iSeries_Memory_Map(void);
  68. static void iseries_shared_idle(void);
  69. static void iseries_dedicated_idle(void);
  70. #ifdef CONFIG_PCI
  71. extern void iSeries_pci_final_fixup(void);
  72. #else
  73. static void iSeries_pci_final_fixup(void) { }
  74. #endif
  75. struct MemoryBlock {
  76. unsigned long absStart;
  77. unsigned long absEnd;
  78. unsigned long logicalStart;
  79. unsigned long logicalEnd;
  80. };
  81. /*
  82. * Process the main store vpd to determine where the holes in memory are
  83. * and return the number of physical blocks and fill in the array of
  84. * block data.
  85. */
  86. static unsigned long iSeries_process_Condor_mainstore_vpd(
  87. struct MemoryBlock *mb_array, unsigned long max_entries)
  88. {
  89. unsigned long holeFirstChunk, holeSizeChunks;
  90. unsigned long numMemoryBlocks = 1;
  91. struct IoHriMainStoreSegment4 *msVpd =
  92. (struct IoHriMainStoreSegment4 *)xMsVpd;
  93. unsigned long holeStart = msVpd->nonInterleavedBlocksStartAdr;
  94. unsigned long holeEnd = msVpd->nonInterleavedBlocksEndAdr;
  95. unsigned long holeSize = holeEnd - holeStart;
  96. printk("Mainstore_VPD: Condor\n");
  97. /*
  98. * Determine if absolute memory has any
  99. * holes so that we can interpret the
  100. * access map we get back from the hypervisor
  101. * correctly.
  102. */
  103. mb_array[0].logicalStart = 0;
  104. mb_array[0].logicalEnd = 0x100000000;
  105. mb_array[0].absStart = 0;
  106. mb_array[0].absEnd = 0x100000000;
  107. if (holeSize) {
  108. numMemoryBlocks = 2;
  109. holeStart = holeStart & 0x000fffffffffffff;
  110. holeStart = addr_to_chunk(holeStart);
  111. holeFirstChunk = holeStart;
  112. holeSize = addr_to_chunk(holeSize);
  113. holeSizeChunks = holeSize;
  114. printk( "Main store hole: start chunk = %0lx, size = %0lx chunks\n",
  115. holeFirstChunk, holeSizeChunks );
  116. mb_array[0].logicalEnd = holeFirstChunk;
  117. mb_array[0].absEnd = holeFirstChunk;
  118. mb_array[1].logicalStart = holeFirstChunk;
  119. mb_array[1].logicalEnd = 0x100000000 - holeSizeChunks;
  120. mb_array[1].absStart = holeFirstChunk + holeSizeChunks;
  121. mb_array[1].absEnd = 0x100000000;
  122. }
  123. return numMemoryBlocks;
  124. }
  125. #define MaxSegmentAreas 32
  126. #define MaxSegmentAdrRangeBlocks 128
  127. #define MaxAreaRangeBlocks 4
  128. static unsigned long iSeries_process_Regatta_mainstore_vpd(
  129. struct MemoryBlock *mb_array, unsigned long max_entries)
  130. {
  131. struct IoHriMainStoreSegment5 *msVpdP =
  132. (struct IoHriMainStoreSegment5 *)xMsVpd;
  133. unsigned long numSegmentBlocks = 0;
  134. u32 existsBits = msVpdP->msAreaExists;
  135. unsigned long area_num;
  136. printk("Mainstore_VPD: Regatta\n");
  137. for (area_num = 0; area_num < MaxSegmentAreas; ++area_num ) {
  138. unsigned long numAreaBlocks;
  139. struct IoHriMainStoreArea4 *currentArea;
  140. if (existsBits & 0x80000000) {
  141. unsigned long block_num;
  142. currentArea = &msVpdP->msAreaArray[area_num];
  143. numAreaBlocks = currentArea->numAdrRangeBlocks;
  144. printk("ms_vpd: processing area %2ld blocks=%ld",
  145. area_num, numAreaBlocks);
  146. for (block_num = 0; block_num < numAreaBlocks;
  147. ++block_num ) {
  148. /* Process an address range block */
  149. struct MemoryBlock tempBlock;
  150. unsigned long i;
  151. tempBlock.absStart =
  152. (unsigned long)currentArea->xAdrRangeBlock[block_num].blockStart;
  153. tempBlock.absEnd =
  154. (unsigned long)currentArea->xAdrRangeBlock[block_num].blockEnd;
  155. tempBlock.logicalStart = 0;
  156. tempBlock.logicalEnd = 0;
  157. printk("\n block %ld absStart=%016lx absEnd=%016lx",
  158. block_num, tempBlock.absStart,
  159. tempBlock.absEnd);
  160. for (i = 0; i < numSegmentBlocks; ++i) {
  161. if (mb_array[i].absStart ==
  162. tempBlock.absStart)
  163. break;
  164. }
  165. if (i == numSegmentBlocks) {
  166. if (numSegmentBlocks == max_entries)
  167. panic("iSeries_process_mainstore_vpd: too many memory blocks");
  168. mb_array[numSegmentBlocks] = tempBlock;
  169. ++numSegmentBlocks;
  170. } else
  171. printk(" (duplicate)");
  172. }
  173. printk("\n");
  174. }
  175. existsBits <<= 1;
  176. }
  177. /* Now sort the blocks found into ascending sequence */
  178. if (numSegmentBlocks > 1) {
  179. unsigned long m, n;
  180. for (m = 0; m < numSegmentBlocks - 1; ++m) {
  181. for (n = numSegmentBlocks - 1; m < n; --n) {
  182. if (mb_array[n].absStart <
  183. mb_array[n-1].absStart) {
  184. struct MemoryBlock tempBlock;
  185. tempBlock = mb_array[n];
  186. mb_array[n] = mb_array[n-1];
  187. mb_array[n-1] = tempBlock;
  188. }
  189. }
  190. }
  191. }
  192. /*
  193. * Assign "logical" addresses to each block. These
  194. * addresses correspond to the hypervisor "bitmap" space.
  195. * Convert all addresses into units of 256K chunks.
  196. */
  197. {
  198. unsigned long i, nextBitmapAddress;
  199. printk("ms_vpd: %ld sorted memory blocks\n", numSegmentBlocks);
  200. nextBitmapAddress = 0;
  201. for (i = 0; i < numSegmentBlocks; ++i) {
  202. unsigned long length = mb_array[i].absEnd -
  203. mb_array[i].absStart;
  204. mb_array[i].logicalStart = nextBitmapAddress;
  205. mb_array[i].logicalEnd = nextBitmapAddress + length;
  206. nextBitmapAddress += length;
  207. printk(" Bitmap range: %016lx - %016lx\n"
  208. " Absolute range: %016lx - %016lx\n",
  209. mb_array[i].logicalStart,
  210. mb_array[i].logicalEnd,
  211. mb_array[i].absStart, mb_array[i].absEnd);
  212. mb_array[i].absStart = addr_to_chunk(mb_array[i].absStart &
  213. 0x000fffffffffffff);
  214. mb_array[i].absEnd = addr_to_chunk(mb_array[i].absEnd &
  215. 0x000fffffffffffff);
  216. mb_array[i].logicalStart =
  217. addr_to_chunk(mb_array[i].logicalStart);
  218. mb_array[i].logicalEnd = addr_to_chunk(mb_array[i].logicalEnd);
  219. }
  220. }
  221. return numSegmentBlocks;
  222. }
  223. static unsigned long iSeries_process_mainstore_vpd(struct MemoryBlock *mb_array,
  224. unsigned long max_entries)
  225. {
  226. unsigned long i;
  227. unsigned long mem_blocks = 0;
  228. if (cpu_has_feature(CPU_FTR_SLB))
  229. mem_blocks = iSeries_process_Regatta_mainstore_vpd(mb_array,
  230. max_entries);
  231. else
  232. mem_blocks = iSeries_process_Condor_mainstore_vpd(mb_array,
  233. max_entries);
  234. printk("Mainstore_VPD: numMemoryBlocks = %ld \n", mem_blocks);
  235. for (i = 0; i < mem_blocks; ++i) {
  236. printk("Mainstore_VPD: block %3ld logical chunks %016lx - %016lx\n"
  237. " abs chunks %016lx - %016lx\n",
  238. i, mb_array[i].logicalStart, mb_array[i].logicalEnd,
  239. mb_array[i].absStart, mb_array[i].absEnd);
  240. }
  241. return mem_blocks;
  242. }
  243. static void __init iSeries_get_cmdline(void)
  244. {
  245. char *p, *q;
  246. /* copy the command line parameter from the primary VSP */
  247. HvCallEvent_dmaToSp(cmd_line, 2 * 64* 1024, 256,
  248. HvLpDma_Direction_RemoteToLocal);
  249. p = cmd_line;
  250. q = cmd_line + 255;
  251. while(p < q) {
  252. if (!*p || *p == '\n')
  253. break;
  254. ++p;
  255. }
  256. *p = 0;
  257. }
  258. static void __init iSeries_init_early(void)
  259. {
  260. DBG(" -> iSeries_init_early()\n");
  261. /* Snapshot the timebase, for use in later recalibration */
  262. iSeries_time_init_early();
  263. /*
  264. * Initialize the DMA/TCE management
  265. */
  266. iommu_init_early_iSeries();
  267. /* Initialize machine-dependency vectors */
  268. #ifdef CONFIG_SMP
  269. smp_init_iSeries();
  270. #endif
  271. /* Associate Lp Event Queue 0 with processor 0 */
  272. HvCallEvent_setLpEventQueueInterruptProc(0, 0);
  273. mf_init();
  274. DBG(" <- iSeries_init_early()\n");
  275. }
  276. struct mschunks_map mschunks_map = {
  277. /* XXX We don't use these, but Piranha might need them. */
  278. .chunk_size = MSCHUNKS_CHUNK_SIZE,
  279. .chunk_shift = MSCHUNKS_CHUNK_SHIFT,
  280. .chunk_mask = MSCHUNKS_OFFSET_MASK,
  281. };
  282. EXPORT_SYMBOL(mschunks_map);
  283. void mschunks_alloc(unsigned long num_chunks)
  284. {
  285. klimit = _ALIGN(klimit, sizeof(u32));
  286. mschunks_map.mapping = (u32 *)klimit;
  287. klimit += num_chunks * sizeof(u32);
  288. mschunks_map.num_chunks = num_chunks;
  289. }
  290. /*
  291. * The iSeries may have very large memories ( > 128 GB ) and a partition
  292. * may get memory in "chunks" that may be anywhere in the 2**52 real
  293. * address space. The chunks are 256K in size. To map this to the
  294. * memory model Linux expects, the AS/400 specific code builds a
  295. * translation table to translate what Linux thinks are "physical"
  296. * addresses to the actual real addresses. This allows us to make
  297. * it appear to Linux that we have contiguous memory starting at
  298. * physical address zero while in fact this could be far from the truth.
  299. * To avoid confusion, I'll let the words physical and/or real address
  300. * apply to the Linux addresses while I'll use "absolute address" to
  301. * refer to the actual hardware real address.
  302. *
  303. * build_iSeries_Memory_Map gets information from the Hypervisor and
  304. * looks at the Main Store VPD to determine the absolute addresses
  305. * of the memory that has been assigned to our partition and builds
  306. * a table used to translate Linux's physical addresses to these
  307. * absolute addresses. Absolute addresses are needed when
  308. * communicating with the hypervisor (e.g. to build HPT entries)
  309. *
  310. * Returns the physical memory size
  311. */
  312. static unsigned long __init build_iSeries_Memory_Map(void)
  313. {
  314. u32 loadAreaFirstChunk, loadAreaLastChunk, loadAreaSize;
  315. u32 nextPhysChunk;
  316. u32 hptFirstChunk, hptLastChunk, hptSizeChunks, hptSizePages;
  317. u32 totalChunks,moreChunks;
  318. u32 currChunk, thisChunk, absChunk;
  319. u32 currDword;
  320. u32 chunkBit;
  321. u64 map;
  322. struct MemoryBlock mb[32];
  323. unsigned long numMemoryBlocks, curBlock;
  324. /* Chunk size on iSeries is 256K bytes */
  325. totalChunks = (u32)HvLpConfig_getMsChunks();
  326. mschunks_alloc(totalChunks);
  327. /*
  328. * Get absolute address of our load area
  329. * and map it to physical address 0
  330. * This guarantees that the loadarea ends up at physical 0
  331. * otherwise, it might not be returned by PLIC as the first
  332. * chunks
  333. */
  334. loadAreaFirstChunk = (u32)addr_to_chunk(itLpNaca.xLoadAreaAddr);
  335. loadAreaSize = itLpNaca.xLoadAreaChunks;
  336. /*
  337. * Only add the pages already mapped here.
  338. * Otherwise we might add the hpt pages
  339. * The rest of the pages of the load area
  340. * aren't in the HPT yet and can still
  341. * be assigned an arbitrary physical address
  342. */
  343. if ((loadAreaSize * 64) > HvPagesToMap)
  344. loadAreaSize = HvPagesToMap / 64;
  345. loadAreaLastChunk = loadAreaFirstChunk + loadAreaSize - 1;
  346. /*
  347. * TODO Do we need to do something if the HPT is in the 64MB load area?
  348. * This would be required if the itLpNaca.xLoadAreaChunks includes
  349. * the HPT size
  350. */
  351. printk("Mapping load area - physical addr = 0000000000000000\n"
  352. " absolute addr = %016lx\n",
  353. chunk_to_addr(loadAreaFirstChunk));
  354. printk("Load area size %dK\n", loadAreaSize * 256);
  355. for (nextPhysChunk = 0; nextPhysChunk < loadAreaSize; ++nextPhysChunk)
  356. mschunks_map.mapping[nextPhysChunk] =
  357. loadAreaFirstChunk + nextPhysChunk;
  358. /*
  359. * Get absolute address of our HPT and remember it so
  360. * we won't map it to any physical address
  361. */
  362. hptFirstChunk = (u32)addr_to_chunk(HvCallHpt_getHptAddress());
  363. hptSizePages = (u32)HvCallHpt_getHptPages();
  364. hptSizeChunks = hptSizePages >>
  365. (MSCHUNKS_CHUNK_SHIFT - HW_PAGE_SHIFT);
  366. hptLastChunk = hptFirstChunk + hptSizeChunks - 1;
  367. printk("HPT absolute addr = %016lx, size = %dK\n",
  368. chunk_to_addr(hptFirstChunk), hptSizeChunks * 256);
  369. /*
  370. * Determine if absolute memory has any
  371. * holes so that we can interpret the
  372. * access map we get back from the hypervisor
  373. * correctly.
  374. */
  375. numMemoryBlocks = iSeries_process_mainstore_vpd(mb, 32);
  376. /*
  377. * Process the main store access map from the hypervisor
  378. * to build up our physical -> absolute translation table
  379. */
  380. curBlock = 0;
  381. currChunk = 0;
  382. currDword = 0;
  383. moreChunks = totalChunks;
  384. while (moreChunks) {
  385. map = HvCallSm_get64BitsOfAccessMap(itLpNaca.xLpIndex,
  386. currDword);
  387. thisChunk = currChunk;
  388. while (map) {
  389. chunkBit = map >> 63;
  390. map <<= 1;
  391. if (chunkBit) {
  392. --moreChunks;
  393. while (thisChunk >= mb[curBlock].logicalEnd) {
  394. ++curBlock;
  395. if (curBlock >= numMemoryBlocks)
  396. panic("out of memory blocks");
  397. }
  398. if (thisChunk < mb[curBlock].logicalStart)
  399. panic("memory block error");
  400. absChunk = mb[curBlock].absStart +
  401. (thisChunk - mb[curBlock].logicalStart);
  402. if (((absChunk < hptFirstChunk) ||
  403. (absChunk > hptLastChunk)) &&
  404. ((absChunk < loadAreaFirstChunk) ||
  405. (absChunk > loadAreaLastChunk))) {
  406. mschunks_map.mapping[nextPhysChunk] =
  407. absChunk;
  408. ++nextPhysChunk;
  409. }
  410. }
  411. ++thisChunk;
  412. }
  413. ++currDword;
  414. currChunk += 64;
  415. }
  416. /*
  417. * main store size (in chunks) is
  418. * totalChunks - hptSizeChunks
  419. * which should be equal to
  420. * nextPhysChunk
  421. */
  422. return chunk_to_addr(nextPhysChunk);
  423. }
  424. /*
  425. * Document me.
  426. */
  427. static void __init iSeries_setup_arch(void)
  428. {
  429. if (get_lppaca()->shared_proc) {
  430. ppc_md.idle_loop = iseries_shared_idle;
  431. printk(KERN_DEBUG "Using shared processor idle loop\n");
  432. } else {
  433. ppc_md.idle_loop = iseries_dedicated_idle;
  434. printk(KERN_DEBUG "Using dedicated idle loop\n");
  435. }
  436. /* Setup the Lp Event Queue */
  437. setup_hvlpevent_queue();
  438. printk("Max logical processors = %d\n",
  439. itVpdAreas.xSlicMaxLogicalProcs);
  440. printk("Max physical processors = %d\n",
  441. itVpdAreas.xSlicMaxPhysicalProcs);
  442. }
  443. static void iSeries_show_cpuinfo(struct seq_file *m)
  444. {
  445. seq_printf(m, "machine\t\t: 64-bit iSeries Logical Partition\n");
  446. }
  447. static void __init iSeries_progress(char * st, unsigned short code)
  448. {
  449. printk("Progress: [%04x] - %s\n", (unsigned)code, st);
  450. mf_display_progress(code);
  451. }
  452. static void __init iSeries_fixup_klimit(void)
  453. {
  454. /*
  455. * Change klimit to take into account any ram disk
  456. * that may be included
  457. */
  458. if (naca.xRamDisk)
  459. klimit = KERNELBASE + (u64)naca.xRamDisk +
  460. (naca.xRamDiskSize * HW_PAGE_SIZE);
  461. }
  462. static int __init iSeries_src_init(void)
  463. {
  464. /* clear the progress line */
  465. if (firmware_has_feature(FW_FEATURE_ISERIES))
  466. ppc_md.progress(" ", 0xffff);
  467. return 0;
  468. }
  469. late_initcall(iSeries_src_init);
  470. static inline void process_iSeries_events(void)
  471. {
  472. asm volatile ("li 0,0x5555; sc" : : : "r0", "r3");
  473. }
  474. static void yield_shared_processor(void)
  475. {
  476. unsigned long tb;
  477. HvCall_setEnabledInterrupts(HvCall_MaskIPI |
  478. HvCall_MaskLpEvent |
  479. HvCall_MaskLpProd |
  480. HvCall_MaskTimeout);
  481. tb = get_tb();
  482. /* Compute future tb value when yield should expire */
  483. HvCall_yieldProcessor(HvCall_YieldTimed, tb+tb_ticks_per_jiffy);
  484. /*
  485. * The decrementer stops during the yield. Force a fake decrementer
  486. * here and let the timer_interrupt code sort out the actual time.
  487. */
  488. get_lppaca()->int_dword.fields.decr_int = 1;
  489. ppc64_runlatch_on();
  490. process_iSeries_events();
  491. }
  492. static void iseries_shared_idle(void)
  493. {
  494. while (1) {
  495. while (!need_resched() && !hvlpevent_is_pending()) {
  496. local_irq_disable();
  497. ppc64_runlatch_off();
  498. /* Recheck with irqs off */
  499. if (!need_resched() && !hvlpevent_is_pending())
  500. yield_shared_processor();
  501. HMT_medium();
  502. local_irq_enable();
  503. }
  504. ppc64_runlatch_on();
  505. if (hvlpevent_is_pending())
  506. process_iSeries_events();
  507. preempt_enable_no_resched();
  508. schedule();
  509. preempt_disable();
  510. }
  511. }
  512. static void iseries_dedicated_idle(void)
  513. {
  514. set_thread_flag(TIF_POLLING_NRFLAG);
  515. while (1) {
  516. if (!need_resched()) {
  517. while (!need_resched()) {
  518. ppc64_runlatch_off();
  519. HMT_low();
  520. if (hvlpevent_is_pending()) {
  521. HMT_medium();
  522. ppc64_runlatch_on();
  523. process_iSeries_events();
  524. }
  525. }
  526. HMT_medium();
  527. }
  528. ppc64_runlatch_on();
  529. preempt_enable_no_resched();
  530. schedule();
  531. preempt_disable();
  532. }
  533. }
  534. #ifndef CONFIG_PCI
  535. void __init iSeries_init_IRQ(void) { }
  536. #endif
  537. static void __iomem *iseries_ioremap(phys_addr_t address, unsigned long size,
  538. unsigned long flags)
  539. {
  540. return (void __iomem *)address;
  541. }
  542. static void iseries_iounmap(volatile void __iomem *token)
  543. {
  544. }
  545. static int __init iseries_probe(void)
  546. {
  547. unsigned long root = of_get_flat_dt_root();
  548. if (!of_flat_dt_is_compatible(root, "IBM,iSeries"))
  549. return 0;
  550. hpte_init_iSeries();
  551. /* iSeries does not support 16M pages */
  552. cur_cpu_spec->cpu_features &= ~CPU_FTR_16M_PAGE;
  553. return 1;
  554. }
  555. define_machine(iseries) {
  556. .name = "iSeries",
  557. .setup_arch = iSeries_setup_arch,
  558. .show_cpuinfo = iSeries_show_cpuinfo,
  559. .init_IRQ = iSeries_init_IRQ,
  560. .get_irq = iSeries_get_irq,
  561. .init_early = iSeries_init_early,
  562. .pcibios_fixup = iSeries_pci_final_fixup,
  563. .restart = mf_reboot,
  564. .power_off = mf_power_off,
  565. .halt = mf_power_off,
  566. .get_boot_time = iSeries_get_boot_time,
  567. .set_rtc_time = iSeries_set_rtc_time,
  568. .get_rtc_time = iSeries_get_rtc_time,
  569. .calibrate_decr = generic_calibrate_decr,
  570. .progress = iSeries_progress,
  571. .probe = iseries_probe,
  572. .ioremap = iseries_ioremap,
  573. .iounmap = iseries_iounmap,
  574. /* XXX Implement enable_pmcs for iSeries */
  575. };
  576. void * __init iSeries_early_setup(void)
  577. {
  578. unsigned long phys_mem_size;
  579. /* Identify CPU type. This is done again by the common code later
  580. * on but calling this function multiple times is fine.
  581. */
  582. identify_cpu(0, mfspr(SPRN_PVR));
  583. powerpc_firmware_features |= FW_FEATURE_ISERIES;
  584. powerpc_firmware_features |= FW_FEATURE_LPAR;
  585. iSeries_fixup_klimit();
  586. /*
  587. * Initialize the table which translate Linux physical addresses to
  588. * AS/400 absolute addresses
  589. */
  590. phys_mem_size = build_iSeries_Memory_Map();
  591. iSeries_get_cmdline();
  592. return (void *) __pa(build_flat_dt(phys_mem_size));
  593. }
  594. static void hvputc(char c)
  595. {
  596. if (c == '\n')
  597. hvputc('\r');
  598. HvCall_writeLogBuffer(&c, 1);
  599. }
  600. void __init udbg_init_iseries(void)
  601. {
  602. udbg_putc = hvputc;
  603. }