mpc866ads.dts 3.2 KB

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  1. /*
  2. * MPC866 ADS Device Tree Source
  3. *
  4. * Copyright 2006 MontaVista Software, Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. */
  11. / {
  12. model = "MPC866ADS";
  13. compatible = "mpc8xx";
  14. #address-cells = <1>;
  15. #size-cells = <1>;
  16. cpus {
  17. #address-cells = <1>;
  18. #size-cells = <0>;
  19. PowerPC,866@0 {
  20. device_type = "cpu";
  21. reg = <0>;
  22. d-cache-line-size = <20>; // 32 bytes
  23. i-cache-line-size = <20>; // 32 bytes
  24. d-cache-size = <2000>; // L1, 8K
  25. i-cache-size = <4000>; // L1, 16K
  26. timebase-frequency = <0>;
  27. bus-frequency = <0>;
  28. clock-frequency = <0>;
  29. 32-bit;
  30. interrupts = <f 2>; // decrementer interrupt
  31. interrupt-parent = <&Mpc8xx_pic>;
  32. };
  33. };
  34. memory {
  35. device_type = "memory";
  36. reg = <00000000 800000>;
  37. };
  38. soc866@ff000000 {
  39. #address-cells = <1>;
  40. #size-cells = <1>;
  41. #interrupt-cells = <2>;
  42. device_type = "soc";
  43. ranges = <0 ff000000 00100000>;
  44. reg = <ff000000 00000200>;
  45. bus-frequency = <0>;
  46. mdio@e80 {
  47. device_type = "mdio";
  48. compatible = "fs_enet";
  49. reg = <e80 8>;
  50. #address-cells = <1>;
  51. #size-cells = <0>;
  52. phy: ethernet-phy@f {
  53. reg = <f>;
  54. device_type = "ethernet-phy";
  55. };
  56. };
  57. fec@e00 {
  58. device_type = "network";
  59. compatible = "fs_enet";
  60. model = "FEC";
  61. device-id = <1>;
  62. reg = <e00 188>;
  63. mac-address = [ 00 00 0C 00 01 FD ];
  64. interrupts = <3 1>;
  65. interrupt-parent = <&Mpc8xx_pic>;
  66. phy-handle = <&Phy>;
  67. };
  68. mpc8xx_pic: pic@ff000000 {
  69. interrupt-controller;
  70. #address-cells = <0>;
  71. #interrupt-cells = <2>;
  72. reg = <0 24>;
  73. built-in;
  74. device_type = "mpc8xx-pic";
  75. compatible = "CPM";
  76. };
  77. cpm@ff000000 {
  78. #address-cells = <1>;
  79. #size-cells = <1>;
  80. #interrupt-cells = <2>;
  81. device_type = "cpm";
  82. model = "CPM";
  83. ranges = <0 0 4000>;
  84. reg = <860 f0>;
  85. command-proc = <9c0>;
  86. brg-frequency = <0>;
  87. interrupts = <0 2>; // cpm error interrupt
  88. interrupt-parent = <&Cpm_pic>;
  89. cpm_pic: pic@930 {
  90. interrupt-controller;
  91. #address-cells = <0>;
  92. #interrupt-cells = <2>;
  93. interrupts = <5 2 0 2>;
  94. interrupt-parent = <&Mpc8xx_pic>;
  95. reg = <930 20>;
  96. built-in;
  97. device_type = "cpm-pic";
  98. compatible = "CPM";
  99. };
  100. smc@a80 {
  101. device_type = "serial";
  102. compatible = "cpm_uart";
  103. model = "SMC";
  104. device-id = <1>;
  105. reg = <a80 10 3e80 40>;
  106. clock-setup = <00ffffff 0>;
  107. rx-clock = <1>;
  108. tx-clock = <1>;
  109. current-speed = <0>;
  110. interrupts = <4 3>;
  111. interrupt-parent = <&Cpm_pic>;
  112. };
  113. smc@a90 {
  114. device_type = "serial";
  115. compatible = "cpm_uart";
  116. model = "SMC";
  117. device-id = <2>;
  118. reg = <a90 20 3f80 40>;
  119. clock-setup = <ff00ffff 90000>;
  120. rx-clock = <2>;
  121. tx-clock = <2>;
  122. current-speed = <0>;
  123. interrupts = <3 3>;
  124. interrupt-parent = <&Cpm_pic>;
  125. };
  126. scc@a00 {
  127. device_type = "network";
  128. compatible = "fs_enet";
  129. model = "SCC";
  130. device-id = <1>;
  131. reg = <a00 18 3c00 80>;
  132. mac-address = [ 00 00 0C 00 03 FD ];
  133. interrupts = <1e 3>;
  134. interrupt-parent = <&Cpm_pic>;
  135. };
  136. };
  137. };
  138. };