mpc8641_hpcn.dts 9.6 KB

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  1. /*
  2. * MPC8641 HPCN Device Tree Source
  3. *
  4. * Copyright 2006 Freescale Semiconductor Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. */
  11. / {
  12. model = "MPC8641HPCN";
  13. compatible = "mpc86xx";
  14. #address-cells = <1>;
  15. #size-cells = <1>;
  16. cpus {
  17. #address-cells = <1>;
  18. #size-cells = <0>;
  19. PowerPC,8641@0 {
  20. device_type = "cpu";
  21. reg = <0>;
  22. d-cache-line-size = <20>; // 32 bytes
  23. i-cache-line-size = <20>; // 32 bytes
  24. d-cache-size = <8000>; // L1, 32K
  25. i-cache-size = <8000>; // L1, 32K
  26. timebase-frequency = <0>; // 33 MHz, from uboot
  27. bus-frequency = <0>; // From uboot
  28. clock-frequency = <0>; // From uboot
  29. 32-bit;
  30. };
  31. PowerPC,8641@1 {
  32. device_type = "cpu";
  33. reg = <1>;
  34. d-cache-line-size = <20>; // 32 bytes
  35. i-cache-line-size = <20>; // 32 bytes
  36. d-cache-size = <8000>; // L1, 32K
  37. i-cache-size = <8000>; // L1, 32K
  38. timebase-frequency = <0>; // 33 MHz, from uboot
  39. bus-frequency = <0>; // From uboot
  40. clock-frequency = <0>; // From uboot
  41. 32-bit;
  42. };
  43. };
  44. memory {
  45. device_type = "memory";
  46. reg = <00000000 40000000>; // 1G at 0x0
  47. };
  48. soc8641@f8000000 {
  49. #address-cells = <1>;
  50. #size-cells = <1>;
  51. #interrupt-cells = <2>;
  52. device_type = "soc";
  53. ranges = <00001000 f8001000 000ff000
  54. 80000000 80000000 20000000
  55. e2000000 e2000000 00100000
  56. a0000000 a0000000 20000000
  57. e3000000 e3000000 00100000>;
  58. reg = <f8000000 00001000>; // CCSRBAR
  59. bus-frequency = <0>;
  60. i2c@3000 {
  61. device_type = "i2c";
  62. compatible = "fsl-i2c";
  63. reg = <3000 100>;
  64. interrupts = <2b 2>;
  65. interrupt-parent = <&mpic>;
  66. dfsrr;
  67. };
  68. i2c@3100 {
  69. device_type = "i2c";
  70. compatible = "fsl-i2c";
  71. reg = <3100 100>;
  72. interrupts = <2b 2>;
  73. interrupt-parent = <&mpic>;
  74. dfsrr;
  75. };
  76. mdio@24520 {
  77. #address-cells = <1>;
  78. #size-cells = <0>;
  79. device_type = "mdio";
  80. compatible = "gianfar";
  81. reg = <24520 20>;
  82. phy0: ethernet-phy@0 {
  83. interrupt-parent = <&mpic>;
  84. interrupts = <a 1>;
  85. reg = <0>;
  86. device_type = "ethernet-phy";
  87. };
  88. phy1: ethernet-phy@1 {
  89. interrupt-parent = <&mpic>;
  90. interrupts = <a 1>;
  91. reg = <1>;
  92. device_type = "ethernet-phy";
  93. };
  94. phy2: ethernet-phy@2 {
  95. interrupt-parent = <&mpic>;
  96. interrupts = <a 1>;
  97. reg = <2>;
  98. device_type = "ethernet-phy";
  99. };
  100. phy3: ethernet-phy@3 {
  101. interrupt-parent = <&mpic>;
  102. interrupts = <a 1>;
  103. reg = <3>;
  104. device_type = "ethernet-phy";
  105. };
  106. };
  107. ethernet@24000 {
  108. #address-cells = <1>;
  109. #size-cells = <0>;
  110. device_type = "network";
  111. model = "TSEC";
  112. compatible = "gianfar";
  113. reg = <24000 1000>;
  114. /*
  115. * mac-address is deprecated and will be removed
  116. * in 2.6.25. Only recent versions of
  117. * U-Boot support local-mac-address, however.
  118. */
  119. mac-address = [ 00 00 00 00 00 00 ];
  120. local-mac-address = [ 00 00 00 00 00 00 ];
  121. interrupts = <1d 2 1e 2 22 2>;
  122. interrupt-parent = <&mpic>;
  123. phy-handle = <&phy0>;
  124. };
  125. ethernet@25000 {
  126. #address-cells = <1>;
  127. #size-cells = <0>;
  128. device_type = "network";
  129. model = "TSEC";
  130. compatible = "gianfar";
  131. reg = <25000 1000>;
  132. /*
  133. * mac-address is deprecated and will be removed
  134. * in 2.6.25. Only recent versions of
  135. * U-Boot support local-mac-address, however.
  136. */
  137. mac-address = [ 00 00 00 00 00 00 ];
  138. local-mac-address = [ 00 00 00 00 00 00 ];
  139. interrupts = <23 2 24 2 28 2>;
  140. interrupt-parent = <&mpic>;
  141. phy-handle = <&phy1>;
  142. };
  143. ethernet@26000 {
  144. #address-cells = <1>;
  145. #size-cells = <0>;
  146. device_type = "network";
  147. model = "TSEC";
  148. compatible = "gianfar";
  149. reg = <26000 1000>;
  150. /*
  151. * mac-address is deprecated and will be removed
  152. * in 2.6.25. Only recent versions of
  153. * U-Boot support local-mac-address, however.
  154. */
  155. mac-address = [ 00 00 00 00 00 00 ];
  156. local-mac-address = [ 00 00 00 00 00 00 ];
  157. interrupts = <1F 2 20 2 21 2>;
  158. interrupt-parent = <&mpic>;
  159. phy-handle = <&phy2>;
  160. };
  161. ethernet@27000 {
  162. #address-cells = <1>;
  163. #size-cells = <0>;
  164. device_type = "network";
  165. model = "TSEC";
  166. compatible = "gianfar";
  167. reg = <27000 1000>;
  168. /*
  169. * mac-address is deprecated and will be removed
  170. * in 2.6.25. Only recent versions of
  171. * U-Boot support local-mac-address, however.
  172. */
  173. mac-address = [ 00 00 00 00 00 00 ];
  174. local-mac-address = [ 00 00 00 00 00 00 ];
  175. interrupts = <25 2 26 2 27 2>;
  176. interrupt-parent = <&mpic>;
  177. phy-handle = <&phy3>;
  178. };
  179. serial@4500 {
  180. device_type = "serial";
  181. compatible = "ns16550";
  182. reg = <4500 100>;
  183. clock-frequency = <0>;
  184. interrupts = <2a 2>;
  185. interrupt-parent = <&mpic>;
  186. };
  187. serial@4600 {
  188. device_type = "serial";
  189. compatible = "ns16550";
  190. reg = <4600 100>;
  191. clock-frequency = <0>;
  192. interrupts = <1c 2>;
  193. interrupt-parent = <&mpic>;
  194. };
  195. pci@8000 {
  196. compatible = "86xx";
  197. device_type = "pci";
  198. #interrupt-cells = <1>;
  199. #size-cells = <2>;
  200. #address-cells = <3>;
  201. reg = <8000 1000>;
  202. bus-range = <0 ff>;
  203. ranges = <02000000 0 80000000 80000000 0 20000000
  204. 01000000 0 00000000 e2000000 0 00100000>;
  205. clock-frequency = <1fca055>;
  206. interrupt-parent = <&mpic>;
  207. interrupts = <18 2>;
  208. interrupt-map-mask = <f800 0 0 7>;
  209. interrupt-map = <
  210. /* IDSEL 0x11 */
  211. 8800 0 0 1 &i8259 3 2
  212. 8800 0 0 2 &i8259 4 2
  213. 8800 0 0 3 &i8259 5 2
  214. 8800 0 0 4 &i8259 6 2
  215. /* IDSEL 0x12 */
  216. 9000 0 0 1 &i8259 4 2
  217. 9000 0 0 2 &i8259 5 2
  218. 9000 0 0 3 &i8259 6 2
  219. 9000 0 0 4 &i8259 3 2
  220. /* IDSEL 0x13 */
  221. 9800 0 0 1 &i8259 0 0
  222. 9800 0 0 2 &i8259 0 0
  223. 9800 0 0 3 &i8259 0 0
  224. 9800 0 0 4 &i8259 0 0
  225. /* IDSEL 0x14 */
  226. a000 0 0 1 &i8259 0 0
  227. a000 0 0 2 &i8259 0 0
  228. a000 0 0 3 &i8259 0 0
  229. a000 0 0 4 &i8259 0 0
  230. /* IDSEL 0x15 */
  231. a800 0 0 1 &i8259 0 0
  232. a800 0 0 2 &i8259 0 0
  233. a800 0 0 3 &i8259 0 0
  234. a800 0 0 4 &i8259 0 0
  235. /* IDSEL 0x16 */
  236. b000 0 0 1 &i8259 0 0
  237. b000 0 0 2 &i8259 0 0
  238. b000 0 0 3 &i8259 0 0
  239. b000 0 0 4 &i8259 0 0
  240. /* IDSEL 0x17 */
  241. b800 0 0 1 &i8259 0 0
  242. b800 0 0 2 &i8259 0 0
  243. b800 0 0 3 &i8259 0 0
  244. b800 0 0 4 &i8259 0 0
  245. /* IDSEL 0x18 */
  246. c000 0 0 1 &i8259 0 0
  247. c000 0 0 2 &i8259 0 0
  248. c000 0 0 3 &i8259 0 0
  249. c000 0 0 4 &i8259 0 0
  250. /* IDSEL 0x19 */
  251. c800 0 0 1 &i8259 0 0
  252. c800 0 0 2 &i8259 0 0
  253. c800 0 0 3 &i8259 0 0
  254. c800 0 0 4 &i8259 0 0
  255. /* IDSEL 0x1a */
  256. d000 0 0 1 &i8259 6 2
  257. d000 0 0 2 &i8259 3 2
  258. d000 0 0 3 &i8259 4 2
  259. d000 0 0 4 &i8259 5 2
  260. /* IDSEL 0x1b */
  261. d800 0 0 1 &i8259 5 2
  262. d800 0 0 2 &i8259 0 0
  263. d800 0 0 3 &i8259 0 0
  264. d800 0 0 4 &i8259 0 0
  265. /* IDSEL 0x1c */
  266. e000 0 0 1 &i8259 9 2
  267. e000 0 0 2 &i8259 a 2
  268. e000 0 0 3 &i8259 c 2
  269. e000 0 0 4 &i8259 7 2
  270. /* IDSEL 0x1d */
  271. e800 0 0 1 &i8259 9 2
  272. e800 0 0 2 &i8259 a 2
  273. e800 0 0 3 &i8259 b 2
  274. e800 0 0 4 &i8259 0 0
  275. /* IDSEL 0x1e */
  276. f000 0 0 1 &i8259 c 2
  277. f000 0 0 2 &i8259 0 0
  278. f000 0 0 3 &i8259 0 0
  279. f000 0 0 4 &i8259 0 0
  280. /* IDSEL 0x1f */
  281. f800 0 0 1 &i8259 6 2
  282. f800 0 0 2 &i8259 0 0
  283. f800 0 0 3 &i8259 0 0
  284. f800 0 0 4 &i8259 0 0
  285. >;
  286. uli1575@0 {
  287. reg = <0 0 0 0 0>;
  288. #size-cells = <2>;
  289. #address-cells = <3>;
  290. ranges = <02000000 0 80000000
  291. 02000000 0 80000000
  292. 0 20000000
  293. 01000000 0 00000000
  294. 01000000 0 00000000
  295. 0 00100000>;
  296. pci_bridge@0 {
  297. reg = <0 0 0 0 0>;
  298. #size-cells = <2>;
  299. #address-cells = <3>;
  300. ranges = <02000000 0 80000000
  301. 02000000 0 80000000
  302. 0 20000000
  303. 01000000 0 00000000
  304. 01000000 0 00000000
  305. 0 00100000>;
  306. isa@1e {
  307. device_type = "isa";
  308. #interrupt-cells = <2>;
  309. #size-cells = <1>;
  310. #address-cells = <2>;
  311. reg = <f000 0 0 0 0>;
  312. ranges = <1 0 01000000 0 0
  313. 00001000>;
  314. interrupt-parent = <&i8259>;
  315. i8259: interrupt-controller@20 {
  316. reg = <1 20 2
  317. 1 a0 2
  318. 1 4d0 2>;
  319. clock-frequency = <0>;
  320. interrupt-controller;
  321. device_type = "interrupt-controller";
  322. #address-cells = <0>;
  323. #interrupt-cells = <2>;
  324. built-in;
  325. compatible = "chrp,iic";
  326. interrupts = <9 2>;
  327. interrupt-parent =
  328. <&mpic>;
  329. };
  330. i8042@60 {
  331. #size-cells = <0>;
  332. #address-cells = <1>;
  333. reg = <1 60 1 1 64 1>;
  334. interrupts = <1 3 c 3>;
  335. interrupt-parent =
  336. <&i8259>;
  337. keyboard@0 {
  338. reg = <0>;
  339. compatible = "pnpPNP,303";
  340. };
  341. mouse@1 {
  342. reg = <1>;
  343. compatible = "pnpPNP,f03";
  344. };
  345. };
  346. rtc@70 {
  347. compatible =
  348. "pnpPNP,b00";
  349. reg = <1 70 2>;
  350. };
  351. gpio@400 {
  352. reg = <1 400 80>;
  353. };
  354. };
  355. };
  356. };
  357. };
  358. pci@9000 {
  359. compatible = "86xx";
  360. device_type = "pci";
  361. #interrupt-cells = <1>;
  362. #size-cells = <2>;
  363. #address-cells = <3>;
  364. reg = <9000 1000>;
  365. bus-range = <0 ff>;
  366. ranges = <02000000 0 a0000000 a0000000 0 20000000
  367. 01000000 0 00000000 e3000000 0 00100000>;
  368. clock-frequency = <1fca055>;
  369. interrupt-parent = <&mpic>;
  370. interrupts = <19 2>;
  371. interrupt-map-mask = <f800 0 0 7>;
  372. interrupt-map = <
  373. /* IDSEL 0x0 */
  374. 0000 0 0 1 &mpic 4 1
  375. 0000 0 0 2 &mpic 5 1
  376. 0000 0 0 3 &mpic 6 1
  377. 0000 0 0 4 &mpic 7 1
  378. >;
  379. };
  380. mpic: pic@40000 {
  381. clock-frequency = <0>;
  382. interrupt-controller;
  383. #address-cells = <0>;
  384. #interrupt-cells = <2>;
  385. reg = <40000 40000>;
  386. built-in;
  387. compatible = "chrp,open-pic";
  388. device_type = "open-pic";
  389. big-endian;
  390. };
  391. };
  392. };