mpc8568mds.dts 9.1 KB

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  1. /*
  2. * MPC8568E MDS Device Tree Source
  3. *
  4. * Copyright 2007 Freescale Semiconductor Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. */
  11. /*
  12. /memreserve/ 00000000 1000000;
  13. */
  14. / {
  15. model = "MPC8568EMDS";
  16. compatible = "MPC8568EMDS", "MPC85xxMDS";
  17. #address-cells = <1>;
  18. #size-cells = <1>;
  19. cpus {
  20. #address-cells = <1>;
  21. #size-cells = <0>;
  22. PowerPC,8568@0 {
  23. device_type = "cpu";
  24. reg = <0>;
  25. d-cache-line-size = <20>; // 32 bytes
  26. i-cache-line-size = <20>; // 32 bytes
  27. d-cache-size = <8000>; // L1, 32K
  28. i-cache-size = <8000>; // L1, 32K
  29. timebase-frequency = <0>;
  30. bus-frequency = <0>;
  31. clock-frequency = <0>;
  32. 32-bit;
  33. };
  34. };
  35. memory {
  36. device_type = "memory";
  37. reg = <00000000 10000000>;
  38. };
  39. bcsr@f8000000 {
  40. device_type = "board-control";
  41. reg = <f8000000 8000>;
  42. };
  43. soc8568@e0000000 {
  44. #address-cells = <1>;
  45. #size-cells = <1>;
  46. #interrupt-cells = <2>;
  47. device_type = "soc";
  48. ranges = <0 e0000000 00100000>;
  49. reg = <e0000000 00100000>;
  50. bus-frequency = <0>;
  51. memory-controller@2000 {
  52. compatible = "fsl,8568-memory-controller";
  53. reg = <2000 1000>;
  54. interrupt-parent = <&mpic>;
  55. interrupts = <12 2>;
  56. };
  57. l2-cache-controller@20000 {
  58. compatible = "fsl,8568-l2-cache-controller";
  59. reg = <20000 1000>;
  60. cache-line-size = <20>; // 32 bytes
  61. cache-size = <80000>; // L2, 512K
  62. interrupt-parent = <&mpic>;
  63. interrupts = <10 2>;
  64. };
  65. i2c@3000 {
  66. device_type = "i2c";
  67. compatible = "fsl-i2c";
  68. reg = <3000 100>;
  69. interrupts = <2b 2>;
  70. interrupt-parent = <&mpic>;
  71. dfsrr;
  72. };
  73. i2c@3100 {
  74. device_type = "i2c";
  75. compatible = "fsl-i2c";
  76. reg = <3100 100>;
  77. interrupts = <2b 2>;
  78. interrupt-parent = <&mpic>;
  79. dfsrr;
  80. };
  81. mdio@24520 {
  82. #address-cells = <1>;
  83. #size-cells = <0>;
  84. device_type = "mdio";
  85. compatible = "gianfar";
  86. reg = <24520 20>;
  87. phy0: ethernet-phy@0 {
  88. interrupt-parent = <&mpic>;
  89. interrupts = <1 1>;
  90. reg = <0>;
  91. device_type = "ethernet-phy";
  92. };
  93. phy1: ethernet-phy@1 {
  94. interrupt-parent = <&mpic>;
  95. interrupts = <2 1>;
  96. reg = <1>;
  97. device_type = "ethernet-phy";
  98. };
  99. phy2: ethernet-phy@2 {
  100. interrupt-parent = <&mpic>;
  101. interrupts = <1 1>;
  102. reg = <2>;
  103. device_type = "ethernet-phy";
  104. };
  105. phy3: ethernet-phy@3 {
  106. interrupt-parent = <&mpic>;
  107. interrupts = <2 1>;
  108. reg = <3>;
  109. device_type = "ethernet-phy";
  110. };
  111. };
  112. ethernet@24000 {
  113. #address-cells = <1>;
  114. #size-cells = <0>;
  115. device_type = "network";
  116. model = "eTSEC";
  117. compatible = "gianfar";
  118. reg = <24000 1000>;
  119. /*
  120. * mac-address is deprecated and will be removed
  121. * in 2.6.25. Only recent versions of
  122. * U-Boot support local-mac-address, however.
  123. */
  124. mac-address = [ 00 00 00 00 00 00 ];
  125. local-mac-address = [ 00 00 00 00 00 00 ];
  126. interrupts = <1d 2 1e 2 22 2>;
  127. interrupt-parent = <&mpic>;
  128. phy-handle = <&phy2>;
  129. };
  130. ethernet@25000 {
  131. #address-cells = <1>;
  132. #size-cells = <0>;
  133. device_type = "network";
  134. model = "eTSEC";
  135. compatible = "gianfar";
  136. reg = <25000 1000>;
  137. /*
  138. * mac-address is deprecated and will be removed
  139. * in 2.6.25. Only recent versions of
  140. * U-Boot support local-mac-address, however.
  141. */
  142. mac-address = [ 00 00 00 00 00 00 ];
  143. local-mac-address = [ 00 00 00 00 00 00 ];
  144. interrupts = <23 2 24 2 28 2>;
  145. interrupt-parent = <&mpic>;
  146. phy-handle = <&phy3>;
  147. };
  148. serial@4500 {
  149. device_type = "serial";
  150. compatible = "ns16550";
  151. reg = <4500 100>;
  152. clock-frequency = <0>;
  153. interrupts = <2a 2>;
  154. interrupt-parent = <&mpic>;
  155. };
  156. serial@4600 {
  157. device_type = "serial";
  158. compatible = "ns16550";
  159. reg = <4600 100>;
  160. clock-frequency = <0>;
  161. interrupts = <2a 2>;
  162. interrupt-parent = <&mpic>;
  163. };
  164. crypto@30000 {
  165. device_type = "crypto";
  166. model = "SEC2";
  167. compatible = "talitos";
  168. reg = <30000 f000>;
  169. interrupts = <2d 2>;
  170. interrupt-parent = <&mpic>;
  171. num-channels = <4>;
  172. channel-fifo-len = <18>;
  173. exec-units-mask = <000000fe>;
  174. descriptor-types-mask = <012b0ebf>;
  175. };
  176. mpic: pic@40000 {
  177. clock-frequency = <0>;
  178. interrupt-controller;
  179. #address-cells = <0>;
  180. #interrupt-cells = <2>;
  181. reg = <40000 40000>;
  182. built-in;
  183. compatible = "chrp,open-pic";
  184. device_type = "open-pic";
  185. big-endian;
  186. };
  187. par_io@e0100 {
  188. reg = <e0100 100>;
  189. device_type = "par_io";
  190. num-ports = <7>;
  191. pio1: ucc_pin@01 {
  192. pio-map = <
  193. /* port pin dir open_drain assignment has_irq */
  194. 4 0a 1 0 2 0 /* TxD0 */
  195. 4 09 1 0 2 0 /* TxD1 */
  196. 4 08 1 0 2 0 /* TxD2 */
  197. 4 07 1 0 2 0 /* TxD3 */
  198. 4 17 1 0 2 0 /* TxD4 */
  199. 4 16 1 0 2 0 /* TxD5 */
  200. 4 15 1 0 2 0 /* TxD6 */
  201. 4 14 1 0 2 0 /* TxD7 */
  202. 4 0f 2 0 2 0 /* RxD0 */
  203. 4 0e 2 0 2 0 /* RxD1 */
  204. 4 0d 2 0 2 0 /* RxD2 */
  205. 4 0c 2 0 2 0 /* RxD3 */
  206. 4 1d 2 0 2 0 /* RxD4 */
  207. 4 1c 2 0 2 0 /* RxD5 */
  208. 4 1b 2 0 2 0 /* RxD6 */
  209. 4 1a 2 0 2 0 /* RxD7 */
  210. 4 0b 1 0 2 0 /* TX_EN */
  211. 4 18 1 0 2 0 /* TX_ER */
  212. 4 0f 2 0 2 0 /* RX_DV */
  213. 4 1e 2 0 2 0 /* RX_ER */
  214. 4 11 2 0 2 0 /* RX_CLK */
  215. 4 13 1 0 2 0 /* GTX_CLK */
  216. 1 1f 2 0 3 0>; /* GTX125 */
  217. };
  218. pio2: ucc_pin@02 {
  219. pio-map = <
  220. /* port pin dir open_drain assignment has_irq */
  221. 5 0a 1 0 2 0 /* TxD0 */
  222. 5 09 1 0 2 0 /* TxD1 */
  223. 5 08 1 0 2 0 /* TxD2 */
  224. 5 07 1 0 2 0 /* TxD3 */
  225. 5 17 1 0 2 0 /* TxD4 */
  226. 5 16 1 0 2 0 /* TxD5 */
  227. 5 15 1 0 2 0 /* TxD6 */
  228. 5 14 1 0 2 0 /* TxD7 */
  229. 5 0f 2 0 2 0 /* RxD0 */
  230. 5 0e 2 0 2 0 /* RxD1 */
  231. 5 0d 2 0 2 0 /* RxD2 */
  232. 5 0c 2 0 2 0 /* RxD3 */
  233. 5 1d 2 0 2 0 /* RxD4 */
  234. 5 1c 2 0 2 0 /* RxD5 */
  235. 5 1b 2 0 2 0 /* RxD6 */
  236. 5 1a 2 0 2 0 /* RxD7 */
  237. 5 0b 1 0 2 0 /* TX_EN */
  238. 5 18 1 0 2 0 /* TX_ER */
  239. 5 10 2 0 2 0 /* RX_DV */
  240. 5 1e 2 0 2 0 /* RX_ER */
  241. 5 11 2 0 2 0 /* RX_CLK */
  242. 5 13 1 0 2 0 /* GTX_CLK */
  243. 1 1f 2 0 3 0 /* GTX125 */
  244. 4 06 3 0 2 0 /* MDIO */
  245. 4 05 1 0 2 0>; /* MDC */
  246. };
  247. };
  248. };
  249. qe@e0080000 {
  250. #address-cells = <1>;
  251. #size-cells = <1>;
  252. device_type = "qe";
  253. model = "QE";
  254. ranges = <0 e0080000 00040000>;
  255. reg = <e0080000 480>;
  256. brg-frequency = <0>;
  257. bus-frequency = <179A7B00>;
  258. muram@10000 {
  259. device_type = "muram";
  260. ranges = <0 00010000 0000c000>;
  261. data-only@0{
  262. reg = <0 c000>;
  263. };
  264. };
  265. spi@4c0 {
  266. device_type = "spi";
  267. compatible = "fsl_spi";
  268. reg = <4c0 40>;
  269. interrupts = <2>;
  270. interrupt-parent = <&qeic>;
  271. mode = "cpu";
  272. };
  273. spi@500 {
  274. device_type = "spi";
  275. compatible = "fsl_spi";
  276. reg = <500 40>;
  277. interrupts = <1>;
  278. interrupt-parent = <&qeic>;
  279. mode = "cpu";
  280. };
  281. ucc@2000 {
  282. device_type = "network";
  283. compatible = "ucc_geth";
  284. model = "UCC";
  285. device-id = <1>;
  286. reg = <2000 200>;
  287. interrupts = <20>;
  288. interrupt-parent = <&qeic>;
  289. /*
  290. * mac-address is deprecated and will be removed
  291. * in 2.6.25. Only recent versions of
  292. * U-Boot support local-mac-address, however.
  293. */
  294. mac-address = [ 00 00 00 00 00 00 ];
  295. local-mac-address = [ 00 00 00 00 00 00 ];
  296. rx-clock = <0>;
  297. tx-clock = <19>;
  298. phy-handle = <&qe_phy0>;
  299. phy-connection-type = "gmii";
  300. pio-handle = <&pio1>;
  301. };
  302. ucc@3000 {
  303. device_type = "network";
  304. compatible = "ucc_geth";
  305. model = "UCC";
  306. device-id = <2>;
  307. reg = <3000 200>;
  308. interrupts = <21>;
  309. interrupt-parent = <&qeic>;
  310. /*
  311. * mac-address is deprecated and will be removed
  312. * in 2.6.25. Only recent versions of
  313. * U-Boot support local-mac-address, however.
  314. */
  315. mac-address = [ 00 00 00 00 00 00 ];
  316. local-mac-address = [ 00 00 00 00 00 00 ];
  317. rx-clock = <0>;
  318. tx-clock = <14>;
  319. phy-handle = <&qe_phy1>;
  320. phy-connection-type = "gmii";
  321. pio-handle = <&pio2>;
  322. };
  323. mdio@2120 {
  324. #address-cells = <1>;
  325. #size-cells = <0>;
  326. reg = <2120 18>;
  327. device_type = "mdio";
  328. compatible = "ucc_geth_phy";
  329. /* These are the same PHYs as on
  330. * gianfar's MDIO bus */
  331. qe_phy0: ethernet-phy@00 {
  332. interrupt-parent = <&mpic>;
  333. interrupts = <1 1>;
  334. reg = <0>;
  335. device_type = "ethernet-phy";
  336. };
  337. qe_phy1: ethernet-phy@01 {
  338. interrupt-parent = <&mpic>;
  339. interrupts = <2 1>;
  340. reg = <1>;
  341. device_type = "ethernet-phy";
  342. };
  343. qe_phy2: ethernet-phy@02 {
  344. interrupt-parent = <&mpic>;
  345. interrupts = <1 1>;
  346. reg = <2>;
  347. device_type = "ethernet-phy";
  348. };
  349. qe_phy3: ethernet-phy@03 {
  350. interrupt-parent = <&mpic>;
  351. interrupts = <2 1>;
  352. reg = <3>;
  353. device_type = "ethernet-phy";
  354. };
  355. };
  356. qeic: qeic@80 {
  357. interrupt-controller;
  358. device_type = "qeic";
  359. #address-cells = <0>;
  360. #interrupt-cells = <1>;
  361. reg = <80 80>;
  362. built-in;
  363. big-endian;
  364. interrupts = <2e 2 2e 2>; //high:30 low:30
  365. interrupt-parent = <&mpic>;
  366. };
  367. };
  368. };