mpc7448hpc2.dts 4.1 KB

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  1. /*
  2. * MPC7448HPC2 (Taiga) board Device Tree Source
  3. *
  4. * Copyright 2006 Freescale Semiconductor Inc.
  5. * 2006 Roy Zang <Roy Zang at freescale.com>.
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License as published by the
  9. * Free Software Foundation; either version 2 of the License, or (at your
  10. * option) any later version.
  11. */
  12. / {
  13. model = "mpc7448hpc2";
  14. compatible = "mpc74xx";
  15. #address-cells = <1>;
  16. #size-cells = <1>;
  17. cpus {
  18. #address-cells = <1>;
  19. #size-cells =<0>;
  20. PowerPC,7448@0 {
  21. device_type = "cpu";
  22. reg = <0>;
  23. d-cache-line-size = <20>; // 32 bytes
  24. i-cache-line-size = <20>; // 32 bytes
  25. d-cache-size = <8000>; // L1, 32K bytes
  26. i-cache-size = <8000>; // L1, 32K bytes
  27. timebase-frequency = <0>; // 33 MHz, from uboot
  28. clock-frequency = <0>; // From U-Boot
  29. bus-frequency = <0>; // From U-Boot
  30. 32-bit;
  31. };
  32. };
  33. memory {
  34. device_type = "memory";
  35. reg = <00000000 20000000 // DDR2 512M at 0
  36. >;
  37. };
  38. tsi108@c0000000 {
  39. #address-cells = <1>;
  40. #size-cells = <1>;
  41. #interrupt-cells = <2>;
  42. device_type = "tsi108-bridge";
  43. ranges = <00000000 c0000000 00010000>;
  44. reg = <c0000000 00010000>;
  45. bus-frequency = <0>;
  46. i2c@7000 {
  47. interrupt-parent = <&mpic>;
  48. interrupts = <E 0>;
  49. reg = <7000 400>;
  50. device_type = "i2c";
  51. compatible = "tsi108-i2c";
  52. };
  53. MDIO: mdio@6000 {
  54. device_type = "mdio";
  55. compatible = "tsi108-mdio";
  56. reg = <6000 50>;
  57. #address-cells = <1>;
  58. #size-cells = <0>;
  59. phy8: ethernet-phy@8 {
  60. interrupt-parent = <&mpic>;
  61. interrupts = <2 1>;
  62. reg = <8>;
  63. };
  64. phy9: ethernet-phy@9 {
  65. interrupt-parent = <&mpic>;
  66. interrupts = <2 1>;
  67. reg = <9>;
  68. };
  69. };
  70. ethernet@6200 {
  71. #size-cells = <0>;
  72. device_type = "network";
  73. compatible = "tsi108-ethernet";
  74. reg = <6000 200>;
  75. address = [ 00 06 D2 00 00 01 ];
  76. interrupts = <10 2>;
  77. interrupt-parent = <&mpic>;
  78. mdio-handle = <&MDIO>;
  79. phy-handle = <&phy8>;
  80. };
  81. ethernet@6600 {
  82. #address-cells = <1>;
  83. #size-cells = <0>;
  84. device_type = "network";
  85. compatible = "tsi108-ethernet";
  86. reg = <6400 200>;
  87. address = [ 00 06 D2 00 00 02 ];
  88. interrupts = <11 2>;
  89. interrupt-parent = <&mpic>;
  90. mdio-handle = <&MDIO>;
  91. phy-handle = <&phy9>;
  92. };
  93. serial@7808 {
  94. device_type = "serial";
  95. compatible = "ns16550";
  96. reg = <7808 200>;
  97. clock-frequency = <3f6b5a00>;
  98. interrupts = <c 0>;
  99. interrupt-parent = <&mpic>;
  100. };
  101. serial@7c08 {
  102. device_type = "serial";
  103. compatible = "ns16550";
  104. reg = <7c08 200>;
  105. clock-frequency = <3f6b5a00>;
  106. interrupts = <d 0>;
  107. interrupt-parent = <&mpic>;
  108. };
  109. mpic: pic@7400 {
  110. clock-frequency = <0>;
  111. interrupt-controller;
  112. #address-cells = <0>;
  113. #interrupt-cells = <2>;
  114. reg = <7400 400>;
  115. built-in;
  116. compatible = "chrp,open-pic";
  117. device_type = "open-pic";
  118. big-endian;
  119. };
  120. pci@1000 {
  121. compatible = "tsi108-pci";
  122. device_type = "pci";
  123. #interrupt-cells = <1>;
  124. #size-cells = <2>;
  125. #address-cells = <3>;
  126. reg = <1000 1000>;
  127. bus-range = <0 0>;
  128. ranges = <02000000 0 e0000000 e0000000 0 1A000000
  129. 01000000 0 00000000 fa000000 0 00010000>;
  130. clock-frequency = <7f28154>;
  131. interrupt-parent = <&mpic>;
  132. interrupts = <17 2>;
  133. interrupt-map-mask = <f800 0 0 7>;
  134. interrupt-map = <
  135. /* IDSEL 0x11 */
  136. 0800 0 0 1 &RT0 24 0
  137. 0800 0 0 2 &RT0 25 0
  138. 0800 0 0 3 &RT0 26 0
  139. 0800 0 0 4 &RT0 27 0
  140. /* IDSEL 0x12 */
  141. 1000 0 0 1 &RT0 25 0
  142. 1000 0 0 2 &RT0 26 0
  143. 1000 0 0 3 &RT0 27 0
  144. 1000 0 0 4 &RT0 24 0
  145. /* IDSEL 0x13 */
  146. 1800 0 0 1 &RT0 26 0
  147. 1800 0 0 2 &RT0 27 0
  148. 1800 0 0 3 &RT0 24 0
  149. 1800 0 0 4 &RT0 25 0
  150. /* IDSEL 0x14 */
  151. 2000 0 0 1 &RT0 27 0
  152. 2000 0 0 2 &RT0 24 0
  153. 2000 0 0 3 &RT0 25 0
  154. 2000 0 0 4 &RT0 26 0
  155. >;
  156. RT0: router@1180 {
  157. clock-frequency = <0>;
  158. interrupt-controller;
  159. device_type = "pic-router";
  160. #address-cells = <0>;
  161. #interrupt-cells = <2>;
  162. built-in;
  163. big-endian;
  164. interrupts = <17 2>;
  165. interrupt-parent = <&mpic>;
  166. };
  167. };
  168. };
  169. };