powernow-k8.c 37 KB

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  1. /*
  2. * (c) 2003-2006 Advanced Micro Devices, Inc.
  3. * Your use of this code is subject to the terms and conditions of the
  4. * GNU general public license version 2. See "COPYING" or
  5. * http://www.gnu.org/licenses/gpl.html
  6. *
  7. * Support : mark.langsdorf@amd.com
  8. *
  9. * Based on the powernow-k7.c module written by Dave Jones.
  10. * (C) 2003 Dave Jones <davej@codemonkey.org.uk> on behalf of SuSE Labs
  11. * (C) 2004 Dominik Brodowski <linux@brodo.de>
  12. * (C) 2004 Pavel Machek <pavel@suse.cz>
  13. * Licensed under the terms of the GNU GPL License version 2.
  14. * Based upon datasheets & sample CPUs kindly provided by AMD.
  15. *
  16. * Valuable input gratefully received from Dave Jones, Pavel Machek,
  17. * Dominik Brodowski, Jacob Shin, and others.
  18. * Originally developed by Paul Devriendt.
  19. * Processor information obtained from Chapter 9 (Power and Thermal Management)
  20. * of the "BIOS and Kernel Developer's Guide for the AMD Athlon 64 and AMD
  21. * Opteron Processors" available for download from www.amd.com
  22. *
  23. * Tables for specific CPUs can be inferred from
  24. * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/30430.pdf
  25. */
  26. #include <linux/kernel.h>
  27. #include <linux/smp.h>
  28. #include <linux/module.h>
  29. #include <linux/init.h>
  30. #include <linux/cpufreq.h>
  31. #include <linux/slab.h>
  32. #include <linux/string.h>
  33. #include <linux/cpumask.h>
  34. #include <linux/sched.h> /* for current / set_cpus_allowed() */
  35. #include <asm/msr.h>
  36. #include <asm/io.h>
  37. #include <asm/delay.h>
  38. #ifdef CONFIG_X86_POWERNOW_K8_ACPI
  39. #include <linux/acpi.h>
  40. #include <linux/mutex.h>
  41. #include <acpi/processor.h>
  42. #endif
  43. #define PFX "powernow-k8: "
  44. #define BFX PFX "BIOS error: "
  45. #define VERSION "version 2.00.00"
  46. #include "powernow-k8.h"
  47. /* serialize freq changes */
  48. static DEFINE_MUTEX(fidvid_mutex);
  49. static struct powernow_k8_data *powernow_data[NR_CPUS];
  50. static int cpu_family = CPU_OPTERON;
  51. #ifndef CONFIG_SMP
  52. static cpumask_t cpu_core_map[1];
  53. #endif
  54. /* Return a frequency in MHz, given an input fid */
  55. static u32 find_freq_from_fid(u32 fid)
  56. {
  57. return 800 + (fid * 100);
  58. }
  59. /* Return a frequency in KHz, given an input fid */
  60. static u32 find_khz_freq_from_fid(u32 fid)
  61. {
  62. return 1000 * find_freq_from_fid(fid);
  63. }
  64. /* Return a frequency in MHz, given an input fid and did */
  65. static u32 find_freq_from_fiddid(u32 fid, u32 did)
  66. {
  67. return 100 * (fid + 0x10) >> did;
  68. }
  69. static u32 find_khz_freq_from_fiddid(u32 fid, u32 did)
  70. {
  71. return 1000 * find_freq_from_fiddid(fid, did);
  72. }
  73. static u32 find_fid_from_pstate(u32 pstate)
  74. {
  75. u32 hi, lo;
  76. rdmsr(MSR_PSTATE_DEF_BASE + pstate, lo, hi);
  77. return lo & HW_PSTATE_FID_MASK;
  78. }
  79. static u32 find_did_from_pstate(u32 pstate)
  80. {
  81. u32 hi, lo;
  82. rdmsr(MSR_PSTATE_DEF_BASE + pstate, lo, hi);
  83. return (lo & HW_PSTATE_DID_MASK) >> HW_PSTATE_DID_SHIFT;
  84. }
  85. /* Return the vco fid for an input fid
  86. *
  87. * Each "low" fid has corresponding "high" fid, and you can get to "low" fids
  88. * only from corresponding high fids. This returns "high" fid corresponding to
  89. * "low" one.
  90. */
  91. static u32 convert_fid_to_vco_fid(u32 fid)
  92. {
  93. if (fid < HI_FID_TABLE_BOTTOM)
  94. return 8 + (2 * fid);
  95. else
  96. return fid;
  97. }
  98. /*
  99. * Return 1 if the pending bit is set. Unless we just instructed the processor
  100. * to transition to a new state, seeing this bit set is really bad news.
  101. */
  102. static int pending_bit_stuck(void)
  103. {
  104. u32 lo, hi;
  105. if (cpu_family == CPU_HW_PSTATE)
  106. return 0;
  107. rdmsr(MSR_FIDVID_STATUS, lo, hi);
  108. return lo & MSR_S_LO_CHANGE_PENDING ? 1 : 0;
  109. }
  110. /*
  111. * Update the global current fid / vid values from the status msr.
  112. * Returns 1 on error.
  113. */
  114. static int query_current_values_with_pending_wait(struct powernow_k8_data *data)
  115. {
  116. u32 lo, hi;
  117. u32 i = 0;
  118. if (cpu_family == CPU_HW_PSTATE) {
  119. rdmsr(MSR_PSTATE_STATUS, lo, hi);
  120. i = lo & HW_PSTATE_MASK;
  121. rdmsr(MSR_PSTATE_DEF_BASE + i, lo, hi);
  122. data->currfid = lo & HW_PSTATE_FID_MASK;
  123. data->currdid = (lo & HW_PSTATE_DID_MASK) >> HW_PSTATE_DID_SHIFT;
  124. return 0;
  125. }
  126. do {
  127. if (i++ > 10000) {
  128. dprintk("detected change pending stuck\n");
  129. return 1;
  130. }
  131. rdmsr(MSR_FIDVID_STATUS, lo, hi);
  132. } while (lo & MSR_S_LO_CHANGE_PENDING);
  133. data->currvid = hi & MSR_S_HI_CURRENT_VID;
  134. data->currfid = lo & MSR_S_LO_CURRENT_FID;
  135. return 0;
  136. }
  137. /* the isochronous relief time */
  138. static void count_off_irt(struct powernow_k8_data *data)
  139. {
  140. udelay((1 << data->irt) * 10);
  141. return;
  142. }
  143. /* the voltage stabalization time */
  144. static void count_off_vst(struct powernow_k8_data *data)
  145. {
  146. udelay(data->vstable * VST_UNITS_20US);
  147. return;
  148. }
  149. /* need to init the control msr to a safe value (for each cpu) */
  150. static void fidvid_msr_init(void)
  151. {
  152. u32 lo, hi;
  153. u8 fid, vid;
  154. rdmsr(MSR_FIDVID_STATUS, lo, hi);
  155. vid = hi & MSR_S_HI_CURRENT_VID;
  156. fid = lo & MSR_S_LO_CURRENT_FID;
  157. lo = fid | (vid << MSR_C_LO_VID_SHIFT);
  158. hi = MSR_C_HI_STP_GNT_BENIGN;
  159. dprintk("cpu%d, init lo 0x%x, hi 0x%x\n", smp_processor_id(), lo, hi);
  160. wrmsr(MSR_FIDVID_CTL, lo, hi);
  161. }
  162. /* write the new fid value along with the other control fields to the msr */
  163. static int write_new_fid(struct powernow_k8_data *data, u32 fid)
  164. {
  165. u32 lo;
  166. u32 savevid = data->currvid;
  167. u32 i = 0;
  168. if ((fid & INVALID_FID_MASK) || (data->currvid & INVALID_VID_MASK)) {
  169. printk(KERN_ERR PFX "internal error - overflow on fid write\n");
  170. return 1;
  171. }
  172. lo = fid | (data->currvid << MSR_C_LO_VID_SHIFT) | MSR_C_LO_INIT_FID_VID;
  173. dprintk("writing fid 0x%x, lo 0x%x, hi 0x%x\n",
  174. fid, lo, data->plllock * PLL_LOCK_CONVERSION);
  175. do {
  176. wrmsr(MSR_FIDVID_CTL, lo, data->plllock * PLL_LOCK_CONVERSION);
  177. if (i++ > 100) {
  178. printk(KERN_ERR PFX "Hardware error - pending bit very stuck - no further pstate changes possible\n");
  179. return 1;
  180. }
  181. } while (query_current_values_with_pending_wait(data));
  182. count_off_irt(data);
  183. if (savevid != data->currvid) {
  184. printk(KERN_ERR PFX "vid change on fid trans, old 0x%x, new 0x%x\n",
  185. savevid, data->currvid);
  186. return 1;
  187. }
  188. if (fid != data->currfid) {
  189. printk(KERN_ERR PFX "fid trans failed, fid 0x%x, curr 0x%x\n", fid,
  190. data->currfid);
  191. return 1;
  192. }
  193. return 0;
  194. }
  195. /* Write a new vid to the hardware */
  196. static int write_new_vid(struct powernow_k8_data *data, u32 vid)
  197. {
  198. u32 lo;
  199. u32 savefid = data->currfid;
  200. int i = 0;
  201. if ((data->currfid & INVALID_FID_MASK) || (vid & INVALID_VID_MASK)) {
  202. printk(KERN_ERR PFX "internal error - overflow on vid write\n");
  203. return 1;
  204. }
  205. lo = data->currfid | (vid << MSR_C_LO_VID_SHIFT) | MSR_C_LO_INIT_FID_VID;
  206. dprintk("writing vid 0x%x, lo 0x%x, hi 0x%x\n",
  207. vid, lo, STOP_GRANT_5NS);
  208. do {
  209. wrmsr(MSR_FIDVID_CTL, lo, STOP_GRANT_5NS);
  210. if (i++ > 100) {
  211. printk(KERN_ERR PFX "internal error - pending bit very stuck - no further pstate changes possible\n");
  212. return 1;
  213. }
  214. } while (query_current_values_with_pending_wait(data));
  215. if (savefid != data->currfid) {
  216. printk(KERN_ERR PFX "fid changed on vid trans, old 0x%x new 0x%x\n",
  217. savefid, data->currfid);
  218. return 1;
  219. }
  220. if (vid != data->currvid) {
  221. printk(KERN_ERR PFX "vid trans failed, vid 0x%x, curr 0x%x\n", vid,
  222. data->currvid);
  223. return 1;
  224. }
  225. return 0;
  226. }
  227. /*
  228. * Reduce the vid by the max of step or reqvid.
  229. * Decreasing vid codes represent increasing voltages:
  230. * vid of 0 is 1.550V, vid of 0x1e is 0.800V, vid of VID_OFF is off.
  231. */
  232. static int decrease_vid_code_by_step(struct powernow_k8_data *data, u32 reqvid, u32 step)
  233. {
  234. if ((data->currvid - reqvid) > step)
  235. reqvid = data->currvid - step;
  236. if (write_new_vid(data, reqvid))
  237. return 1;
  238. count_off_vst(data);
  239. return 0;
  240. }
  241. /* Change hardware pstate by single MSR write */
  242. static int transition_pstate(struct powernow_k8_data *data, u32 pstate)
  243. {
  244. wrmsr(MSR_PSTATE_CTRL, pstate, 0);
  245. data->currfid = find_fid_from_pstate(pstate);
  246. return 0;
  247. }
  248. /* Change Opteron/Athlon64 fid and vid, by the 3 phases. */
  249. static int transition_fid_vid(struct powernow_k8_data *data, u32 reqfid, u32 reqvid)
  250. {
  251. if (core_voltage_pre_transition(data, reqvid))
  252. return 1;
  253. if (core_frequency_transition(data, reqfid))
  254. return 1;
  255. if (core_voltage_post_transition(data, reqvid))
  256. return 1;
  257. if (query_current_values_with_pending_wait(data))
  258. return 1;
  259. if ((reqfid != data->currfid) || (reqvid != data->currvid)) {
  260. printk(KERN_ERR PFX "failed (cpu%d): req 0x%x 0x%x, curr 0x%x 0x%x\n",
  261. smp_processor_id(),
  262. reqfid, reqvid, data->currfid, data->currvid);
  263. return 1;
  264. }
  265. dprintk("transitioned (cpu%d): new fid 0x%x, vid 0x%x\n",
  266. smp_processor_id(), data->currfid, data->currvid);
  267. return 0;
  268. }
  269. /* Phase 1 - core voltage transition ... setup voltage */
  270. static int core_voltage_pre_transition(struct powernow_k8_data *data, u32 reqvid)
  271. {
  272. u32 rvosteps = data->rvo;
  273. u32 savefid = data->currfid;
  274. u32 maxvid, lo;
  275. dprintk("ph1 (cpu%d): start, currfid 0x%x, currvid 0x%x, reqvid 0x%x, rvo 0x%x\n",
  276. smp_processor_id(),
  277. data->currfid, data->currvid, reqvid, data->rvo);
  278. rdmsr(MSR_FIDVID_STATUS, lo, maxvid);
  279. maxvid = 0x1f & (maxvid >> 16);
  280. dprintk("ph1 maxvid=0x%x\n", maxvid);
  281. if (reqvid < maxvid) /* lower numbers are higher voltages */
  282. reqvid = maxvid;
  283. while (data->currvid > reqvid) {
  284. dprintk("ph1: curr 0x%x, req vid 0x%x\n",
  285. data->currvid, reqvid);
  286. if (decrease_vid_code_by_step(data, reqvid, data->vidmvs))
  287. return 1;
  288. }
  289. while ((rvosteps > 0) && ((data->rvo + data->currvid) > reqvid)) {
  290. if (data->currvid == maxvid) {
  291. rvosteps = 0;
  292. } else {
  293. dprintk("ph1: changing vid for rvo, req 0x%x\n",
  294. data->currvid - 1);
  295. if (decrease_vid_code_by_step(data, data->currvid - 1, 1))
  296. return 1;
  297. rvosteps--;
  298. }
  299. }
  300. if (query_current_values_with_pending_wait(data))
  301. return 1;
  302. if (savefid != data->currfid) {
  303. printk(KERN_ERR PFX "ph1 err, currfid changed 0x%x\n", data->currfid);
  304. return 1;
  305. }
  306. dprintk("ph1 complete, currfid 0x%x, currvid 0x%x\n",
  307. data->currfid, data->currvid);
  308. return 0;
  309. }
  310. /* Phase 2 - core frequency transition */
  311. static int core_frequency_transition(struct powernow_k8_data *data, u32 reqfid)
  312. {
  313. u32 vcoreqfid, vcocurrfid, vcofiddiff, fid_interval, savevid = data->currvid;
  314. if ((reqfid < HI_FID_TABLE_BOTTOM) && (data->currfid < HI_FID_TABLE_BOTTOM)) {
  315. printk(KERN_ERR PFX "ph2: illegal lo-lo transition 0x%x 0x%x\n",
  316. reqfid, data->currfid);
  317. return 1;
  318. }
  319. if (data->currfid == reqfid) {
  320. printk(KERN_ERR PFX "ph2 null fid transition 0x%x\n", data->currfid);
  321. return 0;
  322. }
  323. dprintk("ph2 (cpu%d): starting, currfid 0x%x, currvid 0x%x, reqfid 0x%x\n",
  324. smp_processor_id(),
  325. data->currfid, data->currvid, reqfid);
  326. vcoreqfid = convert_fid_to_vco_fid(reqfid);
  327. vcocurrfid = convert_fid_to_vco_fid(data->currfid);
  328. vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid
  329. : vcoreqfid - vcocurrfid;
  330. while (vcofiddiff > 2) {
  331. (data->currfid & 1) ? (fid_interval = 1) : (fid_interval = 2);
  332. if (reqfid > data->currfid) {
  333. if (data->currfid > LO_FID_TABLE_TOP) {
  334. if (write_new_fid(data, data->currfid + fid_interval)) {
  335. return 1;
  336. }
  337. } else {
  338. if (write_new_fid
  339. (data, 2 + convert_fid_to_vco_fid(data->currfid))) {
  340. return 1;
  341. }
  342. }
  343. } else {
  344. if (write_new_fid(data, data->currfid - fid_interval))
  345. return 1;
  346. }
  347. vcocurrfid = convert_fid_to_vco_fid(data->currfid);
  348. vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid
  349. : vcoreqfid - vcocurrfid;
  350. }
  351. if (write_new_fid(data, reqfid))
  352. return 1;
  353. if (query_current_values_with_pending_wait(data))
  354. return 1;
  355. if (data->currfid != reqfid) {
  356. printk(KERN_ERR PFX
  357. "ph2: mismatch, failed fid transition, curr 0x%x, req 0x%x\n",
  358. data->currfid, reqfid);
  359. return 1;
  360. }
  361. if (savevid != data->currvid) {
  362. printk(KERN_ERR PFX "ph2: vid changed, save 0x%x, curr 0x%x\n",
  363. savevid, data->currvid);
  364. return 1;
  365. }
  366. dprintk("ph2 complete, currfid 0x%x, currvid 0x%x\n",
  367. data->currfid, data->currvid);
  368. return 0;
  369. }
  370. /* Phase 3 - core voltage transition flow ... jump to the final vid. */
  371. static int core_voltage_post_transition(struct powernow_k8_data *data, u32 reqvid)
  372. {
  373. u32 savefid = data->currfid;
  374. u32 savereqvid = reqvid;
  375. dprintk("ph3 (cpu%d): starting, currfid 0x%x, currvid 0x%x\n",
  376. smp_processor_id(),
  377. data->currfid, data->currvid);
  378. if (reqvid != data->currvid) {
  379. if (write_new_vid(data, reqvid))
  380. return 1;
  381. if (savefid != data->currfid) {
  382. printk(KERN_ERR PFX
  383. "ph3: bad fid change, save 0x%x, curr 0x%x\n",
  384. savefid, data->currfid);
  385. return 1;
  386. }
  387. if (data->currvid != reqvid) {
  388. printk(KERN_ERR PFX
  389. "ph3: failed vid transition\n, req 0x%x, curr 0x%x",
  390. reqvid, data->currvid);
  391. return 1;
  392. }
  393. }
  394. if (query_current_values_with_pending_wait(data))
  395. return 1;
  396. if (savereqvid != data->currvid) {
  397. dprintk("ph3 failed, currvid 0x%x\n", data->currvid);
  398. return 1;
  399. }
  400. if (savefid != data->currfid) {
  401. dprintk("ph3 failed, currfid changed 0x%x\n",
  402. data->currfid);
  403. return 1;
  404. }
  405. dprintk("ph3 complete, currfid 0x%x, currvid 0x%x\n",
  406. data->currfid, data->currvid);
  407. return 0;
  408. }
  409. static int check_supported_cpu(unsigned int cpu)
  410. {
  411. cpumask_t oldmask = CPU_MASK_ALL;
  412. u32 eax, ebx, ecx, edx;
  413. unsigned int rc = 0;
  414. oldmask = current->cpus_allowed;
  415. set_cpus_allowed(current, cpumask_of_cpu(cpu));
  416. if (smp_processor_id() != cpu) {
  417. printk(KERN_ERR PFX "limiting to cpu %u failed\n", cpu);
  418. goto out;
  419. }
  420. if (current_cpu_data.x86_vendor != X86_VENDOR_AMD)
  421. goto out;
  422. eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
  423. if (((eax & CPUID_XFAM) != CPUID_XFAM_K8) &&
  424. ((eax & CPUID_XFAM) < CPUID_XFAM_10H))
  425. goto out;
  426. if ((eax & CPUID_XFAM) == CPUID_XFAM_K8) {
  427. if (((eax & CPUID_USE_XFAM_XMOD) != CPUID_USE_XFAM_XMOD) ||
  428. ((eax & CPUID_XMOD) > CPUID_XMOD_REV_MASK)) {
  429. printk(KERN_INFO PFX "Processor cpuid %x not supported\n", eax);
  430. goto out;
  431. }
  432. eax = cpuid_eax(CPUID_GET_MAX_CAPABILITIES);
  433. if (eax < CPUID_FREQ_VOLT_CAPABILITIES) {
  434. printk(KERN_INFO PFX
  435. "No frequency change capabilities detected\n");
  436. goto out;
  437. }
  438. cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx);
  439. if ((edx & P_STATE_TRANSITION_CAPABLE) != P_STATE_TRANSITION_CAPABLE) {
  440. printk(KERN_INFO PFX "Power state transitions not supported\n");
  441. goto out;
  442. }
  443. } else { /* must be a HW Pstate capable processor */
  444. cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx);
  445. if ((edx & USE_HW_PSTATE) == USE_HW_PSTATE)
  446. cpu_family = CPU_HW_PSTATE;
  447. else
  448. goto out;
  449. }
  450. rc = 1;
  451. out:
  452. set_cpus_allowed(current, oldmask);
  453. return rc;
  454. }
  455. static int check_pst_table(struct powernow_k8_data *data, struct pst_s *pst, u8 maxvid)
  456. {
  457. unsigned int j;
  458. u8 lastfid = 0xff;
  459. for (j = 0; j < data->numps; j++) {
  460. if (pst[j].vid > LEAST_VID) {
  461. printk(KERN_ERR PFX "vid %d invalid : 0x%x\n", j, pst[j].vid);
  462. return -EINVAL;
  463. }
  464. if (pst[j].vid < data->rvo) { /* vid + rvo >= 0 */
  465. printk(KERN_ERR BFX "0 vid exceeded with pstate %d\n", j);
  466. return -ENODEV;
  467. }
  468. if (pst[j].vid < maxvid + data->rvo) { /* vid + rvo >= maxvid */
  469. printk(KERN_ERR BFX "maxvid exceeded with pstate %d\n", j);
  470. return -ENODEV;
  471. }
  472. if (pst[j].fid > MAX_FID) {
  473. printk(KERN_ERR BFX "maxfid exceeded with pstate %d\n", j);
  474. return -ENODEV;
  475. }
  476. if (j && (pst[j].fid < HI_FID_TABLE_BOTTOM)) {
  477. /* Only first fid is allowed to be in "low" range */
  478. printk(KERN_ERR BFX "two low fids - %d : 0x%x\n", j, pst[j].fid);
  479. return -EINVAL;
  480. }
  481. if (pst[j].fid < lastfid)
  482. lastfid = pst[j].fid;
  483. }
  484. if (lastfid & 1) {
  485. printk(KERN_ERR BFX "lastfid invalid\n");
  486. return -EINVAL;
  487. }
  488. if (lastfid > LO_FID_TABLE_TOP)
  489. printk(KERN_INFO BFX "first fid not from lo freq table\n");
  490. return 0;
  491. }
  492. static void print_basics(struct powernow_k8_data *data)
  493. {
  494. int j;
  495. for (j = 0; j < data->numps; j++) {
  496. if (data->powernow_table[j].frequency != CPUFREQ_ENTRY_INVALID) {
  497. if (cpu_family == CPU_HW_PSTATE) {
  498. printk(KERN_INFO PFX " %d : fid 0x%x did 0x%x (%d MHz)\n",
  499. j,
  500. (data->powernow_table[j].index & 0xff00) >> 8,
  501. (data->powernow_table[j].index & 0xff0000) >> 16,
  502. data->powernow_table[j].frequency/1000);
  503. } else {
  504. printk(KERN_INFO PFX " %d : fid 0x%x (%d MHz), vid 0x%x\n",
  505. j,
  506. data->powernow_table[j].index & 0xff,
  507. data->powernow_table[j].frequency/1000,
  508. data->powernow_table[j].index >> 8);
  509. }
  510. }
  511. }
  512. if (data->batps)
  513. printk(KERN_INFO PFX "Only %d pstates on battery\n", data->batps);
  514. }
  515. static int fill_powernow_table(struct powernow_k8_data *data, struct pst_s *pst, u8 maxvid)
  516. {
  517. struct cpufreq_frequency_table *powernow_table;
  518. unsigned int j;
  519. if (data->batps) { /* use ACPI support to get full speed on mains power */
  520. printk(KERN_WARNING PFX "Only %d pstates usable (use ACPI driver for full range\n", data->batps);
  521. data->numps = data->batps;
  522. }
  523. for ( j=1; j<data->numps; j++ ) {
  524. if (pst[j-1].fid >= pst[j].fid) {
  525. printk(KERN_ERR PFX "PST out of sequence\n");
  526. return -EINVAL;
  527. }
  528. }
  529. if (data->numps < 2) {
  530. printk(KERN_ERR PFX "no p states to transition\n");
  531. return -ENODEV;
  532. }
  533. if (check_pst_table(data, pst, maxvid))
  534. return -EINVAL;
  535. powernow_table = kmalloc((sizeof(struct cpufreq_frequency_table)
  536. * (data->numps + 1)), GFP_KERNEL);
  537. if (!powernow_table) {
  538. printk(KERN_ERR PFX "powernow_table memory alloc failure\n");
  539. return -ENOMEM;
  540. }
  541. for (j = 0; j < data->numps; j++) {
  542. powernow_table[j].index = pst[j].fid; /* lower 8 bits */
  543. powernow_table[j].index |= (pst[j].vid << 8); /* upper 8 bits */
  544. powernow_table[j].frequency = find_khz_freq_from_fid(pst[j].fid);
  545. }
  546. powernow_table[data->numps].frequency = CPUFREQ_TABLE_END;
  547. powernow_table[data->numps].index = 0;
  548. if (query_current_values_with_pending_wait(data)) {
  549. kfree(powernow_table);
  550. return -EIO;
  551. }
  552. dprintk("cfid 0x%x, cvid 0x%x\n", data->currfid, data->currvid);
  553. data->powernow_table = powernow_table;
  554. if (first_cpu(cpu_core_map[data->cpu]) == data->cpu)
  555. print_basics(data);
  556. for (j = 0; j < data->numps; j++)
  557. if ((pst[j].fid==data->currfid) && (pst[j].vid==data->currvid))
  558. return 0;
  559. dprintk("currfid/vid do not match PST, ignoring\n");
  560. return 0;
  561. }
  562. /* Find and validate the PSB/PST table in BIOS. */
  563. static int find_psb_table(struct powernow_k8_data *data)
  564. {
  565. struct psb_s *psb;
  566. unsigned int i;
  567. u32 mvs;
  568. u8 maxvid;
  569. u32 cpst = 0;
  570. u32 thiscpuid;
  571. for (i = 0xc0000; i < 0xffff0; i += 0x10) {
  572. /* Scan BIOS looking for the signature. */
  573. /* It can not be at ffff0 - it is too big. */
  574. psb = phys_to_virt(i);
  575. if (memcmp(psb, PSB_ID_STRING, PSB_ID_STRING_LEN) != 0)
  576. continue;
  577. dprintk("found PSB header at 0x%p\n", psb);
  578. dprintk("table vers: 0x%x\n", psb->tableversion);
  579. if (psb->tableversion != PSB_VERSION_1_4) {
  580. printk(KERN_ERR BFX "PSB table is not v1.4\n");
  581. return -ENODEV;
  582. }
  583. dprintk("flags: 0x%x\n", psb->flags1);
  584. if (psb->flags1) {
  585. printk(KERN_ERR BFX "unknown flags\n");
  586. return -ENODEV;
  587. }
  588. data->vstable = psb->vstable;
  589. dprintk("voltage stabilization time: %d(*20us)\n", data->vstable);
  590. dprintk("flags2: 0x%x\n", psb->flags2);
  591. data->rvo = psb->flags2 & 3;
  592. data->irt = ((psb->flags2) >> 2) & 3;
  593. mvs = ((psb->flags2) >> 4) & 3;
  594. data->vidmvs = 1 << mvs;
  595. data->batps = ((psb->flags2) >> 6) & 3;
  596. dprintk("ramp voltage offset: %d\n", data->rvo);
  597. dprintk("isochronous relief time: %d\n", data->irt);
  598. dprintk("maximum voltage step: %d - 0x%x\n", mvs, data->vidmvs);
  599. dprintk("numpst: 0x%x\n", psb->num_tables);
  600. cpst = psb->num_tables;
  601. if ((psb->cpuid == 0x00000fc0) || (psb->cpuid == 0x00000fe0) ){
  602. thiscpuid = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
  603. if ((thiscpuid == 0x00000fc0) || (thiscpuid == 0x00000fe0) ) {
  604. cpst = 1;
  605. }
  606. }
  607. if (cpst != 1) {
  608. printk(KERN_ERR BFX "numpst must be 1\n");
  609. return -ENODEV;
  610. }
  611. data->plllock = psb->plllocktime;
  612. dprintk("plllocktime: 0x%x (units 1us)\n", psb->plllocktime);
  613. dprintk("maxfid: 0x%x\n", psb->maxfid);
  614. dprintk("maxvid: 0x%x\n", psb->maxvid);
  615. maxvid = psb->maxvid;
  616. data->numps = psb->numps;
  617. dprintk("numpstates: 0x%x\n", data->numps);
  618. return fill_powernow_table(data, (struct pst_s *)(psb+1), maxvid);
  619. }
  620. /*
  621. * If you see this message, complain to BIOS manufacturer. If
  622. * he tells you "we do not support Linux" or some similar
  623. * nonsense, remember that Windows 2000 uses the same legacy
  624. * mechanism that the old Linux PSB driver uses. Tell them it
  625. * is broken with Windows 2000.
  626. *
  627. * The reference to the AMD documentation is chapter 9 in the
  628. * BIOS and Kernel Developer's Guide, which is available on
  629. * www.amd.com
  630. */
  631. printk(KERN_ERR PFX "BIOS error - no PSB or ACPI _PSS objects\n");
  632. return -ENODEV;
  633. }
  634. #ifdef CONFIG_X86_POWERNOW_K8_ACPI
  635. static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, unsigned int index)
  636. {
  637. if (!data->acpi_data.state_count || (cpu_family == CPU_HW_PSTATE))
  638. return;
  639. data->irt = (data->acpi_data.states[index].control >> IRT_SHIFT) & IRT_MASK;
  640. data->rvo = (data->acpi_data.states[index].control >> RVO_SHIFT) & RVO_MASK;
  641. data->exttype = (data->acpi_data.states[index].control >> EXT_TYPE_SHIFT) & EXT_TYPE_MASK;
  642. data->plllock = (data->acpi_data.states[index].control >> PLL_L_SHIFT) & PLL_L_MASK;
  643. data->vidmvs = 1 << ((data->acpi_data.states[index].control >> MVS_SHIFT) & MVS_MASK);
  644. data->vstable = (data->acpi_data.states[index].control >> VST_SHIFT) & VST_MASK;
  645. }
  646. static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
  647. {
  648. struct cpufreq_frequency_table *powernow_table;
  649. int ret_val;
  650. if (acpi_processor_register_performance(&data->acpi_data, data->cpu)) {
  651. dprintk("register performance failed: bad ACPI data\n");
  652. return -EIO;
  653. }
  654. /* verify the data contained in the ACPI structures */
  655. if (data->acpi_data.state_count <= 1) {
  656. dprintk("No ACPI P-States\n");
  657. goto err_out;
  658. }
  659. if ((data->acpi_data.control_register.space_id != ACPI_ADR_SPACE_FIXED_HARDWARE) ||
  660. (data->acpi_data.status_register.space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)) {
  661. dprintk("Invalid control/status registers (%x - %x)\n",
  662. data->acpi_data.control_register.space_id,
  663. data->acpi_data.status_register.space_id);
  664. goto err_out;
  665. }
  666. /* fill in data->powernow_table */
  667. powernow_table = kmalloc((sizeof(struct cpufreq_frequency_table)
  668. * (data->acpi_data.state_count + 1)), GFP_KERNEL);
  669. if (!powernow_table) {
  670. dprintk("powernow_table memory alloc failure\n");
  671. goto err_out;
  672. }
  673. if (cpu_family == CPU_HW_PSTATE)
  674. ret_val = fill_powernow_table_pstate(data, powernow_table);
  675. else
  676. ret_val = fill_powernow_table_fidvid(data, powernow_table);
  677. if (ret_val)
  678. goto err_out_mem;
  679. powernow_table[data->acpi_data.state_count].frequency = CPUFREQ_TABLE_END;
  680. powernow_table[data->acpi_data.state_count].index = 0;
  681. data->powernow_table = powernow_table;
  682. /* fill in data */
  683. data->numps = data->acpi_data.state_count;
  684. if (first_cpu(cpu_core_map[data->cpu]) == data->cpu)
  685. print_basics(data);
  686. powernow_k8_acpi_pst_values(data, 0);
  687. /* notify BIOS that we exist */
  688. acpi_processor_notify_smm(THIS_MODULE);
  689. return 0;
  690. err_out_mem:
  691. kfree(powernow_table);
  692. err_out:
  693. acpi_processor_unregister_performance(&data->acpi_data, data->cpu);
  694. /* data->acpi_data.state_count informs us at ->exit() whether ACPI was used */
  695. data->acpi_data.state_count = 0;
  696. return -ENODEV;
  697. }
  698. static int fill_powernow_table_pstate(struct powernow_k8_data *data, struct cpufreq_frequency_table *powernow_table)
  699. {
  700. int i;
  701. for (i = 0; i < data->acpi_data.state_count; i++) {
  702. u32 index;
  703. u32 hi = 0, lo = 0;
  704. u32 fid;
  705. u32 did;
  706. index = data->acpi_data.states[i].control & HW_PSTATE_MASK;
  707. if (index > MAX_HW_PSTATE) {
  708. printk(KERN_ERR PFX "invalid pstate %d - bad value %d.\n", i, index);
  709. printk(KERN_ERR PFX "Please report to BIOS manufacturer\n");
  710. }
  711. rdmsr(MSR_PSTATE_DEF_BASE + index, lo, hi);
  712. if (!(hi & HW_PSTATE_VALID_MASK)) {
  713. dprintk("invalid pstate %d, ignoring\n", index);
  714. powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
  715. continue;
  716. }
  717. fid = lo & HW_PSTATE_FID_MASK;
  718. did = (lo & HW_PSTATE_DID_MASK) >> HW_PSTATE_DID_SHIFT;
  719. dprintk(" %d : fid 0x%x, did 0x%x\n", index, fid, did);
  720. powernow_table[i].index = index | (fid << HW_FID_INDEX_SHIFT) | (did << HW_DID_INDEX_SHIFT);
  721. powernow_table[i].frequency = find_khz_freq_from_fiddid(fid, did);
  722. if (powernow_table[i].frequency != (data->acpi_data.states[i].core_frequency * 1000)) {
  723. printk(KERN_INFO PFX "invalid freq entries %u kHz vs. %u kHz\n",
  724. powernow_table[i].frequency,
  725. (unsigned int) (data->acpi_data.states[i].core_frequency * 1000));
  726. powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
  727. continue;
  728. }
  729. }
  730. return 0;
  731. }
  732. static int fill_powernow_table_fidvid(struct powernow_k8_data *data, struct cpufreq_frequency_table *powernow_table)
  733. {
  734. int i;
  735. int cntlofreq = 0;
  736. for (i = 0; i < data->acpi_data.state_count; i++) {
  737. u32 fid;
  738. u32 vid;
  739. if (data->exttype) {
  740. fid = data->acpi_data.states[i].status & EXT_FID_MASK;
  741. vid = (data->acpi_data.states[i].status >> VID_SHIFT) & EXT_VID_MASK;
  742. } else {
  743. fid = data->acpi_data.states[i].control & FID_MASK;
  744. vid = (data->acpi_data.states[i].control >> VID_SHIFT) & VID_MASK;
  745. }
  746. dprintk(" %d : fid 0x%x, vid 0x%x\n", i, fid, vid);
  747. powernow_table[i].index = fid; /* lower 8 bits */
  748. powernow_table[i].index |= (vid << 8); /* upper 8 bits */
  749. powernow_table[i].frequency = find_khz_freq_from_fid(fid);
  750. /* verify frequency is OK */
  751. if ((powernow_table[i].frequency > (MAX_FREQ * 1000)) ||
  752. (powernow_table[i].frequency < (MIN_FREQ * 1000))) {
  753. dprintk("invalid freq %u kHz, ignoring\n", powernow_table[i].frequency);
  754. powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
  755. continue;
  756. }
  757. /* verify voltage is OK - BIOSs are using "off" to indicate invalid */
  758. if (vid == VID_OFF) {
  759. dprintk("invalid vid %u, ignoring\n", vid);
  760. powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
  761. continue;
  762. }
  763. /* verify only 1 entry from the lo frequency table */
  764. if (fid < HI_FID_TABLE_BOTTOM) {
  765. if (cntlofreq) {
  766. /* if both entries are the same, ignore this one ... */
  767. if ((powernow_table[i].frequency != powernow_table[cntlofreq].frequency) ||
  768. (powernow_table[i].index != powernow_table[cntlofreq].index)) {
  769. printk(KERN_ERR PFX "Too many lo freq table entries\n");
  770. return 1;
  771. }
  772. dprintk("double low frequency table entry, ignoring it.\n");
  773. powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
  774. continue;
  775. } else
  776. cntlofreq = i;
  777. }
  778. if (powernow_table[i].frequency != (data->acpi_data.states[i].core_frequency * 1000)) {
  779. printk(KERN_INFO PFX "invalid freq entries %u kHz vs. %u kHz\n",
  780. powernow_table[i].frequency,
  781. (unsigned int) (data->acpi_data.states[i].core_frequency * 1000));
  782. powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
  783. continue;
  784. }
  785. }
  786. return 0;
  787. }
  788. static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data)
  789. {
  790. if (data->acpi_data.state_count)
  791. acpi_processor_unregister_performance(&data->acpi_data, data->cpu);
  792. }
  793. #else
  794. static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data) { return -ENODEV; }
  795. static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data) { return; }
  796. static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, unsigned int index) { return; }
  797. #endif /* CONFIG_X86_POWERNOW_K8_ACPI */
  798. /* Take a frequency, and issue the fid/vid transition command */
  799. static int transition_frequency_fidvid(struct powernow_k8_data *data, unsigned int index)
  800. {
  801. u32 fid = 0;
  802. u32 vid = 0;
  803. int res, i;
  804. struct cpufreq_freqs freqs;
  805. dprintk("cpu %d transition to index %u\n", smp_processor_id(), index);
  806. /* fid/vid correctness check for k8 */
  807. /* fid are the lower 8 bits of the index we stored into
  808. * the cpufreq frequency table in find_psb_table, vid
  809. * are the upper 8 bits.
  810. */
  811. fid = data->powernow_table[index].index & 0xFF;
  812. vid = (data->powernow_table[index].index & 0xFF00) >> 8;
  813. dprintk("table matched fid 0x%x, giving vid 0x%x\n", fid, vid);
  814. if (query_current_values_with_pending_wait(data))
  815. return 1;
  816. if ((data->currvid == vid) && (data->currfid == fid)) {
  817. dprintk("target matches current values (fid 0x%x, vid 0x%x)\n",
  818. fid, vid);
  819. return 0;
  820. }
  821. if ((fid < HI_FID_TABLE_BOTTOM) && (data->currfid < HI_FID_TABLE_BOTTOM)) {
  822. printk(KERN_ERR PFX
  823. "ignoring illegal change in lo freq table-%x to 0x%x\n",
  824. data->currfid, fid);
  825. return 1;
  826. }
  827. dprintk("cpu %d, changing to fid 0x%x, vid 0x%x\n",
  828. smp_processor_id(), fid, vid);
  829. freqs.old = find_khz_freq_from_fid(data->currfid);
  830. freqs.new = find_khz_freq_from_fid(fid);
  831. for_each_cpu_mask(i, *(data->available_cores)) {
  832. freqs.cpu = i;
  833. cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
  834. }
  835. res = transition_fid_vid(data, fid, vid);
  836. freqs.new = find_khz_freq_from_fid(data->currfid);
  837. for_each_cpu_mask(i, *(data->available_cores)) {
  838. freqs.cpu = i;
  839. cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
  840. }
  841. return res;
  842. }
  843. /* Take a frequency, and issue the hardware pstate transition command */
  844. static int transition_frequency_pstate(struct powernow_k8_data *data, unsigned int index)
  845. {
  846. u32 fid = 0;
  847. u32 did = 0;
  848. u32 pstate = 0;
  849. int res, i;
  850. struct cpufreq_freqs freqs;
  851. dprintk("cpu %d transition to index %u\n", smp_processor_id(), index);
  852. /* get fid did for hardware pstate transition */
  853. pstate = index & HW_PSTATE_MASK;
  854. if (pstate > MAX_HW_PSTATE)
  855. return 0;
  856. fid = (index & HW_FID_INDEX_MASK) >> HW_FID_INDEX_SHIFT;
  857. did = (index & HW_DID_INDEX_MASK) >> HW_DID_INDEX_SHIFT;
  858. freqs.old = find_khz_freq_from_fiddid(data->currfid, data->currdid);
  859. freqs.new = find_khz_freq_from_fiddid(fid, did);
  860. for_each_cpu_mask(i, *(data->available_cores)) {
  861. freqs.cpu = i;
  862. cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
  863. }
  864. res = transition_pstate(data, pstate);
  865. data->currfid = find_fid_from_pstate(pstate);
  866. data->currdid = find_did_from_pstate(pstate);
  867. freqs.new = find_khz_freq_from_fiddid(data->currfid, data->currdid);
  868. for_each_cpu_mask(i, *(data->available_cores)) {
  869. freqs.cpu = i;
  870. cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
  871. }
  872. return res;
  873. }
  874. /* Driver entry point to switch to the target frequency */
  875. static int powernowk8_target(struct cpufreq_policy *pol, unsigned targfreq, unsigned relation)
  876. {
  877. cpumask_t oldmask = CPU_MASK_ALL;
  878. struct powernow_k8_data *data = powernow_data[pol->cpu];
  879. u32 checkfid;
  880. u32 checkvid;
  881. unsigned int newstate;
  882. int ret = -EIO;
  883. if (!data)
  884. return -EINVAL;
  885. checkfid = data->currfid;
  886. checkvid = data->currvid;
  887. /* only run on specific CPU from here on */
  888. oldmask = current->cpus_allowed;
  889. set_cpus_allowed(current, cpumask_of_cpu(pol->cpu));
  890. if (smp_processor_id() != pol->cpu) {
  891. printk(KERN_ERR PFX "limiting to cpu %u failed\n", pol->cpu);
  892. goto err_out;
  893. }
  894. if (pending_bit_stuck()) {
  895. printk(KERN_ERR PFX "failing targ, change pending bit set\n");
  896. goto err_out;
  897. }
  898. dprintk("targ: cpu %d, %d kHz, min %d, max %d, relation %d\n",
  899. pol->cpu, targfreq, pol->min, pol->max, relation);
  900. if (query_current_values_with_pending_wait(data))
  901. goto err_out;
  902. if (cpu_family == CPU_HW_PSTATE)
  903. dprintk("targ: curr fid 0x%x, did 0x%x\n",
  904. data->currfid, data->currdid);
  905. else {
  906. dprintk("targ: curr fid 0x%x, vid 0x%x\n",
  907. data->currfid, data->currvid);
  908. if ((checkvid != data->currvid) || (checkfid != data->currfid)) {
  909. printk(KERN_INFO PFX
  910. "error - out of sync, fix 0x%x 0x%x, vid 0x%x 0x%x\n",
  911. checkfid, data->currfid, checkvid, data->currvid);
  912. }
  913. }
  914. if (cpufreq_frequency_table_target(pol, data->powernow_table, targfreq, relation, &newstate))
  915. goto err_out;
  916. mutex_lock(&fidvid_mutex);
  917. powernow_k8_acpi_pst_values(data, newstate);
  918. if (cpu_family == CPU_HW_PSTATE)
  919. ret = transition_frequency_pstate(data, newstate);
  920. else
  921. ret = transition_frequency_fidvid(data, newstate);
  922. if (ret) {
  923. printk(KERN_ERR PFX "transition frequency failed\n");
  924. ret = 1;
  925. mutex_unlock(&fidvid_mutex);
  926. goto err_out;
  927. }
  928. mutex_unlock(&fidvid_mutex);
  929. if (cpu_family == CPU_HW_PSTATE)
  930. pol->cur = find_khz_freq_from_fiddid(data->currfid, data->currdid);
  931. else
  932. pol->cur = find_khz_freq_from_fid(data->currfid);
  933. ret = 0;
  934. err_out:
  935. set_cpus_allowed(current, oldmask);
  936. return ret;
  937. }
  938. /* Driver entry point to verify the policy and range of frequencies */
  939. static int powernowk8_verify(struct cpufreq_policy *pol)
  940. {
  941. struct powernow_k8_data *data = powernow_data[pol->cpu];
  942. if (!data)
  943. return -EINVAL;
  944. return cpufreq_frequency_table_verify(pol, data->powernow_table);
  945. }
  946. /* per CPU init entry point to the driver */
  947. static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
  948. {
  949. struct powernow_k8_data *data;
  950. cpumask_t oldmask = CPU_MASK_ALL;
  951. int rc;
  952. if (!cpu_online(pol->cpu))
  953. return -ENODEV;
  954. if (!check_supported_cpu(pol->cpu))
  955. return -ENODEV;
  956. data = kzalloc(sizeof(struct powernow_k8_data), GFP_KERNEL);
  957. if (!data) {
  958. printk(KERN_ERR PFX "unable to alloc powernow_k8_data");
  959. return -ENOMEM;
  960. }
  961. data->cpu = pol->cpu;
  962. if (powernow_k8_cpu_init_acpi(data)) {
  963. /*
  964. * Use the PSB BIOS structure. This is only availabe on
  965. * an UP version, and is deprecated by AMD.
  966. */
  967. if (num_online_cpus() != 1) {
  968. printk(KERN_ERR PFX "MP systems not supported by PSB BIOS structure\n");
  969. kfree(data);
  970. return -ENODEV;
  971. }
  972. if (pol->cpu != 0) {
  973. printk(KERN_ERR PFX "No _PSS objects for CPU other than CPU0\n");
  974. kfree(data);
  975. return -ENODEV;
  976. }
  977. rc = find_psb_table(data);
  978. if (rc) {
  979. kfree(data);
  980. return -ENODEV;
  981. }
  982. }
  983. /* only run on specific CPU from here on */
  984. oldmask = current->cpus_allowed;
  985. set_cpus_allowed(current, cpumask_of_cpu(pol->cpu));
  986. if (smp_processor_id() != pol->cpu) {
  987. printk(KERN_ERR PFX "limiting to cpu %u failed\n", pol->cpu);
  988. goto err_out;
  989. }
  990. if (pending_bit_stuck()) {
  991. printk(KERN_ERR PFX "failing init, change pending bit set\n");
  992. goto err_out;
  993. }
  994. if (query_current_values_with_pending_wait(data))
  995. goto err_out;
  996. if (cpu_family == CPU_OPTERON)
  997. fidvid_msr_init();
  998. /* run on any CPU again */
  999. set_cpus_allowed(current, oldmask);
  1000. pol->governor = CPUFREQ_DEFAULT_GOVERNOR;
  1001. if (cpu_family == CPU_HW_PSTATE)
  1002. pol->cpus = cpumask_of_cpu(pol->cpu);
  1003. else
  1004. pol->cpus = cpu_core_map[pol->cpu];
  1005. data->available_cores = &(pol->cpus);
  1006. /* Take a crude guess here.
  1007. * That guess was in microseconds, so multiply with 1000 */
  1008. pol->cpuinfo.transition_latency = (((data->rvo + 8) * data->vstable * VST_UNITS_20US)
  1009. + (3 * (1 << data->irt) * 10)) * 1000;
  1010. if (cpu_family == CPU_HW_PSTATE)
  1011. pol->cur = find_khz_freq_from_fiddid(data->currfid, data->currdid);
  1012. else
  1013. pol->cur = find_khz_freq_from_fid(data->currfid);
  1014. dprintk("policy current frequency %d kHz\n", pol->cur);
  1015. /* min/max the cpu is capable of */
  1016. if (cpufreq_frequency_table_cpuinfo(pol, data->powernow_table)) {
  1017. printk(KERN_ERR PFX "invalid powernow_table\n");
  1018. powernow_k8_cpu_exit_acpi(data);
  1019. kfree(data->powernow_table);
  1020. kfree(data);
  1021. return -EINVAL;
  1022. }
  1023. cpufreq_frequency_table_get_attr(data->powernow_table, pol->cpu);
  1024. if (cpu_family == CPU_HW_PSTATE)
  1025. dprintk("cpu_init done, current fid 0x%x, did 0x%x\n",
  1026. data->currfid, data->currdid);
  1027. else
  1028. dprintk("cpu_init done, current fid 0x%x, vid 0x%x\n",
  1029. data->currfid, data->currvid);
  1030. powernow_data[pol->cpu] = data;
  1031. return 0;
  1032. err_out:
  1033. set_cpus_allowed(current, oldmask);
  1034. powernow_k8_cpu_exit_acpi(data);
  1035. kfree(data);
  1036. return -ENODEV;
  1037. }
  1038. static int __devexit powernowk8_cpu_exit (struct cpufreq_policy *pol)
  1039. {
  1040. struct powernow_k8_data *data = powernow_data[pol->cpu];
  1041. if (!data)
  1042. return -EINVAL;
  1043. powernow_k8_cpu_exit_acpi(data);
  1044. cpufreq_frequency_table_put_attr(pol->cpu);
  1045. kfree(data->powernow_table);
  1046. kfree(data);
  1047. return 0;
  1048. }
  1049. static unsigned int powernowk8_get (unsigned int cpu)
  1050. {
  1051. struct powernow_k8_data *data;
  1052. cpumask_t oldmask = current->cpus_allowed;
  1053. unsigned int khz = 0;
  1054. data = powernow_data[first_cpu(cpu_core_map[cpu])];
  1055. if (!data)
  1056. return -EINVAL;
  1057. set_cpus_allowed(current, cpumask_of_cpu(cpu));
  1058. if (smp_processor_id() != cpu) {
  1059. printk(KERN_ERR PFX "limiting to CPU %d failed in powernowk8_get\n", cpu);
  1060. set_cpus_allowed(current, oldmask);
  1061. return 0;
  1062. }
  1063. if (query_current_values_with_pending_wait(data))
  1064. goto out;
  1065. if (cpu_family == CPU_HW_PSTATE)
  1066. khz = find_khz_freq_from_fiddid(data->currfid, data->currdid);
  1067. else
  1068. khz = find_khz_freq_from_fid(data->currfid);
  1069. out:
  1070. set_cpus_allowed(current, oldmask);
  1071. return khz;
  1072. }
  1073. static struct freq_attr* powernow_k8_attr[] = {
  1074. &cpufreq_freq_attr_scaling_available_freqs,
  1075. NULL,
  1076. };
  1077. static struct cpufreq_driver cpufreq_amd64_driver = {
  1078. .verify = powernowk8_verify,
  1079. .target = powernowk8_target,
  1080. .init = powernowk8_cpu_init,
  1081. .exit = __devexit_p(powernowk8_cpu_exit),
  1082. .get = powernowk8_get,
  1083. .name = "powernow-k8",
  1084. .owner = THIS_MODULE,
  1085. .attr = powernow_k8_attr,
  1086. };
  1087. /* driver entry point for init */
  1088. static int __cpuinit powernowk8_init(void)
  1089. {
  1090. unsigned int i, supported_cpus = 0;
  1091. unsigned int booted_cores = 1;
  1092. for_each_online_cpu(i) {
  1093. if (check_supported_cpu(i))
  1094. supported_cpus++;
  1095. }
  1096. #ifdef CONFIG_SMP
  1097. booted_cores = cpu_data[0].booted_cores;
  1098. #endif
  1099. if (supported_cpus == num_online_cpus()) {
  1100. printk(KERN_INFO PFX "Found %d %s "
  1101. "processors (%d cpu cores) (" VERSION ")\n",
  1102. supported_cpus/booted_cores,
  1103. boot_cpu_data.x86_model_id, supported_cpus);
  1104. return cpufreq_register_driver(&cpufreq_amd64_driver);
  1105. }
  1106. return -ENODEV;
  1107. }
  1108. /* driver entry point for term */
  1109. static void __exit powernowk8_exit(void)
  1110. {
  1111. dprintk("exit\n");
  1112. cpufreq_unregister_driver(&cpufreq_amd64_driver);
  1113. }
  1114. MODULE_AUTHOR("Paul Devriendt <paul.devriendt@amd.com> and Mark Langsdorf <mark.langsdorf@amd.com>");
  1115. MODULE_DESCRIPTION("AMD Athlon 64 and Opteron processor frequency driver.");
  1116. MODULE_LICENSE("GPL");
  1117. late_initcall(powernowk8_init);
  1118. module_exit(powernowk8_exit);