time.c 4.8 KB

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  1. /*
  2. * arch/arm/mach-pxa/time.c
  3. *
  4. * Author: Nicolas Pitre
  5. * Created: Jun 15, 2001
  6. * Copyright: MontaVista Software Inc.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/init.h>
  14. #include <linux/delay.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/time.h>
  17. #include <linux/signal.h>
  18. #include <linux/errno.h>
  19. #include <linux/sched.h>
  20. #include <linux/clocksource.h>
  21. #include <asm/system.h>
  22. #include <asm/hardware.h>
  23. #include <asm/io.h>
  24. #include <asm/leds.h>
  25. #include <asm/irq.h>
  26. #include <asm/mach/irq.h>
  27. #include <asm/mach/time.h>
  28. #include <asm/arch/pxa-regs.h>
  29. static int pxa_set_rtc(void)
  30. {
  31. unsigned long current_time = xtime.tv_sec;
  32. if (RTSR & RTSR_ALE) {
  33. /* make sure not to forward the clock over an alarm */
  34. unsigned long alarm = RTAR;
  35. if (current_time >= alarm && alarm >= RCNR)
  36. return -ERESTARTSYS;
  37. }
  38. RCNR = current_time;
  39. return 0;
  40. }
  41. #ifdef CONFIG_NO_IDLE_HZ
  42. static unsigned long initial_match;
  43. static int match_posponed;
  44. #endif
  45. static irqreturn_t
  46. pxa_timer_interrupt(int irq, void *dev_id)
  47. {
  48. int next_match;
  49. write_seqlock(&xtime_lock);
  50. #ifdef CONFIG_NO_IDLE_HZ
  51. if (match_posponed) {
  52. match_posponed = 0;
  53. OSMR0 = initial_match;
  54. }
  55. #endif
  56. /* Loop until we get ahead of the free running timer.
  57. * This ensures an exact clock tick count and time accuracy.
  58. * Since IRQs are disabled at this point, coherence between
  59. * lost_ticks(updated in do_timer()) and the match reg value is
  60. * ensured, hence we can use do_gettimeofday() from interrupt
  61. * handlers.
  62. *
  63. * HACK ALERT: it seems that the PXA timer regs aren't updated right
  64. * away in all cases when a write occurs. We therefore compare with
  65. * 8 instead of 0 in the while() condition below to avoid missing a
  66. * match if OSCR has already reached the next OSMR value.
  67. * Experience has shown that up to 6 ticks are needed to work around
  68. * this problem, but let's use 8 to be conservative. Note that this
  69. * affect things only when the timer IRQ has been delayed by nearly
  70. * exactly one tick period which should be a pretty rare event.
  71. */
  72. do {
  73. timer_tick();
  74. OSSR = OSSR_M0; /* Clear match on timer 0 */
  75. next_match = (OSMR0 += LATCH);
  76. } while( (signed long)(next_match - OSCR) <= 8 );
  77. write_sequnlock(&xtime_lock);
  78. return IRQ_HANDLED;
  79. }
  80. static struct irqaction pxa_timer_irq = {
  81. .name = "PXA Timer Tick",
  82. .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
  83. .handler = pxa_timer_interrupt,
  84. };
  85. static cycle_t pxa_get_cycles(void)
  86. {
  87. return OSCR;
  88. }
  89. static struct clocksource clocksource_pxa = {
  90. .name = "pxa_timer",
  91. .rating = 200,
  92. .read = pxa_get_cycles,
  93. .mask = CLOCKSOURCE_MASK(32),
  94. .shift = 20,
  95. .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  96. };
  97. static void __init pxa_timer_init(void)
  98. {
  99. struct timespec tv;
  100. unsigned long flags;
  101. set_rtc = pxa_set_rtc;
  102. OIER = 0; /* disable any timer interrupts */
  103. OSSR = 0xf; /* clear status on all timers */
  104. setup_irq(IRQ_OST0, &pxa_timer_irq);
  105. local_irq_save(flags);
  106. OIER = OIER_E0; /* enable match on timer 0 to cause interrupts */
  107. OSMR0 = OSCR + LATCH; /* set initial match */
  108. local_irq_restore(flags);
  109. /*
  110. * OSCR runs continuously on PXA and is not written to,
  111. * so we can use it as clock source directly.
  112. */
  113. clocksource_pxa.mult =
  114. clocksource_hz2mult(CLOCK_TICK_RATE, clocksource_pxa.shift);
  115. clocksource_register(&clocksource_pxa);
  116. }
  117. #ifdef CONFIG_NO_IDLE_HZ
  118. static int pxa_dyn_tick_enable_disable(void)
  119. {
  120. /* nothing to do */
  121. return 0;
  122. }
  123. static void pxa_dyn_tick_reprogram(unsigned long ticks)
  124. {
  125. if (ticks > 1) {
  126. initial_match = OSMR0;
  127. OSMR0 = initial_match + ticks * LATCH;
  128. match_posponed = 1;
  129. }
  130. }
  131. static irqreturn_t
  132. pxa_dyn_tick_handler(int irq, void *dev_id)
  133. {
  134. if (match_posponed) {
  135. match_posponed = 0;
  136. OSMR0 = initial_match;
  137. if ( (signed long)(initial_match - OSCR) <= 8 )
  138. return pxa_timer_interrupt(irq, dev_id);
  139. }
  140. return IRQ_NONE;
  141. }
  142. static struct dyn_tick_timer pxa_dyn_tick = {
  143. .enable = pxa_dyn_tick_enable_disable,
  144. .disable = pxa_dyn_tick_enable_disable,
  145. .reprogram = pxa_dyn_tick_reprogram,
  146. .handler = pxa_dyn_tick_handler,
  147. };
  148. #endif
  149. #ifdef CONFIG_PM
  150. static unsigned long osmr[4], oier;
  151. static void pxa_timer_suspend(void)
  152. {
  153. osmr[0] = OSMR0;
  154. osmr[1] = OSMR1;
  155. osmr[2] = OSMR2;
  156. osmr[3] = OSMR3;
  157. oier = OIER;
  158. }
  159. static void pxa_timer_resume(void)
  160. {
  161. OSMR0 = osmr[0];
  162. OSMR1 = osmr[1];
  163. OSMR2 = osmr[2];
  164. OSMR3 = osmr[3];
  165. OIER = oier;
  166. /*
  167. * OSMR0 is the system timer: make sure OSCR is sufficiently behind
  168. */
  169. OSCR = OSMR0 - LATCH;
  170. }
  171. #else
  172. #define pxa_timer_suspend NULL
  173. #define pxa_timer_resume NULL
  174. #endif
  175. struct sys_timer pxa_timer = {
  176. .init = pxa_timer_init,
  177. .suspend = pxa_timer_suspend,
  178. .resume = pxa_timer_resume,
  179. #ifdef CONFIG_NO_IDLE_HZ
  180. .dyn_tick = &pxa_dyn_tick,
  181. #endif
  182. };