nouveau_drm.c 17 KB

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  1. /*
  2. * Copyright 2012 Red Hat Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * Authors: Ben Skeggs
  23. */
  24. #include <linux/console.h>
  25. #include <linux/module.h>
  26. #include <linux/pci.h>
  27. #include <core/device.h>
  28. #include <core/client.h>
  29. #include <core/gpuobj.h>
  30. #include <core/class.h>
  31. #include <subdev/device.h>
  32. #include <subdev/vm.h>
  33. #include "nouveau_drm.h"
  34. #include "nouveau_irq.h"
  35. #include "nouveau_dma.h"
  36. #include "nouveau_ttm.h"
  37. #include "nouveau_gem.h"
  38. #include "nouveau_agp.h"
  39. #include "nouveau_vga.h"
  40. #include "nouveau_pm.h"
  41. #include "nouveau_acpi.h"
  42. #include "nouveau_bios.h"
  43. #include "nouveau_ioctl.h"
  44. #include "nouveau_abi16.h"
  45. #include "nouveau_fbcon.h"
  46. #include "nouveau_fence.h"
  47. #include "nouveau_ttm.h"
  48. MODULE_PARM_DESC(config, "option string to pass to driver core");
  49. static char *nouveau_config;
  50. module_param_named(config, nouveau_config, charp, 0400);
  51. MODULE_PARM_DESC(debug, "debug string to pass to driver core");
  52. static char *nouveau_debug;
  53. module_param_named(debug, nouveau_debug, charp, 0400);
  54. MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
  55. static int nouveau_noaccel = 0;
  56. module_param_named(noaccel, nouveau_noaccel, int, 0400);
  57. MODULE_PARM_DESC(modeset, "enable driver");
  58. int nouveau_modeset = -1;
  59. module_param_named(modeset, nouveau_modeset, int, 0400);
  60. static struct drm_driver driver;
  61. static u64
  62. nouveau_name(struct pci_dev *pdev)
  63. {
  64. u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
  65. name |= pdev->bus->number << 16;
  66. name |= PCI_SLOT(pdev->devfn) << 8;
  67. return name | PCI_FUNC(pdev->devfn);
  68. }
  69. static int
  70. nouveau_cli_create(struct pci_dev *pdev, u32 name, int size, void **pcli)
  71. {
  72. struct nouveau_cli *cli;
  73. int ret;
  74. ret = nouveau_client_create_(name, nouveau_name(pdev), nouveau_config,
  75. nouveau_debug, size, pcli);
  76. cli = *pcli;
  77. if (ret)
  78. return ret;
  79. mutex_init(&cli->mutex);
  80. return 0;
  81. }
  82. static void
  83. nouveau_cli_destroy(struct nouveau_cli *cli)
  84. {
  85. struct nouveau_object *client = nv_object(cli);
  86. nouveau_vm_ref(NULL, &cli->base.vm, NULL);
  87. nouveau_client_fini(&cli->base, false);
  88. atomic_set(&client->refcount, 1);
  89. nouveau_object_ref(NULL, &client);
  90. }
  91. static void
  92. nouveau_accel_fini(struct nouveau_drm *drm)
  93. {
  94. nouveau_gpuobj_ref(NULL, &drm->notify);
  95. nouveau_channel_del(&drm->channel);
  96. nouveau_channel_del(&drm->cechan);
  97. if (drm->fence)
  98. nouveau_fence(drm)->dtor(drm);
  99. }
  100. static void
  101. nouveau_accel_init(struct nouveau_drm *drm)
  102. {
  103. struct nouveau_device *device = nv_device(drm->device);
  104. struct nouveau_object *object;
  105. u32 arg0, arg1;
  106. int ret;
  107. if (nouveau_noaccel)
  108. return;
  109. /* initialise synchronisation routines */
  110. if (device->card_type < NV_10) ret = nv04_fence_create(drm);
  111. else if (device->chipset < 0x84) ret = nv10_fence_create(drm);
  112. else if (device->card_type < NV_C0) ret = nv84_fence_create(drm);
  113. else ret = nvc0_fence_create(drm);
  114. if (ret) {
  115. NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
  116. nouveau_accel_fini(drm);
  117. return;
  118. }
  119. if (device->card_type >= NV_E0) {
  120. ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE,
  121. NVDRM_CHAN + 1,
  122. NVE0_CHANNEL_IND_ENGINE_CE0 |
  123. NVE0_CHANNEL_IND_ENGINE_CE1, 0,
  124. &drm->cechan);
  125. if (ret)
  126. NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
  127. arg0 = NVE0_CHANNEL_IND_ENGINE_GR;
  128. arg1 = 0;
  129. } else {
  130. arg0 = NvDmaFB;
  131. arg1 = NvDmaTT;
  132. }
  133. ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE, NVDRM_CHAN,
  134. arg0, arg1, &drm->channel);
  135. if (ret) {
  136. NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
  137. nouveau_accel_fini(drm);
  138. return;
  139. }
  140. if (device->card_type < NV_C0) {
  141. ret = nouveau_gpuobj_new(drm->device, NULL, 32, 0, 0,
  142. &drm->notify);
  143. if (ret) {
  144. NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
  145. nouveau_accel_fini(drm);
  146. return;
  147. }
  148. ret = nouveau_object_new(nv_object(drm),
  149. drm->channel->handle, NvNotify0,
  150. 0x003d, &(struct nv_dma_class) {
  151. .flags = NV_DMA_TARGET_VRAM |
  152. NV_DMA_ACCESS_RDWR,
  153. .start = drm->notify->addr,
  154. .limit = drm->notify->addr + 31
  155. }, sizeof(struct nv_dma_class),
  156. &object);
  157. if (ret) {
  158. nouveau_accel_fini(drm);
  159. return;
  160. }
  161. }
  162. nouveau_bo_move_init(drm);
  163. }
  164. static int __devinit
  165. nouveau_drm_probe(struct pci_dev *pdev, const struct pci_device_id *pent)
  166. {
  167. struct nouveau_device *device;
  168. struct apertures_struct *aper;
  169. bool boot = false;
  170. int ret;
  171. /* remove conflicting drivers (vesafb, efifb etc) */
  172. aper = alloc_apertures(3);
  173. if (!aper)
  174. return -ENOMEM;
  175. aper->ranges[0].base = pci_resource_start(pdev, 1);
  176. aper->ranges[0].size = pci_resource_len(pdev, 1);
  177. aper->count = 1;
  178. if (pci_resource_len(pdev, 2)) {
  179. aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
  180. aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
  181. aper->count++;
  182. }
  183. if (pci_resource_len(pdev, 3)) {
  184. aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
  185. aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
  186. aper->count++;
  187. }
  188. #ifdef CONFIG_X86
  189. boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
  190. #endif
  191. remove_conflicting_framebuffers(aper, "nouveaufb", boot);
  192. ret = nouveau_device_create(pdev, nouveau_name(pdev), pci_name(pdev),
  193. nouveau_config, nouveau_debug, &device);
  194. if (ret)
  195. return ret;
  196. pci_set_master(pdev);
  197. ret = drm_get_pci_dev(pdev, pent, &driver);
  198. if (ret) {
  199. nouveau_object_ref(NULL, (struct nouveau_object **)&device);
  200. return ret;
  201. }
  202. return 0;
  203. }
  204. int
  205. nouveau_drm_load(struct drm_device *dev, unsigned long flags)
  206. {
  207. struct pci_dev *pdev = dev->pdev;
  208. struct nouveau_device *device;
  209. struct nouveau_drm *drm;
  210. int ret;
  211. ret = nouveau_cli_create(pdev, 0, sizeof(*drm), (void**)&drm);
  212. if (ret)
  213. return ret;
  214. dev->dev_private = drm;
  215. drm->dev = dev;
  216. INIT_LIST_HEAD(&drm->clients);
  217. spin_lock_init(&drm->tile.lock);
  218. /* make sure AGP controller is in a consistent state before we
  219. * (possibly) execute vbios init tables (see nouveau_agp.h)
  220. */
  221. if (drm_pci_device_is_agp(dev) && dev->agp) {
  222. /* dummy device object, doesn't init anything, but allows
  223. * agp code access to registers
  224. */
  225. ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT,
  226. NVDRM_DEVICE, 0x0080,
  227. &(struct nv_device_class) {
  228. .device = ~0,
  229. .disable =
  230. ~(NV_DEVICE_DISABLE_MMIO |
  231. NV_DEVICE_DISABLE_IDENTIFY),
  232. .debug0 = ~0,
  233. }, sizeof(struct nv_device_class),
  234. &drm->device);
  235. if (ret)
  236. goto fail_device;
  237. nouveau_agp_reset(drm);
  238. nouveau_object_del(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE);
  239. }
  240. ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE,
  241. 0x0080, &(struct nv_device_class) {
  242. .device = ~0,
  243. .disable = 0,
  244. .debug0 = 0,
  245. }, sizeof(struct nv_device_class),
  246. &drm->device);
  247. if (ret)
  248. goto fail_device;
  249. /* workaround an odd issue on nvc1 by disabling the device's
  250. * nosnoop capability. hopefully won't cause issues until a
  251. * better fix is found - assuming there is one...
  252. */
  253. device = nv_device(drm->device);
  254. if (nv_device(drm->device)->chipset == 0xc1)
  255. nv_mask(device, 0x00088080, 0x00000800, 0x00000000);
  256. nouveau_vga_init(drm);
  257. nouveau_agp_init(drm);
  258. if (device->card_type >= NV_50) {
  259. ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40),
  260. 0x1000, &drm->client.base.vm);
  261. if (ret)
  262. goto fail_device;
  263. }
  264. ret = nouveau_ttm_init(drm);
  265. if (ret)
  266. goto fail_ttm;
  267. ret = nouveau_bios_init(dev);
  268. if (ret)
  269. goto fail_bios;
  270. ret = nouveau_irq_init(dev);
  271. if (ret)
  272. goto fail_irq;
  273. ret = nouveau_display_create(dev);
  274. if (ret)
  275. goto fail_dispctor;
  276. if (dev->mode_config.num_crtc) {
  277. ret = nouveau_display_init(dev);
  278. if (ret)
  279. goto fail_dispinit;
  280. }
  281. nouveau_pm_init(dev);
  282. nouveau_accel_init(drm);
  283. nouveau_fbcon_init(dev);
  284. return 0;
  285. fail_dispinit:
  286. nouveau_display_destroy(dev);
  287. fail_dispctor:
  288. nouveau_irq_fini(dev);
  289. fail_irq:
  290. nouveau_bios_takedown(dev);
  291. fail_bios:
  292. nouveau_ttm_fini(drm);
  293. fail_ttm:
  294. nouveau_agp_fini(drm);
  295. nouveau_vga_fini(drm);
  296. fail_device:
  297. nouveau_cli_destroy(&drm->client);
  298. return ret;
  299. }
  300. int
  301. nouveau_drm_unload(struct drm_device *dev)
  302. {
  303. struct nouveau_drm *drm = nouveau_drm(dev);
  304. nouveau_fbcon_fini(dev);
  305. nouveau_accel_fini(drm);
  306. nouveau_pm_fini(dev);
  307. nouveau_display_fini(dev);
  308. nouveau_display_destroy(dev);
  309. nouveau_irq_fini(dev);
  310. nouveau_bios_takedown(dev);
  311. nouveau_ttm_fini(drm);
  312. nouveau_agp_fini(drm);
  313. nouveau_vga_fini(drm);
  314. nouveau_cli_destroy(&drm->client);
  315. return 0;
  316. }
  317. static void
  318. nouveau_drm_remove(struct pci_dev *pdev)
  319. {
  320. struct drm_device *dev = pci_get_drvdata(pdev);
  321. struct nouveau_drm *drm = nouveau_drm(dev);
  322. struct nouveau_object *device;
  323. device = drm->client.base.device;
  324. drm_put_dev(dev);
  325. nouveau_object_ref(NULL, &device);
  326. nouveau_object_debug();
  327. }
  328. int
  329. nouveau_drm_suspend(struct pci_dev *pdev, pm_message_t pm_state)
  330. {
  331. struct drm_device *dev = pci_get_drvdata(pdev);
  332. struct nouveau_drm *drm = nouveau_drm(dev);
  333. struct nouveau_cli *cli;
  334. int ret;
  335. if (dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
  336. pm_state.event == PM_EVENT_PRETHAW)
  337. return 0;
  338. NV_INFO(drm, "suspending fbcon...\n");
  339. nouveau_fbcon_set_suspend(dev, 1);
  340. NV_INFO(drm, "suspending display...\n");
  341. ret = nouveau_display_suspend(dev);
  342. if (ret)
  343. return ret;
  344. NV_INFO(drm, "evicting buffers...\n");
  345. ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
  346. if (drm->fence && nouveau_fence(drm)->suspend) {
  347. if (!nouveau_fence(drm)->suspend(drm))
  348. return -ENOMEM;
  349. }
  350. NV_INFO(drm, "suspending client object trees...\n");
  351. list_for_each_entry(cli, &drm->clients, head) {
  352. ret = nouveau_client_fini(&cli->base, true);
  353. if (ret)
  354. goto fail_client;
  355. }
  356. ret = nouveau_client_fini(&drm->client.base, true);
  357. if (ret)
  358. goto fail_client;
  359. nouveau_agp_fini(drm);
  360. pci_save_state(pdev);
  361. if (pm_state.event == PM_EVENT_SUSPEND) {
  362. pci_disable_device(pdev);
  363. pci_set_power_state(pdev, PCI_D3hot);
  364. }
  365. return 0;
  366. fail_client:
  367. list_for_each_entry_continue_reverse(cli, &drm->clients, head) {
  368. nouveau_client_init(&cli->base);
  369. }
  370. NV_INFO(drm, "resuming display...\n");
  371. nouveau_display_resume(dev);
  372. return ret;
  373. }
  374. int
  375. nouveau_drm_resume(struct pci_dev *pdev)
  376. {
  377. struct drm_device *dev = pci_get_drvdata(pdev);
  378. struct nouveau_drm *drm = nouveau_drm(dev);
  379. struct nouveau_cli *cli;
  380. int ret;
  381. if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
  382. return 0;
  383. NV_INFO(drm, "re-enabling device...\n");
  384. pci_set_power_state(pdev, PCI_D0);
  385. pci_restore_state(pdev);
  386. ret = pci_enable_device(pdev);
  387. if (ret)
  388. return ret;
  389. pci_set_master(pdev);
  390. nouveau_agp_reset(drm);
  391. NV_INFO(drm, "resuming client object trees...\n");
  392. nouveau_client_init(&drm->client.base);
  393. nouveau_agp_init(drm);
  394. list_for_each_entry(cli, &drm->clients, head) {
  395. nouveau_client_init(&cli->base);
  396. }
  397. if (drm->fence && nouveau_fence(drm)->resume)
  398. nouveau_fence(drm)->resume(drm);
  399. nouveau_run_vbios_init(dev);
  400. nouveau_irq_postinstall(dev);
  401. nouveau_pm_resume(dev);
  402. NV_INFO(drm, "resuming display...\n");
  403. nouveau_display_resume(dev);
  404. return 0;
  405. }
  406. int
  407. nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
  408. {
  409. struct pci_dev *pdev = dev->pdev;
  410. struct nouveau_drm *drm = nouveau_drm(dev);
  411. struct nouveau_cli *cli;
  412. int ret;
  413. ret = nouveau_cli_create(pdev, fpriv->pid, sizeof(*cli), (void **)&cli);
  414. if (ret)
  415. return ret;
  416. if (nv_device(drm->device)->card_type >= NV_50) {
  417. ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40),
  418. 0x1000, &cli->base.vm);
  419. if (ret) {
  420. nouveau_cli_destroy(cli);
  421. return ret;
  422. }
  423. }
  424. fpriv->driver_priv = cli;
  425. mutex_lock(&drm->client.mutex);
  426. list_add(&cli->head, &drm->clients);
  427. mutex_unlock(&drm->client.mutex);
  428. return 0;
  429. }
  430. void
  431. nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv)
  432. {
  433. struct nouveau_cli *cli = nouveau_cli(fpriv);
  434. struct nouveau_drm *drm = nouveau_drm(dev);
  435. if (cli->abi16)
  436. nouveau_abi16_fini(cli->abi16);
  437. mutex_lock(&drm->client.mutex);
  438. list_del(&cli->head);
  439. mutex_unlock(&drm->client.mutex);
  440. }
  441. void
  442. nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
  443. {
  444. struct nouveau_cli *cli = nouveau_cli(fpriv);
  445. nouveau_cli_destroy(cli);
  446. }
  447. static struct drm_ioctl_desc
  448. nouveau_ioctls[] = {
  449. DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_UNLOCKED|DRM_AUTH),
  450. DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
  451. DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_UNLOCKED|DRM_AUTH),
  452. DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_UNLOCKED|DRM_AUTH),
  453. DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_UNLOCKED|DRM_AUTH),
  454. DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_UNLOCKED|DRM_AUTH),
  455. DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_UNLOCKED|DRM_AUTH),
  456. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_UNLOCKED|DRM_AUTH),
  457. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_UNLOCKED|DRM_AUTH),
  458. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_UNLOCKED|DRM_AUTH),
  459. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_UNLOCKED|DRM_AUTH),
  460. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_UNLOCKED|DRM_AUTH),
  461. };
  462. static const struct file_operations
  463. nouveau_driver_fops = {
  464. .owner = THIS_MODULE,
  465. .open = drm_open,
  466. .release = drm_release,
  467. .unlocked_ioctl = drm_ioctl,
  468. .mmap = nouveau_ttm_mmap,
  469. .poll = drm_poll,
  470. .fasync = drm_fasync,
  471. .read = drm_read,
  472. #if defined(CONFIG_COMPAT)
  473. .compat_ioctl = nouveau_compat_ioctl,
  474. #endif
  475. .llseek = noop_llseek,
  476. };
  477. static struct drm_driver
  478. driver = {
  479. .driver_features =
  480. DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
  481. DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
  482. DRIVER_MODESET | DRIVER_PRIME,
  483. .load = nouveau_drm_load,
  484. .unload = nouveau_drm_unload,
  485. .open = nouveau_drm_open,
  486. .preclose = nouveau_drm_preclose,
  487. .postclose = nouveau_drm_postclose,
  488. .lastclose = nouveau_vga_lastclose,
  489. .irq_preinstall = nouveau_irq_preinstall,
  490. .irq_postinstall = nouveau_irq_postinstall,
  491. .irq_uninstall = nouveau_irq_uninstall,
  492. .irq_handler = nouveau_irq_handler,
  493. .get_vblank_counter = drm_vblank_count,
  494. .enable_vblank = nouveau_vblank_enable,
  495. .disable_vblank = nouveau_vblank_disable,
  496. .ioctls = nouveau_ioctls,
  497. .fops = &nouveau_driver_fops,
  498. .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
  499. .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
  500. .gem_prime_export = nouveau_gem_prime_export,
  501. .gem_prime_import = nouveau_gem_prime_import,
  502. .gem_init_object = nouveau_gem_object_new,
  503. .gem_free_object = nouveau_gem_object_del,
  504. .gem_open_object = nouveau_gem_object_open,
  505. .gem_close_object = nouveau_gem_object_close,
  506. .dumb_create = nouveau_display_dumb_create,
  507. .dumb_map_offset = nouveau_display_dumb_map_offset,
  508. .dumb_destroy = nouveau_display_dumb_destroy,
  509. .name = DRIVER_NAME,
  510. .desc = DRIVER_DESC,
  511. #ifdef GIT_REVISION
  512. .date = GIT_REVISION,
  513. #else
  514. .date = DRIVER_DATE,
  515. #endif
  516. .major = DRIVER_MAJOR,
  517. .minor = DRIVER_MINOR,
  518. .patchlevel = DRIVER_PATCHLEVEL,
  519. };
  520. static struct pci_device_id
  521. nouveau_drm_pci_table[] = {
  522. {
  523. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
  524. .class = PCI_BASE_CLASS_DISPLAY << 16,
  525. .class_mask = 0xff << 16,
  526. },
  527. {
  528. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
  529. .class = PCI_BASE_CLASS_DISPLAY << 16,
  530. .class_mask = 0xff << 16,
  531. },
  532. {}
  533. };
  534. static struct pci_driver
  535. nouveau_drm_pci_driver = {
  536. .name = "nouveau",
  537. .id_table = nouveau_drm_pci_table,
  538. .probe = nouveau_drm_probe,
  539. .remove = nouveau_drm_remove,
  540. .suspend = nouveau_drm_suspend,
  541. .resume = nouveau_drm_resume,
  542. };
  543. static int __init
  544. nouveau_drm_init(void)
  545. {
  546. driver.num_ioctls = ARRAY_SIZE(nouveau_ioctls);
  547. if (nouveau_modeset == -1) {
  548. #ifdef CONFIG_VGA_CONSOLE
  549. if (vgacon_text_force())
  550. nouveau_modeset = 0;
  551. else
  552. #endif
  553. nouveau_modeset = 1;
  554. }
  555. if (!nouveau_modeset)
  556. return 0;
  557. nouveau_register_dsm_handler();
  558. return drm_pci_init(&driver, &nouveau_drm_pci_driver);
  559. }
  560. static void __exit
  561. nouveau_drm_exit(void)
  562. {
  563. if (!nouveau_modeset)
  564. return;
  565. drm_pci_exit(&driver, &nouveau_drm_pci_driver);
  566. nouveau_unregister_dsm_handler();
  567. }
  568. module_init(nouveau_drm_init);
  569. module_exit(nouveau_drm_exit);
  570. MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
  571. MODULE_AUTHOR(DRIVER_AUTHOR);
  572. MODULE_DESCRIPTION(DRIVER_DESC);
  573. MODULE_LICENSE("GPL and additional rights");