bfin_mac.c 24 KB

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  1. /*
  2. * File: drivers/net/bfin_mac.c
  3. * Based on:
  4. * Maintainer:
  5. * Bryan Wu <bryan.wu@analog.com>
  6. *
  7. * Original author:
  8. * Luke Yang <luke.yang@analog.com>
  9. *
  10. * Created:
  11. * Description:
  12. *
  13. * Modified:
  14. * Copyright 2004-2006 Analog Devices Inc.
  15. *
  16. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  17. *
  18. * This program is free software ; you can redistribute it and/or modify
  19. * it under the terms of the GNU General Public License as published by
  20. * the Free Software Foundation ; either version 2, or (at your option)
  21. * any later version.
  22. *
  23. * This program is distributed in the hope that it will be useful,
  24. * but WITHOUT ANY WARRANTY ; without even the implied warranty of
  25. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  26. * GNU General Public License for more details.
  27. *
  28. * You should have received a copy of the GNU General Public License
  29. * along with this program ; see the file COPYING.
  30. * If not, write to the Free Software Foundation,
  31. * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  32. */
  33. #include <linux/init.h>
  34. #include <linux/module.h>
  35. #include <linux/kernel.h>
  36. #include <linux/sched.h>
  37. #include <linux/slab.h>
  38. #include <linux/delay.h>
  39. #include <linux/timer.h>
  40. #include <linux/errno.h>
  41. #include <linux/irq.h>
  42. #include <linux/io.h>
  43. #include <linux/ioport.h>
  44. #include <linux/crc32.h>
  45. #include <linux/device.h>
  46. #include <linux/spinlock.h>
  47. #include <linux/ethtool.h>
  48. #include <linux/mii.h>
  49. #include <linux/netdevice.h>
  50. #include <linux/etherdevice.h>
  51. #include <linux/skbuff.h>
  52. #include <linux/platform_device.h>
  53. #include <asm/dma.h>
  54. #include <linux/dma-mapping.h>
  55. #include <asm/blackfin.h>
  56. #include <asm/cacheflush.h>
  57. #include <asm/portmux.h>
  58. #include "bfin_mac.h"
  59. #define DRV_NAME "bfin_mac"
  60. #define DRV_VERSION "1.1"
  61. #define DRV_AUTHOR "Bryan Wu, Luke Yang"
  62. #define DRV_DESC "Blackfin BF53[67] on-chip Ethernet MAC driver"
  63. MODULE_AUTHOR(DRV_AUTHOR);
  64. MODULE_LICENSE("GPL");
  65. MODULE_DESCRIPTION(DRV_DESC);
  66. #if defined(CONFIG_BFIN_MAC_USE_L1)
  67. # define bfin_mac_alloc(dma_handle, size) l1_data_sram_zalloc(size)
  68. # define bfin_mac_free(dma_handle, ptr) l1_data_sram_free(ptr)
  69. #else
  70. # define bfin_mac_alloc(dma_handle, size) \
  71. dma_alloc_coherent(NULL, size, dma_handle, GFP_KERNEL)
  72. # define bfin_mac_free(dma_handle, ptr) \
  73. dma_free_coherent(NULL, sizeof(*ptr), ptr, dma_handle)
  74. #endif
  75. #define PKT_BUF_SZ 1580
  76. #define MAX_TIMEOUT_CNT 500
  77. /* pointers to maintain transmit list */
  78. static struct net_dma_desc_tx *tx_list_head;
  79. static struct net_dma_desc_tx *tx_list_tail;
  80. static struct net_dma_desc_rx *rx_list_head;
  81. static struct net_dma_desc_rx *rx_list_tail;
  82. static struct net_dma_desc_rx *current_rx_ptr;
  83. static struct net_dma_desc_tx *current_tx_ptr;
  84. static struct net_dma_desc_tx *tx_desc;
  85. static struct net_dma_desc_rx *rx_desc;
  86. static void desc_list_free(void)
  87. {
  88. struct net_dma_desc_rx *r;
  89. struct net_dma_desc_tx *t;
  90. int i;
  91. #if !defined(CONFIG_BFIN_MAC_USE_L1)
  92. dma_addr_t dma_handle = 0;
  93. #endif
  94. if (tx_desc) {
  95. t = tx_list_head;
  96. for (i = 0; i < CONFIG_BFIN_TX_DESC_NUM; i++) {
  97. if (t) {
  98. if (t->skb) {
  99. dev_kfree_skb(t->skb);
  100. t->skb = NULL;
  101. }
  102. t = t->next;
  103. }
  104. }
  105. bfin_mac_free(dma_handle, tx_desc);
  106. }
  107. if (rx_desc) {
  108. r = rx_list_head;
  109. for (i = 0; i < CONFIG_BFIN_RX_DESC_NUM; i++) {
  110. if (r) {
  111. if (r->skb) {
  112. dev_kfree_skb(r->skb);
  113. r->skb = NULL;
  114. }
  115. r = r->next;
  116. }
  117. }
  118. bfin_mac_free(dma_handle, rx_desc);
  119. }
  120. }
  121. static int desc_list_init(void)
  122. {
  123. int i;
  124. struct sk_buff *new_skb;
  125. #if !defined(CONFIG_BFIN_MAC_USE_L1)
  126. /*
  127. * This dma_handle is useless in Blackfin dma_alloc_coherent().
  128. * The real dma handler is the return value of dma_alloc_coherent().
  129. */
  130. dma_addr_t dma_handle;
  131. #endif
  132. tx_desc = bfin_mac_alloc(&dma_handle,
  133. sizeof(struct net_dma_desc_tx) *
  134. CONFIG_BFIN_TX_DESC_NUM);
  135. if (tx_desc == NULL)
  136. goto init_error;
  137. rx_desc = bfin_mac_alloc(&dma_handle,
  138. sizeof(struct net_dma_desc_rx) *
  139. CONFIG_BFIN_RX_DESC_NUM);
  140. if (rx_desc == NULL)
  141. goto init_error;
  142. /* init tx_list */
  143. tx_list_head = tx_list_tail = tx_desc;
  144. for (i = 0; i < CONFIG_BFIN_TX_DESC_NUM; i++) {
  145. struct net_dma_desc_tx *t = tx_desc + i;
  146. struct dma_descriptor *a = &(t->desc_a);
  147. struct dma_descriptor *b = &(t->desc_b);
  148. /*
  149. * disable DMA
  150. * read from memory WNR = 0
  151. * wordsize is 32 bits
  152. * 6 half words is desc size
  153. * large desc flow
  154. */
  155. a->config = WDSIZE_32 | NDSIZE_6 | DMAFLOW_LARGE;
  156. a->start_addr = (unsigned long)t->packet;
  157. a->x_count = 0;
  158. a->next_dma_desc = b;
  159. /*
  160. * enabled DMA
  161. * write to memory WNR = 1
  162. * wordsize is 32 bits
  163. * disable interrupt
  164. * 6 half words is desc size
  165. * large desc flow
  166. */
  167. b->config = DMAEN | WNR | WDSIZE_32 | NDSIZE_6 | DMAFLOW_LARGE;
  168. b->start_addr = (unsigned long)(&(t->status));
  169. b->x_count = 0;
  170. t->skb = NULL;
  171. tx_list_tail->desc_b.next_dma_desc = a;
  172. tx_list_tail->next = t;
  173. tx_list_tail = t;
  174. }
  175. tx_list_tail->next = tx_list_head; /* tx_list is a circle */
  176. tx_list_tail->desc_b.next_dma_desc = &(tx_list_head->desc_a);
  177. current_tx_ptr = tx_list_head;
  178. /* init rx_list */
  179. rx_list_head = rx_list_tail = rx_desc;
  180. for (i = 0; i < CONFIG_BFIN_RX_DESC_NUM; i++) {
  181. struct net_dma_desc_rx *r = rx_desc + i;
  182. struct dma_descriptor *a = &(r->desc_a);
  183. struct dma_descriptor *b = &(r->desc_b);
  184. /* allocate a new skb for next time receive */
  185. new_skb = dev_alloc_skb(PKT_BUF_SZ + 2);
  186. if (!new_skb) {
  187. printk(KERN_NOTICE DRV_NAME
  188. ": init: low on mem - packet dropped\n");
  189. goto init_error;
  190. }
  191. skb_reserve(new_skb, 2);
  192. r->skb = new_skb;
  193. /*
  194. * enabled DMA
  195. * write to memory WNR = 1
  196. * wordsize is 32 bits
  197. * disable interrupt
  198. * 6 half words is desc size
  199. * large desc flow
  200. */
  201. a->config = DMAEN | WNR | WDSIZE_32 | NDSIZE_6 | DMAFLOW_LARGE;
  202. /* since RXDWA is enabled */
  203. a->start_addr = (unsigned long)new_skb->data - 2;
  204. a->x_count = 0;
  205. a->next_dma_desc = b;
  206. /*
  207. * enabled DMA
  208. * write to memory WNR = 1
  209. * wordsize is 32 bits
  210. * enable interrupt
  211. * 6 half words is desc size
  212. * large desc flow
  213. */
  214. b->config = DMAEN | WNR | WDSIZE_32 | DI_EN |
  215. NDSIZE_6 | DMAFLOW_LARGE;
  216. b->start_addr = (unsigned long)(&(r->status));
  217. b->x_count = 0;
  218. rx_list_tail->desc_b.next_dma_desc = a;
  219. rx_list_tail->next = r;
  220. rx_list_tail = r;
  221. }
  222. rx_list_tail->next = rx_list_head; /* rx_list is a circle */
  223. rx_list_tail->desc_b.next_dma_desc = &(rx_list_head->desc_a);
  224. current_rx_ptr = rx_list_head;
  225. return 0;
  226. init_error:
  227. desc_list_free();
  228. printk(KERN_ERR DRV_NAME ": kmalloc failed\n");
  229. return -ENOMEM;
  230. }
  231. /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
  232. /* Set FER regs to MUX in Ethernet pins */
  233. static int setup_pin_mux(int action)
  234. {
  235. #if defined(CONFIG_BFIN_MAC_RMII)
  236. u16 pin_req[] = P_RMII0;
  237. #else
  238. u16 pin_req[] = P_MII0;
  239. #endif
  240. if (action) {
  241. if (peripheral_request_list(pin_req, DRV_NAME)) {
  242. printk(KERN_ERR DRV_NAME
  243. ": Requesting Peripherals failed\n");
  244. return -EFAULT;
  245. }
  246. } else
  247. peripheral_free_list(pin_req);
  248. return 0;
  249. }
  250. /* Wait until the previous MDC/MDIO transaction has completed */
  251. static void poll_mdc_done(void)
  252. {
  253. int timeout_cnt = MAX_TIMEOUT_CNT;
  254. /* poll the STABUSY bit */
  255. while ((bfin_read_EMAC_STAADD()) & STABUSY) {
  256. mdelay(10);
  257. if (timeout_cnt-- < 0) {
  258. printk(KERN_ERR DRV_NAME
  259. ": wait MDC/MDIO transaction to complete timeout\n");
  260. break;
  261. }
  262. }
  263. }
  264. /* Read an off-chip register in a PHY through the MDC/MDIO port */
  265. static u16 read_phy_reg(u16 PHYAddr, u16 RegAddr)
  266. {
  267. poll_mdc_done();
  268. /* read mode */
  269. bfin_write_EMAC_STAADD(SET_PHYAD(PHYAddr) |
  270. SET_REGAD(RegAddr) |
  271. STABUSY);
  272. poll_mdc_done();
  273. return (u16) bfin_read_EMAC_STADAT();
  274. }
  275. /* Write an off-chip register in a PHY through the MDC/MDIO port */
  276. static void raw_write_phy_reg(u16 PHYAddr, u16 RegAddr, u32 Data)
  277. {
  278. bfin_write_EMAC_STADAT(Data);
  279. /* write mode */
  280. bfin_write_EMAC_STAADD(SET_PHYAD(PHYAddr) |
  281. SET_REGAD(RegAddr) |
  282. STAOP |
  283. STABUSY);
  284. poll_mdc_done();
  285. }
  286. static void write_phy_reg(u16 PHYAddr, u16 RegAddr, u32 Data)
  287. {
  288. poll_mdc_done();
  289. raw_write_phy_reg(PHYAddr, RegAddr, Data);
  290. }
  291. /* set up the phy */
  292. static void bf537mac_setphy(struct net_device *dev)
  293. {
  294. u16 phydat;
  295. struct bf537mac_local *lp = netdev_priv(dev);
  296. /* Program PHY registers */
  297. pr_debug("start setting up phy\n");
  298. /* issue a reset */
  299. raw_write_phy_reg(lp->PhyAddr, PHYREG_MODECTL, 0x8000);
  300. /* wait half a second */
  301. msleep(500);
  302. phydat = read_phy_reg(lp->PhyAddr, PHYREG_MODECTL);
  303. /* advertise flow control supported */
  304. phydat = read_phy_reg(lp->PhyAddr, PHYREG_ANAR);
  305. phydat |= (1 << 10);
  306. write_phy_reg(lp->PhyAddr, PHYREG_ANAR, phydat);
  307. phydat = 0;
  308. if (lp->Negotiate)
  309. phydat |= 0x1000; /* enable auto negotiation */
  310. else {
  311. if (lp->FullDuplex)
  312. phydat |= (1 << 8); /* full duplex */
  313. else
  314. phydat &= (~(1 << 8)); /* half duplex */
  315. if (!lp->Port10)
  316. phydat |= (1 << 13); /* 100 Mbps */
  317. else
  318. phydat &= (~(1 << 13)); /* 10 Mbps */
  319. }
  320. if (lp->Loopback)
  321. phydat |= (1 << 14); /* enable TX->RX loopback */
  322. write_phy_reg(lp->PhyAddr, PHYREG_MODECTL, phydat);
  323. msleep(500);
  324. phydat = read_phy_reg(lp->PhyAddr, PHYREG_MODECTL);
  325. /* check for SMSC PHY */
  326. if ((read_phy_reg(lp->PhyAddr, PHYREG_PHYID1) == 0x7) &&
  327. ((read_phy_reg(lp->PhyAddr, PHYREG_PHYID2) & 0xfff0) == 0xC0A0)) {
  328. /*
  329. * we have SMSC PHY so reqest interrupt
  330. * on link down condition
  331. */
  332. /* enable interrupts */
  333. write_phy_reg(lp->PhyAddr, 30, 0x0ff);
  334. }
  335. }
  336. /**************************************************************************/
  337. void setup_system_regs(struct net_device *dev)
  338. {
  339. int phyaddr;
  340. unsigned short sysctl, phydat;
  341. u32 opmode;
  342. struct bf537mac_local *lp = netdev_priv(dev);
  343. int count = 0;
  344. phyaddr = lp->PhyAddr;
  345. /* Enable PHY output */
  346. if (!(bfin_read_VR_CTL() & PHYCLKOE))
  347. bfin_write_VR_CTL(bfin_read_VR_CTL() | PHYCLKOE);
  348. /* MDC = 2.5 MHz */
  349. sysctl = SET_MDCDIV(24);
  350. /* Odd word alignment for Receive Frame DMA word */
  351. /* Configure checksum support and rcve frame word alignment */
  352. #if defined(BFIN_MAC_CSUM_OFFLOAD)
  353. sysctl |= RXDWA | RXCKS;
  354. #else
  355. sysctl |= RXDWA;
  356. #endif
  357. bfin_write_EMAC_SYSCTL(sysctl);
  358. /* auto negotiation on */
  359. /* full duplex */
  360. /* 100 Mbps */
  361. phydat = PHY_ANEG_EN | PHY_DUPLEX | PHY_SPD_SET;
  362. write_phy_reg(phyaddr, PHYREG_MODECTL, phydat);
  363. /* test if full duplex supported */
  364. do {
  365. msleep(100);
  366. phydat = read_phy_reg(phyaddr, PHYREG_MODESTAT);
  367. if (count > 30) {
  368. printk(KERN_NOTICE DRV_NAME ": Link is down\n");
  369. printk(KERN_NOTICE DRV_NAME
  370. "please check your network connection\n");
  371. break;
  372. }
  373. count++;
  374. } while (!(phydat & 0x0004));
  375. phydat = read_phy_reg(phyaddr, PHYREG_ANLPAR);
  376. if ((phydat & 0x0100) || (phydat & 0x0040)) {
  377. opmode = FDMODE;
  378. } else {
  379. opmode = 0;
  380. printk(KERN_INFO DRV_NAME
  381. ": Network is set to half duplex\n");
  382. }
  383. #if defined(CONFIG_BFIN_MAC_RMII)
  384. opmode |= RMII; /* For Now only 100MBit are supported */
  385. #endif
  386. bfin_write_EMAC_OPMODE(opmode);
  387. bfin_write_EMAC_MMC_CTL(RSTC | CROLL);
  388. /* Initialize the TX DMA channel registers */
  389. bfin_write_DMA2_X_COUNT(0);
  390. bfin_write_DMA2_X_MODIFY(4);
  391. bfin_write_DMA2_Y_COUNT(0);
  392. bfin_write_DMA2_Y_MODIFY(0);
  393. /* Initialize the RX DMA channel registers */
  394. bfin_write_DMA1_X_COUNT(0);
  395. bfin_write_DMA1_X_MODIFY(4);
  396. bfin_write_DMA1_Y_COUNT(0);
  397. bfin_write_DMA1_Y_MODIFY(0);
  398. }
  399. static void setup_mac_addr(u8 *mac_addr)
  400. {
  401. u32 addr_low = le32_to_cpu(*(__le32 *) & mac_addr[0]);
  402. u16 addr_hi = le16_to_cpu(*(__le16 *) & mac_addr[4]);
  403. /* this depends on a little-endian machine */
  404. bfin_write_EMAC_ADDRLO(addr_low);
  405. bfin_write_EMAC_ADDRHI(addr_hi);
  406. }
  407. static int bf537mac_set_mac_address(struct net_device *dev, void *p)
  408. {
  409. struct sockaddr *addr = p;
  410. if (netif_running(dev))
  411. return -EBUSY;
  412. memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
  413. setup_mac_addr(dev->dev_addr);
  414. return 0;
  415. }
  416. static void adjust_tx_list(void)
  417. {
  418. int timeout_cnt = MAX_TIMEOUT_CNT;
  419. if (tx_list_head->status.status_word != 0
  420. && current_tx_ptr != tx_list_head) {
  421. goto adjust_head; /* released something, just return; */
  422. }
  423. /*
  424. * if nothing released, check wait condition
  425. * current's next can not be the head,
  426. * otherwise the dma will not stop as we want
  427. */
  428. if (current_tx_ptr->next->next == tx_list_head) {
  429. while (tx_list_head->status.status_word == 0) {
  430. mdelay(10);
  431. if (tx_list_head->status.status_word != 0
  432. || !(bfin_read_DMA2_IRQ_STATUS() & 0x08)) {
  433. goto adjust_head;
  434. }
  435. if (timeout_cnt-- < 0) {
  436. printk(KERN_ERR DRV_NAME
  437. ": wait for adjust tx list head timeout\n");
  438. break;
  439. }
  440. }
  441. if (tx_list_head->status.status_word != 0) {
  442. goto adjust_head;
  443. }
  444. }
  445. return;
  446. adjust_head:
  447. do {
  448. tx_list_head->desc_a.config &= ~DMAEN;
  449. tx_list_head->status.status_word = 0;
  450. if (tx_list_head->skb) {
  451. dev_kfree_skb(tx_list_head->skb);
  452. tx_list_head->skb = NULL;
  453. } else {
  454. printk(KERN_ERR DRV_NAME
  455. ": no sk_buff in a transmitted frame!\n");
  456. }
  457. tx_list_head = tx_list_head->next;
  458. } while (tx_list_head->status.status_word != 0
  459. && current_tx_ptr != tx_list_head);
  460. return;
  461. }
  462. static int bf537mac_hard_start_xmit(struct sk_buff *skb,
  463. struct net_device *dev)
  464. {
  465. struct bf537mac_local *lp = netdev_priv(dev);
  466. unsigned int data;
  467. current_tx_ptr->skb = skb;
  468. /*
  469. * Is skb->data always 16-bit aligned?
  470. * Do we need to memcpy((char *)(tail->packet + 2), skb->data, len)?
  471. */
  472. if ((((unsigned int)(skb->data)) & 0x02) == 2) {
  473. /* move skb->data to current_tx_ptr payload */
  474. data = (unsigned int)(skb->data) - 2;
  475. *((unsigned short *)data) = (unsigned short)(skb->len);
  476. current_tx_ptr->desc_a.start_addr = (unsigned long)data;
  477. /* this is important! */
  478. blackfin_dcache_flush_range(data, (data + (skb->len)) + 2);
  479. } else {
  480. *((unsigned short *)(current_tx_ptr->packet)) =
  481. (unsigned short)(skb->len);
  482. memcpy((char *)(current_tx_ptr->packet + 2), skb->data,
  483. (skb->len));
  484. current_tx_ptr->desc_a.start_addr =
  485. (unsigned long)current_tx_ptr->packet;
  486. if (current_tx_ptr->status.status_word != 0)
  487. current_tx_ptr->status.status_word = 0;
  488. blackfin_dcache_flush_range((unsigned int)current_tx_ptr->
  489. packet,
  490. (unsigned int)(current_tx_ptr->
  491. packet + skb->len) +
  492. 2);
  493. }
  494. /* enable this packet's dma */
  495. current_tx_ptr->desc_a.config |= DMAEN;
  496. /* tx dma is running, just return */
  497. if (bfin_read_DMA2_IRQ_STATUS() & 0x08)
  498. goto out;
  499. /* tx dma is not running */
  500. bfin_write_DMA2_NEXT_DESC_PTR(&(current_tx_ptr->desc_a));
  501. /* dma enabled, read from memory, size is 6 */
  502. bfin_write_DMA2_CONFIG(current_tx_ptr->desc_a.config);
  503. /* Turn on the EMAC tx */
  504. bfin_write_EMAC_OPMODE(bfin_read_EMAC_OPMODE() | TE);
  505. out:
  506. adjust_tx_list();
  507. current_tx_ptr = current_tx_ptr->next;
  508. dev->trans_start = jiffies;
  509. dev->stats.tx_packets++;
  510. dev->stats.tx_bytes += (skb->len);
  511. return 0;
  512. }
  513. static void bf537mac_rx(struct net_device *dev)
  514. {
  515. struct sk_buff *skb, *new_skb;
  516. struct bf537mac_local *lp = netdev_priv(dev);
  517. unsigned short len;
  518. /* allocate a new skb for next time receive */
  519. skb = current_rx_ptr->skb;
  520. new_skb = dev_alloc_skb(PKT_BUF_SZ + 2);
  521. if (!new_skb) {
  522. printk(KERN_NOTICE DRV_NAME
  523. ": rx: low on mem - packet dropped\n");
  524. dev->stats.rx_dropped++;
  525. goto out;
  526. }
  527. /* reserve 2 bytes for RXDWA padding */
  528. skb_reserve(new_skb, 2);
  529. current_rx_ptr->skb = new_skb;
  530. current_rx_ptr->desc_a.start_addr = (unsigned long)new_skb->data - 2;
  531. len = (unsigned short)((current_rx_ptr->status.status_word) & RX_FRLEN);
  532. skb_put(skb, len);
  533. blackfin_dcache_invalidate_range((unsigned long)skb->head,
  534. (unsigned long)skb->tail);
  535. dev->last_rx = jiffies;
  536. skb->dev = dev;
  537. skb->protocol = eth_type_trans(skb, dev);
  538. #if defined(BFIN_MAC_CSUM_OFFLOAD)
  539. skb->csum = current_rx_ptr->status.ip_payload_csum;
  540. skb->ip_summed = CHECKSUM_PARTIAL;
  541. #endif
  542. netif_rx(skb);
  543. dev->stats.rx_packets++;
  544. dev->stats.rx_bytes += len;
  545. current_rx_ptr->status.status_word = 0x00000000;
  546. current_rx_ptr = current_rx_ptr->next;
  547. out:
  548. return;
  549. }
  550. /* interrupt routine to handle rx and error signal */
  551. static irqreturn_t bf537mac_interrupt(int irq, void *dev_id)
  552. {
  553. struct net_device *dev = dev_id;
  554. int number = 0;
  555. get_one_packet:
  556. if (current_rx_ptr->status.status_word == 0) {
  557. /* no more new packet received */
  558. if (number == 0) {
  559. if (current_rx_ptr->next->status.status_word != 0) {
  560. current_rx_ptr = current_rx_ptr->next;
  561. goto real_rx;
  562. }
  563. }
  564. bfin_write_DMA1_IRQ_STATUS(bfin_read_DMA1_IRQ_STATUS() |
  565. DMA_DONE | DMA_ERR);
  566. return IRQ_HANDLED;
  567. }
  568. real_rx:
  569. bf537mac_rx(dev);
  570. number++;
  571. goto get_one_packet;
  572. }
  573. #ifdef CONFIG_NET_POLL_CONTROLLER
  574. static void bf537mac_poll(struct net_device *dev)
  575. {
  576. disable_irq(IRQ_MAC_RX);
  577. bf537mac_interrupt(IRQ_MAC_RX, dev);
  578. enable_irq(IRQ_MAC_RX);
  579. }
  580. #endif /* CONFIG_NET_POLL_CONTROLLER */
  581. static void bf537mac_disable(void)
  582. {
  583. unsigned int opmode;
  584. opmode = bfin_read_EMAC_OPMODE();
  585. opmode &= (~RE);
  586. opmode &= (~TE);
  587. /* Turn off the EMAC */
  588. bfin_write_EMAC_OPMODE(opmode);
  589. }
  590. /*
  591. * Enable Interrupts, Receive, and Transmit
  592. */
  593. static int bf537mac_enable(struct net_device *dev)
  594. {
  595. u32 opmode;
  596. pr_debug("%s: %s\n", dev->name, __FUNCTION__);
  597. /* Set RX DMA */
  598. bfin_write_DMA1_NEXT_DESC_PTR(&(rx_list_head->desc_a));
  599. bfin_write_DMA1_CONFIG(rx_list_head->desc_a.config);
  600. /* Wait MII done */
  601. poll_mdc_done();
  602. /* We enable only RX here */
  603. /* ASTP : Enable Automatic Pad Stripping
  604. PR : Promiscuous Mode for test
  605. PSF : Receive frames with total length less than 64 bytes.
  606. FDMODE : Full Duplex Mode
  607. LB : Internal Loopback for test
  608. RE : Receiver Enable */
  609. opmode = bfin_read_EMAC_OPMODE();
  610. if (opmode & FDMODE)
  611. opmode |= PSF;
  612. else
  613. opmode |= DRO | DC | PSF;
  614. opmode |= RE;
  615. #if defined(CONFIG_BFIN_MAC_RMII)
  616. opmode |= RMII; /* For Now only 100MBit are supported */
  617. #ifdef CONFIG_BF_REV_0_2
  618. opmode |= TE;
  619. #endif
  620. #endif
  621. /* Turn on the EMAC rx */
  622. bfin_write_EMAC_OPMODE(opmode);
  623. return 0;
  624. }
  625. /* Our watchdog timed out. Called by the networking layer */
  626. static void bf537mac_timeout(struct net_device *dev)
  627. {
  628. pr_debug("%s: %s\n", dev->name, __FUNCTION__);
  629. bf537mac_disable();
  630. /* reset tx queue */
  631. tx_list_tail = tx_list_head->next;
  632. bf537mac_enable(dev);
  633. /* We can accept TX packets again */
  634. dev->trans_start = jiffies;
  635. netif_wake_queue(dev);
  636. }
  637. /*
  638. * This routine will, depending on the values passed to it,
  639. * either make it accept multicast packets, go into
  640. * promiscuous mode (for TCPDUMP and cousins) or accept
  641. * a select set of multicast packets
  642. */
  643. static void bf537mac_set_multicast_list(struct net_device *dev)
  644. {
  645. u32 sysctl;
  646. if (dev->flags & IFF_PROMISC) {
  647. printk(KERN_INFO "%s: set to promisc mode\n", dev->name);
  648. sysctl = bfin_read_EMAC_OPMODE();
  649. sysctl |= RAF;
  650. bfin_write_EMAC_OPMODE(sysctl);
  651. } else if (dev->flags & IFF_ALLMULTI || dev->mc_count) {
  652. /* accept all multicast */
  653. sysctl = bfin_read_EMAC_OPMODE();
  654. sysctl |= PAM;
  655. bfin_write_EMAC_OPMODE(sysctl);
  656. } else {
  657. /* clear promisc or multicast mode */
  658. sysctl = bfin_read_EMAC_OPMODE();
  659. sysctl &= ~(RAF | PAM);
  660. bfin_write_EMAC_OPMODE(sysctl);
  661. }
  662. }
  663. /*
  664. * this puts the device in an inactive state
  665. */
  666. static void bf537mac_shutdown(struct net_device *dev)
  667. {
  668. /* Turn off the EMAC */
  669. bfin_write_EMAC_OPMODE(0x00000000);
  670. /* Turn off the EMAC RX DMA */
  671. bfin_write_DMA1_CONFIG(0x0000);
  672. bfin_write_DMA2_CONFIG(0x0000);
  673. }
  674. /*
  675. * Open and Initialize the interface
  676. *
  677. * Set up everything, reset the card, etc..
  678. */
  679. static int bf537mac_open(struct net_device *dev)
  680. {
  681. int retval;
  682. pr_debug("%s: %s\n", dev->name, __FUNCTION__);
  683. /*
  684. * Check that the address is valid. If its not, refuse
  685. * to bring the device up. The user must specify an
  686. * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
  687. */
  688. if (!is_valid_ether_addr(dev->dev_addr)) {
  689. printk(KERN_WARNING DRV_NAME ": no valid ethernet hw addr\n");
  690. return -EINVAL;
  691. }
  692. /* initial rx and tx list */
  693. retval = desc_list_init();
  694. if (retval)
  695. return retval;
  696. bf537mac_setphy(dev);
  697. setup_system_regs(dev);
  698. bf537mac_disable();
  699. bf537mac_enable(dev);
  700. pr_debug("hardware init finished\n");
  701. netif_start_queue(dev);
  702. netif_carrier_on(dev);
  703. return 0;
  704. }
  705. /*
  706. *
  707. * this makes the board clean up everything that it can
  708. * and not talk to the outside world. Caused by
  709. * an 'ifconfig ethX down'
  710. */
  711. static int bf537mac_close(struct net_device *dev)
  712. {
  713. pr_debug("%s: %s\n", dev->name, __FUNCTION__);
  714. netif_stop_queue(dev);
  715. netif_carrier_off(dev);
  716. /* clear everything */
  717. bf537mac_shutdown(dev);
  718. /* free the rx/tx buffers */
  719. desc_list_free();
  720. return 0;
  721. }
  722. static int __init bf537mac_probe(struct net_device *dev)
  723. {
  724. struct bf537mac_local *lp = netdev_priv(dev);
  725. int retval;
  726. /* Grab the MAC address in the MAC */
  727. *(__le32 *) (&(dev->dev_addr[0])) = cpu_to_le32(bfin_read_EMAC_ADDRLO());
  728. *(__le16 *) (&(dev->dev_addr[4])) = cpu_to_le16((u16) bfin_read_EMAC_ADDRHI());
  729. /* probe mac */
  730. /*todo: how to proble? which is revision_register */
  731. bfin_write_EMAC_ADDRLO(0x12345678);
  732. if (bfin_read_EMAC_ADDRLO() != 0x12345678) {
  733. pr_debug("can't detect bf537 mac!\n");
  734. retval = -ENODEV;
  735. goto err_out;
  736. }
  737. /* set the GPIO pins to Ethernet mode */
  738. retval = setup_pin_mux(1);
  739. if (retval)
  740. return retval;
  741. /*Is it valid? (Did bootloader initialize it?) */
  742. if (!is_valid_ether_addr(dev->dev_addr)) {
  743. /* Grab the MAC from the board somehow - this is done in the
  744. arch/blackfin/mach-bf537/boards/eth_mac.c */
  745. get_bf537_ether_addr(dev->dev_addr);
  746. }
  747. /* If still not valid, get a random one */
  748. if (!is_valid_ether_addr(dev->dev_addr)) {
  749. random_ether_addr(dev->dev_addr);
  750. }
  751. setup_mac_addr(dev->dev_addr);
  752. /* Fill in the fields of the device structure with ethernet values. */
  753. ether_setup(dev);
  754. dev->open = bf537mac_open;
  755. dev->stop = bf537mac_close;
  756. dev->hard_start_xmit = bf537mac_hard_start_xmit;
  757. dev->set_mac_address = bf537mac_set_mac_address;
  758. dev->tx_timeout = bf537mac_timeout;
  759. dev->set_multicast_list = bf537mac_set_multicast_list;
  760. #ifdef CONFIG_NET_POLL_CONTROLLER
  761. dev->poll_controller = bf537mac_poll;
  762. #endif
  763. /* fill in some of the fields */
  764. lp->version = 1;
  765. lp->PhyAddr = 0x01;
  766. lp->CLKIN = 25;
  767. lp->FullDuplex = 0;
  768. lp->Negotiate = 1;
  769. lp->FlowControl = 0;
  770. spin_lock_init(&lp->lock);
  771. /* now, enable interrupts */
  772. /* register irq handler */
  773. if (request_irq
  774. (IRQ_MAC_RX, bf537mac_interrupt, IRQF_DISABLED | IRQF_SHARED,
  775. "BFIN537_MAC_RX", dev)) {
  776. printk(KERN_WARNING DRV_NAME
  777. ": Unable to attach BlackFin MAC RX interrupt\n");
  778. return -EBUSY;
  779. }
  780. /* Enable PHY output early */
  781. if (!(bfin_read_VR_CTL() & PHYCLKOE))
  782. bfin_write_VR_CTL(bfin_read_VR_CTL() | PHYCLKOE);
  783. retval = register_netdev(dev);
  784. if (retval == 0) {
  785. /* now, print out the card info, in a short format.. */
  786. printk(KERN_INFO "%s: Version %s, %s\n",
  787. DRV_NAME, DRV_VERSION, DRV_DESC);
  788. }
  789. err_out:
  790. return retval;
  791. }
  792. static int bfin_mac_probe(struct platform_device *pdev)
  793. {
  794. struct net_device *ndev;
  795. ndev = alloc_etherdev(sizeof(struct bf537mac_local));
  796. if (!ndev) {
  797. printk(KERN_WARNING DRV_NAME ": could not allocate device\n");
  798. return -ENOMEM;
  799. }
  800. SET_NETDEV_DEV(ndev, &pdev->dev);
  801. platform_set_drvdata(pdev, ndev);
  802. if (bf537mac_probe(ndev) != 0) {
  803. platform_set_drvdata(pdev, NULL);
  804. free_netdev(ndev);
  805. printk(KERN_WARNING DRV_NAME ": not found\n");
  806. return -ENODEV;
  807. }
  808. return 0;
  809. }
  810. static int bfin_mac_remove(struct platform_device *pdev)
  811. {
  812. struct net_device *ndev = platform_get_drvdata(pdev);
  813. platform_set_drvdata(pdev, NULL);
  814. unregister_netdev(ndev);
  815. free_irq(IRQ_MAC_RX, ndev);
  816. free_netdev(ndev);
  817. setup_pin_mux(0);
  818. return 0;
  819. }
  820. #ifdef CONFIG_PM
  821. static int bfin_mac_suspend(struct platform_device *pdev, pm_message_t mesg)
  822. {
  823. struct net_device *net_dev = platform_get_drvdata(pdev);
  824. if (netif_running(net_dev))
  825. bf537mac_close(net_dev);
  826. return 0;
  827. }
  828. static int bfin_mac_resume(struct platform_device *pdev)
  829. {
  830. struct net_device *net_dev = platform_get_drvdata(pdev);
  831. if (netif_running(net_dev))
  832. bf537mac_open(net_dev);
  833. return 0;
  834. }
  835. #else
  836. #define bfin_mac_suspend NULL
  837. #define bfin_mac_resume NULL
  838. #endif /* CONFIG_PM */
  839. static struct platform_driver bfin_mac_driver = {
  840. .probe = bfin_mac_probe,
  841. .remove = bfin_mac_remove,
  842. .resume = bfin_mac_resume,
  843. .suspend = bfin_mac_suspend,
  844. .driver = {
  845. .name = DRV_NAME,
  846. },
  847. };
  848. static int __init bfin_mac_init(void)
  849. {
  850. return platform_driver_register(&bfin_mac_driver);
  851. }
  852. module_init(bfin_mac_init);
  853. static void __exit bfin_mac_cleanup(void)
  854. {
  855. platform_driver_unregister(&bfin_mac_driver);
  856. }
  857. module_exit(bfin_mac_cleanup);