cpuidle-zynq.c 2.3 KB

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  1. /*
  2. * Copyright (C) 2012-2013 Xilinx
  3. *
  4. * CPU idle support for Xilinx Zynq
  5. *
  6. * based on arch/arm/mach-at91/cpuidle.c
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms and conditions of the GNU General Public License,
  10. * version 2, as published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program. If not, see <http://www.gnu.org/licenses/>.
  19. *
  20. * The cpu idle uses wait-for-interrupt and RAM self refresh in order
  21. * to implement two idle states -
  22. * #1 wait-for-interrupt
  23. * #2 wait-for-interrupt and RAM self refresh
  24. *
  25. * Maintainer: Michal Simek <michal.simek@xilinx.com>
  26. */
  27. #include <linux/init.h>
  28. #include <linux/cpu_pm.h>
  29. #include <linux/cpuidle.h>
  30. #include <linux/platform_device.h>
  31. #include <asm/proc-fns.h>
  32. #include <asm/cpuidle.h>
  33. #define ZYNQ_MAX_STATES 2
  34. /* Actual code that puts the SoC in different idle states */
  35. static int zynq_enter_idle(struct cpuidle_device *dev,
  36. struct cpuidle_driver *drv, int index)
  37. {
  38. /* Devices must be stopped here */
  39. cpu_pm_enter();
  40. /* Add code for DDR self refresh start */
  41. cpu_do_idle();
  42. /* Add code for DDR self refresh stop */
  43. cpu_pm_exit();
  44. return index;
  45. }
  46. static struct cpuidle_driver zynq_idle_driver = {
  47. .name = "zynq_idle",
  48. .owner = THIS_MODULE,
  49. .states = {
  50. ARM_CPUIDLE_WFI_STATE,
  51. {
  52. .enter = zynq_enter_idle,
  53. .exit_latency = 10,
  54. .target_residency = 10000,
  55. .flags = CPUIDLE_FLAG_TIME_VALID |
  56. CPUIDLE_FLAG_TIMER_STOP,
  57. .name = "RAM_SR",
  58. .desc = "WFI and RAM Self Refresh",
  59. },
  60. },
  61. .safe_state_index = 0,
  62. .state_count = ZYNQ_MAX_STATES,
  63. };
  64. /* Initialize CPU idle by registering the idle states */
  65. static int zynq_cpuidle_probe(struct platform_device *pdev)
  66. {
  67. pr_info("Xilinx Zynq CpuIdle Driver started\n");
  68. return cpuidle_register(&zynq_idle_driver, NULL);
  69. }
  70. static struct platform_driver zynq_cpuidle_driver = {
  71. .driver = {
  72. .name = "cpuidle-zynq",
  73. .owner = THIS_MODULE,
  74. },
  75. .probe = zynq_cpuidle_probe,
  76. };
  77. module_platform_driver(zynq_cpuidle_driver);