ice1724.c 76 KB

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  1. /*
  2. * ALSA driver for VT1724 ICEnsemble ICE1724 / VIA VT1724 (Envy24HT)
  3. * VIA VT1720 (Envy24PT)
  4. *
  5. * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
  6. * 2002 James Stafford <jstafford@ampltd.com>
  7. * 2003 Takashi Iwai <tiwai@suse.de>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. *
  23. */
  24. #include <linux/io.h>
  25. #include <linux/delay.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/init.h>
  28. #include <linux/pci.h>
  29. #include <linux/slab.h>
  30. #include <linux/moduleparam.h>
  31. #include <linux/mutex.h>
  32. #include <sound/core.h>
  33. #include <sound/info.h>
  34. #include <sound/rawmidi.h>
  35. #include <sound/initval.h>
  36. #include <sound/asoundef.h>
  37. #include "ice1712.h"
  38. #include "envy24ht.h"
  39. /* lowlevel routines */
  40. #include "amp.h"
  41. #include "revo.h"
  42. #include "aureon.h"
  43. #include "vt1720_mobo.h"
  44. #include "pontis.h"
  45. #include "prodigy192.h"
  46. #include "prodigy_hifi.h"
  47. #include "juli.h"
  48. #include "maya44.h"
  49. #include "phase.h"
  50. #include "wtm.h"
  51. #include "se.h"
  52. MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
  53. MODULE_DESCRIPTION("VIA ICEnsemble ICE1724/1720 (Envy24HT/PT)");
  54. MODULE_LICENSE("GPL");
  55. MODULE_SUPPORTED_DEVICE("{"
  56. REVO_DEVICE_DESC
  57. AMP_AUDIO2000_DEVICE_DESC
  58. AUREON_DEVICE_DESC
  59. VT1720_MOBO_DEVICE_DESC
  60. PONTIS_DEVICE_DESC
  61. PRODIGY192_DEVICE_DESC
  62. PRODIGY_HIFI_DEVICE_DESC
  63. JULI_DEVICE_DESC
  64. MAYA44_DEVICE_DESC
  65. PHASE_DEVICE_DESC
  66. WTM_DEVICE_DESC
  67. SE_DEVICE_DESC
  68. "{VIA,VT1720},"
  69. "{VIA,VT1724},"
  70. "{ICEnsemble,Generic ICE1724},"
  71. "{ICEnsemble,Generic Envy24HT}"
  72. "{ICEnsemble,Generic Envy24PT}}");
  73. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
  74. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
  75. static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
  76. static char *model[SNDRV_CARDS];
  77. module_param_array(index, int, NULL, 0444);
  78. MODULE_PARM_DESC(index, "Index value for ICE1724 soundcard.");
  79. module_param_array(id, charp, NULL, 0444);
  80. MODULE_PARM_DESC(id, "ID string for ICE1724 soundcard.");
  81. module_param_array(enable, bool, NULL, 0444);
  82. MODULE_PARM_DESC(enable, "Enable ICE1724 soundcard.");
  83. module_param_array(model, charp, NULL, 0444);
  84. MODULE_PARM_DESC(model, "Use the given board model.");
  85. /* Both VT1720 and VT1724 have the same PCI IDs */
  86. static const struct pci_device_id snd_vt1724_ids[] = {
  87. { PCI_VDEVICE(ICE, PCI_DEVICE_ID_VT1724), 0 },
  88. { 0, }
  89. };
  90. MODULE_DEVICE_TABLE(pci, snd_vt1724_ids);
  91. static int PRO_RATE_LOCKED;
  92. static int PRO_RATE_RESET = 1;
  93. static unsigned int PRO_RATE_DEFAULT = 44100;
  94. /*
  95. * Basic I/O
  96. */
  97. /*
  98. * default rates, default clock routines
  99. */
  100. /* check whether the clock mode is spdif-in */
  101. static inline int stdclock_is_spdif_master(struct snd_ice1712 *ice)
  102. {
  103. return (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER) ? 1 : 0;
  104. }
  105. static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
  106. {
  107. return ice->is_spdif_master(ice) || PRO_RATE_LOCKED;
  108. }
  109. /*
  110. * ac97 section
  111. */
  112. static unsigned char snd_vt1724_ac97_ready(struct snd_ice1712 *ice)
  113. {
  114. unsigned char old_cmd;
  115. int tm;
  116. for (tm = 0; tm < 0x10000; tm++) {
  117. old_cmd = inb(ICEMT1724(ice, AC97_CMD));
  118. if (old_cmd & (VT1724_AC97_WRITE | VT1724_AC97_READ))
  119. continue;
  120. if (!(old_cmd & VT1724_AC97_READY))
  121. continue;
  122. return old_cmd;
  123. }
  124. snd_printd(KERN_ERR "snd_vt1724_ac97_ready: timeout\n");
  125. return old_cmd;
  126. }
  127. static int snd_vt1724_ac97_wait_bit(struct snd_ice1712 *ice, unsigned char bit)
  128. {
  129. int tm;
  130. for (tm = 0; tm < 0x10000; tm++)
  131. if ((inb(ICEMT1724(ice, AC97_CMD)) & bit) == 0)
  132. return 0;
  133. snd_printd(KERN_ERR "snd_vt1724_ac97_wait_bit: timeout\n");
  134. return -EIO;
  135. }
  136. static void snd_vt1724_ac97_write(struct snd_ac97 *ac97,
  137. unsigned short reg,
  138. unsigned short val)
  139. {
  140. struct snd_ice1712 *ice = ac97->private_data;
  141. unsigned char old_cmd;
  142. old_cmd = snd_vt1724_ac97_ready(ice);
  143. old_cmd &= ~VT1724_AC97_ID_MASK;
  144. old_cmd |= ac97->num;
  145. outb(reg, ICEMT1724(ice, AC97_INDEX));
  146. outw(val, ICEMT1724(ice, AC97_DATA));
  147. outb(old_cmd | VT1724_AC97_WRITE, ICEMT1724(ice, AC97_CMD));
  148. snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_WRITE);
  149. }
  150. static unsigned short snd_vt1724_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
  151. {
  152. struct snd_ice1712 *ice = ac97->private_data;
  153. unsigned char old_cmd;
  154. old_cmd = snd_vt1724_ac97_ready(ice);
  155. old_cmd &= ~VT1724_AC97_ID_MASK;
  156. old_cmd |= ac97->num;
  157. outb(reg, ICEMT1724(ice, AC97_INDEX));
  158. outb(old_cmd | VT1724_AC97_READ, ICEMT1724(ice, AC97_CMD));
  159. if (snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_READ) < 0)
  160. return ~0;
  161. return inw(ICEMT1724(ice, AC97_DATA));
  162. }
  163. /*
  164. * GPIO operations
  165. */
  166. /* set gpio direction 0 = read, 1 = write */
  167. static void snd_vt1724_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
  168. {
  169. outl(data, ICEREG1724(ice, GPIO_DIRECTION));
  170. inw(ICEREG1724(ice, GPIO_DIRECTION)); /* dummy read for pci-posting */
  171. }
  172. /* get gpio direction 0 = read, 1 = write */
  173. static unsigned int snd_vt1724_get_gpio_dir(struct snd_ice1712 *ice)
  174. {
  175. return inl(ICEREG1724(ice, GPIO_DIRECTION));
  176. }
  177. /* set the gpio mask (0 = writable) */
  178. static void snd_vt1724_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
  179. {
  180. outw(data, ICEREG1724(ice, GPIO_WRITE_MASK));
  181. if (!ice->vt1720) /* VT1720 supports only 16 GPIO bits */
  182. outb((data >> 16) & 0xff, ICEREG1724(ice, GPIO_WRITE_MASK_22));
  183. inw(ICEREG1724(ice, GPIO_WRITE_MASK)); /* dummy read for pci-posting */
  184. }
  185. static unsigned int snd_vt1724_get_gpio_mask(struct snd_ice1712 *ice)
  186. {
  187. unsigned int mask;
  188. if (!ice->vt1720)
  189. mask = (unsigned int)inb(ICEREG1724(ice, GPIO_WRITE_MASK_22));
  190. else
  191. mask = 0;
  192. mask = (mask << 16) | inw(ICEREG1724(ice, GPIO_WRITE_MASK));
  193. return mask;
  194. }
  195. static void snd_vt1724_set_gpio_data(struct snd_ice1712 *ice, unsigned int data)
  196. {
  197. outw(data, ICEREG1724(ice, GPIO_DATA));
  198. if (!ice->vt1720)
  199. outb(data >> 16, ICEREG1724(ice, GPIO_DATA_22));
  200. inw(ICEREG1724(ice, GPIO_DATA)); /* dummy read for pci-posting */
  201. }
  202. static unsigned int snd_vt1724_get_gpio_data(struct snd_ice1712 *ice)
  203. {
  204. unsigned int data;
  205. if (!ice->vt1720)
  206. data = (unsigned int)inb(ICEREG1724(ice, GPIO_DATA_22));
  207. else
  208. data = 0;
  209. data = (data << 16) | inw(ICEREG1724(ice, GPIO_DATA));
  210. return data;
  211. }
  212. /*
  213. * MIDI
  214. */
  215. static void vt1724_midi_clear_rx(struct snd_ice1712 *ice)
  216. {
  217. unsigned int count;
  218. for (count = inb(ICEREG1724(ice, MPU_RXFIFO)); count > 0; --count)
  219. inb(ICEREG1724(ice, MPU_DATA));
  220. }
  221. static inline struct snd_rawmidi_substream *
  222. get_rawmidi_substream(struct snd_ice1712 *ice, unsigned int stream)
  223. {
  224. return list_first_entry(&ice->rmidi[0]->streams[stream].substreams,
  225. struct snd_rawmidi_substream, list);
  226. }
  227. static void enable_midi_irq(struct snd_ice1712 *ice, u8 flag, int enable);
  228. static void vt1724_midi_write(struct snd_ice1712 *ice)
  229. {
  230. struct snd_rawmidi_substream *s;
  231. int count, i;
  232. u8 buffer[32];
  233. s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_OUTPUT);
  234. count = 31 - inb(ICEREG1724(ice, MPU_TXFIFO));
  235. if (count > 0) {
  236. count = snd_rawmidi_transmit(s, buffer, count);
  237. for (i = 0; i < count; ++i)
  238. outb(buffer[i], ICEREG1724(ice, MPU_DATA));
  239. }
  240. /* mask irq when all bytes have been transmitted.
  241. * enabled again in output_trigger when the new data comes in.
  242. */
  243. enable_midi_irq(ice, VT1724_IRQ_MPU_TX,
  244. !snd_rawmidi_transmit_empty(s));
  245. }
  246. static void vt1724_midi_read(struct snd_ice1712 *ice)
  247. {
  248. struct snd_rawmidi_substream *s;
  249. int count, i;
  250. u8 buffer[32];
  251. s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_INPUT);
  252. count = inb(ICEREG1724(ice, MPU_RXFIFO));
  253. if (count > 0) {
  254. count = min(count, 32);
  255. for (i = 0; i < count; ++i)
  256. buffer[i] = inb(ICEREG1724(ice, MPU_DATA));
  257. snd_rawmidi_receive(s, buffer, count);
  258. }
  259. }
  260. /* call with ice->reg_lock */
  261. static void enable_midi_irq(struct snd_ice1712 *ice, u8 flag, int enable)
  262. {
  263. u8 mask = inb(ICEREG1724(ice, IRQMASK));
  264. if (enable)
  265. mask &= ~flag;
  266. else
  267. mask |= flag;
  268. outb(mask, ICEREG1724(ice, IRQMASK));
  269. }
  270. static void vt1724_enable_midi_irq(struct snd_rawmidi_substream *substream,
  271. u8 flag, int enable)
  272. {
  273. struct snd_ice1712 *ice = substream->rmidi->private_data;
  274. spin_lock_irq(&ice->reg_lock);
  275. enable_midi_irq(ice, flag, enable);
  276. spin_unlock_irq(&ice->reg_lock);
  277. }
  278. static int vt1724_midi_output_open(struct snd_rawmidi_substream *s)
  279. {
  280. return 0;
  281. }
  282. static int vt1724_midi_output_close(struct snd_rawmidi_substream *s)
  283. {
  284. return 0;
  285. }
  286. static void vt1724_midi_output_trigger(struct snd_rawmidi_substream *s, int up)
  287. {
  288. struct snd_ice1712 *ice = s->rmidi->private_data;
  289. unsigned long flags;
  290. spin_lock_irqsave(&ice->reg_lock, flags);
  291. if (up) {
  292. ice->midi_output = 1;
  293. vt1724_midi_write(ice);
  294. } else {
  295. ice->midi_output = 0;
  296. enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0);
  297. }
  298. spin_unlock_irqrestore(&ice->reg_lock, flags);
  299. }
  300. static void vt1724_midi_output_drain(struct snd_rawmidi_substream *s)
  301. {
  302. struct snd_ice1712 *ice = s->rmidi->private_data;
  303. unsigned long timeout;
  304. vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_TX, 0);
  305. /* 32 bytes should be transmitted in less than about 12 ms */
  306. timeout = jiffies + msecs_to_jiffies(15);
  307. do {
  308. if (inb(ICEREG1724(ice, MPU_CTRL)) & VT1724_MPU_TX_EMPTY)
  309. break;
  310. schedule_timeout_uninterruptible(1);
  311. } while (time_after(timeout, jiffies));
  312. }
  313. static struct snd_rawmidi_ops vt1724_midi_output_ops = {
  314. .open = vt1724_midi_output_open,
  315. .close = vt1724_midi_output_close,
  316. .trigger = vt1724_midi_output_trigger,
  317. .drain = vt1724_midi_output_drain,
  318. };
  319. static int vt1724_midi_input_open(struct snd_rawmidi_substream *s)
  320. {
  321. vt1724_midi_clear_rx(s->rmidi->private_data);
  322. vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 1);
  323. return 0;
  324. }
  325. static int vt1724_midi_input_close(struct snd_rawmidi_substream *s)
  326. {
  327. vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 0);
  328. return 0;
  329. }
  330. static void vt1724_midi_input_trigger(struct snd_rawmidi_substream *s, int up)
  331. {
  332. struct snd_ice1712 *ice = s->rmidi->private_data;
  333. unsigned long flags;
  334. spin_lock_irqsave(&ice->reg_lock, flags);
  335. if (up) {
  336. ice->midi_input = 1;
  337. vt1724_midi_read(ice);
  338. } else {
  339. ice->midi_input = 0;
  340. }
  341. spin_unlock_irqrestore(&ice->reg_lock, flags);
  342. }
  343. static struct snd_rawmidi_ops vt1724_midi_input_ops = {
  344. .open = vt1724_midi_input_open,
  345. .close = vt1724_midi_input_close,
  346. .trigger = vt1724_midi_input_trigger,
  347. };
  348. /*
  349. * Interrupt handler
  350. */
  351. static irqreturn_t snd_vt1724_interrupt(int irq, void *dev_id)
  352. {
  353. struct snd_ice1712 *ice = dev_id;
  354. unsigned char status;
  355. unsigned char status_mask =
  356. VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX | VT1724_IRQ_MTPCM;
  357. int handled = 0;
  358. int timeout = 0;
  359. while (1) {
  360. status = inb(ICEREG1724(ice, IRQSTAT));
  361. status &= status_mask;
  362. if (status == 0)
  363. break;
  364. spin_lock(&ice->reg_lock);
  365. if (++timeout > 10) {
  366. status = inb(ICEREG1724(ice, IRQSTAT));
  367. printk(KERN_ERR "ice1724: Too long irq loop, "
  368. "status = 0x%x\n", status);
  369. if (status & VT1724_IRQ_MPU_TX) {
  370. printk(KERN_ERR "ice1724: Disabling MPU_TX\n");
  371. enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0);
  372. }
  373. spin_unlock(&ice->reg_lock);
  374. break;
  375. }
  376. handled = 1;
  377. if (status & VT1724_IRQ_MPU_TX) {
  378. if (ice->midi_output)
  379. vt1724_midi_write(ice);
  380. else
  381. enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0);
  382. /* Due to mysterical reasons, MPU_TX is always
  383. * generated (and can't be cleared) when a PCM
  384. * playback is going. So let's ignore at the
  385. * next loop.
  386. */
  387. status_mask &= ~VT1724_IRQ_MPU_TX;
  388. }
  389. if (status & VT1724_IRQ_MPU_RX) {
  390. if (ice->midi_input)
  391. vt1724_midi_read(ice);
  392. else
  393. vt1724_midi_clear_rx(ice);
  394. }
  395. /* ack MPU irq */
  396. outb(status, ICEREG1724(ice, IRQSTAT));
  397. spin_unlock(&ice->reg_lock);
  398. if (status & VT1724_IRQ_MTPCM) {
  399. /*
  400. * Multi-track PCM
  401. * PCM assignment are:
  402. * Playback DMA0 (M/C) = playback_pro_substream
  403. * Playback DMA1 = playback_con_substream_ds[0]
  404. * Playback DMA2 = playback_con_substream_ds[1]
  405. * Playback DMA3 = playback_con_substream_ds[2]
  406. * Playback DMA4 (SPDIF) = playback_con_substream
  407. * Record DMA0 = capture_pro_substream
  408. * Record DMA1 = capture_con_substream
  409. */
  410. unsigned char mtstat = inb(ICEMT1724(ice, IRQ));
  411. if (mtstat & VT1724_MULTI_PDMA0) {
  412. if (ice->playback_pro_substream)
  413. snd_pcm_period_elapsed(ice->playback_pro_substream);
  414. }
  415. if (mtstat & VT1724_MULTI_RDMA0) {
  416. if (ice->capture_pro_substream)
  417. snd_pcm_period_elapsed(ice->capture_pro_substream);
  418. }
  419. if (mtstat & VT1724_MULTI_PDMA1) {
  420. if (ice->playback_con_substream_ds[0])
  421. snd_pcm_period_elapsed(ice->playback_con_substream_ds[0]);
  422. }
  423. if (mtstat & VT1724_MULTI_PDMA2) {
  424. if (ice->playback_con_substream_ds[1])
  425. snd_pcm_period_elapsed(ice->playback_con_substream_ds[1]);
  426. }
  427. if (mtstat & VT1724_MULTI_PDMA3) {
  428. if (ice->playback_con_substream_ds[2])
  429. snd_pcm_period_elapsed(ice->playback_con_substream_ds[2]);
  430. }
  431. if (mtstat & VT1724_MULTI_PDMA4) {
  432. if (ice->playback_con_substream)
  433. snd_pcm_period_elapsed(ice->playback_con_substream);
  434. }
  435. if (mtstat & VT1724_MULTI_RDMA1) {
  436. if (ice->capture_con_substream)
  437. snd_pcm_period_elapsed(ice->capture_con_substream);
  438. }
  439. /* ack anyway to avoid freeze */
  440. outb(mtstat, ICEMT1724(ice, IRQ));
  441. /* ought to really handle this properly */
  442. if (mtstat & VT1724_MULTI_FIFO_ERR) {
  443. unsigned char fstat = inb(ICEMT1724(ice, DMA_FIFO_ERR));
  444. outb(fstat, ICEMT1724(ice, DMA_FIFO_ERR));
  445. outb(VT1724_MULTI_FIFO_ERR | inb(ICEMT1724(ice, DMA_INT_MASK)), ICEMT1724(ice, DMA_INT_MASK));
  446. /* If I don't do this, I get machine lockup due to continual interrupts */
  447. }
  448. }
  449. }
  450. return IRQ_RETVAL(handled);
  451. }
  452. /*
  453. * PCM code - professional part (multitrack)
  454. */
  455. static unsigned int rates[] = {
  456. 8000, 9600, 11025, 12000, 16000, 22050, 24000,
  457. 32000, 44100, 48000, 64000, 88200, 96000,
  458. 176400, 192000,
  459. };
  460. static struct snd_pcm_hw_constraint_list hw_constraints_rates_96 = {
  461. .count = ARRAY_SIZE(rates) - 2, /* up to 96000 */
  462. .list = rates,
  463. .mask = 0,
  464. };
  465. static struct snd_pcm_hw_constraint_list hw_constraints_rates_48 = {
  466. .count = ARRAY_SIZE(rates) - 5, /* up to 48000 */
  467. .list = rates,
  468. .mask = 0,
  469. };
  470. static struct snd_pcm_hw_constraint_list hw_constraints_rates_192 = {
  471. .count = ARRAY_SIZE(rates),
  472. .list = rates,
  473. .mask = 0,
  474. };
  475. struct vt1724_pcm_reg {
  476. unsigned int addr; /* ADDR register offset */
  477. unsigned int size; /* SIZE register offset */
  478. unsigned int count; /* COUNT register offset */
  479. unsigned int start; /* start & pause bit */
  480. };
  481. static int snd_vt1724_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
  482. {
  483. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  484. unsigned char what;
  485. unsigned char old;
  486. struct snd_pcm_substream *s;
  487. what = 0;
  488. snd_pcm_group_for_each_entry(s, substream) {
  489. if (snd_pcm_substream_chip(s) == ice) {
  490. const struct vt1724_pcm_reg *reg;
  491. reg = s->runtime->private_data;
  492. what |= reg->start;
  493. snd_pcm_trigger_done(s, substream);
  494. }
  495. }
  496. switch (cmd) {
  497. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  498. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  499. spin_lock(&ice->reg_lock);
  500. old = inb(ICEMT1724(ice, DMA_PAUSE));
  501. if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
  502. old |= what;
  503. else
  504. old &= ~what;
  505. outb(old, ICEMT1724(ice, DMA_PAUSE));
  506. spin_unlock(&ice->reg_lock);
  507. break;
  508. case SNDRV_PCM_TRIGGER_START:
  509. case SNDRV_PCM_TRIGGER_STOP:
  510. case SNDRV_PCM_TRIGGER_SUSPEND:
  511. spin_lock(&ice->reg_lock);
  512. old = inb(ICEMT1724(ice, DMA_CONTROL));
  513. if (cmd == SNDRV_PCM_TRIGGER_START)
  514. old |= what;
  515. else
  516. old &= ~what;
  517. outb(old, ICEMT1724(ice, DMA_CONTROL));
  518. spin_unlock(&ice->reg_lock);
  519. break;
  520. case SNDRV_PCM_TRIGGER_RESUME:
  521. /* apps will have to restart stream */
  522. break;
  523. default:
  524. return -EINVAL;
  525. }
  526. return 0;
  527. }
  528. /*
  529. */
  530. #define DMA_STARTS (VT1724_RDMA0_START|VT1724_PDMA0_START|VT1724_RDMA1_START|\
  531. VT1724_PDMA1_START|VT1724_PDMA2_START|VT1724_PDMA3_START|VT1724_PDMA4_START)
  532. #define DMA_PAUSES (VT1724_RDMA0_PAUSE|VT1724_PDMA0_PAUSE|VT1724_RDMA1_PAUSE|\
  533. VT1724_PDMA1_PAUSE|VT1724_PDMA2_PAUSE|VT1724_PDMA3_PAUSE|VT1724_PDMA4_PAUSE)
  534. static const unsigned int stdclock_rate_list[16] = {
  535. 48000, 24000, 12000, 9600, 32000, 16000, 8000, 96000, 44100,
  536. 22050, 11025, 88200, 176400, 0, 192000, 64000
  537. };
  538. static unsigned int stdclock_get_rate(struct snd_ice1712 *ice)
  539. {
  540. unsigned int rate;
  541. rate = stdclock_rate_list[inb(ICEMT1724(ice, RATE)) & 15];
  542. return rate;
  543. }
  544. static void stdclock_set_rate(struct snd_ice1712 *ice, unsigned int rate)
  545. {
  546. int i;
  547. for (i = 0; i < ARRAY_SIZE(stdclock_rate_list); i++) {
  548. if (stdclock_rate_list[i] == rate) {
  549. outb(i, ICEMT1724(ice, RATE));
  550. return;
  551. }
  552. }
  553. }
  554. static unsigned char stdclock_set_mclk(struct snd_ice1712 *ice,
  555. unsigned int rate)
  556. {
  557. unsigned char val, old;
  558. /* check MT02 */
  559. if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
  560. val = old = inb(ICEMT1724(ice, I2S_FORMAT));
  561. if (rate > 96000)
  562. val |= VT1724_MT_I2S_MCLK_128X; /* 128x MCLK */
  563. else
  564. val &= ~VT1724_MT_I2S_MCLK_128X; /* 256x MCLK */
  565. if (val != old) {
  566. outb(val, ICEMT1724(ice, I2S_FORMAT));
  567. /* master clock changed */
  568. return 1;
  569. }
  570. }
  571. /* no change in master clock */
  572. return 0;
  573. }
  574. static int snd_vt1724_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate,
  575. int force)
  576. {
  577. unsigned long flags;
  578. unsigned char mclk_change;
  579. unsigned int i, old_rate;
  580. if (rate > ice->hw_rates->list[ice->hw_rates->count - 1])
  581. return -EINVAL;
  582. spin_lock_irqsave(&ice->reg_lock, flags);
  583. if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) ||
  584. (inb(ICEMT1724(ice, DMA_PAUSE)) & DMA_PAUSES)) {
  585. /* running? we cannot change the rate now... */
  586. spin_unlock_irqrestore(&ice->reg_lock, flags);
  587. return -EBUSY;
  588. }
  589. if (!force && is_pro_rate_locked(ice)) {
  590. spin_unlock_irqrestore(&ice->reg_lock, flags);
  591. return (rate == ice->cur_rate) ? 0 : -EBUSY;
  592. }
  593. old_rate = ice->get_rate(ice);
  594. if (force || (old_rate != rate))
  595. ice->set_rate(ice, rate);
  596. else if (rate == ice->cur_rate) {
  597. spin_unlock_irqrestore(&ice->reg_lock, flags);
  598. return 0;
  599. }
  600. ice->cur_rate = rate;
  601. /* setting master clock */
  602. mclk_change = ice->set_mclk(ice, rate);
  603. spin_unlock_irqrestore(&ice->reg_lock, flags);
  604. if (mclk_change && ice->gpio.i2s_mclk_changed)
  605. ice->gpio.i2s_mclk_changed(ice);
  606. if (ice->gpio.set_pro_rate)
  607. ice->gpio.set_pro_rate(ice, rate);
  608. /* set up codecs */
  609. for (i = 0; i < ice->akm_codecs; i++) {
  610. if (ice->akm[i].ops.set_rate_val)
  611. ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
  612. }
  613. if (ice->spdif.ops.setup_rate)
  614. ice->spdif.ops.setup_rate(ice, rate);
  615. return 0;
  616. }
  617. static int snd_vt1724_pcm_hw_params(struct snd_pcm_substream *substream,
  618. struct snd_pcm_hw_params *hw_params)
  619. {
  620. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  621. int i, chs, err;
  622. chs = params_channels(hw_params);
  623. mutex_lock(&ice->open_mutex);
  624. /* mark surround channels */
  625. if (substream == ice->playback_pro_substream) {
  626. /* PDMA0 can be multi-channel up to 8 */
  627. chs = chs / 2 - 1;
  628. for (i = 0; i < chs; i++) {
  629. if (ice->pcm_reserved[i] &&
  630. ice->pcm_reserved[i] != substream) {
  631. mutex_unlock(&ice->open_mutex);
  632. return -EBUSY;
  633. }
  634. ice->pcm_reserved[i] = substream;
  635. }
  636. for (; i < 3; i++) {
  637. if (ice->pcm_reserved[i] == substream)
  638. ice->pcm_reserved[i] = NULL;
  639. }
  640. } else {
  641. for (i = 0; i < 3; i++) {
  642. /* check individual playback stream */
  643. if (ice->playback_con_substream_ds[i] == substream) {
  644. if (ice->pcm_reserved[i] &&
  645. ice->pcm_reserved[i] != substream) {
  646. mutex_unlock(&ice->open_mutex);
  647. return -EBUSY;
  648. }
  649. ice->pcm_reserved[i] = substream;
  650. break;
  651. }
  652. }
  653. }
  654. mutex_unlock(&ice->open_mutex);
  655. err = snd_vt1724_set_pro_rate(ice, params_rate(hw_params), 0);
  656. if (err < 0)
  657. return err;
  658. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  659. }
  660. static int snd_vt1724_pcm_hw_free(struct snd_pcm_substream *substream)
  661. {
  662. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  663. int i;
  664. mutex_lock(&ice->open_mutex);
  665. /* unmark surround channels */
  666. for (i = 0; i < 3; i++)
  667. if (ice->pcm_reserved[i] == substream)
  668. ice->pcm_reserved[i] = NULL;
  669. mutex_unlock(&ice->open_mutex);
  670. return snd_pcm_lib_free_pages(substream);
  671. }
  672. static int snd_vt1724_playback_pro_prepare(struct snd_pcm_substream *substream)
  673. {
  674. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  675. unsigned char val;
  676. unsigned int size;
  677. spin_lock_irq(&ice->reg_lock);
  678. val = (8 - substream->runtime->channels) >> 1;
  679. outb(val, ICEMT1724(ice, BURST));
  680. outl(substream->runtime->dma_addr, ICEMT1724(ice, PLAYBACK_ADDR));
  681. size = (snd_pcm_lib_buffer_bytes(substream) >> 2) - 1;
  682. /* outl(size, ICEMT1724(ice, PLAYBACK_SIZE)); */
  683. outw(size, ICEMT1724(ice, PLAYBACK_SIZE));
  684. outb(size >> 16, ICEMT1724(ice, PLAYBACK_SIZE) + 2);
  685. size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
  686. /* outl(size, ICEMT1724(ice, PLAYBACK_COUNT)); */
  687. outw(size, ICEMT1724(ice, PLAYBACK_COUNT));
  688. outb(size >> 16, ICEMT1724(ice, PLAYBACK_COUNT) + 2);
  689. spin_unlock_irq(&ice->reg_lock);
  690. /*
  691. printk(KERN_DEBUG "pro prepare: ch = %d, addr = 0x%x, "
  692. "buffer = 0x%x, period = 0x%x\n",
  693. substream->runtime->channels,
  694. (unsigned int)substream->runtime->dma_addr,
  695. snd_pcm_lib_buffer_bytes(substream),
  696. snd_pcm_lib_period_bytes(substream));
  697. */
  698. return 0;
  699. }
  700. static snd_pcm_uframes_t snd_vt1724_playback_pro_pointer(struct snd_pcm_substream *substream)
  701. {
  702. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  703. size_t ptr;
  704. if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & VT1724_PDMA0_START))
  705. return 0;
  706. #if 0 /* read PLAYBACK_ADDR */
  707. ptr = inl(ICEMT1724(ice, PLAYBACK_ADDR));
  708. if (ptr < substream->runtime->dma_addr) {
  709. snd_printd("ice1724: invalid negative ptr\n");
  710. return 0;
  711. }
  712. ptr -= substream->runtime->dma_addr;
  713. ptr = bytes_to_frames(substream->runtime, ptr);
  714. if (ptr >= substream->runtime->buffer_size) {
  715. snd_printd("ice1724: invalid ptr %d (size=%d)\n",
  716. (int)ptr, (int)substream->runtime->period_size);
  717. return 0;
  718. }
  719. #else /* read PLAYBACK_SIZE */
  720. ptr = inl(ICEMT1724(ice, PLAYBACK_SIZE)) & 0xffffff;
  721. ptr = (ptr + 1) << 2;
  722. ptr = bytes_to_frames(substream->runtime, ptr);
  723. if (!ptr)
  724. ;
  725. else if (ptr <= substream->runtime->buffer_size)
  726. ptr = substream->runtime->buffer_size - ptr;
  727. else {
  728. snd_printd("ice1724: invalid ptr %d (size=%d)\n",
  729. (int)ptr, (int)substream->runtime->buffer_size);
  730. ptr = 0;
  731. }
  732. #endif
  733. return ptr;
  734. }
  735. static int snd_vt1724_pcm_prepare(struct snd_pcm_substream *substream)
  736. {
  737. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  738. const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
  739. spin_lock_irq(&ice->reg_lock);
  740. outl(substream->runtime->dma_addr, ice->profi_port + reg->addr);
  741. outw((snd_pcm_lib_buffer_bytes(substream) >> 2) - 1,
  742. ice->profi_port + reg->size);
  743. outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1,
  744. ice->profi_port + reg->count);
  745. spin_unlock_irq(&ice->reg_lock);
  746. return 0;
  747. }
  748. static snd_pcm_uframes_t snd_vt1724_pcm_pointer(struct snd_pcm_substream *substream)
  749. {
  750. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  751. const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
  752. size_t ptr;
  753. if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & reg->start))
  754. return 0;
  755. #if 0 /* use ADDR register */
  756. ptr = inl(ice->profi_port + reg->addr);
  757. ptr -= substream->runtime->dma_addr;
  758. return bytes_to_frames(substream->runtime, ptr);
  759. #else /* use SIZE register */
  760. ptr = inw(ice->profi_port + reg->size);
  761. ptr = (ptr + 1) << 2;
  762. ptr = bytes_to_frames(substream->runtime, ptr);
  763. if (!ptr)
  764. ;
  765. else if (ptr <= substream->runtime->buffer_size)
  766. ptr = substream->runtime->buffer_size - ptr;
  767. else {
  768. snd_printd("ice1724: invalid ptr %d (size=%d)\n",
  769. (int)ptr, (int)substream->runtime->buffer_size);
  770. ptr = 0;
  771. }
  772. return ptr;
  773. #endif
  774. }
  775. static const struct vt1724_pcm_reg vt1724_pdma0_reg = {
  776. .addr = VT1724_MT_PLAYBACK_ADDR,
  777. .size = VT1724_MT_PLAYBACK_SIZE,
  778. .count = VT1724_MT_PLAYBACK_COUNT,
  779. .start = VT1724_PDMA0_START,
  780. };
  781. static const struct vt1724_pcm_reg vt1724_pdma4_reg = {
  782. .addr = VT1724_MT_PDMA4_ADDR,
  783. .size = VT1724_MT_PDMA4_SIZE,
  784. .count = VT1724_MT_PDMA4_COUNT,
  785. .start = VT1724_PDMA4_START,
  786. };
  787. static const struct vt1724_pcm_reg vt1724_rdma0_reg = {
  788. .addr = VT1724_MT_CAPTURE_ADDR,
  789. .size = VT1724_MT_CAPTURE_SIZE,
  790. .count = VT1724_MT_CAPTURE_COUNT,
  791. .start = VT1724_RDMA0_START,
  792. };
  793. static const struct vt1724_pcm_reg vt1724_rdma1_reg = {
  794. .addr = VT1724_MT_RDMA1_ADDR,
  795. .size = VT1724_MT_RDMA1_SIZE,
  796. .count = VT1724_MT_RDMA1_COUNT,
  797. .start = VT1724_RDMA1_START,
  798. };
  799. #define vt1724_playback_pro_reg vt1724_pdma0_reg
  800. #define vt1724_playback_spdif_reg vt1724_pdma4_reg
  801. #define vt1724_capture_pro_reg vt1724_rdma0_reg
  802. #define vt1724_capture_spdif_reg vt1724_rdma1_reg
  803. static const struct snd_pcm_hardware snd_vt1724_playback_pro = {
  804. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  805. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  806. SNDRV_PCM_INFO_MMAP_VALID |
  807. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  808. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  809. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
  810. .rate_min = 8000,
  811. .rate_max = 192000,
  812. .channels_min = 2,
  813. .channels_max = 8,
  814. .buffer_bytes_max = (1UL << 21), /* 19bits dword */
  815. .period_bytes_min = 8 * 4 * 2, /* FIXME: constraints needed */
  816. .period_bytes_max = (1UL << 21),
  817. .periods_min = 2,
  818. .periods_max = 1024,
  819. };
  820. static const struct snd_pcm_hardware snd_vt1724_spdif = {
  821. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  822. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  823. SNDRV_PCM_INFO_MMAP_VALID |
  824. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  825. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  826. .rates = (SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_44100|
  827. SNDRV_PCM_RATE_48000|SNDRV_PCM_RATE_88200|
  828. SNDRV_PCM_RATE_96000|SNDRV_PCM_RATE_176400|
  829. SNDRV_PCM_RATE_192000),
  830. .rate_min = 32000,
  831. .rate_max = 192000,
  832. .channels_min = 2,
  833. .channels_max = 2,
  834. .buffer_bytes_max = (1UL << 18), /* 16bits dword */
  835. .period_bytes_min = 2 * 4 * 2,
  836. .period_bytes_max = (1UL << 18),
  837. .periods_min = 2,
  838. .periods_max = 1024,
  839. };
  840. static const struct snd_pcm_hardware snd_vt1724_2ch_stereo = {
  841. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  842. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  843. SNDRV_PCM_INFO_MMAP_VALID |
  844. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  845. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  846. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
  847. .rate_min = 8000,
  848. .rate_max = 192000,
  849. .channels_min = 2,
  850. .channels_max = 2,
  851. .buffer_bytes_max = (1UL << 18), /* 16bits dword */
  852. .period_bytes_min = 2 * 4 * 2,
  853. .period_bytes_max = (1UL << 18),
  854. .periods_min = 2,
  855. .periods_max = 1024,
  856. };
  857. /*
  858. * set rate constraints
  859. */
  860. static void set_std_hw_rates(struct snd_ice1712 *ice)
  861. {
  862. if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
  863. /* I2S */
  864. /* VT1720 doesn't support more than 96kHz */
  865. if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720)
  866. ice->hw_rates = &hw_constraints_rates_192;
  867. else
  868. ice->hw_rates = &hw_constraints_rates_96;
  869. } else {
  870. /* ACLINK */
  871. ice->hw_rates = &hw_constraints_rates_48;
  872. }
  873. }
  874. static int set_rate_constraints(struct snd_ice1712 *ice,
  875. struct snd_pcm_substream *substream)
  876. {
  877. struct snd_pcm_runtime *runtime = substream->runtime;
  878. runtime->hw.rate_min = ice->hw_rates->list[0];
  879. runtime->hw.rate_max = ice->hw_rates->list[ice->hw_rates->count - 1];
  880. runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
  881. return snd_pcm_hw_constraint_list(runtime, 0,
  882. SNDRV_PCM_HW_PARAM_RATE,
  883. ice->hw_rates);
  884. }
  885. /* multi-channel playback needs alignment 8x32bit regardless of the channels
  886. * actually used
  887. */
  888. #define VT1724_BUFFER_ALIGN 0x20
  889. static int snd_vt1724_playback_pro_open(struct snd_pcm_substream *substream)
  890. {
  891. struct snd_pcm_runtime *runtime = substream->runtime;
  892. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  893. int chs, num_indeps;
  894. runtime->private_data = (void *)&vt1724_playback_pro_reg;
  895. ice->playback_pro_substream = substream;
  896. runtime->hw = snd_vt1724_playback_pro;
  897. snd_pcm_set_sync(substream);
  898. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  899. set_rate_constraints(ice, substream);
  900. mutex_lock(&ice->open_mutex);
  901. /* calculate the currently available channels */
  902. num_indeps = ice->num_total_dacs / 2 - 1;
  903. for (chs = 0; chs < num_indeps; chs++) {
  904. if (ice->pcm_reserved[chs])
  905. break;
  906. }
  907. chs = (chs + 1) * 2;
  908. runtime->hw.channels_max = chs;
  909. if (chs > 2) /* channels must be even */
  910. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2);
  911. mutex_unlock(&ice->open_mutex);
  912. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  913. VT1724_BUFFER_ALIGN);
  914. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  915. VT1724_BUFFER_ALIGN);
  916. return 0;
  917. }
  918. static int snd_vt1724_capture_pro_open(struct snd_pcm_substream *substream)
  919. {
  920. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  921. struct snd_pcm_runtime *runtime = substream->runtime;
  922. runtime->private_data = (void *)&vt1724_capture_pro_reg;
  923. ice->capture_pro_substream = substream;
  924. runtime->hw = snd_vt1724_2ch_stereo;
  925. snd_pcm_set_sync(substream);
  926. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  927. set_rate_constraints(ice, substream);
  928. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  929. VT1724_BUFFER_ALIGN);
  930. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  931. VT1724_BUFFER_ALIGN);
  932. return 0;
  933. }
  934. static int snd_vt1724_playback_pro_close(struct snd_pcm_substream *substream)
  935. {
  936. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  937. if (PRO_RATE_RESET)
  938. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  939. ice->playback_pro_substream = NULL;
  940. return 0;
  941. }
  942. static int snd_vt1724_capture_pro_close(struct snd_pcm_substream *substream)
  943. {
  944. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  945. if (PRO_RATE_RESET)
  946. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  947. ice->capture_pro_substream = NULL;
  948. return 0;
  949. }
  950. static struct snd_pcm_ops snd_vt1724_playback_pro_ops = {
  951. .open = snd_vt1724_playback_pro_open,
  952. .close = snd_vt1724_playback_pro_close,
  953. .ioctl = snd_pcm_lib_ioctl,
  954. .hw_params = snd_vt1724_pcm_hw_params,
  955. .hw_free = snd_vt1724_pcm_hw_free,
  956. .prepare = snd_vt1724_playback_pro_prepare,
  957. .trigger = snd_vt1724_pcm_trigger,
  958. .pointer = snd_vt1724_playback_pro_pointer,
  959. };
  960. static struct snd_pcm_ops snd_vt1724_capture_pro_ops = {
  961. .open = snd_vt1724_capture_pro_open,
  962. .close = snd_vt1724_capture_pro_close,
  963. .ioctl = snd_pcm_lib_ioctl,
  964. .hw_params = snd_vt1724_pcm_hw_params,
  965. .hw_free = snd_vt1724_pcm_hw_free,
  966. .prepare = snd_vt1724_pcm_prepare,
  967. .trigger = snd_vt1724_pcm_trigger,
  968. .pointer = snd_vt1724_pcm_pointer,
  969. };
  970. static int __devinit snd_vt1724_pcm_profi(struct snd_ice1712 *ice, int device)
  971. {
  972. struct snd_pcm *pcm;
  973. int err;
  974. err = snd_pcm_new(ice->card, "ICE1724", device, 1, 1, &pcm);
  975. if (err < 0)
  976. return err;
  977. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_vt1724_playback_pro_ops);
  978. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_vt1724_capture_pro_ops);
  979. pcm->private_data = ice;
  980. pcm->info_flags = 0;
  981. strcpy(pcm->name, "ICE1724");
  982. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  983. snd_dma_pci_data(ice->pci),
  984. 256*1024, 256*1024);
  985. ice->pcm_pro = pcm;
  986. return 0;
  987. }
  988. /*
  989. * SPDIF PCM
  990. */
  991. /* update spdif control bits; call with reg_lock */
  992. static void update_spdif_bits(struct snd_ice1712 *ice, unsigned int val)
  993. {
  994. unsigned char cbit, disabled;
  995. cbit = inb(ICEREG1724(ice, SPDIF_CFG));
  996. disabled = cbit & ~VT1724_CFG_SPDIF_OUT_EN;
  997. if (cbit != disabled)
  998. outb(disabled, ICEREG1724(ice, SPDIF_CFG));
  999. outw(val, ICEMT1724(ice, SPDIF_CTRL));
  1000. if (cbit != disabled)
  1001. outb(cbit, ICEREG1724(ice, SPDIF_CFG));
  1002. outw(val, ICEMT1724(ice, SPDIF_CTRL));
  1003. }
  1004. /* update SPDIF control bits according to the given rate */
  1005. static void update_spdif_rate(struct snd_ice1712 *ice, unsigned int rate)
  1006. {
  1007. unsigned int val, nval;
  1008. unsigned long flags;
  1009. spin_lock_irqsave(&ice->reg_lock, flags);
  1010. nval = val = inw(ICEMT1724(ice, SPDIF_CTRL));
  1011. nval &= ~(7 << 12);
  1012. switch (rate) {
  1013. case 44100: break;
  1014. case 48000: nval |= 2 << 12; break;
  1015. case 32000: nval |= 3 << 12; break;
  1016. case 88200: nval |= 4 << 12; break;
  1017. case 96000: nval |= 5 << 12; break;
  1018. case 192000: nval |= 6 << 12; break;
  1019. case 176400: nval |= 7 << 12; break;
  1020. }
  1021. if (val != nval)
  1022. update_spdif_bits(ice, nval);
  1023. spin_unlock_irqrestore(&ice->reg_lock, flags);
  1024. }
  1025. static int snd_vt1724_playback_spdif_prepare(struct snd_pcm_substream *substream)
  1026. {
  1027. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1028. if (!ice->force_pdma4)
  1029. update_spdif_rate(ice, substream->runtime->rate);
  1030. return snd_vt1724_pcm_prepare(substream);
  1031. }
  1032. static int snd_vt1724_playback_spdif_open(struct snd_pcm_substream *substream)
  1033. {
  1034. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1035. struct snd_pcm_runtime *runtime = substream->runtime;
  1036. runtime->private_data = (void *)&vt1724_playback_spdif_reg;
  1037. ice->playback_con_substream = substream;
  1038. if (ice->force_pdma4) {
  1039. runtime->hw = snd_vt1724_2ch_stereo;
  1040. set_rate_constraints(ice, substream);
  1041. } else
  1042. runtime->hw = snd_vt1724_spdif;
  1043. snd_pcm_set_sync(substream);
  1044. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  1045. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  1046. VT1724_BUFFER_ALIGN);
  1047. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  1048. VT1724_BUFFER_ALIGN);
  1049. if (ice->spdif.ops.open)
  1050. ice->spdif.ops.open(ice, substream);
  1051. return 0;
  1052. }
  1053. static int snd_vt1724_playback_spdif_close(struct snd_pcm_substream *substream)
  1054. {
  1055. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1056. if (PRO_RATE_RESET)
  1057. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  1058. ice->playback_con_substream = NULL;
  1059. if (ice->spdif.ops.close)
  1060. ice->spdif.ops.close(ice, substream);
  1061. return 0;
  1062. }
  1063. static int snd_vt1724_capture_spdif_open(struct snd_pcm_substream *substream)
  1064. {
  1065. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1066. struct snd_pcm_runtime *runtime = substream->runtime;
  1067. runtime->private_data = (void *)&vt1724_capture_spdif_reg;
  1068. ice->capture_con_substream = substream;
  1069. if (ice->force_rdma1) {
  1070. runtime->hw = snd_vt1724_2ch_stereo;
  1071. set_rate_constraints(ice, substream);
  1072. } else
  1073. runtime->hw = snd_vt1724_spdif;
  1074. snd_pcm_set_sync(substream);
  1075. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  1076. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  1077. VT1724_BUFFER_ALIGN);
  1078. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  1079. VT1724_BUFFER_ALIGN);
  1080. if (ice->spdif.ops.open)
  1081. ice->spdif.ops.open(ice, substream);
  1082. return 0;
  1083. }
  1084. static int snd_vt1724_capture_spdif_close(struct snd_pcm_substream *substream)
  1085. {
  1086. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1087. if (PRO_RATE_RESET)
  1088. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  1089. ice->capture_con_substream = NULL;
  1090. if (ice->spdif.ops.close)
  1091. ice->spdif.ops.close(ice, substream);
  1092. return 0;
  1093. }
  1094. static struct snd_pcm_ops snd_vt1724_playback_spdif_ops = {
  1095. .open = snd_vt1724_playback_spdif_open,
  1096. .close = snd_vt1724_playback_spdif_close,
  1097. .ioctl = snd_pcm_lib_ioctl,
  1098. .hw_params = snd_vt1724_pcm_hw_params,
  1099. .hw_free = snd_vt1724_pcm_hw_free,
  1100. .prepare = snd_vt1724_playback_spdif_prepare,
  1101. .trigger = snd_vt1724_pcm_trigger,
  1102. .pointer = snd_vt1724_pcm_pointer,
  1103. };
  1104. static struct snd_pcm_ops snd_vt1724_capture_spdif_ops = {
  1105. .open = snd_vt1724_capture_spdif_open,
  1106. .close = snd_vt1724_capture_spdif_close,
  1107. .ioctl = snd_pcm_lib_ioctl,
  1108. .hw_params = snd_vt1724_pcm_hw_params,
  1109. .hw_free = snd_vt1724_pcm_hw_free,
  1110. .prepare = snd_vt1724_pcm_prepare,
  1111. .trigger = snd_vt1724_pcm_trigger,
  1112. .pointer = snd_vt1724_pcm_pointer,
  1113. };
  1114. static int __devinit snd_vt1724_pcm_spdif(struct snd_ice1712 *ice, int device)
  1115. {
  1116. char *name;
  1117. struct snd_pcm *pcm;
  1118. int play, capt;
  1119. int err;
  1120. if (ice->force_pdma4 ||
  1121. (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_OUT_INT)) {
  1122. play = 1;
  1123. ice->has_spdif = 1;
  1124. } else
  1125. play = 0;
  1126. if (ice->force_rdma1 ||
  1127. (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) {
  1128. capt = 1;
  1129. ice->has_spdif = 1;
  1130. } else
  1131. capt = 0;
  1132. if (!play && !capt)
  1133. return 0; /* no spdif device */
  1134. if (ice->force_pdma4 || ice->force_rdma1)
  1135. name = "ICE1724 Secondary";
  1136. else
  1137. name = "ICE1724 IEC958";
  1138. err = snd_pcm_new(ice->card, name, device, play, capt, &pcm);
  1139. if (err < 0)
  1140. return err;
  1141. if (play)
  1142. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  1143. &snd_vt1724_playback_spdif_ops);
  1144. if (capt)
  1145. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
  1146. &snd_vt1724_capture_spdif_ops);
  1147. pcm->private_data = ice;
  1148. pcm->info_flags = 0;
  1149. strcpy(pcm->name, name);
  1150. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1151. snd_dma_pci_data(ice->pci),
  1152. 64*1024, 64*1024);
  1153. ice->pcm = pcm;
  1154. return 0;
  1155. }
  1156. /*
  1157. * independent surround PCMs
  1158. */
  1159. static const struct vt1724_pcm_reg vt1724_playback_dma_regs[3] = {
  1160. {
  1161. .addr = VT1724_MT_PDMA1_ADDR,
  1162. .size = VT1724_MT_PDMA1_SIZE,
  1163. .count = VT1724_MT_PDMA1_COUNT,
  1164. .start = VT1724_PDMA1_START,
  1165. },
  1166. {
  1167. .addr = VT1724_MT_PDMA2_ADDR,
  1168. .size = VT1724_MT_PDMA2_SIZE,
  1169. .count = VT1724_MT_PDMA2_COUNT,
  1170. .start = VT1724_PDMA2_START,
  1171. },
  1172. {
  1173. .addr = VT1724_MT_PDMA3_ADDR,
  1174. .size = VT1724_MT_PDMA3_SIZE,
  1175. .count = VT1724_MT_PDMA3_COUNT,
  1176. .start = VT1724_PDMA3_START,
  1177. },
  1178. };
  1179. static int snd_vt1724_playback_indep_prepare(struct snd_pcm_substream *substream)
  1180. {
  1181. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1182. unsigned char val;
  1183. spin_lock_irq(&ice->reg_lock);
  1184. val = 3 - substream->number;
  1185. if (inb(ICEMT1724(ice, BURST)) < val)
  1186. outb(val, ICEMT1724(ice, BURST));
  1187. spin_unlock_irq(&ice->reg_lock);
  1188. return snd_vt1724_pcm_prepare(substream);
  1189. }
  1190. static int snd_vt1724_playback_indep_open(struct snd_pcm_substream *substream)
  1191. {
  1192. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1193. struct snd_pcm_runtime *runtime = substream->runtime;
  1194. mutex_lock(&ice->open_mutex);
  1195. /* already used by PDMA0? */
  1196. if (ice->pcm_reserved[substream->number]) {
  1197. mutex_unlock(&ice->open_mutex);
  1198. return -EBUSY; /* FIXME: should handle blocking mode properly */
  1199. }
  1200. mutex_unlock(&ice->open_mutex);
  1201. runtime->private_data = (void *)&vt1724_playback_dma_regs[substream->number];
  1202. ice->playback_con_substream_ds[substream->number] = substream;
  1203. runtime->hw = snd_vt1724_2ch_stereo;
  1204. snd_pcm_set_sync(substream);
  1205. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  1206. set_rate_constraints(ice, substream);
  1207. return 0;
  1208. }
  1209. static int snd_vt1724_playback_indep_close(struct snd_pcm_substream *substream)
  1210. {
  1211. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1212. if (PRO_RATE_RESET)
  1213. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  1214. ice->playback_con_substream_ds[substream->number] = NULL;
  1215. ice->pcm_reserved[substream->number] = NULL;
  1216. return 0;
  1217. }
  1218. static struct snd_pcm_ops snd_vt1724_playback_indep_ops = {
  1219. .open = snd_vt1724_playback_indep_open,
  1220. .close = snd_vt1724_playback_indep_close,
  1221. .ioctl = snd_pcm_lib_ioctl,
  1222. .hw_params = snd_vt1724_pcm_hw_params,
  1223. .hw_free = snd_vt1724_pcm_hw_free,
  1224. .prepare = snd_vt1724_playback_indep_prepare,
  1225. .trigger = snd_vt1724_pcm_trigger,
  1226. .pointer = snd_vt1724_pcm_pointer,
  1227. };
  1228. static int __devinit snd_vt1724_pcm_indep(struct snd_ice1712 *ice, int device)
  1229. {
  1230. struct snd_pcm *pcm;
  1231. int play;
  1232. int err;
  1233. play = ice->num_total_dacs / 2 - 1;
  1234. if (play <= 0)
  1235. return 0;
  1236. err = snd_pcm_new(ice->card, "ICE1724 Surrounds", device, play, 0, &pcm);
  1237. if (err < 0)
  1238. return err;
  1239. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  1240. &snd_vt1724_playback_indep_ops);
  1241. pcm->private_data = ice;
  1242. pcm->info_flags = 0;
  1243. strcpy(pcm->name, "ICE1724 Surround PCM");
  1244. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1245. snd_dma_pci_data(ice->pci),
  1246. 64*1024, 64*1024);
  1247. ice->pcm_ds = pcm;
  1248. return 0;
  1249. }
  1250. /*
  1251. * Mixer section
  1252. */
  1253. static int __devinit snd_vt1724_ac97_mixer(struct snd_ice1712 *ice)
  1254. {
  1255. int err;
  1256. if (!(ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S)) {
  1257. struct snd_ac97_bus *pbus;
  1258. struct snd_ac97_template ac97;
  1259. static struct snd_ac97_bus_ops ops = {
  1260. .write = snd_vt1724_ac97_write,
  1261. .read = snd_vt1724_ac97_read,
  1262. };
  1263. /* cold reset */
  1264. outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD));
  1265. mdelay(5); /* FIXME */
  1266. outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD));
  1267. err = snd_ac97_bus(ice->card, 0, &ops, NULL, &pbus);
  1268. if (err < 0)
  1269. return err;
  1270. memset(&ac97, 0, sizeof(ac97));
  1271. ac97.private_data = ice;
  1272. err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
  1273. if (err < 0)
  1274. printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n");
  1275. else
  1276. return 0;
  1277. }
  1278. /* I2S mixer only */
  1279. strcat(ice->card->mixername, "ICE1724 - multitrack");
  1280. return 0;
  1281. }
  1282. /*
  1283. *
  1284. */
  1285. static inline unsigned int eeprom_triple(struct snd_ice1712 *ice, int idx)
  1286. {
  1287. return (unsigned int)ice->eeprom.data[idx] | \
  1288. ((unsigned int)ice->eeprom.data[idx + 1] << 8) | \
  1289. ((unsigned int)ice->eeprom.data[idx + 2] << 16);
  1290. }
  1291. static void snd_vt1724_proc_read(struct snd_info_entry *entry,
  1292. struct snd_info_buffer *buffer)
  1293. {
  1294. struct snd_ice1712 *ice = entry->private_data;
  1295. unsigned int idx;
  1296. snd_iprintf(buffer, "%s\n\n", ice->card->longname);
  1297. snd_iprintf(buffer, "EEPROM:\n");
  1298. snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
  1299. snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
  1300. snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
  1301. snd_iprintf(buffer, " System Config : 0x%x\n",
  1302. ice->eeprom.data[ICE_EEP2_SYSCONF]);
  1303. snd_iprintf(buffer, " ACLink : 0x%x\n",
  1304. ice->eeprom.data[ICE_EEP2_ACLINK]);
  1305. snd_iprintf(buffer, " I2S : 0x%x\n",
  1306. ice->eeprom.data[ICE_EEP2_I2S]);
  1307. snd_iprintf(buffer, " S/PDIF : 0x%x\n",
  1308. ice->eeprom.data[ICE_EEP2_SPDIF]);
  1309. snd_iprintf(buffer, " GPIO direction : 0x%x\n",
  1310. ice->eeprom.gpiodir);
  1311. snd_iprintf(buffer, " GPIO mask : 0x%x\n",
  1312. ice->eeprom.gpiomask);
  1313. snd_iprintf(buffer, " GPIO state : 0x%x\n",
  1314. ice->eeprom.gpiostate);
  1315. for (idx = 0x12; idx < ice->eeprom.size; idx++)
  1316. snd_iprintf(buffer, " Extra #%02i : 0x%x\n",
  1317. idx, ice->eeprom.data[idx]);
  1318. snd_iprintf(buffer, "\nRegisters:\n");
  1319. snd_iprintf(buffer, " PSDOUT03 : 0x%08x\n",
  1320. (unsigned)inl(ICEMT1724(ice, ROUTE_PLAYBACK)));
  1321. for (idx = 0x0; idx < 0x20 ; idx++)
  1322. snd_iprintf(buffer, " CCS%02x : 0x%02x\n",
  1323. idx, inb(ice->port+idx));
  1324. for (idx = 0x0; idx < 0x30 ; idx++)
  1325. snd_iprintf(buffer, " MT%02x : 0x%02x\n",
  1326. idx, inb(ice->profi_port+idx));
  1327. }
  1328. static void __devinit snd_vt1724_proc_init(struct snd_ice1712 *ice)
  1329. {
  1330. struct snd_info_entry *entry;
  1331. if (!snd_card_proc_new(ice->card, "ice1724", &entry))
  1332. snd_info_set_text_ops(entry, ice, snd_vt1724_proc_read);
  1333. }
  1334. /*
  1335. *
  1336. */
  1337. static int snd_vt1724_eeprom_info(struct snd_kcontrol *kcontrol,
  1338. struct snd_ctl_elem_info *uinfo)
  1339. {
  1340. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  1341. uinfo->count = sizeof(struct snd_ice1712_eeprom);
  1342. return 0;
  1343. }
  1344. static int snd_vt1724_eeprom_get(struct snd_kcontrol *kcontrol,
  1345. struct snd_ctl_elem_value *ucontrol)
  1346. {
  1347. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1348. memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
  1349. return 0;
  1350. }
  1351. static struct snd_kcontrol_new snd_vt1724_eeprom __devinitdata = {
  1352. .iface = SNDRV_CTL_ELEM_IFACE_CARD,
  1353. .name = "ICE1724 EEPROM",
  1354. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1355. .info = snd_vt1724_eeprom_info,
  1356. .get = snd_vt1724_eeprom_get
  1357. };
  1358. /*
  1359. */
  1360. static int snd_vt1724_spdif_info(struct snd_kcontrol *kcontrol,
  1361. struct snd_ctl_elem_info *uinfo)
  1362. {
  1363. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1364. uinfo->count = 1;
  1365. return 0;
  1366. }
  1367. static unsigned int encode_spdif_bits(struct snd_aes_iec958 *diga)
  1368. {
  1369. unsigned int val, rbits;
  1370. val = diga->status[0] & 0x03; /* professional, non-audio */
  1371. if (val & 0x01) {
  1372. /* professional */
  1373. if ((diga->status[0] & IEC958_AES0_PRO_EMPHASIS) ==
  1374. IEC958_AES0_PRO_EMPHASIS_5015)
  1375. val |= 1U << 3;
  1376. rbits = (diga->status[4] >> 3) & 0x0f;
  1377. if (rbits) {
  1378. switch (rbits) {
  1379. case 2: val |= 5 << 12; break; /* 96k */
  1380. case 3: val |= 6 << 12; break; /* 192k */
  1381. case 10: val |= 4 << 12; break; /* 88.2k */
  1382. case 11: val |= 7 << 12; break; /* 176.4k */
  1383. }
  1384. } else {
  1385. switch (diga->status[0] & IEC958_AES0_PRO_FS) {
  1386. case IEC958_AES0_PRO_FS_44100:
  1387. break;
  1388. case IEC958_AES0_PRO_FS_32000:
  1389. val |= 3U << 12;
  1390. break;
  1391. default:
  1392. val |= 2U << 12;
  1393. break;
  1394. }
  1395. }
  1396. } else {
  1397. /* consumer */
  1398. val |= diga->status[1] & 0x04; /* copyright */
  1399. if ((diga->status[0] & IEC958_AES0_CON_EMPHASIS) ==
  1400. IEC958_AES0_CON_EMPHASIS_5015)
  1401. val |= 1U << 3;
  1402. val |= (unsigned int)(diga->status[1] & 0x3f) << 4; /* category */
  1403. val |= (unsigned int)(diga->status[3] & IEC958_AES3_CON_FS) << 12; /* fs */
  1404. }
  1405. return val;
  1406. }
  1407. static void decode_spdif_bits(struct snd_aes_iec958 *diga, unsigned int val)
  1408. {
  1409. memset(diga->status, 0, sizeof(diga->status));
  1410. diga->status[0] = val & 0x03; /* professional, non-audio */
  1411. if (val & 0x01) {
  1412. /* professional */
  1413. if (val & (1U << 3))
  1414. diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_5015;
  1415. switch ((val >> 12) & 0x7) {
  1416. case 0:
  1417. break;
  1418. case 2:
  1419. diga->status[0] |= IEC958_AES0_PRO_FS_32000;
  1420. break;
  1421. default:
  1422. diga->status[0] |= IEC958_AES0_PRO_FS_48000;
  1423. break;
  1424. }
  1425. } else {
  1426. /* consumer */
  1427. diga->status[0] |= val & (1U << 2); /* copyright */
  1428. if (val & (1U << 3))
  1429. diga->status[0] |= IEC958_AES0_CON_EMPHASIS_5015;
  1430. diga->status[1] |= (val >> 4) & 0x3f; /* category */
  1431. diga->status[3] |= (val >> 12) & 0x07; /* fs */
  1432. }
  1433. }
  1434. static int snd_vt1724_spdif_default_get(struct snd_kcontrol *kcontrol,
  1435. struct snd_ctl_elem_value *ucontrol)
  1436. {
  1437. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1438. unsigned int val;
  1439. val = inw(ICEMT1724(ice, SPDIF_CTRL));
  1440. decode_spdif_bits(&ucontrol->value.iec958, val);
  1441. return 0;
  1442. }
  1443. static int snd_vt1724_spdif_default_put(struct snd_kcontrol *kcontrol,
  1444. struct snd_ctl_elem_value *ucontrol)
  1445. {
  1446. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1447. unsigned int val, old;
  1448. val = encode_spdif_bits(&ucontrol->value.iec958);
  1449. spin_lock_irq(&ice->reg_lock);
  1450. old = inw(ICEMT1724(ice, SPDIF_CTRL));
  1451. if (val != old)
  1452. update_spdif_bits(ice, val);
  1453. spin_unlock_irq(&ice->reg_lock);
  1454. return val != old;
  1455. }
  1456. static struct snd_kcontrol_new snd_vt1724_spdif_default __devinitdata =
  1457. {
  1458. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1459. .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
  1460. .info = snd_vt1724_spdif_info,
  1461. .get = snd_vt1724_spdif_default_get,
  1462. .put = snd_vt1724_spdif_default_put
  1463. };
  1464. static int snd_vt1724_spdif_maskc_get(struct snd_kcontrol *kcontrol,
  1465. struct snd_ctl_elem_value *ucontrol)
  1466. {
  1467. ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
  1468. IEC958_AES0_PROFESSIONAL |
  1469. IEC958_AES0_CON_NOT_COPYRIGHT |
  1470. IEC958_AES0_CON_EMPHASIS;
  1471. ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
  1472. IEC958_AES1_CON_CATEGORY;
  1473. ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
  1474. return 0;
  1475. }
  1476. static int snd_vt1724_spdif_maskp_get(struct snd_kcontrol *kcontrol,
  1477. struct snd_ctl_elem_value *ucontrol)
  1478. {
  1479. ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
  1480. IEC958_AES0_PROFESSIONAL |
  1481. IEC958_AES0_PRO_FS |
  1482. IEC958_AES0_PRO_EMPHASIS;
  1483. return 0;
  1484. }
  1485. static struct snd_kcontrol_new snd_vt1724_spdif_maskc __devinitdata =
  1486. {
  1487. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1488. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1489. .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK),
  1490. .info = snd_vt1724_spdif_info,
  1491. .get = snd_vt1724_spdif_maskc_get,
  1492. };
  1493. static struct snd_kcontrol_new snd_vt1724_spdif_maskp __devinitdata =
  1494. {
  1495. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1496. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1497. .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK),
  1498. .info = snd_vt1724_spdif_info,
  1499. .get = snd_vt1724_spdif_maskp_get,
  1500. };
  1501. #define snd_vt1724_spdif_sw_info snd_ctl_boolean_mono_info
  1502. static int snd_vt1724_spdif_sw_get(struct snd_kcontrol *kcontrol,
  1503. struct snd_ctl_elem_value *ucontrol)
  1504. {
  1505. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1506. ucontrol->value.integer.value[0] = inb(ICEREG1724(ice, SPDIF_CFG)) &
  1507. VT1724_CFG_SPDIF_OUT_EN ? 1 : 0;
  1508. return 0;
  1509. }
  1510. static int snd_vt1724_spdif_sw_put(struct snd_kcontrol *kcontrol,
  1511. struct snd_ctl_elem_value *ucontrol)
  1512. {
  1513. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1514. unsigned char old, val;
  1515. spin_lock_irq(&ice->reg_lock);
  1516. old = val = inb(ICEREG1724(ice, SPDIF_CFG));
  1517. val &= ~VT1724_CFG_SPDIF_OUT_EN;
  1518. if (ucontrol->value.integer.value[0])
  1519. val |= VT1724_CFG_SPDIF_OUT_EN;
  1520. if (old != val)
  1521. outb(val, ICEREG1724(ice, SPDIF_CFG));
  1522. spin_unlock_irq(&ice->reg_lock);
  1523. return old != val;
  1524. }
  1525. static struct snd_kcontrol_new snd_vt1724_spdif_switch __devinitdata =
  1526. {
  1527. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1528. /* FIXME: the following conflict with IEC958 Playback Route */
  1529. /* .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, SWITCH), */
  1530. .name = SNDRV_CTL_NAME_IEC958("Output ", NONE, SWITCH),
  1531. .info = snd_vt1724_spdif_sw_info,
  1532. .get = snd_vt1724_spdif_sw_get,
  1533. .put = snd_vt1724_spdif_sw_put
  1534. };
  1535. #if 0 /* NOT USED YET */
  1536. /*
  1537. * GPIO access from extern
  1538. */
  1539. #define snd_vt1724_gpio_info snd_ctl_boolean_mono_info
  1540. int snd_vt1724_gpio_get(struct snd_kcontrol *kcontrol,
  1541. struct snd_ctl_elem_value *ucontrol)
  1542. {
  1543. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1544. int shift = kcontrol->private_value & 0xff;
  1545. int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
  1546. snd_ice1712_save_gpio_status(ice);
  1547. ucontrol->value.integer.value[0] =
  1548. (snd_ice1712_gpio_read(ice) & (1 << shift) ? 1 : 0) ^ invert;
  1549. snd_ice1712_restore_gpio_status(ice);
  1550. return 0;
  1551. }
  1552. int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
  1553. struct snd_ctl_elem_value *ucontrol)
  1554. {
  1555. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1556. int shift = kcontrol->private_value & 0xff;
  1557. int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
  1558. unsigned int val, nval;
  1559. if (kcontrol->private_value & (1 << 31))
  1560. return -EPERM;
  1561. nval = (ucontrol->value.integer.value[0] ? (1 << shift) : 0) ^ invert;
  1562. snd_ice1712_save_gpio_status(ice);
  1563. val = snd_ice1712_gpio_read(ice);
  1564. nval |= val & ~(1 << shift);
  1565. if (val != nval)
  1566. snd_ice1712_gpio_write(ice, nval);
  1567. snd_ice1712_restore_gpio_status(ice);
  1568. return val != nval;
  1569. }
  1570. #endif /* NOT USED YET */
  1571. /*
  1572. * rate
  1573. */
  1574. static int snd_vt1724_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
  1575. struct snd_ctl_elem_info *uinfo)
  1576. {
  1577. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1578. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1579. uinfo->count = 1;
  1580. uinfo->value.enumerated.items = ice->hw_rates->count + 1;
  1581. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1582. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1583. if (uinfo->value.enumerated.item == uinfo->value.enumerated.items - 1)
  1584. strcpy(uinfo->value.enumerated.name, "IEC958 Input");
  1585. else
  1586. sprintf(uinfo->value.enumerated.name, "%d",
  1587. ice->hw_rates->list[uinfo->value.enumerated.item]);
  1588. return 0;
  1589. }
  1590. static int snd_vt1724_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
  1591. struct snd_ctl_elem_value *ucontrol)
  1592. {
  1593. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1594. unsigned int i, rate;
  1595. spin_lock_irq(&ice->reg_lock);
  1596. if (ice->is_spdif_master(ice)) {
  1597. ucontrol->value.enumerated.item[0] = ice->hw_rates->count;
  1598. } else {
  1599. rate = ice->get_rate(ice);
  1600. ucontrol->value.enumerated.item[0] = 0;
  1601. for (i = 0; i < ice->hw_rates->count; i++) {
  1602. if (ice->hw_rates->list[i] == rate) {
  1603. ucontrol->value.enumerated.item[0] = i;
  1604. break;
  1605. }
  1606. }
  1607. }
  1608. spin_unlock_irq(&ice->reg_lock);
  1609. return 0;
  1610. }
  1611. /* setting clock to external - SPDIF */
  1612. static void stdclock_set_spdif_clock(struct snd_ice1712 *ice)
  1613. {
  1614. unsigned char oval;
  1615. unsigned char i2s_oval;
  1616. oval = inb(ICEMT1724(ice, RATE));
  1617. outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE));
  1618. /* setting 256fs */
  1619. i2s_oval = inb(ICEMT1724(ice, I2S_FORMAT));
  1620. outb(i2s_oval & ~VT1724_MT_I2S_MCLK_128X, ICEMT1724(ice, I2S_FORMAT));
  1621. }
  1622. static int snd_vt1724_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
  1623. struct snd_ctl_elem_value *ucontrol)
  1624. {
  1625. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1626. unsigned int old_rate, new_rate;
  1627. unsigned int item = ucontrol->value.enumerated.item[0];
  1628. unsigned int spdif = ice->hw_rates->count;
  1629. if (item > spdif)
  1630. return -EINVAL;
  1631. spin_lock_irq(&ice->reg_lock);
  1632. if (ice->is_spdif_master(ice))
  1633. old_rate = 0;
  1634. else
  1635. old_rate = ice->get_rate(ice);
  1636. if (item == spdif) {
  1637. /* switching to external clock via SPDIF */
  1638. ice->set_spdif_clock(ice);
  1639. new_rate = 0;
  1640. } else {
  1641. /* internal on-card clock */
  1642. new_rate = ice->hw_rates->list[item];
  1643. ice->pro_rate_default = new_rate;
  1644. spin_unlock_irq(&ice->reg_lock);
  1645. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 1);
  1646. spin_lock_irq(&ice->reg_lock);
  1647. }
  1648. spin_unlock_irq(&ice->reg_lock);
  1649. /* the first reset to the SPDIF master mode? */
  1650. if (old_rate != new_rate && !new_rate) {
  1651. /* notify akm chips as well */
  1652. unsigned int i;
  1653. if (ice->gpio.set_pro_rate)
  1654. ice->gpio.set_pro_rate(ice, 0);
  1655. for (i = 0; i < ice->akm_codecs; i++) {
  1656. if (ice->akm[i].ops.set_rate_val)
  1657. ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
  1658. }
  1659. }
  1660. return old_rate != new_rate;
  1661. }
  1662. static struct snd_kcontrol_new snd_vt1724_pro_internal_clock __devinitdata = {
  1663. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1664. .name = "Multi Track Internal Clock",
  1665. .info = snd_vt1724_pro_internal_clock_info,
  1666. .get = snd_vt1724_pro_internal_clock_get,
  1667. .put = snd_vt1724_pro_internal_clock_put
  1668. };
  1669. #define snd_vt1724_pro_rate_locking_info snd_ctl_boolean_mono_info
  1670. static int snd_vt1724_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
  1671. struct snd_ctl_elem_value *ucontrol)
  1672. {
  1673. ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
  1674. return 0;
  1675. }
  1676. static int snd_vt1724_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
  1677. struct snd_ctl_elem_value *ucontrol)
  1678. {
  1679. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1680. int change = 0, nval;
  1681. nval = ucontrol->value.integer.value[0] ? 1 : 0;
  1682. spin_lock_irq(&ice->reg_lock);
  1683. change = PRO_RATE_LOCKED != nval;
  1684. PRO_RATE_LOCKED = nval;
  1685. spin_unlock_irq(&ice->reg_lock);
  1686. return change;
  1687. }
  1688. static struct snd_kcontrol_new snd_vt1724_pro_rate_locking __devinitdata = {
  1689. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1690. .name = "Multi Track Rate Locking",
  1691. .info = snd_vt1724_pro_rate_locking_info,
  1692. .get = snd_vt1724_pro_rate_locking_get,
  1693. .put = snd_vt1724_pro_rate_locking_put
  1694. };
  1695. #define snd_vt1724_pro_rate_reset_info snd_ctl_boolean_mono_info
  1696. static int snd_vt1724_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
  1697. struct snd_ctl_elem_value *ucontrol)
  1698. {
  1699. ucontrol->value.integer.value[0] = PRO_RATE_RESET ? 1 : 0;
  1700. return 0;
  1701. }
  1702. static int snd_vt1724_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
  1703. struct snd_ctl_elem_value *ucontrol)
  1704. {
  1705. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1706. int change = 0, nval;
  1707. nval = ucontrol->value.integer.value[0] ? 1 : 0;
  1708. spin_lock_irq(&ice->reg_lock);
  1709. change = PRO_RATE_RESET != nval;
  1710. PRO_RATE_RESET = nval;
  1711. spin_unlock_irq(&ice->reg_lock);
  1712. return change;
  1713. }
  1714. static struct snd_kcontrol_new snd_vt1724_pro_rate_reset __devinitdata = {
  1715. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1716. .name = "Multi Track Rate Reset",
  1717. .info = snd_vt1724_pro_rate_reset_info,
  1718. .get = snd_vt1724_pro_rate_reset_get,
  1719. .put = snd_vt1724_pro_rate_reset_put
  1720. };
  1721. /*
  1722. * routing
  1723. */
  1724. static int snd_vt1724_pro_route_info(struct snd_kcontrol *kcontrol,
  1725. struct snd_ctl_elem_info *uinfo)
  1726. {
  1727. static char *texts[] = {
  1728. "PCM Out", /* 0 */
  1729. "H/W In 0", "H/W In 1", /* 1-2 */
  1730. "IEC958 In L", "IEC958 In R", /* 3-4 */
  1731. };
  1732. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1733. uinfo->count = 1;
  1734. uinfo->value.enumerated.items = 5;
  1735. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1736. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1737. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  1738. return 0;
  1739. }
  1740. static inline int analog_route_shift(int idx)
  1741. {
  1742. return (idx % 2) * 12 + ((idx / 2) * 3) + 8;
  1743. }
  1744. static inline int digital_route_shift(int idx)
  1745. {
  1746. return idx * 3;
  1747. }
  1748. int snd_ice1724_get_route_val(struct snd_ice1712 *ice, int shift)
  1749. {
  1750. unsigned long val;
  1751. unsigned char eitem;
  1752. static const unsigned char xlate[8] = {
  1753. 0, 255, 1, 2, 255, 255, 3, 4,
  1754. };
  1755. val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
  1756. val >>= shift;
  1757. val &= 7; /* we now have 3 bits per output */
  1758. eitem = xlate[val];
  1759. if (eitem == 255) {
  1760. snd_BUG();
  1761. return 0;
  1762. }
  1763. return eitem;
  1764. }
  1765. int snd_ice1724_put_route_val(struct snd_ice1712 *ice, unsigned int val,
  1766. int shift)
  1767. {
  1768. unsigned int old_val, nval;
  1769. int change;
  1770. static const unsigned char xroute[8] = {
  1771. 0, /* PCM */
  1772. 2, /* PSDIN0 Left */
  1773. 3, /* PSDIN0 Right */
  1774. 6, /* SPDIN Left */
  1775. 7, /* SPDIN Right */
  1776. };
  1777. nval = xroute[val % 5];
  1778. val = old_val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
  1779. val &= ~(0x07 << shift);
  1780. val |= nval << shift;
  1781. change = val != old_val;
  1782. if (change)
  1783. outl(val, ICEMT1724(ice, ROUTE_PLAYBACK));
  1784. return change;
  1785. }
  1786. static int snd_vt1724_pro_route_analog_get(struct snd_kcontrol *kcontrol,
  1787. struct snd_ctl_elem_value *ucontrol)
  1788. {
  1789. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1790. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1791. ucontrol->value.enumerated.item[0] =
  1792. snd_ice1724_get_route_val(ice, analog_route_shift(idx));
  1793. return 0;
  1794. }
  1795. static int snd_vt1724_pro_route_analog_put(struct snd_kcontrol *kcontrol,
  1796. struct snd_ctl_elem_value *ucontrol)
  1797. {
  1798. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1799. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1800. return snd_ice1724_put_route_val(ice,
  1801. ucontrol->value.enumerated.item[0],
  1802. analog_route_shift(idx));
  1803. }
  1804. static int snd_vt1724_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
  1805. struct snd_ctl_elem_value *ucontrol)
  1806. {
  1807. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1808. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1809. ucontrol->value.enumerated.item[0] =
  1810. snd_ice1724_get_route_val(ice, digital_route_shift(idx));
  1811. return 0;
  1812. }
  1813. static int snd_vt1724_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
  1814. struct snd_ctl_elem_value *ucontrol)
  1815. {
  1816. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1817. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1818. return snd_ice1724_put_route_val(ice,
  1819. ucontrol->value.enumerated.item[0],
  1820. digital_route_shift(idx));
  1821. }
  1822. static struct snd_kcontrol_new snd_vt1724_mixer_pro_analog_route __devinitdata =
  1823. {
  1824. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1825. .name = "H/W Playback Route",
  1826. .info = snd_vt1724_pro_route_info,
  1827. .get = snd_vt1724_pro_route_analog_get,
  1828. .put = snd_vt1724_pro_route_analog_put,
  1829. };
  1830. static struct snd_kcontrol_new snd_vt1724_mixer_pro_spdif_route __devinitdata = {
  1831. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1832. .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, NONE) "Route",
  1833. .info = snd_vt1724_pro_route_info,
  1834. .get = snd_vt1724_pro_route_spdif_get,
  1835. .put = snd_vt1724_pro_route_spdif_put,
  1836. .count = 2,
  1837. };
  1838. static int snd_vt1724_pro_peak_info(struct snd_kcontrol *kcontrol,
  1839. struct snd_ctl_elem_info *uinfo)
  1840. {
  1841. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1842. uinfo->count = 22; /* FIXME: for compatibility with ice1712... */
  1843. uinfo->value.integer.min = 0;
  1844. uinfo->value.integer.max = 255;
  1845. return 0;
  1846. }
  1847. static int snd_vt1724_pro_peak_get(struct snd_kcontrol *kcontrol,
  1848. struct snd_ctl_elem_value *ucontrol)
  1849. {
  1850. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1851. int idx;
  1852. spin_lock_irq(&ice->reg_lock);
  1853. for (idx = 0; idx < 22; idx++) {
  1854. outb(idx, ICEMT1724(ice, MONITOR_PEAKINDEX));
  1855. ucontrol->value.integer.value[idx] =
  1856. inb(ICEMT1724(ice, MONITOR_PEAKDATA));
  1857. }
  1858. spin_unlock_irq(&ice->reg_lock);
  1859. return 0;
  1860. }
  1861. static struct snd_kcontrol_new snd_vt1724_mixer_pro_peak __devinitdata = {
  1862. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1863. .name = "Multi Track Peak",
  1864. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  1865. .info = snd_vt1724_pro_peak_info,
  1866. .get = snd_vt1724_pro_peak_get
  1867. };
  1868. /*
  1869. *
  1870. */
  1871. static struct snd_ice1712_card_info no_matched __devinitdata;
  1872. static struct snd_ice1712_card_info *card_tables[] __devinitdata = {
  1873. snd_vt1724_revo_cards,
  1874. snd_vt1724_amp_cards,
  1875. snd_vt1724_aureon_cards,
  1876. snd_vt1720_mobo_cards,
  1877. snd_vt1720_pontis_cards,
  1878. snd_vt1724_prodigy_hifi_cards,
  1879. snd_vt1724_prodigy192_cards,
  1880. snd_vt1724_juli_cards,
  1881. snd_vt1724_maya44_cards,
  1882. snd_vt1724_phase_cards,
  1883. snd_vt1724_wtm_cards,
  1884. snd_vt1724_se_cards,
  1885. NULL,
  1886. };
  1887. /*
  1888. */
  1889. static void wait_i2c_busy(struct snd_ice1712 *ice)
  1890. {
  1891. int t = 0x10000;
  1892. while ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_BUSY) && t--)
  1893. ;
  1894. if (t == -1)
  1895. printk(KERN_ERR "ice1724: i2c busy timeout\n");
  1896. }
  1897. unsigned char snd_vt1724_read_i2c(struct snd_ice1712 *ice,
  1898. unsigned char dev, unsigned char addr)
  1899. {
  1900. unsigned char val;
  1901. mutex_lock(&ice->i2c_mutex);
  1902. wait_i2c_busy(ice);
  1903. outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
  1904. outb(dev & ~VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
  1905. wait_i2c_busy(ice);
  1906. val = inb(ICEREG1724(ice, I2C_DATA));
  1907. mutex_unlock(&ice->i2c_mutex);
  1908. /*
  1909. printk(KERN_DEBUG "i2c_read: [0x%x,0x%x] = 0x%x\n", dev, addr, val);
  1910. */
  1911. return val;
  1912. }
  1913. void snd_vt1724_write_i2c(struct snd_ice1712 *ice,
  1914. unsigned char dev, unsigned char addr, unsigned char data)
  1915. {
  1916. mutex_lock(&ice->i2c_mutex);
  1917. wait_i2c_busy(ice);
  1918. /*
  1919. printk(KERN_DEBUG "i2c_write: [0x%x,0x%x] = 0x%x\n", dev, addr, data);
  1920. */
  1921. outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
  1922. outb(data, ICEREG1724(ice, I2C_DATA));
  1923. outb(dev | VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
  1924. wait_i2c_busy(ice);
  1925. mutex_unlock(&ice->i2c_mutex);
  1926. }
  1927. static int __devinit snd_vt1724_read_eeprom(struct snd_ice1712 *ice,
  1928. const char *modelname)
  1929. {
  1930. const int dev = 0xa0; /* EEPROM device address */
  1931. unsigned int i, size;
  1932. struct snd_ice1712_card_info * const *tbl, *c;
  1933. if (!modelname || !*modelname) {
  1934. ice->eeprom.subvendor = 0;
  1935. if ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_EEPROM) != 0)
  1936. ice->eeprom.subvendor =
  1937. (snd_vt1724_read_i2c(ice, dev, 0x00) << 0) |
  1938. (snd_vt1724_read_i2c(ice, dev, 0x01) << 8) |
  1939. (snd_vt1724_read_i2c(ice, dev, 0x02) << 16) |
  1940. (snd_vt1724_read_i2c(ice, dev, 0x03) << 24);
  1941. if (ice->eeprom.subvendor == 0 ||
  1942. ice->eeprom.subvendor == (unsigned int)-1) {
  1943. /* invalid subvendor from EEPROM, try the PCI
  1944. * subststem ID instead
  1945. */
  1946. u16 vendor, device;
  1947. pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID,
  1948. &vendor);
  1949. pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
  1950. ice->eeprom.subvendor =
  1951. ((unsigned int)swab16(vendor) << 16) | swab16(device);
  1952. if (ice->eeprom.subvendor == 0 ||
  1953. ice->eeprom.subvendor == (unsigned int)-1) {
  1954. printk(KERN_ERR "ice1724: No valid ID is found\n");
  1955. return -ENXIO;
  1956. }
  1957. }
  1958. }
  1959. for (tbl = card_tables; *tbl; tbl++) {
  1960. for (c = *tbl; c->subvendor; c++) {
  1961. if (modelname && c->model &&
  1962. !strcmp(modelname, c->model)) {
  1963. printk(KERN_INFO "ice1724: Using board model %s\n",
  1964. c->name);
  1965. ice->eeprom.subvendor = c->subvendor;
  1966. } else if (c->subvendor != ice->eeprom.subvendor)
  1967. continue;
  1968. if (!c->eeprom_size || !c->eeprom_data)
  1969. goto found;
  1970. /* if the EEPROM is given by the driver, use it */
  1971. snd_printdd("using the defined eeprom..\n");
  1972. ice->eeprom.version = 2;
  1973. ice->eeprom.size = c->eeprom_size + 6;
  1974. memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
  1975. goto read_skipped;
  1976. }
  1977. }
  1978. printk(KERN_WARNING "ice1724: No matching model found for ID 0x%x\n",
  1979. ice->eeprom.subvendor);
  1980. found:
  1981. ice->eeprom.size = snd_vt1724_read_i2c(ice, dev, 0x04);
  1982. if (ice->eeprom.size < 6)
  1983. ice->eeprom.size = 32;
  1984. else if (ice->eeprom.size > 32) {
  1985. printk(KERN_ERR "ice1724: Invalid EEPROM (size = %i)\n",
  1986. ice->eeprom.size);
  1987. return -EIO;
  1988. }
  1989. ice->eeprom.version = snd_vt1724_read_i2c(ice, dev, 0x05);
  1990. if (ice->eeprom.version != 2)
  1991. printk(KERN_WARNING "ice1724: Invalid EEPROM version %i\n",
  1992. ice->eeprom.version);
  1993. size = ice->eeprom.size - 6;
  1994. for (i = 0; i < size; i++)
  1995. ice->eeprom.data[i] = snd_vt1724_read_i2c(ice, dev, i + 6);
  1996. read_skipped:
  1997. ice->eeprom.gpiomask = eeprom_triple(ice, ICE_EEP2_GPIO_MASK);
  1998. ice->eeprom.gpiostate = eeprom_triple(ice, ICE_EEP2_GPIO_STATE);
  1999. ice->eeprom.gpiodir = eeprom_triple(ice, ICE_EEP2_GPIO_DIR);
  2000. return 0;
  2001. }
  2002. static void snd_vt1724_chip_reset(struct snd_ice1712 *ice)
  2003. {
  2004. outb(VT1724_RESET , ICEREG1724(ice, CONTROL));
  2005. inb(ICEREG1724(ice, CONTROL)); /* pci posting flush */
  2006. msleep(10);
  2007. outb(0, ICEREG1724(ice, CONTROL));
  2008. inb(ICEREG1724(ice, CONTROL)); /* pci posting flush */
  2009. msleep(10);
  2010. }
  2011. static int snd_vt1724_chip_init(struct snd_ice1712 *ice)
  2012. {
  2013. outb(ice->eeprom.data[ICE_EEP2_SYSCONF], ICEREG1724(ice, SYS_CFG));
  2014. outb(ice->eeprom.data[ICE_EEP2_ACLINK], ICEREG1724(ice, AC97_CFG));
  2015. outb(ice->eeprom.data[ICE_EEP2_I2S], ICEREG1724(ice, I2S_FEATURES));
  2016. outb(ice->eeprom.data[ICE_EEP2_SPDIF], ICEREG1724(ice, SPDIF_CFG));
  2017. ice->gpio.write_mask = ice->eeprom.gpiomask;
  2018. ice->gpio.direction = ice->eeprom.gpiodir;
  2019. snd_vt1724_set_gpio_mask(ice, ice->eeprom.gpiomask);
  2020. snd_vt1724_set_gpio_dir(ice, ice->eeprom.gpiodir);
  2021. snd_vt1724_set_gpio_data(ice, ice->eeprom.gpiostate);
  2022. outb(0, ICEREG1724(ice, POWERDOWN));
  2023. /* MPU_RX and TX irq masks are cleared later dynamically */
  2024. outb(VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX , ICEREG1724(ice, IRQMASK));
  2025. /* don't handle FIFO overrun/underruns (just yet),
  2026. * since they cause machine lockups
  2027. */
  2028. outb(VT1724_MULTI_FIFO_ERR, ICEMT1724(ice, DMA_INT_MASK));
  2029. return 0;
  2030. }
  2031. static int __devinit snd_vt1724_spdif_build_controls(struct snd_ice1712 *ice)
  2032. {
  2033. int err;
  2034. struct snd_kcontrol *kctl;
  2035. if (snd_BUG_ON(!ice->pcm))
  2036. return -EIO;
  2037. if (!ice->own_routing) {
  2038. err = snd_ctl_add(ice->card,
  2039. snd_ctl_new1(&snd_vt1724_mixer_pro_spdif_route, ice));
  2040. if (err < 0)
  2041. return err;
  2042. }
  2043. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_spdif_switch, ice));
  2044. if (err < 0)
  2045. return err;
  2046. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_default, ice));
  2047. if (err < 0)
  2048. return err;
  2049. kctl->id.device = ice->pcm->device;
  2050. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskc, ice));
  2051. if (err < 0)
  2052. return err;
  2053. kctl->id.device = ice->pcm->device;
  2054. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskp, ice));
  2055. if (err < 0)
  2056. return err;
  2057. kctl->id.device = ice->pcm->device;
  2058. #if 0 /* use default only */
  2059. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_stream, ice));
  2060. if (err < 0)
  2061. return err;
  2062. kctl->id.device = ice->pcm->device;
  2063. ice->spdif.stream_ctl = kctl;
  2064. #endif
  2065. return 0;
  2066. }
  2067. static int __devinit snd_vt1724_build_controls(struct snd_ice1712 *ice)
  2068. {
  2069. int err;
  2070. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_eeprom, ice));
  2071. if (err < 0)
  2072. return err;
  2073. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_internal_clock, ice));
  2074. if (err < 0)
  2075. return err;
  2076. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_locking, ice));
  2077. if (err < 0)
  2078. return err;
  2079. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_reset, ice));
  2080. if (err < 0)
  2081. return err;
  2082. if (!ice->own_routing && ice->num_total_dacs > 0) {
  2083. struct snd_kcontrol_new tmp = snd_vt1724_mixer_pro_analog_route;
  2084. tmp.count = ice->num_total_dacs;
  2085. if (ice->vt1720 && tmp.count > 2)
  2086. tmp.count = 2;
  2087. err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
  2088. if (err < 0)
  2089. return err;
  2090. }
  2091. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_peak, ice));
  2092. if (err < 0)
  2093. return err;
  2094. return 0;
  2095. }
  2096. static int snd_vt1724_free(struct snd_ice1712 *ice)
  2097. {
  2098. if (!ice->port)
  2099. goto __hw_end;
  2100. /* mask all interrupts */
  2101. outb(0xff, ICEMT1724(ice, DMA_INT_MASK));
  2102. outb(0xff, ICEREG1724(ice, IRQMASK));
  2103. /* --- */
  2104. __hw_end:
  2105. if (ice->irq >= 0)
  2106. free_irq(ice->irq, ice);
  2107. pci_release_regions(ice->pci);
  2108. snd_ice1712_akm4xxx_free(ice);
  2109. pci_disable_device(ice->pci);
  2110. kfree(ice->spec);
  2111. kfree(ice);
  2112. return 0;
  2113. }
  2114. static int snd_vt1724_dev_free(struct snd_device *device)
  2115. {
  2116. struct snd_ice1712 *ice = device->device_data;
  2117. return snd_vt1724_free(ice);
  2118. }
  2119. static int __devinit snd_vt1724_create(struct snd_card *card,
  2120. struct pci_dev *pci,
  2121. const char *modelname,
  2122. struct snd_ice1712 **r_ice1712)
  2123. {
  2124. struct snd_ice1712 *ice;
  2125. int err;
  2126. static struct snd_device_ops ops = {
  2127. .dev_free = snd_vt1724_dev_free,
  2128. };
  2129. *r_ice1712 = NULL;
  2130. /* enable PCI device */
  2131. err = pci_enable_device(pci);
  2132. if (err < 0)
  2133. return err;
  2134. ice = kzalloc(sizeof(*ice), GFP_KERNEL);
  2135. if (ice == NULL) {
  2136. pci_disable_device(pci);
  2137. return -ENOMEM;
  2138. }
  2139. ice->vt1724 = 1;
  2140. spin_lock_init(&ice->reg_lock);
  2141. mutex_init(&ice->gpio_mutex);
  2142. mutex_init(&ice->open_mutex);
  2143. mutex_init(&ice->i2c_mutex);
  2144. ice->gpio.set_mask = snd_vt1724_set_gpio_mask;
  2145. ice->gpio.get_mask = snd_vt1724_get_gpio_mask;
  2146. ice->gpio.set_dir = snd_vt1724_set_gpio_dir;
  2147. ice->gpio.get_dir = snd_vt1724_get_gpio_dir;
  2148. ice->gpio.set_data = snd_vt1724_set_gpio_data;
  2149. ice->gpio.get_data = snd_vt1724_get_gpio_data;
  2150. ice->card = card;
  2151. ice->pci = pci;
  2152. ice->irq = -1;
  2153. pci_set_master(pci);
  2154. snd_vt1724_proc_init(ice);
  2155. synchronize_irq(pci->irq);
  2156. card->private_data = ice;
  2157. err = pci_request_regions(pci, "ICE1724");
  2158. if (err < 0) {
  2159. kfree(ice);
  2160. pci_disable_device(pci);
  2161. return err;
  2162. }
  2163. ice->port = pci_resource_start(pci, 0);
  2164. ice->profi_port = pci_resource_start(pci, 1);
  2165. if (request_irq(pci->irq, snd_vt1724_interrupt,
  2166. IRQF_SHARED, "ICE1724", ice)) {
  2167. snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
  2168. snd_vt1724_free(ice);
  2169. return -EIO;
  2170. }
  2171. ice->irq = pci->irq;
  2172. snd_vt1724_chip_reset(ice);
  2173. if (snd_vt1724_read_eeprom(ice, modelname) < 0) {
  2174. snd_vt1724_free(ice);
  2175. return -EIO;
  2176. }
  2177. if (snd_vt1724_chip_init(ice) < 0) {
  2178. snd_vt1724_free(ice);
  2179. return -EIO;
  2180. }
  2181. err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops);
  2182. if (err < 0) {
  2183. snd_vt1724_free(ice);
  2184. return err;
  2185. }
  2186. snd_card_set_dev(card, &pci->dev);
  2187. *r_ice1712 = ice;
  2188. return 0;
  2189. }
  2190. /*
  2191. *
  2192. * Registration
  2193. *
  2194. */
  2195. static int __devinit snd_vt1724_probe(struct pci_dev *pci,
  2196. const struct pci_device_id *pci_id)
  2197. {
  2198. static int dev;
  2199. struct snd_card *card;
  2200. struct snd_ice1712 *ice;
  2201. int pcm_dev = 0, err;
  2202. struct snd_ice1712_card_info * const *tbl, *c;
  2203. if (dev >= SNDRV_CARDS)
  2204. return -ENODEV;
  2205. if (!enable[dev]) {
  2206. dev++;
  2207. return -ENOENT;
  2208. }
  2209. err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
  2210. if (err < 0)
  2211. return err;
  2212. strcpy(card->driver, "ICE1724");
  2213. strcpy(card->shortname, "ICEnsemble ICE1724");
  2214. err = snd_vt1724_create(card, pci, model[dev], &ice);
  2215. if (err < 0) {
  2216. snd_card_free(card);
  2217. return err;
  2218. }
  2219. for (tbl = card_tables; *tbl; tbl++) {
  2220. for (c = *tbl; c->subvendor; c++) {
  2221. if (c->subvendor == ice->eeprom.subvendor) {
  2222. strcpy(card->shortname, c->name);
  2223. if (c->driver) /* specific driver? */
  2224. strcpy(card->driver, c->driver);
  2225. if (c->chip_init) {
  2226. err = c->chip_init(ice);
  2227. if (err < 0) {
  2228. snd_card_free(card);
  2229. return err;
  2230. }
  2231. }
  2232. goto __found;
  2233. }
  2234. }
  2235. }
  2236. c = &no_matched;
  2237. __found:
  2238. /*
  2239. * VT1724 has separate DMAs for the analog and the SPDIF streams while
  2240. * ICE1712 has only one for both (mixed up).
  2241. *
  2242. * Confusingly the analog PCM is named "professional" here because it
  2243. * was called so in ice1712 driver, and vt1724 driver is derived from
  2244. * ice1712 driver.
  2245. */
  2246. ice->pro_rate_default = PRO_RATE_DEFAULT;
  2247. if (!ice->is_spdif_master)
  2248. ice->is_spdif_master = stdclock_is_spdif_master;
  2249. if (!ice->get_rate)
  2250. ice->get_rate = stdclock_get_rate;
  2251. if (!ice->set_rate)
  2252. ice->set_rate = stdclock_set_rate;
  2253. if (!ice->set_mclk)
  2254. ice->set_mclk = stdclock_set_mclk;
  2255. if (!ice->set_spdif_clock)
  2256. ice->set_spdif_clock = stdclock_set_spdif_clock;
  2257. if (!ice->hw_rates)
  2258. set_std_hw_rates(ice);
  2259. err = snd_vt1724_pcm_profi(ice, pcm_dev++);
  2260. if (err < 0) {
  2261. snd_card_free(card);
  2262. return err;
  2263. }
  2264. err = snd_vt1724_pcm_spdif(ice, pcm_dev++);
  2265. if (err < 0) {
  2266. snd_card_free(card);
  2267. return err;
  2268. }
  2269. err = snd_vt1724_pcm_indep(ice, pcm_dev++);
  2270. if (err < 0) {
  2271. snd_card_free(card);
  2272. return err;
  2273. }
  2274. err = snd_vt1724_ac97_mixer(ice);
  2275. if (err < 0) {
  2276. snd_card_free(card);
  2277. return err;
  2278. }
  2279. err = snd_vt1724_build_controls(ice);
  2280. if (err < 0) {
  2281. snd_card_free(card);
  2282. return err;
  2283. }
  2284. if (ice->pcm && ice->has_spdif) { /* has SPDIF I/O */
  2285. err = snd_vt1724_spdif_build_controls(ice);
  2286. if (err < 0) {
  2287. snd_card_free(card);
  2288. return err;
  2289. }
  2290. }
  2291. if (c->build_controls) {
  2292. err = c->build_controls(ice);
  2293. if (err < 0) {
  2294. snd_card_free(card);
  2295. return err;
  2296. }
  2297. }
  2298. if (!c->no_mpu401) {
  2299. if (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401) {
  2300. struct snd_rawmidi *rmidi;
  2301. err = snd_rawmidi_new(card, "MIDI", 0, 1, 1, &rmidi);
  2302. if (err < 0) {
  2303. snd_card_free(card);
  2304. return err;
  2305. }
  2306. ice->rmidi[0] = rmidi;
  2307. rmidi->private_data = ice;
  2308. strcpy(rmidi->name, "ICE1724 MIDI");
  2309. rmidi->info_flags = SNDRV_RAWMIDI_INFO_OUTPUT |
  2310. SNDRV_RAWMIDI_INFO_INPUT |
  2311. SNDRV_RAWMIDI_INFO_DUPLEX;
  2312. snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT,
  2313. &vt1724_midi_output_ops);
  2314. snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT,
  2315. &vt1724_midi_input_ops);
  2316. /* set watermarks */
  2317. outb(VT1724_MPU_RX_FIFO | 0x1,
  2318. ICEREG1724(ice, MPU_FIFO_WM));
  2319. outb(0x1, ICEREG1724(ice, MPU_FIFO_WM));
  2320. /* set UART mode */
  2321. outb(VT1724_MPU_UART, ICEREG1724(ice, MPU_CTRL));
  2322. }
  2323. }
  2324. sprintf(card->longname, "%s at 0x%lx, irq %i",
  2325. card->shortname, ice->port, ice->irq);
  2326. err = snd_card_register(card);
  2327. if (err < 0) {
  2328. snd_card_free(card);
  2329. return err;
  2330. }
  2331. pci_set_drvdata(pci, card);
  2332. dev++;
  2333. return 0;
  2334. }
  2335. static void __devexit snd_vt1724_remove(struct pci_dev *pci)
  2336. {
  2337. snd_card_free(pci_get_drvdata(pci));
  2338. pci_set_drvdata(pci, NULL);
  2339. }
  2340. #ifdef CONFIG_PM
  2341. static int snd_vt1724_suspend(struct pci_dev *pci, pm_message_t state)
  2342. {
  2343. struct snd_card *card = pci_get_drvdata(pci);
  2344. struct snd_ice1712 *ice = card->private_data;
  2345. if (!ice->pm_suspend_enabled)
  2346. return 0;
  2347. snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
  2348. snd_pcm_suspend_all(ice->pcm);
  2349. snd_pcm_suspend_all(ice->pcm_pro);
  2350. snd_pcm_suspend_all(ice->pcm_ds);
  2351. snd_ac97_suspend(ice->ac97);
  2352. spin_lock_irq(&ice->reg_lock);
  2353. ice->pm_saved_is_spdif_master = ice->is_spdif_master(ice);
  2354. ice->pm_saved_spdif_ctrl = inw(ICEMT1724(ice, SPDIF_CTRL));
  2355. ice->pm_saved_spdif_cfg = inb(ICEREG1724(ice, SPDIF_CFG));
  2356. ice->pm_saved_route = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
  2357. spin_unlock_irq(&ice->reg_lock);
  2358. if (ice->pm_suspend)
  2359. ice->pm_suspend(ice);
  2360. pci_disable_device(pci);
  2361. pci_save_state(pci);
  2362. pci_set_power_state(pci, pci_choose_state(pci, state));
  2363. return 0;
  2364. }
  2365. static int snd_vt1724_resume(struct pci_dev *pci)
  2366. {
  2367. struct snd_card *card = pci_get_drvdata(pci);
  2368. struct snd_ice1712 *ice = card->private_data;
  2369. if (!ice->pm_suspend_enabled)
  2370. return 0;
  2371. pci_set_power_state(pci, PCI_D0);
  2372. pci_restore_state(pci);
  2373. if (pci_enable_device(pci) < 0) {
  2374. snd_card_disconnect(card);
  2375. return -EIO;
  2376. }
  2377. pci_set_master(pci);
  2378. snd_vt1724_chip_reset(ice);
  2379. if (snd_vt1724_chip_init(ice) < 0) {
  2380. snd_card_disconnect(card);
  2381. return -EIO;
  2382. }
  2383. if (ice->pm_resume)
  2384. ice->pm_resume(ice);
  2385. if (ice->pm_saved_is_spdif_master) {
  2386. /* switching to external clock via SPDIF */
  2387. ice->set_spdif_clock(ice);
  2388. } else {
  2389. /* internal on-card clock */
  2390. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 1);
  2391. }
  2392. update_spdif_bits(ice, ice->pm_saved_spdif_ctrl);
  2393. outb(ice->pm_saved_spdif_cfg, ICEREG1724(ice, SPDIF_CFG));
  2394. outl(ice->pm_saved_route, ICEMT1724(ice, ROUTE_PLAYBACK));
  2395. if (ice->ac97)
  2396. snd_ac97_resume(ice->ac97);
  2397. snd_power_change_state(card, SNDRV_CTL_POWER_D0);
  2398. return 0;
  2399. }
  2400. #endif
  2401. static struct pci_driver driver = {
  2402. .name = "ICE1724",
  2403. .id_table = snd_vt1724_ids,
  2404. .probe = snd_vt1724_probe,
  2405. .remove = __devexit_p(snd_vt1724_remove),
  2406. #ifdef CONFIG_PM
  2407. .suspend = snd_vt1724_suspend,
  2408. .resume = snd_vt1724_resume,
  2409. #endif
  2410. };
  2411. static int __init alsa_card_ice1724_init(void)
  2412. {
  2413. return pci_register_driver(&driver);
  2414. }
  2415. static void __exit alsa_card_ice1724_exit(void)
  2416. {
  2417. pci_unregister_driver(&driver);
  2418. }
  2419. module_init(alsa_card_ice1724_init)
  2420. module_exit(alsa_card_ice1724_exit)