cm_bf537.c 15 KB

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  1. /*
  2. * File: arch/blackfin/mach-bf537/boards/cm_bf537.c
  3. * Based on: arch/blackfin/mach-bf533/boards/ezkit.c
  4. * Author: Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Created: 2005
  7. * Description: Board description file
  8. *
  9. * Modified:
  10. * Copyright 2005 National ICT Australia (NICTA)
  11. * Copyright 2004-2006 Analog Devices Inc.
  12. *
  13. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License as published by
  17. * the Free Software Foundation; either version 2 of the License, or
  18. * (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, see the file COPYING, or write
  27. * to the Free Software Foundation, Inc.,
  28. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  29. */
  30. #include <linux/device.h>
  31. #include <linux/etherdevice.h>
  32. #include <linux/platform_device.h>
  33. #include <linux/mtd/mtd.h>
  34. #include <linux/mtd/partitions.h>
  35. #include <linux/mtd/physmap.h>
  36. #include <linux/spi/spi.h>
  37. #include <linux/spi/flash.h>
  38. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  39. #include <linux/usb/isp1362.h>
  40. #endif
  41. #include <linux/ata_platform.h>
  42. #include <linux/irq.h>
  43. #include <asm/dma.h>
  44. #include <asm/bfin5xx_spi.h>
  45. #include <asm/portmux.h>
  46. #include <asm/dpmc.h>
  47. /*
  48. * Name the Board for the /proc/cpuinfo
  49. */
  50. const char bfin_board_name[] = "Bluetechnix CM BF537";
  51. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  52. /* all SPI peripherals info goes here */
  53. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  54. static struct mtd_partition bfin_spi_flash_partitions[] = {
  55. {
  56. .name = "bootloader(spi)",
  57. .size = 0x00020000,
  58. .offset = 0,
  59. .mask_flags = MTD_CAP_ROM
  60. }, {
  61. .name = "linux kernel(spi)",
  62. .size = 0xe0000,
  63. .offset = 0x20000
  64. }, {
  65. .name = "file system(spi)",
  66. .size = 0x700000,
  67. .offset = 0x00100000,
  68. }
  69. };
  70. static struct flash_platform_data bfin_spi_flash_data = {
  71. .name = "m25p80",
  72. .parts = bfin_spi_flash_partitions,
  73. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  74. .type = "m25p64",
  75. };
  76. /* SPI flash chip (m25p64) */
  77. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  78. .enable_dma = 0, /* use dma transfer with this chip*/
  79. .bits_per_word = 8,
  80. };
  81. #endif
  82. #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  83. /* SPI ADC chip */
  84. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  85. .enable_dma = 1, /* use dma transfer with this chip*/
  86. .bits_per_word = 16,
  87. };
  88. #endif
  89. #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  90. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  91. .enable_dma = 0,
  92. .bits_per_word = 16,
  93. };
  94. #endif
  95. #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
  96. static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
  97. .enable_dma = 0,
  98. .bits_per_word = 16,
  99. };
  100. #endif
  101. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  102. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  103. .enable_dma = 0,
  104. .bits_per_word = 8,
  105. };
  106. #endif
  107. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  108. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  109. {
  110. /* the modalias must be the same as spi device driver name */
  111. .modalias = "m25p80", /* Name of spi_driver for this device */
  112. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  113. .bus_num = 0, /* Framework bus number */
  114. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  115. .platform_data = &bfin_spi_flash_data,
  116. .controller_data = &spi_flash_chip_info,
  117. .mode = SPI_MODE_3,
  118. },
  119. #endif
  120. #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  121. {
  122. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  123. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  124. .bus_num = 0, /* Framework bus number */
  125. .chip_select = 1, /* Framework chip select. */
  126. .platform_data = NULL, /* No spi_driver specific config */
  127. .controller_data = &spi_adc_chip_info,
  128. },
  129. #endif
  130. #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  131. {
  132. .modalias = "ad1836-spi",
  133. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  134. .bus_num = 0,
  135. .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
  136. .controller_data = &ad1836_spi_chip_info,
  137. },
  138. #endif
  139. #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
  140. {
  141. .modalias = "ad9960-spi",
  142. .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
  143. .bus_num = 0,
  144. .chip_select = 1,
  145. .controller_data = &ad9960_spi_chip_info,
  146. },
  147. #endif
  148. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  149. {
  150. .modalias = "mmc_spi",
  151. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  152. .bus_num = 0,
  153. .chip_select = 1,
  154. .controller_data = &mmc_spi_chip_info,
  155. .mode = SPI_MODE_3,
  156. },
  157. #endif
  158. };
  159. /* SPI (0) */
  160. static struct resource bfin_spi0_resource[] = {
  161. [0] = {
  162. .start = SPI0_REGBASE,
  163. .end = SPI0_REGBASE + 0xFF,
  164. .flags = IORESOURCE_MEM,
  165. },
  166. [1] = {
  167. .start = CH_SPI,
  168. .end = CH_SPI,
  169. .flags = IORESOURCE_DMA,
  170. },
  171. [2] = {
  172. .start = IRQ_SPI,
  173. .end = IRQ_SPI,
  174. .flags = IORESOURCE_IRQ,
  175. },
  176. };
  177. /* SPI controller data */
  178. static struct bfin5xx_spi_master bfin_spi0_info = {
  179. .num_chipselect = 8,
  180. .enable_dma = 1, /* master has the ability to do dma transfer */
  181. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  182. };
  183. static struct platform_device bfin_spi0_device = {
  184. .name = "bfin-spi",
  185. .id = 0, /* Bus number */
  186. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  187. .resource = bfin_spi0_resource,
  188. .dev = {
  189. .platform_data = &bfin_spi0_info, /* Passed to driver */
  190. },
  191. };
  192. #endif /* spi master and devices */
  193. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  194. static struct platform_device rtc_device = {
  195. .name = "rtc-bfin",
  196. .id = -1,
  197. };
  198. #endif
  199. #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
  200. static struct platform_device hitachi_fb_device = {
  201. .name = "hitachi-tx09",
  202. };
  203. #endif
  204. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  205. static struct resource smc91x_resources[] = {
  206. {
  207. .start = 0x20200300,
  208. .end = 0x20200300 + 16,
  209. .flags = IORESOURCE_MEM,
  210. }, {
  211. .start = IRQ_PF14,
  212. .end = IRQ_PF14,
  213. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  214. },
  215. };
  216. static struct platform_device smc91x_device = {
  217. .name = "smc91x",
  218. .id = 0,
  219. .num_resources = ARRAY_SIZE(smc91x_resources),
  220. .resource = smc91x_resources,
  221. };
  222. #endif
  223. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  224. static struct resource isp1362_hcd_resources[] = {
  225. {
  226. .start = 0x20308000,
  227. .end = 0x20308000,
  228. .flags = IORESOURCE_MEM,
  229. }, {
  230. .start = 0x20308004,
  231. .end = 0x20308004,
  232. .flags = IORESOURCE_MEM,
  233. }, {
  234. .start = IRQ_PG15,
  235. .end = IRQ_PG15,
  236. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  237. },
  238. };
  239. static struct isp1362_platform_data isp1362_priv = {
  240. .sel15Kres = 1,
  241. .clknotstop = 0,
  242. .oc_enable = 0,
  243. .int_act_high = 0,
  244. .int_edge_triggered = 0,
  245. .remote_wakeup_connected = 0,
  246. .no_power_switching = 1,
  247. .power_switching_mode = 0,
  248. };
  249. static struct platform_device isp1362_hcd_device = {
  250. .name = "isp1362-hcd",
  251. .id = 0,
  252. .dev = {
  253. .platform_data = &isp1362_priv,
  254. },
  255. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  256. .resource = isp1362_hcd_resources,
  257. };
  258. #endif
  259. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  260. static struct resource net2272_bfin_resources[] = {
  261. {
  262. .start = 0x20200000,
  263. .end = 0x20200000 + 0x100,
  264. .flags = IORESOURCE_MEM,
  265. }, {
  266. .start = IRQ_PH14,
  267. .end = IRQ_PH14,
  268. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  269. },
  270. };
  271. static struct platform_device net2272_bfin_device = {
  272. .name = "net2272",
  273. .id = -1,
  274. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  275. .resource = net2272_bfin_resources,
  276. };
  277. #endif
  278. static struct resource bfin_gpios_resources = {
  279. .start = 0,
  280. .end = MAX_BLACKFIN_GPIOS - 1,
  281. .flags = IORESOURCE_IRQ,
  282. };
  283. static struct platform_device bfin_gpios_device = {
  284. .name = "simple-gpio",
  285. .id = -1,
  286. .num_resources = 1,
  287. .resource = &bfin_gpios_resources,
  288. };
  289. #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
  290. static struct mtd_partition cm_partitions[] = {
  291. {
  292. .name = "bootloader(nor)",
  293. .size = 0x40000,
  294. .offset = 0,
  295. }, {
  296. .name = "linux kernel(nor)",
  297. .size = 0xE0000,
  298. .offset = MTDPART_OFS_APPEND,
  299. }, {
  300. .name = "file system(nor)",
  301. .size = MTDPART_SIZ_FULL,
  302. .offset = MTDPART_OFS_APPEND,
  303. }
  304. };
  305. static struct physmap_flash_data cm_flash_data = {
  306. .width = 2,
  307. .parts = cm_partitions,
  308. .nr_parts = ARRAY_SIZE(cm_partitions),
  309. };
  310. static unsigned cm_flash_gpios[] = { GPIO_PF4 };
  311. static struct resource cm_flash_resource[] = {
  312. {
  313. .name = "cfi_probe",
  314. .start = 0x20000000,
  315. .end = 0x201fffff,
  316. .flags = IORESOURCE_MEM,
  317. }, {
  318. .start = (unsigned long)cm_flash_gpios,
  319. .end = ARRAY_SIZE(cm_flash_gpios),
  320. .flags = IORESOURCE_IRQ,
  321. }
  322. };
  323. static struct platform_device cm_flash_device = {
  324. .name = "gpio-addr-flash",
  325. .id = 0,
  326. .dev = {
  327. .platform_data = &cm_flash_data,
  328. },
  329. .num_resources = ARRAY_SIZE(cm_flash_resource),
  330. .resource = cm_flash_resource,
  331. };
  332. #endif
  333. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  334. static struct resource bfin_uart_resources[] = {
  335. {
  336. .start = 0xFFC00400,
  337. .end = 0xFFC004FF,
  338. .flags = IORESOURCE_MEM,
  339. }, {
  340. .start = 0xFFC02000,
  341. .end = 0xFFC020FF,
  342. .flags = IORESOURCE_MEM,
  343. },
  344. };
  345. static struct platform_device bfin_uart_device = {
  346. .name = "bfin-uart",
  347. .id = 1,
  348. .num_resources = ARRAY_SIZE(bfin_uart_resources),
  349. .resource = bfin_uart_resources,
  350. };
  351. #endif
  352. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  353. #ifdef CONFIG_BFIN_SIR0
  354. static struct resource bfin_sir0_resources[] = {
  355. {
  356. .start = 0xFFC00400,
  357. .end = 0xFFC004FF,
  358. .flags = IORESOURCE_MEM,
  359. },
  360. {
  361. .start = IRQ_UART0_RX,
  362. .end = IRQ_UART0_RX+1,
  363. .flags = IORESOURCE_IRQ,
  364. },
  365. {
  366. .start = CH_UART0_RX,
  367. .end = CH_UART0_RX+1,
  368. .flags = IORESOURCE_DMA,
  369. },
  370. };
  371. static struct platform_device bfin_sir0_device = {
  372. .name = "bfin_sir",
  373. .id = 0,
  374. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  375. .resource = bfin_sir0_resources,
  376. };
  377. #endif
  378. #ifdef CONFIG_BFIN_SIR1
  379. static struct resource bfin_sir1_resources[] = {
  380. {
  381. .start = 0xFFC02000,
  382. .end = 0xFFC020FF,
  383. .flags = IORESOURCE_MEM,
  384. },
  385. {
  386. .start = IRQ_UART1_RX,
  387. .end = IRQ_UART1_RX+1,
  388. .flags = IORESOURCE_IRQ,
  389. },
  390. {
  391. .start = CH_UART1_RX,
  392. .end = CH_UART1_RX+1,
  393. .flags = IORESOURCE_DMA,
  394. },
  395. };
  396. static struct platform_device bfin_sir1_device = {
  397. .name = "bfin_sir",
  398. .id = 1,
  399. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  400. .resource = bfin_sir1_resources,
  401. };
  402. #endif
  403. #endif
  404. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  405. static struct resource bfin_twi0_resource[] = {
  406. [0] = {
  407. .start = TWI0_REGBASE,
  408. .end = TWI0_REGBASE,
  409. .flags = IORESOURCE_MEM,
  410. },
  411. [1] = {
  412. .start = IRQ_TWI,
  413. .end = IRQ_TWI,
  414. .flags = IORESOURCE_IRQ,
  415. },
  416. };
  417. static struct platform_device i2c_bfin_twi_device = {
  418. .name = "i2c-bfin-twi",
  419. .id = 0,
  420. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  421. .resource = bfin_twi0_resource,
  422. };
  423. #endif
  424. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  425. static struct platform_device bfin_sport0_uart_device = {
  426. .name = "bfin-sport-uart",
  427. .id = 0,
  428. };
  429. static struct platform_device bfin_sport1_uart_device = {
  430. .name = "bfin-sport-uart",
  431. .id = 1,
  432. };
  433. #endif
  434. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  435. static struct platform_device bfin_mii_bus = {
  436. .name = "bfin_mii_bus",
  437. };
  438. static struct platform_device bfin_mac_device = {
  439. .name = "bfin_mac",
  440. .dev.platform_data = &bfin_mii_bus,
  441. };
  442. #endif
  443. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  444. #define PATA_INT IRQ_PF14
  445. static struct pata_platform_info bfin_pata_platform_data = {
  446. .ioport_shift = 2,
  447. .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
  448. };
  449. static struct resource bfin_pata_resources[] = {
  450. {
  451. .start = 0x2030C000,
  452. .end = 0x2030C01F,
  453. .flags = IORESOURCE_MEM,
  454. },
  455. {
  456. .start = 0x2030D018,
  457. .end = 0x2030D01B,
  458. .flags = IORESOURCE_MEM,
  459. },
  460. {
  461. .start = PATA_INT,
  462. .end = PATA_INT,
  463. .flags = IORESOURCE_IRQ,
  464. },
  465. };
  466. static struct platform_device bfin_pata_device = {
  467. .name = "pata_platform",
  468. .id = -1,
  469. .num_resources = ARRAY_SIZE(bfin_pata_resources),
  470. .resource = bfin_pata_resources,
  471. .dev = {
  472. .platform_data = &bfin_pata_platform_data,
  473. }
  474. };
  475. #endif
  476. static const unsigned int cclk_vlev_datasheet[] =
  477. {
  478. VRPAIR(VLEV_085, 250000000),
  479. VRPAIR(VLEV_090, 376000000),
  480. VRPAIR(VLEV_095, 426000000),
  481. VRPAIR(VLEV_100, 426000000),
  482. VRPAIR(VLEV_105, 476000000),
  483. VRPAIR(VLEV_110, 476000000),
  484. VRPAIR(VLEV_115, 476000000),
  485. VRPAIR(VLEV_120, 500000000),
  486. VRPAIR(VLEV_125, 533000000),
  487. VRPAIR(VLEV_130, 600000000),
  488. };
  489. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  490. .tuple_tab = cclk_vlev_datasheet,
  491. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  492. .vr_settling_time = 25 /* us */,
  493. };
  494. static struct platform_device bfin_dpmc = {
  495. .name = "bfin dpmc",
  496. .dev = {
  497. .platform_data = &bfin_dmpc_vreg_data,
  498. },
  499. };
  500. static struct platform_device *cm_bf537_devices[] __initdata = {
  501. &bfin_dpmc,
  502. #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
  503. &hitachi_fb_device,
  504. #endif
  505. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  506. &rtc_device,
  507. #endif
  508. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  509. &bfin_uart_device,
  510. #endif
  511. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  512. #ifdef CONFIG_BFIN_SIR0
  513. &bfin_sir0_device,
  514. #endif
  515. #ifdef CONFIG_BFIN_SIR1
  516. &bfin_sir1_device,
  517. #endif
  518. #endif
  519. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  520. &i2c_bfin_twi_device,
  521. #endif
  522. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  523. &bfin_sport0_uart_device,
  524. &bfin_sport1_uart_device,
  525. #endif
  526. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  527. &isp1362_hcd_device,
  528. #endif
  529. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  530. &smc91x_device,
  531. #endif
  532. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  533. &bfin_mii_bus,
  534. &bfin_mac_device,
  535. #endif
  536. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  537. &net2272_bfin_device,
  538. #endif
  539. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  540. &bfin_spi0_device,
  541. #endif
  542. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  543. &bfin_pata_device,
  544. #endif
  545. #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
  546. &cm_flash_device,
  547. #endif
  548. &bfin_gpios_device,
  549. };
  550. static int __init cm_bf537_init(void)
  551. {
  552. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  553. platform_add_devices(cm_bf537_devices, ARRAY_SIZE(cm_bf537_devices));
  554. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  555. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  556. #endif
  557. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  558. irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
  559. #endif
  560. return 0;
  561. }
  562. arch_initcall(cm_bf537_init);
  563. void bfin_get_ether_addr(char *addr)
  564. {
  565. random_ether_addr(addr);
  566. printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
  567. }
  568. EXPORT_SYMBOL(bfin_get_ether_addr);