qla_init.c 139 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2008 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include "qla_gbl.h"
  9. #include <linux/delay.h>
  10. #include <linux/slab.h>
  11. #include <linux/vmalloc.h>
  12. #include "qla_devtbl.h"
  13. #ifdef CONFIG_SPARC
  14. #include <asm/prom.h>
  15. #endif
  16. /*
  17. * QLogic ISP2x00 Hardware Support Function Prototypes.
  18. */
  19. static int qla2x00_isp_firmware(scsi_qla_host_t *);
  20. static int qla2x00_setup_chip(scsi_qla_host_t *);
  21. static int qla2x00_init_rings(scsi_qla_host_t *);
  22. static int qla2x00_fw_ready(scsi_qla_host_t *);
  23. static int qla2x00_configure_hba(scsi_qla_host_t *);
  24. static int qla2x00_configure_loop(scsi_qla_host_t *);
  25. static int qla2x00_configure_local_loop(scsi_qla_host_t *);
  26. static int qla2x00_configure_fabric(scsi_qla_host_t *);
  27. static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
  28. static int qla2x00_device_resync(scsi_qla_host_t *);
  29. static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *,
  30. uint16_t *);
  31. static int qla2x00_restart_isp(scsi_qla_host_t *);
  32. static int qla2x00_find_new_loop_id(scsi_qla_host_t *, fc_port_t *);
  33. static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
  34. static int qla84xx_init_chip(scsi_qla_host_t *);
  35. static int qla25xx_init_queues(struct qla_hw_data *);
  36. /* SRB Extensions ---------------------------------------------------------- */
  37. static void
  38. qla2x00_ctx_sp_timeout(unsigned long __data)
  39. {
  40. srb_t *sp = (srb_t *)__data;
  41. struct srb_ctx *ctx;
  42. struct srb_iocb *iocb;
  43. fc_port_t *fcport = sp->fcport;
  44. struct qla_hw_data *ha = fcport->vha->hw;
  45. struct req_que *req;
  46. unsigned long flags;
  47. spin_lock_irqsave(&ha->hardware_lock, flags);
  48. req = ha->req_q_map[0];
  49. req->outstanding_cmds[sp->handle] = NULL;
  50. ctx = sp->ctx;
  51. iocb = ctx->u.iocb_cmd;
  52. iocb->timeout(sp);
  53. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  54. iocb->free(sp);
  55. }
  56. void
  57. qla2x00_ctx_sp_free(srb_t *sp)
  58. {
  59. struct srb_ctx *ctx = sp->ctx;
  60. struct srb_iocb *iocb = ctx->u.iocb_cmd;
  61. del_timer_sync(&iocb->timer);
  62. kfree(iocb);
  63. kfree(ctx);
  64. mempool_free(sp, sp->fcport->vha->hw->srb_mempool);
  65. }
  66. inline srb_t *
  67. qla2x00_get_ctx_sp(scsi_qla_host_t *vha, fc_port_t *fcport, size_t size,
  68. unsigned long tmo)
  69. {
  70. srb_t *sp;
  71. struct qla_hw_data *ha = vha->hw;
  72. struct srb_ctx *ctx;
  73. struct srb_iocb *iocb;
  74. sp = mempool_alloc(ha->srb_mempool, GFP_KERNEL);
  75. if (!sp)
  76. goto done;
  77. ctx = kzalloc(size, GFP_KERNEL);
  78. if (!ctx) {
  79. mempool_free(sp, ha->srb_mempool);
  80. sp = NULL;
  81. goto done;
  82. }
  83. iocb = kzalloc(sizeof(struct srb_iocb), GFP_KERNEL);
  84. if (!iocb) {
  85. mempool_free(sp, ha->srb_mempool);
  86. sp = NULL;
  87. kfree(ctx);
  88. goto done;
  89. }
  90. memset(sp, 0, sizeof(*sp));
  91. sp->fcport = fcport;
  92. sp->ctx = ctx;
  93. ctx->u.iocb_cmd = iocb;
  94. iocb->free = qla2x00_ctx_sp_free;
  95. init_timer(&iocb->timer);
  96. if (!tmo)
  97. goto done;
  98. iocb->timer.expires = jiffies + tmo * HZ;
  99. iocb->timer.data = (unsigned long)sp;
  100. iocb->timer.function = qla2x00_ctx_sp_timeout;
  101. add_timer(&iocb->timer);
  102. done:
  103. return sp;
  104. }
  105. /* Asynchronous Login/Logout Routines -------------------------------------- */
  106. #define ELS_TMO_2_RATOV(ha) ((ha)->r_a_tov / 10 * 2)
  107. static void
  108. qla2x00_async_logio_timeout(srb_t *sp)
  109. {
  110. fc_port_t *fcport = sp->fcport;
  111. struct srb_ctx *ctx = sp->ctx;
  112. DEBUG2(printk(KERN_WARNING
  113. "scsi(%ld:%x): Async-%s timeout.\n",
  114. fcport->vha->host_no, sp->handle, ctx->name));
  115. fcport->flags &= ~FCF_ASYNC_SENT;
  116. if (ctx->type == SRB_LOGIN_CMD)
  117. qla2x00_post_async_logout_work(fcport->vha, fcport, NULL);
  118. }
  119. static void
  120. qla2x00_async_login_ctx_done(srb_t *sp)
  121. {
  122. struct srb_ctx *ctx = sp->ctx;
  123. struct srb_iocb *lio = ctx->u.iocb_cmd;
  124. qla2x00_post_async_login_done_work(sp->fcport->vha, sp->fcport,
  125. lio->u.logio.data);
  126. lio->free(sp);
  127. }
  128. int
  129. qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
  130. uint16_t *data)
  131. {
  132. struct qla_hw_data *ha = vha->hw;
  133. srb_t *sp;
  134. struct srb_ctx *ctx;
  135. struct srb_iocb *lio;
  136. int rval;
  137. rval = QLA_FUNCTION_FAILED;
  138. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
  139. ELS_TMO_2_RATOV(ha) + 2);
  140. if (!sp)
  141. goto done;
  142. ctx = sp->ctx;
  143. ctx->type = SRB_LOGIN_CMD;
  144. ctx->name = "login";
  145. lio = ctx->u.iocb_cmd;
  146. lio->timeout = qla2x00_async_logio_timeout;
  147. lio->done = qla2x00_async_login_ctx_done;
  148. lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI;
  149. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  150. lio->u.logio.flags |= SRB_LOGIN_RETRIED;
  151. rval = qla2x00_start_sp(sp);
  152. if (rval != QLA_SUCCESS)
  153. goto done_free_sp;
  154. DEBUG2(printk(KERN_DEBUG
  155. "scsi(%ld:%x): Async-login - loop-id=%x portid=%02x%02x%02x "
  156. "retries=%d.\n", fcport->vha->host_no, sp->handle, fcport->loop_id,
  157. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
  158. fcport->login_retry));
  159. return rval;
  160. done_free_sp:
  161. lio->free(sp);
  162. done:
  163. return rval;
  164. }
  165. static void
  166. qla2x00_async_logout_ctx_done(srb_t *sp)
  167. {
  168. struct srb_ctx *ctx = sp->ctx;
  169. struct srb_iocb *lio = ctx->u.iocb_cmd;
  170. qla2x00_post_async_logout_done_work(sp->fcport->vha, sp->fcport,
  171. lio->u.logio.data);
  172. lio->free(sp);
  173. }
  174. int
  175. qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
  176. {
  177. struct qla_hw_data *ha = vha->hw;
  178. srb_t *sp;
  179. struct srb_ctx *ctx;
  180. struct srb_iocb *lio;
  181. int rval;
  182. rval = QLA_FUNCTION_FAILED;
  183. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
  184. ELS_TMO_2_RATOV(ha) + 2);
  185. if (!sp)
  186. goto done;
  187. ctx = sp->ctx;
  188. ctx->type = SRB_LOGOUT_CMD;
  189. ctx->name = "logout";
  190. lio = ctx->u.iocb_cmd;
  191. lio->timeout = qla2x00_async_logio_timeout;
  192. lio->done = qla2x00_async_logout_ctx_done;
  193. rval = qla2x00_start_sp(sp);
  194. if (rval != QLA_SUCCESS)
  195. goto done_free_sp;
  196. DEBUG2(printk(KERN_DEBUG
  197. "scsi(%ld:%x): Async-logout - loop-id=%x portid=%02x%02x%02x.\n",
  198. fcport->vha->host_no, sp->handle, fcport->loop_id,
  199. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa));
  200. return rval;
  201. done_free_sp:
  202. lio->free(sp);
  203. done:
  204. return rval;
  205. }
  206. static void
  207. qla2x00_async_adisc_ctx_done(srb_t *sp)
  208. {
  209. struct srb_ctx *ctx = sp->ctx;
  210. struct srb_iocb *lio = ctx->u.iocb_cmd;
  211. qla2x00_post_async_adisc_done_work(sp->fcport->vha, sp->fcport,
  212. lio->u.logio.data);
  213. lio->free(sp);
  214. }
  215. int
  216. qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport,
  217. uint16_t *data)
  218. {
  219. struct qla_hw_data *ha = vha->hw;
  220. srb_t *sp;
  221. struct srb_ctx *ctx;
  222. struct srb_iocb *lio;
  223. int rval;
  224. rval = QLA_FUNCTION_FAILED;
  225. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
  226. ELS_TMO_2_RATOV(ha) + 2);
  227. if (!sp)
  228. goto done;
  229. ctx = sp->ctx;
  230. ctx->type = SRB_ADISC_CMD;
  231. ctx->name = "adisc";
  232. lio = ctx->u.iocb_cmd;
  233. lio->timeout = qla2x00_async_logio_timeout;
  234. lio->done = qla2x00_async_adisc_ctx_done;
  235. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  236. lio->u.logio.flags |= SRB_LOGIN_RETRIED;
  237. rval = qla2x00_start_sp(sp);
  238. if (rval != QLA_SUCCESS)
  239. goto done_free_sp;
  240. DEBUG2(printk(KERN_DEBUG
  241. "scsi(%ld:%x): Async-adisc - loop-id=%x portid=%02x%02x%02x.\n",
  242. fcport->vha->host_no, sp->handle, fcport->loop_id,
  243. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa));
  244. return rval;
  245. done_free_sp:
  246. lio->free(sp);
  247. done:
  248. return rval;
  249. }
  250. void
  251. qla2x00_async_login_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  252. uint16_t *data)
  253. {
  254. int rval;
  255. switch (data[0]) {
  256. case MBS_COMMAND_COMPLETE:
  257. if (fcport->flags & FCF_FCP2_DEVICE) {
  258. fcport->flags |= FCF_ASYNC_SENT;
  259. qla2x00_post_async_adisc_work(vha, fcport, data);
  260. break;
  261. }
  262. qla2x00_update_fcport(vha, fcport);
  263. break;
  264. case MBS_COMMAND_ERROR:
  265. fcport->flags &= ~FCF_ASYNC_SENT;
  266. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  267. set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
  268. else
  269. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  270. break;
  271. case MBS_PORT_ID_USED:
  272. fcport->loop_id = data[1];
  273. qla2x00_post_async_login_work(vha, fcport, NULL);
  274. break;
  275. case MBS_LOOP_ID_USED:
  276. fcport->loop_id++;
  277. rval = qla2x00_find_new_loop_id(vha, fcport);
  278. if (rval != QLA_SUCCESS) {
  279. fcport->flags &= ~FCF_ASYNC_SENT;
  280. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  281. break;
  282. }
  283. qla2x00_post_async_login_work(vha, fcport, NULL);
  284. break;
  285. }
  286. return;
  287. }
  288. void
  289. qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  290. uint16_t *data)
  291. {
  292. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  293. return;
  294. }
  295. void
  296. qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  297. uint16_t *data)
  298. {
  299. if (data[0] == MBS_COMMAND_COMPLETE) {
  300. qla2x00_update_fcport(vha, fcport);
  301. return;
  302. }
  303. /* Retry login. */
  304. fcport->flags &= ~FCF_ASYNC_SENT;
  305. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  306. set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
  307. else
  308. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  309. return;
  310. }
  311. /****************************************************************************/
  312. /* QLogic ISP2x00 Hardware Support Functions. */
  313. /****************************************************************************/
  314. /*
  315. * qla2x00_initialize_adapter
  316. * Initialize board.
  317. *
  318. * Input:
  319. * ha = adapter block pointer.
  320. *
  321. * Returns:
  322. * 0 = success
  323. */
  324. int
  325. qla2x00_initialize_adapter(scsi_qla_host_t *vha)
  326. {
  327. int rval;
  328. struct qla_hw_data *ha = vha->hw;
  329. struct req_que *req = ha->req_q_map[0];
  330. /* Clear adapter flags. */
  331. vha->flags.online = 0;
  332. ha->flags.chip_reset_done = 0;
  333. vha->flags.reset_active = 0;
  334. ha->flags.pci_channel_io_perm_failure = 0;
  335. ha->flags.eeh_busy = 0;
  336. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  337. atomic_set(&vha->loop_state, LOOP_DOWN);
  338. vha->device_flags = DFLG_NO_CABLE;
  339. vha->dpc_flags = 0;
  340. vha->flags.management_server_logged_in = 0;
  341. vha->marker_needed = 0;
  342. ha->isp_abort_cnt = 0;
  343. ha->beacon_blink_led = 0;
  344. set_bit(0, ha->req_qid_map);
  345. set_bit(0, ha->rsp_qid_map);
  346. qla_printk(KERN_INFO, ha, "Configuring PCI space...\n");
  347. rval = ha->isp_ops->pci_config(vha);
  348. if (rval) {
  349. DEBUG2(printk("scsi(%ld): Unable to configure PCI space.\n",
  350. vha->host_no));
  351. return (rval);
  352. }
  353. ha->isp_ops->reset_chip(vha);
  354. rval = qla2xxx_get_flash_info(vha);
  355. if (rval) {
  356. DEBUG2(printk("scsi(%ld): Unable to validate FLASH data.\n",
  357. vha->host_no));
  358. return (rval);
  359. }
  360. ha->isp_ops->get_flash_version(vha, req->ring);
  361. qla_printk(KERN_INFO, ha, "Configure NVRAM parameters...\n");
  362. ha->isp_ops->nvram_config(vha);
  363. if (ha->flags.disable_serdes) {
  364. /* Mask HBA via NVRAM settings? */
  365. qla_printk(KERN_INFO, ha, "Masking HBA WWPN "
  366. "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n",
  367. vha->port_name[0], vha->port_name[1],
  368. vha->port_name[2], vha->port_name[3],
  369. vha->port_name[4], vha->port_name[5],
  370. vha->port_name[6], vha->port_name[7]);
  371. return QLA_FUNCTION_FAILED;
  372. }
  373. qla_printk(KERN_INFO, ha, "Verifying loaded RISC code...\n");
  374. if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
  375. rval = ha->isp_ops->chip_diag(vha);
  376. if (rval)
  377. return (rval);
  378. rval = qla2x00_setup_chip(vha);
  379. if (rval)
  380. return (rval);
  381. }
  382. if (IS_QLA84XX(ha)) {
  383. ha->cs84xx = qla84xx_get_chip(vha);
  384. if (!ha->cs84xx) {
  385. qla_printk(KERN_ERR, ha,
  386. "Unable to configure ISP84XX.\n");
  387. return QLA_FUNCTION_FAILED;
  388. }
  389. }
  390. rval = qla2x00_init_rings(vha);
  391. ha->flags.chip_reset_done = 1;
  392. if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
  393. /* Issue verify 84xx FW IOCB to complete 84xx initialization */
  394. rval = qla84xx_init_chip(vha);
  395. if (rval != QLA_SUCCESS) {
  396. qla_printk(KERN_ERR, ha,
  397. "Unable to initialize ISP84XX.\n");
  398. qla84xx_put_chip(vha);
  399. }
  400. }
  401. if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha)) {
  402. if (qla24xx_read_fcp_prio_cfg(vha))
  403. qla_printk(KERN_ERR, ha,
  404. "Unable to read FCP priority data.\n");
  405. }
  406. return (rval);
  407. }
  408. /**
  409. * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
  410. * @ha: HA context
  411. *
  412. * Returns 0 on success.
  413. */
  414. int
  415. qla2100_pci_config(scsi_qla_host_t *vha)
  416. {
  417. uint16_t w;
  418. unsigned long flags;
  419. struct qla_hw_data *ha = vha->hw;
  420. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  421. pci_set_master(ha->pdev);
  422. pci_try_set_mwi(ha->pdev);
  423. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  424. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  425. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  426. pci_disable_rom(ha->pdev);
  427. /* Get PCI bus information. */
  428. spin_lock_irqsave(&ha->hardware_lock, flags);
  429. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  430. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  431. return QLA_SUCCESS;
  432. }
  433. /**
  434. * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
  435. * @ha: HA context
  436. *
  437. * Returns 0 on success.
  438. */
  439. int
  440. qla2300_pci_config(scsi_qla_host_t *vha)
  441. {
  442. uint16_t w;
  443. unsigned long flags = 0;
  444. uint32_t cnt;
  445. struct qla_hw_data *ha = vha->hw;
  446. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  447. pci_set_master(ha->pdev);
  448. pci_try_set_mwi(ha->pdev);
  449. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  450. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  451. if (IS_QLA2322(ha) || IS_QLA6322(ha))
  452. w &= ~PCI_COMMAND_INTX_DISABLE;
  453. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  454. /*
  455. * If this is a 2300 card and not 2312, reset the
  456. * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
  457. * the 2310 also reports itself as a 2300 so we need to get the
  458. * fb revision level -- a 6 indicates it really is a 2300 and
  459. * not a 2310.
  460. */
  461. if (IS_QLA2300(ha)) {
  462. spin_lock_irqsave(&ha->hardware_lock, flags);
  463. /* Pause RISC. */
  464. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  465. for (cnt = 0; cnt < 30000; cnt++) {
  466. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
  467. break;
  468. udelay(10);
  469. }
  470. /* Select FPM registers. */
  471. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  472. RD_REG_WORD(&reg->ctrl_status);
  473. /* Get the fb rev level */
  474. ha->fb_rev = RD_FB_CMD_REG(ha, reg);
  475. if (ha->fb_rev == FPM_2300)
  476. pci_clear_mwi(ha->pdev);
  477. /* Deselect FPM registers. */
  478. WRT_REG_WORD(&reg->ctrl_status, 0x0);
  479. RD_REG_WORD(&reg->ctrl_status);
  480. /* Release RISC module. */
  481. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  482. for (cnt = 0; cnt < 30000; cnt++) {
  483. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
  484. break;
  485. udelay(10);
  486. }
  487. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  488. }
  489. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  490. pci_disable_rom(ha->pdev);
  491. /* Get PCI bus information. */
  492. spin_lock_irqsave(&ha->hardware_lock, flags);
  493. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  494. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  495. return QLA_SUCCESS;
  496. }
  497. /**
  498. * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
  499. * @ha: HA context
  500. *
  501. * Returns 0 on success.
  502. */
  503. int
  504. qla24xx_pci_config(scsi_qla_host_t *vha)
  505. {
  506. uint16_t w;
  507. unsigned long flags = 0;
  508. struct qla_hw_data *ha = vha->hw;
  509. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  510. pci_set_master(ha->pdev);
  511. pci_try_set_mwi(ha->pdev);
  512. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  513. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  514. w &= ~PCI_COMMAND_INTX_DISABLE;
  515. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  516. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  517. /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
  518. if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
  519. pcix_set_mmrbc(ha->pdev, 2048);
  520. /* PCIe -- adjust Maximum Read Request Size (2048). */
  521. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  522. pcie_set_readrq(ha->pdev, 2048);
  523. pci_disable_rom(ha->pdev);
  524. ha->chip_revision = ha->pdev->revision;
  525. /* Get PCI bus information. */
  526. spin_lock_irqsave(&ha->hardware_lock, flags);
  527. ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
  528. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  529. return QLA_SUCCESS;
  530. }
  531. /**
  532. * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
  533. * @ha: HA context
  534. *
  535. * Returns 0 on success.
  536. */
  537. int
  538. qla25xx_pci_config(scsi_qla_host_t *vha)
  539. {
  540. uint16_t w;
  541. struct qla_hw_data *ha = vha->hw;
  542. pci_set_master(ha->pdev);
  543. pci_try_set_mwi(ha->pdev);
  544. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  545. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  546. w &= ~PCI_COMMAND_INTX_DISABLE;
  547. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  548. /* PCIe -- adjust Maximum Read Request Size (2048). */
  549. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  550. pcie_set_readrq(ha->pdev, 2048);
  551. pci_disable_rom(ha->pdev);
  552. ha->chip_revision = ha->pdev->revision;
  553. return QLA_SUCCESS;
  554. }
  555. /**
  556. * qla2x00_isp_firmware() - Choose firmware image.
  557. * @ha: HA context
  558. *
  559. * Returns 0 on success.
  560. */
  561. static int
  562. qla2x00_isp_firmware(scsi_qla_host_t *vha)
  563. {
  564. int rval;
  565. uint16_t loop_id, topo, sw_cap;
  566. uint8_t domain, area, al_pa;
  567. struct qla_hw_data *ha = vha->hw;
  568. /* Assume loading risc code */
  569. rval = QLA_FUNCTION_FAILED;
  570. if (ha->flags.disable_risc_code_load) {
  571. DEBUG2(printk("scsi(%ld): RISC CODE NOT loaded\n",
  572. vha->host_no));
  573. qla_printk(KERN_INFO, ha, "RISC CODE NOT loaded\n");
  574. /* Verify checksum of loaded RISC code. */
  575. rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
  576. if (rval == QLA_SUCCESS) {
  577. /* And, verify we are not in ROM code. */
  578. rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
  579. &area, &domain, &topo, &sw_cap);
  580. }
  581. }
  582. if (rval) {
  583. DEBUG2_3(printk("scsi(%ld): **** Load RISC code ****\n",
  584. vha->host_no));
  585. }
  586. return (rval);
  587. }
  588. /**
  589. * qla2x00_reset_chip() - Reset ISP chip.
  590. * @ha: HA context
  591. *
  592. * Returns 0 on success.
  593. */
  594. void
  595. qla2x00_reset_chip(scsi_qla_host_t *vha)
  596. {
  597. unsigned long flags = 0;
  598. struct qla_hw_data *ha = vha->hw;
  599. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  600. uint32_t cnt;
  601. uint16_t cmd;
  602. if (unlikely(pci_channel_offline(ha->pdev)))
  603. return;
  604. ha->isp_ops->disable_intrs(ha);
  605. spin_lock_irqsave(&ha->hardware_lock, flags);
  606. /* Turn off master enable */
  607. cmd = 0;
  608. pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
  609. cmd &= ~PCI_COMMAND_MASTER;
  610. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  611. if (!IS_QLA2100(ha)) {
  612. /* Pause RISC. */
  613. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  614. if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
  615. for (cnt = 0; cnt < 30000; cnt++) {
  616. if ((RD_REG_WORD(&reg->hccr) &
  617. HCCR_RISC_PAUSE) != 0)
  618. break;
  619. udelay(100);
  620. }
  621. } else {
  622. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  623. udelay(10);
  624. }
  625. /* Select FPM registers. */
  626. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  627. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  628. /* FPM Soft Reset. */
  629. WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
  630. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  631. /* Toggle Fpm Reset. */
  632. if (!IS_QLA2200(ha)) {
  633. WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
  634. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  635. }
  636. /* Select frame buffer registers. */
  637. WRT_REG_WORD(&reg->ctrl_status, 0x10);
  638. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  639. /* Reset frame buffer FIFOs. */
  640. if (IS_QLA2200(ha)) {
  641. WRT_FB_CMD_REG(ha, reg, 0xa000);
  642. RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
  643. } else {
  644. WRT_FB_CMD_REG(ha, reg, 0x00fc);
  645. /* Read back fb_cmd until zero or 3 seconds max */
  646. for (cnt = 0; cnt < 3000; cnt++) {
  647. if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
  648. break;
  649. udelay(100);
  650. }
  651. }
  652. /* Select RISC module registers. */
  653. WRT_REG_WORD(&reg->ctrl_status, 0);
  654. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  655. /* Reset RISC processor. */
  656. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  657. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  658. /* Release RISC processor. */
  659. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  660. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  661. }
  662. WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
  663. WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
  664. /* Reset ISP chip. */
  665. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  666. /* Wait for RISC to recover from reset. */
  667. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  668. /*
  669. * It is necessary to for a delay here since the card doesn't
  670. * respond to PCI reads during a reset. On some architectures
  671. * this will result in an MCA.
  672. */
  673. udelay(20);
  674. for (cnt = 30000; cnt; cnt--) {
  675. if ((RD_REG_WORD(&reg->ctrl_status) &
  676. CSR_ISP_SOFT_RESET) == 0)
  677. break;
  678. udelay(100);
  679. }
  680. } else
  681. udelay(10);
  682. /* Reset RISC processor. */
  683. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  684. WRT_REG_WORD(&reg->semaphore, 0);
  685. /* Release RISC processor. */
  686. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  687. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  688. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  689. for (cnt = 0; cnt < 30000; cnt++) {
  690. if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
  691. break;
  692. udelay(100);
  693. }
  694. } else
  695. udelay(100);
  696. /* Turn on master enable */
  697. cmd |= PCI_COMMAND_MASTER;
  698. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  699. /* Disable RISC pause on FPM parity error. */
  700. if (!IS_QLA2100(ha)) {
  701. WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
  702. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  703. }
  704. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  705. }
  706. /**
  707. * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
  708. * @ha: HA context
  709. *
  710. * Returns 0 on success.
  711. */
  712. static inline void
  713. qla24xx_reset_risc(scsi_qla_host_t *vha)
  714. {
  715. unsigned long flags = 0;
  716. struct qla_hw_data *ha = vha->hw;
  717. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  718. uint32_t cnt, d2;
  719. uint16_t wd;
  720. spin_lock_irqsave(&ha->hardware_lock, flags);
  721. /* Reset RISC. */
  722. WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  723. for (cnt = 0; cnt < 30000; cnt++) {
  724. if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
  725. break;
  726. udelay(10);
  727. }
  728. WRT_REG_DWORD(&reg->ctrl_status,
  729. CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  730. pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
  731. udelay(100);
  732. /* Wait for firmware to complete NVRAM accesses. */
  733. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  734. for (cnt = 10000 ; cnt && d2; cnt--) {
  735. udelay(5);
  736. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  737. barrier();
  738. }
  739. /* Wait for soft-reset to complete. */
  740. d2 = RD_REG_DWORD(&reg->ctrl_status);
  741. for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
  742. udelay(5);
  743. d2 = RD_REG_DWORD(&reg->ctrl_status);
  744. barrier();
  745. }
  746. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  747. RD_REG_DWORD(&reg->hccr);
  748. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  749. RD_REG_DWORD(&reg->hccr);
  750. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
  751. RD_REG_DWORD(&reg->hccr);
  752. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  753. for (cnt = 6000000 ; cnt && d2; cnt--) {
  754. udelay(5);
  755. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  756. barrier();
  757. }
  758. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  759. if (IS_NOPOLLING_TYPE(ha))
  760. ha->isp_ops->enable_intrs(ha);
  761. }
  762. /**
  763. * qla24xx_reset_chip() - Reset ISP24xx chip.
  764. * @ha: HA context
  765. *
  766. * Returns 0 on success.
  767. */
  768. void
  769. qla24xx_reset_chip(scsi_qla_host_t *vha)
  770. {
  771. struct qla_hw_data *ha = vha->hw;
  772. if (pci_channel_offline(ha->pdev) &&
  773. ha->flags.pci_channel_io_perm_failure) {
  774. return;
  775. }
  776. ha->isp_ops->disable_intrs(ha);
  777. /* Perform RISC reset. */
  778. qla24xx_reset_risc(vha);
  779. }
  780. /**
  781. * qla2x00_chip_diag() - Test chip for proper operation.
  782. * @ha: HA context
  783. *
  784. * Returns 0 on success.
  785. */
  786. int
  787. qla2x00_chip_diag(scsi_qla_host_t *vha)
  788. {
  789. int rval;
  790. struct qla_hw_data *ha = vha->hw;
  791. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  792. unsigned long flags = 0;
  793. uint16_t data;
  794. uint32_t cnt;
  795. uint16_t mb[5];
  796. struct req_que *req = ha->req_q_map[0];
  797. /* Assume a failed state */
  798. rval = QLA_FUNCTION_FAILED;
  799. DEBUG3(printk("scsi(%ld): Testing device at %lx.\n",
  800. vha->host_no, (u_long)&reg->flash_address));
  801. spin_lock_irqsave(&ha->hardware_lock, flags);
  802. /* Reset ISP chip. */
  803. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  804. /*
  805. * We need to have a delay here since the card will not respond while
  806. * in reset causing an MCA on some architectures.
  807. */
  808. udelay(20);
  809. data = qla2x00_debounce_register(&reg->ctrl_status);
  810. for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
  811. udelay(5);
  812. data = RD_REG_WORD(&reg->ctrl_status);
  813. barrier();
  814. }
  815. if (!cnt)
  816. goto chip_diag_failed;
  817. DEBUG3(printk("scsi(%ld): Reset register cleared by chip reset\n",
  818. vha->host_no));
  819. /* Reset RISC processor. */
  820. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  821. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  822. /* Workaround for QLA2312 PCI parity error */
  823. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  824. data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
  825. for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
  826. udelay(5);
  827. data = RD_MAILBOX_REG(ha, reg, 0);
  828. barrier();
  829. }
  830. } else
  831. udelay(10);
  832. if (!cnt)
  833. goto chip_diag_failed;
  834. /* Check product ID of chip */
  835. DEBUG3(printk("scsi(%ld): Checking product ID of chip\n", vha->host_no));
  836. mb[1] = RD_MAILBOX_REG(ha, reg, 1);
  837. mb[2] = RD_MAILBOX_REG(ha, reg, 2);
  838. mb[3] = RD_MAILBOX_REG(ha, reg, 3);
  839. mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
  840. if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
  841. mb[3] != PROD_ID_3) {
  842. qla_printk(KERN_WARNING, ha,
  843. "Wrong product ID = 0x%x,0x%x,0x%x\n", mb[1], mb[2], mb[3]);
  844. goto chip_diag_failed;
  845. }
  846. ha->product_id[0] = mb[1];
  847. ha->product_id[1] = mb[2];
  848. ha->product_id[2] = mb[3];
  849. ha->product_id[3] = mb[4];
  850. /* Adjust fw RISC transfer size */
  851. if (req->length > 1024)
  852. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
  853. else
  854. ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
  855. req->length;
  856. if (IS_QLA2200(ha) &&
  857. RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
  858. /* Limit firmware transfer size with a 2200A */
  859. DEBUG3(printk("scsi(%ld): Found QLA2200A chip.\n",
  860. vha->host_no));
  861. ha->device_type |= DT_ISP2200A;
  862. ha->fw_transfer_size = 128;
  863. }
  864. /* Wrap Incoming Mailboxes Test. */
  865. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  866. DEBUG3(printk("scsi(%ld): Checking mailboxes.\n", vha->host_no));
  867. rval = qla2x00_mbx_reg_test(vha);
  868. if (rval) {
  869. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  870. vha->host_no));
  871. qla_printk(KERN_WARNING, ha,
  872. "Failed mailbox send register test\n");
  873. }
  874. else {
  875. /* Flag a successful rval */
  876. rval = QLA_SUCCESS;
  877. }
  878. spin_lock_irqsave(&ha->hardware_lock, flags);
  879. chip_diag_failed:
  880. if (rval)
  881. DEBUG2_3(printk("scsi(%ld): Chip diagnostics **** FAILED "
  882. "****\n", vha->host_no));
  883. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  884. return (rval);
  885. }
  886. /**
  887. * qla24xx_chip_diag() - Test ISP24xx for proper operation.
  888. * @ha: HA context
  889. *
  890. * Returns 0 on success.
  891. */
  892. int
  893. qla24xx_chip_diag(scsi_qla_host_t *vha)
  894. {
  895. int rval;
  896. struct qla_hw_data *ha = vha->hw;
  897. struct req_que *req = ha->req_q_map[0];
  898. if (IS_QLA82XX(ha))
  899. return QLA_SUCCESS;
  900. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
  901. rval = qla2x00_mbx_reg_test(vha);
  902. if (rval) {
  903. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  904. vha->host_no));
  905. qla_printk(KERN_WARNING, ha,
  906. "Failed mailbox send register test\n");
  907. } else {
  908. /* Flag a successful rval */
  909. rval = QLA_SUCCESS;
  910. }
  911. return rval;
  912. }
  913. void
  914. qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
  915. {
  916. int rval;
  917. uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
  918. eft_size, fce_size, mq_size;
  919. dma_addr_t tc_dma;
  920. void *tc;
  921. struct qla_hw_data *ha = vha->hw;
  922. struct req_que *req = ha->req_q_map[0];
  923. struct rsp_que *rsp = ha->rsp_q_map[0];
  924. if (ha->fw_dump) {
  925. qla_printk(KERN_WARNING, ha,
  926. "Firmware dump previously allocated.\n");
  927. return;
  928. }
  929. ha->fw_dumped = 0;
  930. fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
  931. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  932. fixed_size = sizeof(struct qla2100_fw_dump);
  933. } else if (IS_QLA23XX(ha)) {
  934. fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
  935. mem_size = (ha->fw_memory_size - 0x11000 + 1) *
  936. sizeof(uint16_t);
  937. } else if (IS_FWI2_CAPABLE(ha)) {
  938. if (IS_QLA81XX(ha))
  939. fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
  940. else if (IS_QLA25XX(ha))
  941. fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
  942. else
  943. fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
  944. mem_size = (ha->fw_memory_size - 0x100000 + 1) *
  945. sizeof(uint32_t);
  946. if (ha->mqenable)
  947. mq_size = sizeof(struct qla2xxx_mq_chain);
  948. /* Allocate memory for Fibre Channel Event Buffer. */
  949. if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha))
  950. goto try_eft;
  951. tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
  952. GFP_KERNEL);
  953. if (!tc) {
  954. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  955. "(%d KB) for FCE.\n", FCE_SIZE / 1024);
  956. goto try_eft;
  957. }
  958. memset(tc, 0, FCE_SIZE);
  959. rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
  960. ha->fce_mb, &ha->fce_bufs);
  961. if (rval) {
  962. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  963. "FCE (%d).\n", rval);
  964. dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
  965. tc_dma);
  966. ha->flags.fce_enabled = 0;
  967. goto try_eft;
  968. }
  969. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for FCE...\n",
  970. FCE_SIZE / 1024);
  971. fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
  972. ha->flags.fce_enabled = 1;
  973. ha->fce_dma = tc_dma;
  974. ha->fce = tc;
  975. try_eft:
  976. /* Allocate memory for Extended Trace Buffer. */
  977. tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
  978. GFP_KERNEL);
  979. if (!tc) {
  980. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  981. "(%d KB) for EFT.\n", EFT_SIZE / 1024);
  982. goto cont_alloc;
  983. }
  984. memset(tc, 0, EFT_SIZE);
  985. rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
  986. if (rval) {
  987. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  988. "EFT (%d).\n", rval);
  989. dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
  990. tc_dma);
  991. goto cont_alloc;
  992. }
  993. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for EFT...\n",
  994. EFT_SIZE / 1024);
  995. eft_size = EFT_SIZE;
  996. ha->eft_dma = tc_dma;
  997. ha->eft = tc;
  998. }
  999. cont_alloc:
  1000. req_q_size = req->length * sizeof(request_t);
  1001. rsp_q_size = rsp->length * sizeof(response_t);
  1002. dump_size = offsetof(struct qla2xxx_fw_dump, isp);
  1003. dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size;
  1004. ha->chain_offset = dump_size;
  1005. dump_size += mq_size + fce_size;
  1006. ha->fw_dump = vmalloc(dump_size);
  1007. if (!ha->fw_dump) {
  1008. qla_printk(KERN_WARNING, ha, "Unable to allocate (%d KB) for "
  1009. "firmware dump!!!\n", dump_size / 1024);
  1010. if (ha->eft) {
  1011. dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft,
  1012. ha->eft_dma);
  1013. ha->eft = NULL;
  1014. ha->eft_dma = 0;
  1015. }
  1016. return;
  1017. }
  1018. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for firmware dump...\n",
  1019. dump_size / 1024);
  1020. ha->fw_dump_len = dump_size;
  1021. ha->fw_dump->signature[0] = 'Q';
  1022. ha->fw_dump->signature[1] = 'L';
  1023. ha->fw_dump->signature[2] = 'G';
  1024. ha->fw_dump->signature[3] = 'C';
  1025. ha->fw_dump->version = __constant_htonl(1);
  1026. ha->fw_dump->fixed_size = htonl(fixed_size);
  1027. ha->fw_dump->mem_size = htonl(mem_size);
  1028. ha->fw_dump->req_q_size = htonl(req_q_size);
  1029. ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
  1030. ha->fw_dump->eft_size = htonl(eft_size);
  1031. ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
  1032. ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
  1033. ha->fw_dump->header_size =
  1034. htonl(offsetof(struct qla2xxx_fw_dump, isp));
  1035. }
  1036. static int
  1037. qla81xx_mpi_sync(scsi_qla_host_t *vha)
  1038. {
  1039. #define MPS_MASK 0xe0
  1040. int rval;
  1041. uint16_t dc;
  1042. uint32_t dw;
  1043. struct qla_hw_data *ha = vha->hw;
  1044. if (!IS_QLA81XX(vha->hw))
  1045. return QLA_SUCCESS;
  1046. rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
  1047. if (rval != QLA_SUCCESS) {
  1048. DEBUG2(qla_printk(KERN_WARNING, ha,
  1049. "Sync-MPI: Unable to acquire semaphore.\n"));
  1050. goto done;
  1051. }
  1052. pci_read_config_word(vha->hw->pdev, 0x54, &dc);
  1053. rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
  1054. if (rval != QLA_SUCCESS) {
  1055. DEBUG2(qla_printk(KERN_WARNING, ha,
  1056. "Sync-MPI: Unable to read sync.\n"));
  1057. goto done_release;
  1058. }
  1059. dc &= MPS_MASK;
  1060. if (dc == (dw & MPS_MASK))
  1061. goto done_release;
  1062. dw &= ~MPS_MASK;
  1063. dw |= dc;
  1064. rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
  1065. if (rval != QLA_SUCCESS) {
  1066. DEBUG2(qla_printk(KERN_WARNING, ha,
  1067. "Sync-MPI: Unable to gain sync.\n"));
  1068. }
  1069. done_release:
  1070. rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
  1071. if (rval != QLA_SUCCESS) {
  1072. DEBUG2(qla_printk(KERN_WARNING, ha,
  1073. "Sync-MPI: Unable to release semaphore.\n"));
  1074. }
  1075. done:
  1076. return rval;
  1077. }
  1078. /**
  1079. * qla2x00_setup_chip() - Load and start RISC firmware.
  1080. * @ha: HA context
  1081. *
  1082. * Returns 0 on success.
  1083. */
  1084. static int
  1085. qla2x00_setup_chip(scsi_qla_host_t *vha)
  1086. {
  1087. int rval;
  1088. uint32_t srisc_address = 0;
  1089. struct qla_hw_data *ha = vha->hw;
  1090. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1091. unsigned long flags;
  1092. uint16_t fw_major_version;
  1093. if (IS_QLA82XX(ha)) {
  1094. rval = ha->isp_ops->load_risc(vha, &srisc_address);
  1095. if (rval == QLA_SUCCESS)
  1096. goto enable_82xx_npiv;
  1097. }
  1098. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  1099. /* Disable SRAM, Instruction RAM and GP RAM parity. */
  1100. spin_lock_irqsave(&ha->hardware_lock, flags);
  1101. WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
  1102. RD_REG_WORD(&reg->hccr);
  1103. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1104. }
  1105. qla81xx_mpi_sync(vha);
  1106. /* Load firmware sequences */
  1107. rval = ha->isp_ops->load_risc(vha, &srisc_address);
  1108. if (rval == QLA_SUCCESS) {
  1109. DEBUG(printk("scsi(%ld): Verifying Checksum of loaded RISC "
  1110. "code.\n", vha->host_no));
  1111. rval = qla2x00_verify_checksum(vha, srisc_address);
  1112. if (rval == QLA_SUCCESS) {
  1113. /* Start firmware execution. */
  1114. DEBUG(printk("scsi(%ld): Checksum OK, start "
  1115. "firmware.\n", vha->host_no));
  1116. rval = qla2x00_execute_fw(vha, srisc_address);
  1117. /* Retrieve firmware information. */
  1118. if (rval == QLA_SUCCESS) {
  1119. enable_82xx_npiv:
  1120. fw_major_version = ha->fw_major_version;
  1121. rval = qla2x00_get_fw_version(vha,
  1122. &ha->fw_major_version,
  1123. &ha->fw_minor_version,
  1124. &ha->fw_subminor_version,
  1125. &ha->fw_attributes, &ha->fw_memory_size,
  1126. ha->mpi_version, &ha->mpi_capabilities,
  1127. ha->phy_version);
  1128. if (rval != QLA_SUCCESS)
  1129. goto failed;
  1130. ha->flags.npiv_supported = 0;
  1131. if (IS_QLA2XXX_MIDTYPE(ha) &&
  1132. (ha->fw_attributes & BIT_2)) {
  1133. ha->flags.npiv_supported = 1;
  1134. if ((!ha->max_npiv_vports) ||
  1135. ((ha->max_npiv_vports + 1) %
  1136. MIN_MULTI_ID_FABRIC))
  1137. ha->max_npiv_vports =
  1138. MIN_MULTI_ID_FABRIC - 1;
  1139. }
  1140. qla2x00_get_resource_cnts(vha, NULL,
  1141. &ha->fw_xcb_count, NULL, NULL,
  1142. &ha->max_npiv_vports, NULL);
  1143. if (!fw_major_version && ql2xallocfwdump) {
  1144. if (!IS_QLA82XX(ha))
  1145. qla2x00_alloc_fw_dump(vha);
  1146. }
  1147. }
  1148. } else {
  1149. DEBUG2(printk(KERN_INFO
  1150. "scsi(%ld): ISP Firmware failed checksum.\n",
  1151. vha->host_no));
  1152. }
  1153. }
  1154. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  1155. /* Enable proper parity. */
  1156. spin_lock_irqsave(&ha->hardware_lock, flags);
  1157. if (IS_QLA2300(ha))
  1158. /* SRAM parity */
  1159. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
  1160. else
  1161. /* SRAM, Instruction RAM and GP RAM parity */
  1162. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
  1163. RD_REG_WORD(&reg->hccr);
  1164. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1165. }
  1166. if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
  1167. uint32_t size;
  1168. rval = qla81xx_fac_get_sector_size(vha, &size);
  1169. if (rval == QLA_SUCCESS) {
  1170. ha->flags.fac_supported = 1;
  1171. ha->fdt_block_size = size << 2;
  1172. } else {
  1173. qla_printk(KERN_ERR, ha,
  1174. "Unsupported FAC firmware (%d.%02d.%02d).\n",
  1175. ha->fw_major_version, ha->fw_minor_version,
  1176. ha->fw_subminor_version);
  1177. }
  1178. }
  1179. failed:
  1180. if (rval) {
  1181. DEBUG2_3(printk("scsi(%ld): Setup chip **** FAILED ****.\n",
  1182. vha->host_no));
  1183. }
  1184. return (rval);
  1185. }
  1186. /**
  1187. * qla2x00_init_response_q_entries() - Initializes response queue entries.
  1188. * @ha: HA context
  1189. *
  1190. * Beginning of request ring has initialization control block already built
  1191. * by nvram config routine.
  1192. *
  1193. * Returns 0 on success.
  1194. */
  1195. void
  1196. qla2x00_init_response_q_entries(struct rsp_que *rsp)
  1197. {
  1198. uint16_t cnt;
  1199. response_t *pkt;
  1200. rsp->ring_ptr = rsp->ring;
  1201. rsp->ring_index = 0;
  1202. rsp->status_srb = NULL;
  1203. pkt = rsp->ring_ptr;
  1204. for (cnt = 0; cnt < rsp->length; cnt++) {
  1205. pkt->signature = RESPONSE_PROCESSED;
  1206. pkt++;
  1207. }
  1208. }
  1209. /**
  1210. * qla2x00_update_fw_options() - Read and process firmware options.
  1211. * @ha: HA context
  1212. *
  1213. * Returns 0 on success.
  1214. */
  1215. void
  1216. qla2x00_update_fw_options(scsi_qla_host_t *vha)
  1217. {
  1218. uint16_t swing, emphasis, tx_sens, rx_sens;
  1219. struct qla_hw_data *ha = vha->hw;
  1220. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  1221. qla2x00_get_fw_options(vha, ha->fw_options);
  1222. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  1223. return;
  1224. /* Serial Link options. */
  1225. DEBUG3(printk("scsi(%ld): Serial link options:\n",
  1226. vha->host_no));
  1227. DEBUG3(qla2x00_dump_buffer((uint8_t *)&ha->fw_seriallink_options,
  1228. sizeof(ha->fw_seriallink_options)));
  1229. ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
  1230. if (ha->fw_seriallink_options[3] & BIT_2) {
  1231. ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
  1232. /* 1G settings */
  1233. swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
  1234. emphasis = (ha->fw_seriallink_options[2] &
  1235. (BIT_4 | BIT_3)) >> 3;
  1236. tx_sens = ha->fw_seriallink_options[0] &
  1237. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1238. rx_sens = (ha->fw_seriallink_options[0] &
  1239. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  1240. ha->fw_options[10] = (emphasis << 14) | (swing << 8);
  1241. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  1242. if (rx_sens == 0x0)
  1243. rx_sens = 0x3;
  1244. ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
  1245. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  1246. ha->fw_options[10] |= BIT_5 |
  1247. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  1248. (tx_sens & (BIT_1 | BIT_0));
  1249. /* 2G settings */
  1250. swing = (ha->fw_seriallink_options[2] &
  1251. (BIT_7 | BIT_6 | BIT_5)) >> 5;
  1252. emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
  1253. tx_sens = ha->fw_seriallink_options[1] &
  1254. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1255. rx_sens = (ha->fw_seriallink_options[1] &
  1256. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  1257. ha->fw_options[11] = (emphasis << 14) | (swing << 8);
  1258. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  1259. if (rx_sens == 0x0)
  1260. rx_sens = 0x3;
  1261. ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
  1262. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  1263. ha->fw_options[11] |= BIT_5 |
  1264. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  1265. (tx_sens & (BIT_1 | BIT_0));
  1266. }
  1267. /* FCP2 options. */
  1268. /* Return command IOCBs without waiting for an ABTS to complete. */
  1269. ha->fw_options[3] |= BIT_13;
  1270. /* LED scheme. */
  1271. if (ha->flags.enable_led_scheme)
  1272. ha->fw_options[2] |= BIT_12;
  1273. /* Detect ISP6312. */
  1274. if (IS_QLA6312(ha))
  1275. ha->fw_options[2] |= BIT_13;
  1276. /* Update firmware options. */
  1277. qla2x00_set_fw_options(vha, ha->fw_options);
  1278. }
  1279. void
  1280. qla24xx_update_fw_options(scsi_qla_host_t *vha)
  1281. {
  1282. int rval;
  1283. struct qla_hw_data *ha = vha->hw;
  1284. if (IS_QLA82XX(ha))
  1285. return;
  1286. /* Update Serial Link options. */
  1287. if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
  1288. return;
  1289. rval = qla2x00_set_serdes_params(vha,
  1290. le16_to_cpu(ha->fw_seriallink_options24[1]),
  1291. le16_to_cpu(ha->fw_seriallink_options24[2]),
  1292. le16_to_cpu(ha->fw_seriallink_options24[3]));
  1293. if (rval != QLA_SUCCESS) {
  1294. qla_printk(KERN_WARNING, ha,
  1295. "Unable to update Serial Link options (%x).\n", rval);
  1296. }
  1297. }
  1298. void
  1299. qla2x00_config_rings(struct scsi_qla_host *vha)
  1300. {
  1301. struct qla_hw_data *ha = vha->hw;
  1302. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1303. struct req_que *req = ha->req_q_map[0];
  1304. struct rsp_que *rsp = ha->rsp_q_map[0];
  1305. /* Setup ring parameters in initialization control block. */
  1306. ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0);
  1307. ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0);
  1308. ha->init_cb->request_q_length = cpu_to_le16(req->length);
  1309. ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
  1310. ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  1311. ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  1312. ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  1313. ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  1314. WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
  1315. WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
  1316. WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
  1317. WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
  1318. RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
  1319. }
  1320. void
  1321. qla24xx_config_rings(struct scsi_qla_host *vha)
  1322. {
  1323. struct qla_hw_data *ha = vha->hw;
  1324. device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0);
  1325. struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
  1326. struct qla_msix_entry *msix;
  1327. struct init_cb_24xx *icb;
  1328. uint16_t rid = 0;
  1329. struct req_que *req = ha->req_q_map[0];
  1330. struct rsp_que *rsp = ha->rsp_q_map[0];
  1331. /* Setup ring parameters in initialization control block. */
  1332. icb = (struct init_cb_24xx *)ha->init_cb;
  1333. icb->request_q_outpointer = __constant_cpu_to_le16(0);
  1334. icb->response_q_inpointer = __constant_cpu_to_le16(0);
  1335. icb->request_q_length = cpu_to_le16(req->length);
  1336. icb->response_q_length = cpu_to_le16(rsp->length);
  1337. icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  1338. icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  1339. icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  1340. icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  1341. if (ha->mqenable) {
  1342. icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS);
  1343. icb->rid = __constant_cpu_to_le16(rid);
  1344. if (ha->flags.msix_enabled) {
  1345. msix = &ha->msix_entries[1];
  1346. DEBUG2_17(printk(KERN_INFO
  1347. "Registering vector 0x%x for base que\n", msix->entry));
  1348. icb->msix = cpu_to_le16(msix->entry);
  1349. }
  1350. /* Use alternate PCI bus number */
  1351. if (MSB(rid))
  1352. icb->firmware_options_2 |=
  1353. __constant_cpu_to_le32(BIT_19);
  1354. /* Use alternate PCI devfn */
  1355. if (LSB(rid))
  1356. icb->firmware_options_2 |=
  1357. __constant_cpu_to_le32(BIT_18);
  1358. /* Use Disable MSIX Handshake mode for capable adapters */
  1359. if (IS_MSIX_NACK_CAPABLE(ha)) {
  1360. icb->firmware_options_2 &=
  1361. __constant_cpu_to_le32(~BIT_22);
  1362. ha->flags.disable_msix_handshake = 1;
  1363. qla_printk(KERN_INFO, ha,
  1364. "MSIX Handshake Disable Mode turned on\n");
  1365. } else {
  1366. icb->firmware_options_2 |=
  1367. __constant_cpu_to_le32(BIT_22);
  1368. }
  1369. icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23);
  1370. WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
  1371. WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
  1372. WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
  1373. WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
  1374. } else {
  1375. WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
  1376. WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
  1377. WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
  1378. WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
  1379. }
  1380. /* PCI posting */
  1381. RD_REG_DWORD(&ioreg->hccr);
  1382. }
  1383. /**
  1384. * qla2x00_init_rings() - Initializes firmware.
  1385. * @ha: HA context
  1386. *
  1387. * Beginning of request ring has initialization control block already built
  1388. * by nvram config routine.
  1389. *
  1390. * Returns 0 on success.
  1391. */
  1392. static int
  1393. qla2x00_init_rings(scsi_qla_host_t *vha)
  1394. {
  1395. int rval;
  1396. unsigned long flags = 0;
  1397. int cnt, que;
  1398. struct qla_hw_data *ha = vha->hw;
  1399. struct req_que *req;
  1400. struct rsp_que *rsp;
  1401. struct scsi_qla_host *vp;
  1402. struct mid_init_cb_24xx *mid_init_cb =
  1403. (struct mid_init_cb_24xx *) ha->init_cb;
  1404. spin_lock_irqsave(&ha->hardware_lock, flags);
  1405. /* Clear outstanding commands array. */
  1406. for (que = 0; que < ha->max_req_queues; que++) {
  1407. req = ha->req_q_map[que];
  1408. if (!req)
  1409. continue;
  1410. for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++)
  1411. req->outstanding_cmds[cnt] = NULL;
  1412. req->current_outstanding_cmd = 1;
  1413. /* Initialize firmware. */
  1414. req->ring_ptr = req->ring;
  1415. req->ring_index = 0;
  1416. req->cnt = req->length;
  1417. }
  1418. for (que = 0; que < ha->max_rsp_queues; que++) {
  1419. rsp = ha->rsp_q_map[que];
  1420. if (!rsp)
  1421. continue;
  1422. /* Initialize response queue entries */
  1423. qla2x00_init_response_q_entries(rsp);
  1424. }
  1425. /* Clear RSCN queue. */
  1426. list_for_each_entry(vp, &ha->vp_list, list) {
  1427. vp->rscn_in_ptr = 0;
  1428. vp->rscn_out_ptr = 0;
  1429. }
  1430. ha->isp_ops->config_rings(vha);
  1431. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1432. /* Update any ISP specific firmware options before initialization. */
  1433. ha->isp_ops->update_fw_options(vha);
  1434. DEBUG(printk("scsi(%ld): Issue init firmware.\n", vha->host_no));
  1435. if (ha->flags.npiv_supported) {
  1436. if (ha->operating_mode == LOOP)
  1437. ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
  1438. mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
  1439. }
  1440. if (IS_FWI2_CAPABLE(ha)) {
  1441. mid_init_cb->options = __constant_cpu_to_le16(BIT_1);
  1442. mid_init_cb->init_cb.execution_throttle =
  1443. cpu_to_le16(ha->fw_xcb_count);
  1444. }
  1445. rval = qla2x00_init_firmware(vha, ha->init_cb_size);
  1446. if (rval) {
  1447. DEBUG2_3(printk("scsi(%ld): Init firmware **** FAILED ****.\n",
  1448. vha->host_no));
  1449. } else {
  1450. DEBUG3(printk("scsi(%ld): Init firmware -- success.\n",
  1451. vha->host_no));
  1452. }
  1453. return (rval);
  1454. }
  1455. /**
  1456. * qla2x00_fw_ready() - Waits for firmware ready.
  1457. * @ha: HA context
  1458. *
  1459. * Returns 0 on success.
  1460. */
  1461. static int
  1462. qla2x00_fw_ready(scsi_qla_host_t *vha)
  1463. {
  1464. int rval;
  1465. unsigned long wtime, mtime, cs84xx_time;
  1466. uint16_t min_wait; /* Minimum wait time if loop is down */
  1467. uint16_t wait_time; /* Wait time if loop is coming ready */
  1468. uint16_t state[5];
  1469. struct qla_hw_data *ha = vha->hw;
  1470. rval = QLA_SUCCESS;
  1471. /* 20 seconds for loop down. */
  1472. min_wait = 20;
  1473. /*
  1474. * Firmware should take at most one RATOV to login, plus 5 seconds for
  1475. * our own processing.
  1476. */
  1477. if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
  1478. wait_time = min_wait;
  1479. }
  1480. /* Min wait time if loop down */
  1481. mtime = jiffies + (min_wait * HZ);
  1482. /* wait time before firmware ready */
  1483. wtime = jiffies + (wait_time * HZ);
  1484. /* Wait for ISP to finish LIP */
  1485. if (!vha->flags.init_done)
  1486. qla_printk(KERN_INFO, ha, "Waiting for LIP to complete...\n");
  1487. DEBUG3(printk("scsi(%ld): Waiting for LIP to complete...\n",
  1488. vha->host_no));
  1489. do {
  1490. rval = qla2x00_get_firmware_state(vha, state);
  1491. if (rval == QLA_SUCCESS) {
  1492. if (state[0] < FSTATE_LOSS_OF_SYNC) {
  1493. vha->device_flags &= ~DFLG_NO_CABLE;
  1494. }
  1495. if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
  1496. DEBUG16(printk("scsi(%ld): fw_state=%x "
  1497. "84xx=%x.\n", vha->host_no, state[0],
  1498. state[2]));
  1499. if ((state[2] & FSTATE_LOGGED_IN) &&
  1500. (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
  1501. DEBUG16(printk("scsi(%ld): Sending "
  1502. "verify iocb.\n", vha->host_no));
  1503. cs84xx_time = jiffies;
  1504. rval = qla84xx_init_chip(vha);
  1505. if (rval != QLA_SUCCESS)
  1506. break;
  1507. /* Add time taken to initialize. */
  1508. cs84xx_time = jiffies - cs84xx_time;
  1509. wtime += cs84xx_time;
  1510. mtime += cs84xx_time;
  1511. DEBUG16(printk("scsi(%ld): Increasing "
  1512. "wait time by %ld. New time %ld\n",
  1513. vha->host_no, cs84xx_time, wtime));
  1514. }
  1515. } else if (state[0] == FSTATE_READY) {
  1516. DEBUG(printk("scsi(%ld): F/W Ready - OK \n",
  1517. vha->host_no));
  1518. qla2x00_get_retry_cnt(vha, &ha->retry_count,
  1519. &ha->login_timeout, &ha->r_a_tov);
  1520. rval = QLA_SUCCESS;
  1521. break;
  1522. }
  1523. rval = QLA_FUNCTION_FAILED;
  1524. if (atomic_read(&vha->loop_down_timer) &&
  1525. state[0] != FSTATE_READY) {
  1526. /* Loop down. Timeout on min_wait for states
  1527. * other than Wait for Login.
  1528. */
  1529. if (time_after_eq(jiffies, mtime)) {
  1530. qla_printk(KERN_INFO, ha,
  1531. "Cable is unplugged...\n");
  1532. vha->device_flags |= DFLG_NO_CABLE;
  1533. break;
  1534. }
  1535. }
  1536. } else {
  1537. /* Mailbox cmd failed. Timeout on min_wait. */
  1538. if (time_after_eq(jiffies, mtime))
  1539. break;
  1540. }
  1541. if (time_after_eq(jiffies, wtime))
  1542. break;
  1543. /* Delay for a while */
  1544. msleep(500);
  1545. DEBUG3(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1546. vha->host_no, state[0], jiffies));
  1547. } while (1);
  1548. DEBUG(printk("scsi(%ld): fw_state=%x (%x, %x, %x, %x) curr time=%lx.\n",
  1549. vha->host_no, state[0], state[1], state[2], state[3], state[4],
  1550. jiffies));
  1551. if (rval) {
  1552. DEBUG2_3(printk("scsi(%ld): Firmware ready **** FAILED ****.\n",
  1553. vha->host_no));
  1554. }
  1555. return (rval);
  1556. }
  1557. /*
  1558. * qla2x00_configure_hba
  1559. * Setup adapter context.
  1560. *
  1561. * Input:
  1562. * ha = adapter state pointer.
  1563. *
  1564. * Returns:
  1565. * 0 = success
  1566. *
  1567. * Context:
  1568. * Kernel context.
  1569. */
  1570. static int
  1571. qla2x00_configure_hba(scsi_qla_host_t *vha)
  1572. {
  1573. int rval;
  1574. uint16_t loop_id;
  1575. uint16_t topo;
  1576. uint16_t sw_cap;
  1577. uint8_t al_pa;
  1578. uint8_t area;
  1579. uint8_t domain;
  1580. char connect_type[22];
  1581. struct qla_hw_data *ha = vha->hw;
  1582. /* Get host addresses. */
  1583. rval = qla2x00_get_adapter_id(vha,
  1584. &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
  1585. if (rval != QLA_SUCCESS) {
  1586. if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
  1587. (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
  1588. DEBUG2(printk("%s(%ld) Loop is in a transition state\n",
  1589. __func__, vha->host_no));
  1590. } else {
  1591. qla_printk(KERN_WARNING, ha,
  1592. "ERROR -- Unable to get host loop ID.\n");
  1593. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  1594. }
  1595. return (rval);
  1596. }
  1597. if (topo == 4) {
  1598. qla_printk(KERN_INFO, ha,
  1599. "Cannot get topology - retrying.\n");
  1600. return (QLA_FUNCTION_FAILED);
  1601. }
  1602. vha->loop_id = loop_id;
  1603. /* initialize */
  1604. ha->min_external_loopid = SNS_FIRST_LOOP_ID;
  1605. ha->operating_mode = LOOP;
  1606. ha->switch_cap = 0;
  1607. switch (topo) {
  1608. case 0:
  1609. DEBUG3(printk("scsi(%ld): HBA in NL topology.\n",
  1610. vha->host_no));
  1611. ha->current_topology = ISP_CFG_NL;
  1612. strcpy(connect_type, "(Loop)");
  1613. break;
  1614. case 1:
  1615. DEBUG3(printk("scsi(%ld): HBA in FL topology.\n",
  1616. vha->host_no));
  1617. ha->switch_cap = sw_cap;
  1618. ha->current_topology = ISP_CFG_FL;
  1619. strcpy(connect_type, "(FL_Port)");
  1620. break;
  1621. case 2:
  1622. DEBUG3(printk("scsi(%ld): HBA in N P2P topology.\n",
  1623. vha->host_no));
  1624. ha->operating_mode = P2P;
  1625. ha->current_topology = ISP_CFG_N;
  1626. strcpy(connect_type, "(N_Port-to-N_Port)");
  1627. break;
  1628. case 3:
  1629. DEBUG3(printk("scsi(%ld): HBA in F P2P topology.\n",
  1630. vha->host_no));
  1631. ha->switch_cap = sw_cap;
  1632. ha->operating_mode = P2P;
  1633. ha->current_topology = ISP_CFG_F;
  1634. strcpy(connect_type, "(F_Port)");
  1635. break;
  1636. default:
  1637. DEBUG3(printk("scsi(%ld): HBA in unknown topology %x. "
  1638. "Using NL.\n",
  1639. vha->host_no, topo));
  1640. ha->current_topology = ISP_CFG_NL;
  1641. strcpy(connect_type, "(Loop)");
  1642. break;
  1643. }
  1644. /* Save Host port and loop ID. */
  1645. /* byte order - Big Endian */
  1646. vha->d_id.b.domain = domain;
  1647. vha->d_id.b.area = area;
  1648. vha->d_id.b.al_pa = al_pa;
  1649. if (!vha->flags.init_done)
  1650. qla_printk(KERN_INFO, ha,
  1651. "Topology - %s, Host Loop address 0x%x\n",
  1652. connect_type, vha->loop_id);
  1653. if (rval) {
  1654. DEBUG2_3(printk("scsi(%ld): FAILED.\n", vha->host_no));
  1655. } else {
  1656. DEBUG3(printk("scsi(%ld): exiting normally.\n", vha->host_no));
  1657. }
  1658. return(rval);
  1659. }
  1660. inline void
  1661. qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
  1662. char *def)
  1663. {
  1664. char *st, *en;
  1665. uint16_t index;
  1666. struct qla_hw_data *ha = vha->hw;
  1667. int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
  1668. !IS_QLA8XXX_TYPE(ha);
  1669. if (memcmp(model, BINZERO, len) != 0) {
  1670. strncpy(ha->model_number, model, len);
  1671. st = en = ha->model_number;
  1672. en += len - 1;
  1673. while (en > st) {
  1674. if (*en != 0x20 && *en != 0x00)
  1675. break;
  1676. *en-- = '\0';
  1677. }
  1678. index = (ha->pdev->subsystem_device & 0xff);
  1679. if (use_tbl &&
  1680. ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1681. index < QLA_MODEL_NAMES)
  1682. strncpy(ha->model_desc,
  1683. qla2x00_model_name[index * 2 + 1],
  1684. sizeof(ha->model_desc) - 1);
  1685. } else {
  1686. index = (ha->pdev->subsystem_device & 0xff);
  1687. if (use_tbl &&
  1688. ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1689. index < QLA_MODEL_NAMES) {
  1690. strcpy(ha->model_number,
  1691. qla2x00_model_name[index * 2]);
  1692. strncpy(ha->model_desc,
  1693. qla2x00_model_name[index * 2 + 1],
  1694. sizeof(ha->model_desc) - 1);
  1695. } else {
  1696. strcpy(ha->model_number, def);
  1697. }
  1698. }
  1699. if (IS_FWI2_CAPABLE(ha))
  1700. qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
  1701. sizeof(ha->model_desc));
  1702. }
  1703. /* On sparc systems, obtain port and node WWN from firmware
  1704. * properties.
  1705. */
  1706. static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
  1707. {
  1708. #ifdef CONFIG_SPARC
  1709. struct qla_hw_data *ha = vha->hw;
  1710. struct pci_dev *pdev = ha->pdev;
  1711. struct device_node *dp = pci_device_to_OF_node(pdev);
  1712. const u8 *val;
  1713. int len;
  1714. val = of_get_property(dp, "port-wwn", &len);
  1715. if (val && len >= WWN_SIZE)
  1716. memcpy(nv->port_name, val, WWN_SIZE);
  1717. val = of_get_property(dp, "node-wwn", &len);
  1718. if (val && len >= WWN_SIZE)
  1719. memcpy(nv->node_name, val, WWN_SIZE);
  1720. #endif
  1721. }
  1722. /*
  1723. * NVRAM configuration for ISP 2xxx
  1724. *
  1725. * Input:
  1726. * ha = adapter block pointer.
  1727. *
  1728. * Output:
  1729. * initialization control block in response_ring
  1730. * host adapters parameters in host adapter block
  1731. *
  1732. * Returns:
  1733. * 0 = success.
  1734. */
  1735. int
  1736. qla2x00_nvram_config(scsi_qla_host_t *vha)
  1737. {
  1738. int rval;
  1739. uint8_t chksum = 0;
  1740. uint16_t cnt;
  1741. uint8_t *dptr1, *dptr2;
  1742. struct qla_hw_data *ha = vha->hw;
  1743. init_cb_t *icb = ha->init_cb;
  1744. nvram_t *nv = ha->nvram;
  1745. uint8_t *ptr = ha->nvram;
  1746. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1747. rval = QLA_SUCCESS;
  1748. /* Determine NVRAM starting address. */
  1749. ha->nvram_size = sizeof(nvram_t);
  1750. ha->nvram_base = 0;
  1751. if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
  1752. if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
  1753. ha->nvram_base = 0x80;
  1754. /* Get NVRAM data and calculate checksum. */
  1755. ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
  1756. for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
  1757. chksum += *ptr++;
  1758. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  1759. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  1760. /* Bad NVRAM data, set defaults parameters. */
  1761. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
  1762. nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
  1763. /* Reset NVRAM data. */
  1764. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  1765. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  1766. nv->nvram_version);
  1767. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  1768. "invalid -- WWPN) defaults.\n");
  1769. /*
  1770. * Set default initialization control block.
  1771. */
  1772. memset(nv, 0, ha->nvram_size);
  1773. nv->parameter_block_version = ICB_VERSION;
  1774. if (IS_QLA23XX(ha)) {
  1775. nv->firmware_options[0] = BIT_2 | BIT_1;
  1776. nv->firmware_options[1] = BIT_7 | BIT_5;
  1777. nv->add_firmware_options[0] = BIT_5;
  1778. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1779. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1780. nv->special_options[1] = BIT_7;
  1781. } else if (IS_QLA2200(ha)) {
  1782. nv->firmware_options[0] = BIT_2 | BIT_1;
  1783. nv->firmware_options[1] = BIT_7 | BIT_5;
  1784. nv->add_firmware_options[0] = BIT_5;
  1785. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1786. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1787. } else if (IS_QLA2100(ha)) {
  1788. nv->firmware_options[0] = BIT_3 | BIT_1;
  1789. nv->firmware_options[1] = BIT_5;
  1790. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1791. }
  1792. nv->max_iocb_allocation = __constant_cpu_to_le16(256);
  1793. nv->execution_throttle = __constant_cpu_to_le16(16);
  1794. nv->retry_count = 8;
  1795. nv->retry_delay = 1;
  1796. nv->port_name[0] = 33;
  1797. nv->port_name[3] = 224;
  1798. nv->port_name[4] = 139;
  1799. qla2xxx_nvram_wwn_from_ofw(vha, nv);
  1800. nv->login_timeout = 4;
  1801. /*
  1802. * Set default host adapter parameters
  1803. */
  1804. nv->host_p[1] = BIT_2;
  1805. nv->reset_delay = 5;
  1806. nv->port_down_retry_count = 8;
  1807. nv->max_luns_per_target = __constant_cpu_to_le16(8);
  1808. nv->link_down_timeout = 60;
  1809. rval = 1;
  1810. }
  1811. #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
  1812. /*
  1813. * The SN2 does not provide BIOS emulation which means you can't change
  1814. * potentially bogus BIOS settings. Force the use of default settings
  1815. * for link rate and frame size. Hope that the rest of the settings
  1816. * are valid.
  1817. */
  1818. if (ia64_platform_is("sn2")) {
  1819. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1820. if (IS_QLA23XX(ha))
  1821. nv->special_options[1] = BIT_7;
  1822. }
  1823. #endif
  1824. /* Reset Initialization control block */
  1825. memset(icb, 0, ha->init_cb_size);
  1826. /*
  1827. * Setup driver NVRAM options.
  1828. */
  1829. nv->firmware_options[0] |= (BIT_6 | BIT_1);
  1830. nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
  1831. nv->firmware_options[1] |= (BIT_5 | BIT_0);
  1832. nv->firmware_options[1] &= ~BIT_4;
  1833. if (IS_QLA23XX(ha)) {
  1834. nv->firmware_options[0] |= BIT_2;
  1835. nv->firmware_options[0] &= ~BIT_3;
  1836. nv->firmware_options[0] &= ~BIT_6;
  1837. nv->add_firmware_options[1] |= BIT_5 | BIT_4;
  1838. if (IS_QLA2300(ha)) {
  1839. if (ha->fb_rev == FPM_2310) {
  1840. strcpy(ha->model_number, "QLA2310");
  1841. } else {
  1842. strcpy(ha->model_number, "QLA2300");
  1843. }
  1844. } else {
  1845. qla2x00_set_model_info(vha, nv->model_number,
  1846. sizeof(nv->model_number), "QLA23xx");
  1847. }
  1848. } else if (IS_QLA2200(ha)) {
  1849. nv->firmware_options[0] |= BIT_2;
  1850. /*
  1851. * 'Point-to-point preferred, else loop' is not a safe
  1852. * connection mode setting.
  1853. */
  1854. if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
  1855. (BIT_5 | BIT_4)) {
  1856. /* Force 'loop preferred, else point-to-point'. */
  1857. nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
  1858. nv->add_firmware_options[0] |= BIT_5;
  1859. }
  1860. strcpy(ha->model_number, "QLA22xx");
  1861. } else /*if (IS_QLA2100(ha))*/ {
  1862. strcpy(ha->model_number, "QLA2100");
  1863. }
  1864. /*
  1865. * Copy over NVRAM RISC parameter block to initialization control block.
  1866. */
  1867. dptr1 = (uint8_t *)icb;
  1868. dptr2 = (uint8_t *)&nv->parameter_block_version;
  1869. cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
  1870. while (cnt--)
  1871. *dptr1++ = *dptr2++;
  1872. /* Copy 2nd half. */
  1873. dptr1 = (uint8_t *)icb->add_firmware_options;
  1874. cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
  1875. while (cnt--)
  1876. *dptr1++ = *dptr2++;
  1877. /* Use alternate WWN? */
  1878. if (nv->host_p[1] & BIT_7) {
  1879. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  1880. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  1881. }
  1882. /* Prepare nodename */
  1883. if ((icb->firmware_options[1] & BIT_6) == 0) {
  1884. /*
  1885. * Firmware will apply the following mask if the nodename was
  1886. * not provided.
  1887. */
  1888. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  1889. icb->node_name[0] &= 0xF0;
  1890. }
  1891. /*
  1892. * Set host adapter parameters.
  1893. */
  1894. if (nv->host_p[0] & BIT_7)
  1895. ql2xextended_error_logging = 1;
  1896. ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
  1897. /* Always load RISC code on non ISP2[12]00 chips. */
  1898. if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
  1899. ha->flags.disable_risc_code_load = 0;
  1900. ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
  1901. ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
  1902. ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
  1903. ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
  1904. ha->flags.disable_serdes = 0;
  1905. ha->operating_mode =
  1906. (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
  1907. memcpy(ha->fw_seriallink_options, nv->seriallink_options,
  1908. sizeof(ha->fw_seriallink_options));
  1909. /* save HBA serial number */
  1910. ha->serial0 = icb->port_name[5];
  1911. ha->serial1 = icb->port_name[6];
  1912. ha->serial2 = icb->port_name[7];
  1913. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  1914. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  1915. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  1916. ha->retry_count = nv->retry_count;
  1917. /* Set minimum login_timeout to 4 seconds. */
  1918. if (nv->login_timeout < ql2xlogintimeout)
  1919. nv->login_timeout = ql2xlogintimeout;
  1920. if (nv->login_timeout < 4)
  1921. nv->login_timeout = 4;
  1922. ha->login_timeout = nv->login_timeout;
  1923. icb->login_timeout = nv->login_timeout;
  1924. /* Set minimum RATOV to 100 tenths of a second. */
  1925. ha->r_a_tov = 100;
  1926. ha->loop_reset_delay = nv->reset_delay;
  1927. /* Link Down Timeout = 0:
  1928. *
  1929. * When Port Down timer expires we will start returning
  1930. * I/O's to OS with "DID_NO_CONNECT".
  1931. *
  1932. * Link Down Timeout != 0:
  1933. *
  1934. * The driver waits for the link to come up after link down
  1935. * before returning I/Os to OS with "DID_NO_CONNECT".
  1936. */
  1937. if (nv->link_down_timeout == 0) {
  1938. ha->loop_down_abort_time =
  1939. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  1940. } else {
  1941. ha->link_down_timeout = nv->link_down_timeout;
  1942. ha->loop_down_abort_time =
  1943. (LOOP_DOWN_TIME - ha->link_down_timeout);
  1944. }
  1945. /*
  1946. * Need enough time to try and get the port back.
  1947. */
  1948. ha->port_down_retry_count = nv->port_down_retry_count;
  1949. if (qlport_down_retry)
  1950. ha->port_down_retry_count = qlport_down_retry;
  1951. /* Set login_retry_count */
  1952. ha->login_retry_count = nv->retry_count;
  1953. if (ha->port_down_retry_count == nv->port_down_retry_count &&
  1954. ha->port_down_retry_count > 3)
  1955. ha->login_retry_count = ha->port_down_retry_count;
  1956. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  1957. ha->login_retry_count = ha->port_down_retry_count;
  1958. if (ql2xloginretrycount)
  1959. ha->login_retry_count = ql2xloginretrycount;
  1960. icb->lun_enables = __constant_cpu_to_le16(0);
  1961. icb->command_resource_count = 0;
  1962. icb->immediate_notify_resource_count = 0;
  1963. icb->timeout = __constant_cpu_to_le16(0);
  1964. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  1965. /* Enable RIO */
  1966. icb->firmware_options[0] &= ~BIT_3;
  1967. icb->add_firmware_options[0] &=
  1968. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1969. icb->add_firmware_options[0] |= BIT_2;
  1970. icb->response_accumulation_timer = 3;
  1971. icb->interrupt_delay_timer = 5;
  1972. vha->flags.process_response_queue = 1;
  1973. } else {
  1974. /* Enable ZIO. */
  1975. if (!vha->flags.init_done) {
  1976. ha->zio_mode = icb->add_firmware_options[0] &
  1977. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1978. ha->zio_timer = icb->interrupt_delay_timer ?
  1979. icb->interrupt_delay_timer: 2;
  1980. }
  1981. icb->add_firmware_options[0] &=
  1982. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1983. vha->flags.process_response_queue = 0;
  1984. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  1985. ha->zio_mode = QLA_ZIO_MODE_6;
  1986. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer "
  1987. "delay (%d us).\n", vha->host_no, ha->zio_mode,
  1988. ha->zio_timer * 100));
  1989. qla_printk(KERN_INFO, ha,
  1990. "ZIO mode %d enabled; timer delay (%d us).\n",
  1991. ha->zio_mode, ha->zio_timer * 100);
  1992. icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
  1993. icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
  1994. vha->flags.process_response_queue = 1;
  1995. }
  1996. }
  1997. if (rval) {
  1998. DEBUG2_3(printk(KERN_WARNING
  1999. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  2000. }
  2001. return (rval);
  2002. }
  2003. static void
  2004. qla2x00_rport_del(void *data)
  2005. {
  2006. fc_port_t *fcport = data;
  2007. struct fc_rport *rport;
  2008. spin_lock_irq(fcport->vha->host->host_lock);
  2009. rport = fcport->drport ? fcport->drport: fcport->rport;
  2010. fcport->drport = NULL;
  2011. spin_unlock_irq(fcport->vha->host->host_lock);
  2012. if (rport)
  2013. fc_remote_port_delete(rport);
  2014. }
  2015. /**
  2016. * qla2x00_alloc_fcport() - Allocate a generic fcport.
  2017. * @ha: HA context
  2018. * @flags: allocation flags
  2019. *
  2020. * Returns a pointer to the allocated fcport, or NULL, if none available.
  2021. */
  2022. fc_port_t *
  2023. qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
  2024. {
  2025. fc_port_t *fcport;
  2026. fcport = kzalloc(sizeof(fc_port_t), flags);
  2027. if (!fcport)
  2028. return NULL;
  2029. /* Setup fcport template structure. */
  2030. fcport->vha = vha;
  2031. fcport->vp_idx = vha->vp_idx;
  2032. fcport->port_type = FCT_UNKNOWN;
  2033. fcport->loop_id = FC_NO_LOOP_ID;
  2034. atomic_set(&fcport->state, FCS_UNCONFIGURED);
  2035. fcport->supported_classes = FC_COS_UNSPECIFIED;
  2036. return fcport;
  2037. }
  2038. /*
  2039. * qla2x00_configure_loop
  2040. * Updates Fibre Channel Device Database with what is actually on loop.
  2041. *
  2042. * Input:
  2043. * ha = adapter block pointer.
  2044. *
  2045. * Returns:
  2046. * 0 = success.
  2047. * 1 = error.
  2048. * 2 = database was full and device was not configured.
  2049. */
  2050. static int
  2051. qla2x00_configure_loop(scsi_qla_host_t *vha)
  2052. {
  2053. int rval;
  2054. unsigned long flags, save_flags;
  2055. struct qla_hw_data *ha = vha->hw;
  2056. rval = QLA_SUCCESS;
  2057. /* Get Initiator ID */
  2058. if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
  2059. rval = qla2x00_configure_hba(vha);
  2060. if (rval != QLA_SUCCESS) {
  2061. DEBUG(printk("scsi(%ld): Unable to configure HBA.\n",
  2062. vha->host_no));
  2063. return (rval);
  2064. }
  2065. }
  2066. save_flags = flags = vha->dpc_flags;
  2067. DEBUG(printk("scsi(%ld): Configure loop -- dpc flags =0x%lx\n",
  2068. vha->host_no, flags));
  2069. /*
  2070. * If we have both an RSCN and PORT UPDATE pending then handle them
  2071. * both at the same time.
  2072. */
  2073. clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  2074. clear_bit(RSCN_UPDATE, &vha->dpc_flags);
  2075. qla2x00_get_data_rate(vha);
  2076. /* Determine what we need to do */
  2077. if (ha->current_topology == ISP_CFG_FL &&
  2078. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  2079. vha->flags.rscn_queue_overflow = 1;
  2080. set_bit(RSCN_UPDATE, &flags);
  2081. } else if (ha->current_topology == ISP_CFG_F &&
  2082. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  2083. vha->flags.rscn_queue_overflow = 1;
  2084. set_bit(RSCN_UPDATE, &flags);
  2085. clear_bit(LOCAL_LOOP_UPDATE, &flags);
  2086. } else if (ha->current_topology == ISP_CFG_N) {
  2087. clear_bit(RSCN_UPDATE, &flags);
  2088. } else if (!vha->flags.online ||
  2089. (test_bit(ABORT_ISP_ACTIVE, &flags))) {
  2090. vha->flags.rscn_queue_overflow = 1;
  2091. set_bit(RSCN_UPDATE, &flags);
  2092. set_bit(LOCAL_LOOP_UPDATE, &flags);
  2093. }
  2094. if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
  2095. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2096. rval = QLA_FUNCTION_FAILED;
  2097. else
  2098. rval = qla2x00_configure_local_loop(vha);
  2099. }
  2100. if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
  2101. if (LOOP_TRANSITION(vha))
  2102. rval = QLA_FUNCTION_FAILED;
  2103. else
  2104. rval = qla2x00_configure_fabric(vha);
  2105. }
  2106. if (rval == QLA_SUCCESS) {
  2107. if (atomic_read(&vha->loop_down_timer) ||
  2108. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  2109. rval = QLA_FUNCTION_FAILED;
  2110. } else {
  2111. atomic_set(&vha->loop_state, LOOP_READY);
  2112. DEBUG(printk("scsi(%ld): LOOP READY\n", vha->host_no));
  2113. }
  2114. }
  2115. if (rval) {
  2116. DEBUG2_3(printk("%s(%ld): *** FAILED ***\n",
  2117. __func__, vha->host_no));
  2118. } else {
  2119. DEBUG3(printk("%s: exiting normally\n", __func__));
  2120. }
  2121. /* Restore state if a resync event occurred during processing */
  2122. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  2123. if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
  2124. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  2125. if (test_bit(RSCN_UPDATE, &save_flags)) {
  2126. set_bit(RSCN_UPDATE, &vha->dpc_flags);
  2127. vha->flags.rscn_queue_overflow = 1;
  2128. }
  2129. }
  2130. return (rval);
  2131. }
  2132. /*
  2133. * qla2x00_configure_local_loop
  2134. * Updates Fibre Channel Device Database with local loop devices.
  2135. *
  2136. * Input:
  2137. * ha = adapter block pointer.
  2138. *
  2139. * Returns:
  2140. * 0 = success.
  2141. */
  2142. static int
  2143. qla2x00_configure_local_loop(scsi_qla_host_t *vha)
  2144. {
  2145. int rval, rval2;
  2146. int found_devs;
  2147. int found;
  2148. fc_port_t *fcport, *new_fcport;
  2149. uint16_t index;
  2150. uint16_t entries;
  2151. char *id_iter;
  2152. uint16_t loop_id;
  2153. uint8_t domain, area, al_pa;
  2154. struct qla_hw_data *ha = vha->hw;
  2155. found_devs = 0;
  2156. new_fcport = NULL;
  2157. entries = MAX_FIBRE_DEVICES;
  2158. DEBUG3(printk("scsi(%ld): Getting FCAL position map\n", vha->host_no));
  2159. DEBUG3(qla2x00_get_fcal_position_map(vha, NULL));
  2160. /* Get list of logged in devices. */
  2161. memset(ha->gid_list, 0, GID_LIST_SIZE);
  2162. rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
  2163. &entries);
  2164. if (rval != QLA_SUCCESS)
  2165. goto cleanup_allocation;
  2166. DEBUG3(printk("scsi(%ld): Entries in ID list (%d)\n",
  2167. vha->host_no, entries));
  2168. DEBUG3(qla2x00_dump_buffer((uint8_t *)ha->gid_list,
  2169. entries * sizeof(struct gid_list_info)));
  2170. /* Allocate temporary fcport for any new fcports discovered. */
  2171. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2172. if (new_fcport == NULL) {
  2173. rval = QLA_MEMORY_ALLOC_FAILED;
  2174. goto cleanup_allocation;
  2175. }
  2176. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  2177. /*
  2178. * Mark local devices that were present with FCF_DEVICE_LOST for now.
  2179. */
  2180. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2181. if (atomic_read(&fcport->state) == FCS_ONLINE &&
  2182. fcport->port_type != FCT_BROADCAST &&
  2183. (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2184. DEBUG(printk("scsi(%ld): Marking port lost, "
  2185. "loop_id=0x%04x\n",
  2186. vha->host_no, fcport->loop_id));
  2187. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  2188. }
  2189. }
  2190. /* Add devices to port list. */
  2191. id_iter = (char *)ha->gid_list;
  2192. for (index = 0; index < entries; index++) {
  2193. domain = ((struct gid_list_info *)id_iter)->domain;
  2194. area = ((struct gid_list_info *)id_iter)->area;
  2195. al_pa = ((struct gid_list_info *)id_iter)->al_pa;
  2196. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  2197. loop_id = (uint16_t)
  2198. ((struct gid_list_info *)id_iter)->loop_id_2100;
  2199. else
  2200. loop_id = le16_to_cpu(
  2201. ((struct gid_list_info *)id_iter)->loop_id);
  2202. id_iter += ha->gid_list_info_size;
  2203. /* Bypass reserved domain fields. */
  2204. if ((domain & 0xf0) == 0xf0)
  2205. continue;
  2206. /* Bypass if not same domain and area of adapter. */
  2207. if (area && domain &&
  2208. (area != vha->d_id.b.area || domain != vha->d_id.b.domain))
  2209. continue;
  2210. /* Bypass invalid local loop ID. */
  2211. if (loop_id > LAST_LOCAL_LOOP_ID)
  2212. continue;
  2213. /* Fill in member data. */
  2214. new_fcport->d_id.b.domain = domain;
  2215. new_fcport->d_id.b.area = area;
  2216. new_fcport->d_id.b.al_pa = al_pa;
  2217. new_fcport->loop_id = loop_id;
  2218. new_fcport->vp_idx = vha->vp_idx;
  2219. rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
  2220. if (rval2 != QLA_SUCCESS) {
  2221. DEBUG2(printk("scsi(%ld): Failed to retrieve fcport "
  2222. "information -- get_port_database=%x, "
  2223. "loop_id=0x%04x\n",
  2224. vha->host_no, rval2, new_fcport->loop_id));
  2225. DEBUG2(printk("scsi(%ld): Scheduling resync...\n",
  2226. vha->host_no));
  2227. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2228. continue;
  2229. }
  2230. /* Check for matching device in port list. */
  2231. found = 0;
  2232. fcport = NULL;
  2233. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2234. if (memcmp(new_fcport->port_name, fcport->port_name,
  2235. WWN_SIZE))
  2236. continue;
  2237. fcport->flags &= ~FCF_FABRIC_DEVICE;
  2238. fcport->loop_id = new_fcport->loop_id;
  2239. fcport->port_type = new_fcport->port_type;
  2240. fcport->d_id.b24 = new_fcport->d_id.b24;
  2241. memcpy(fcport->node_name, new_fcport->node_name,
  2242. WWN_SIZE);
  2243. found++;
  2244. break;
  2245. }
  2246. if (!found) {
  2247. /* New device, add to fcports list. */
  2248. if (vha->vp_idx) {
  2249. new_fcport->vha = vha;
  2250. new_fcport->vp_idx = vha->vp_idx;
  2251. }
  2252. list_add_tail(&new_fcport->list, &vha->vp_fcports);
  2253. /* Allocate a new replacement fcport. */
  2254. fcport = new_fcport;
  2255. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2256. if (new_fcport == NULL) {
  2257. rval = QLA_MEMORY_ALLOC_FAILED;
  2258. goto cleanup_allocation;
  2259. }
  2260. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  2261. }
  2262. /* Base iIDMA settings on HBA port speed. */
  2263. fcport->fp_speed = ha->link_data_rate;
  2264. qla2x00_update_fcport(vha, fcport);
  2265. found_devs++;
  2266. }
  2267. cleanup_allocation:
  2268. kfree(new_fcport);
  2269. if (rval != QLA_SUCCESS) {
  2270. DEBUG2(printk("scsi(%ld): Configure local loop error exit: "
  2271. "rval=%x\n", vha->host_no, rval));
  2272. }
  2273. return (rval);
  2274. }
  2275. static void
  2276. qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  2277. {
  2278. #define LS_UNKNOWN 2
  2279. static char *link_speeds[] = { "1", "2", "?", "4", "8", "10" };
  2280. char *link_speed;
  2281. int rval;
  2282. uint16_t mb[4];
  2283. struct qla_hw_data *ha = vha->hw;
  2284. if (!IS_IIDMA_CAPABLE(ha))
  2285. return;
  2286. if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
  2287. fcport->fp_speed > ha->link_data_rate)
  2288. return;
  2289. rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
  2290. mb);
  2291. if (rval != QLA_SUCCESS) {
  2292. DEBUG2(printk("scsi(%ld): Unable to adjust iIDMA "
  2293. "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x %04x.\n",
  2294. vha->host_no, fcport->port_name[0], fcport->port_name[1],
  2295. fcport->port_name[2], fcport->port_name[3],
  2296. fcport->port_name[4], fcport->port_name[5],
  2297. fcport->port_name[6], fcport->port_name[7], rval,
  2298. fcport->fp_speed, mb[0], mb[1]));
  2299. } else {
  2300. link_speed = link_speeds[LS_UNKNOWN];
  2301. if (fcport->fp_speed < 5)
  2302. link_speed = link_speeds[fcport->fp_speed];
  2303. else if (fcport->fp_speed == 0x13)
  2304. link_speed = link_speeds[5];
  2305. DEBUG2(qla_printk(KERN_INFO, ha,
  2306. "iIDMA adjusted to %s GB/s on "
  2307. "%02x%02x%02x%02x%02x%02x%02x%02x.\n",
  2308. link_speed, fcport->port_name[0],
  2309. fcport->port_name[1], fcport->port_name[2],
  2310. fcport->port_name[3], fcport->port_name[4],
  2311. fcport->port_name[5], fcport->port_name[6],
  2312. fcport->port_name[7]));
  2313. }
  2314. }
  2315. static void
  2316. qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
  2317. {
  2318. struct fc_rport_identifiers rport_ids;
  2319. struct fc_rport *rport;
  2320. struct qla_hw_data *ha = vha->hw;
  2321. qla2x00_rport_del(fcport);
  2322. rport_ids.node_name = wwn_to_u64(fcport->node_name);
  2323. rport_ids.port_name = wwn_to_u64(fcport->port_name);
  2324. rport_ids.port_id = fcport->d_id.b.domain << 16 |
  2325. fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
  2326. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  2327. fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
  2328. if (!rport) {
  2329. qla_printk(KERN_WARNING, ha,
  2330. "Unable to allocate fc remote port!\n");
  2331. return;
  2332. }
  2333. spin_lock_irq(fcport->vha->host->host_lock);
  2334. *((fc_port_t **)rport->dd_data) = fcport;
  2335. spin_unlock_irq(fcport->vha->host->host_lock);
  2336. rport->supported_classes = fcport->supported_classes;
  2337. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  2338. if (fcport->port_type == FCT_INITIATOR)
  2339. rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
  2340. if (fcport->port_type == FCT_TARGET)
  2341. rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
  2342. fc_remote_port_rolechg(rport, rport_ids.roles);
  2343. }
  2344. /*
  2345. * qla2x00_update_fcport
  2346. * Updates device on list.
  2347. *
  2348. * Input:
  2349. * ha = adapter block pointer.
  2350. * fcport = port structure pointer.
  2351. *
  2352. * Return:
  2353. * 0 - Success
  2354. * BIT_0 - error
  2355. *
  2356. * Context:
  2357. * Kernel context.
  2358. */
  2359. void
  2360. qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  2361. {
  2362. struct qla_hw_data *ha = vha->hw;
  2363. fcport->vha = vha;
  2364. fcport->login_retry = 0;
  2365. fcport->port_login_retry_count = ha->port_down_retry_count *
  2366. PORT_RETRY_TIME;
  2367. atomic_set(&fcport->port_down_timer, ha->port_down_retry_count *
  2368. PORT_RETRY_TIME);
  2369. fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
  2370. qla2x00_iidma_fcport(vha, fcport);
  2371. atomic_set(&fcport->state, FCS_ONLINE);
  2372. qla2x00_reg_remote_port(vha, fcport);
  2373. }
  2374. /*
  2375. * qla2x00_configure_fabric
  2376. * Setup SNS devices with loop ID's.
  2377. *
  2378. * Input:
  2379. * ha = adapter block pointer.
  2380. *
  2381. * Returns:
  2382. * 0 = success.
  2383. * BIT_0 = error
  2384. */
  2385. static int
  2386. qla2x00_configure_fabric(scsi_qla_host_t *vha)
  2387. {
  2388. int rval, rval2;
  2389. fc_port_t *fcport, *fcptemp;
  2390. uint16_t next_loopid;
  2391. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2392. uint16_t loop_id;
  2393. LIST_HEAD(new_fcports);
  2394. struct qla_hw_data *ha = vha->hw;
  2395. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  2396. /* If FL port exists, then SNS is present */
  2397. if (IS_FWI2_CAPABLE(ha))
  2398. loop_id = NPH_F_PORT;
  2399. else
  2400. loop_id = SNS_FL_PORT;
  2401. rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
  2402. if (rval != QLA_SUCCESS) {
  2403. DEBUG2(printk("scsi(%ld): MBC_GET_PORT_NAME Failed, No FL "
  2404. "Port\n", vha->host_no));
  2405. vha->device_flags &= ~SWITCH_FOUND;
  2406. return (QLA_SUCCESS);
  2407. }
  2408. vha->device_flags |= SWITCH_FOUND;
  2409. /* Mark devices that need re-synchronization. */
  2410. rval2 = qla2x00_device_resync(vha);
  2411. if (rval2 == QLA_RSCNS_HANDLED) {
  2412. /* No point doing the scan, just continue. */
  2413. return (QLA_SUCCESS);
  2414. }
  2415. do {
  2416. /* FDMI support. */
  2417. if (ql2xfdmienable &&
  2418. test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
  2419. qla2x00_fdmi_register(vha);
  2420. /* Ensure we are logged into the SNS. */
  2421. if (IS_FWI2_CAPABLE(ha))
  2422. loop_id = NPH_SNS;
  2423. else
  2424. loop_id = SIMPLE_NAME_SERVER;
  2425. ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
  2426. 0xfc, mb, BIT_1 | BIT_0);
  2427. if (mb[0] != MBS_COMMAND_COMPLETE) {
  2428. DEBUG2(qla_printk(KERN_INFO, ha,
  2429. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  2430. "mb[2]=%x mb[6]=%x mb[7]=%x\n", loop_id,
  2431. mb[0], mb[1], mb[2], mb[6], mb[7]));
  2432. return (QLA_SUCCESS);
  2433. }
  2434. if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
  2435. if (qla2x00_rft_id(vha)) {
  2436. /* EMPTY */
  2437. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2438. "TYPE failed.\n", vha->host_no));
  2439. }
  2440. if (qla2x00_rff_id(vha)) {
  2441. /* EMPTY */
  2442. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2443. "Features failed.\n", vha->host_no));
  2444. }
  2445. if (qla2x00_rnn_id(vha)) {
  2446. /* EMPTY */
  2447. DEBUG2(printk("scsi(%ld): Register Node Name "
  2448. "failed.\n", vha->host_no));
  2449. } else if (qla2x00_rsnn_nn(vha)) {
  2450. /* EMPTY */
  2451. DEBUG2(printk("scsi(%ld): Register Symbolic "
  2452. "Node Name failed.\n", vha->host_no));
  2453. }
  2454. }
  2455. rval = qla2x00_find_all_fabric_devs(vha, &new_fcports);
  2456. if (rval != QLA_SUCCESS)
  2457. break;
  2458. /*
  2459. * Logout all previous fabric devices marked lost, except
  2460. * FCP2 devices.
  2461. */
  2462. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2463. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2464. break;
  2465. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
  2466. continue;
  2467. if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
  2468. qla2x00_mark_device_lost(vha, fcport,
  2469. ql2xplogiabsentdevice, 0);
  2470. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2471. (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
  2472. fcport->port_type != FCT_INITIATOR &&
  2473. fcport->port_type != FCT_BROADCAST) {
  2474. ha->isp_ops->fabric_logout(vha,
  2475. fcport->loop_id,
  2476. fcport->d_id.b.domain,
  2477. fcport->d_id.b.area,
  2478. fcport->d_id.b.al_pa);
  2479. fcport->loop_id = FC_NO_LOOP_ID;
  2480. }
  2481. }
  2482. }
  2483. /* Starting free loop ID. */
  2484. next_loopid = ha->min_external_loopid;
  2485. /*
  2486. * Scan through our port list and login entries that need to be
  2487. * logged in.
  2488. */
  2489. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2490. if (atomic_read(&vha->loop_down_timer) ||
  2491. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2492. break;
  2493. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2494. (fcport->flags & FCF_LOGIN_NEEDED) == 0)
  2495. continue;
  2496. if (fcport->loop_id == FC_NO_LOOP_ID) {
  2497. fcport->loop_id = next_loopid;
  2498. rval = qla2x00_find_new_loop_id(
  2499. base_vha, fcport);
  2500. if (rval != QLA_SUCCESS) {
  2501. /* Ran out of IDs to use */
  2502. break;
  2503. }
  2504. }
  2505. /* Login and update database */
  2506. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2507. }
  2508. /* Exit if out of loop IDs. */
  2509. if (rval != QLA_SUCCESS) {
  2510. break;
  2511. }
  2512. /*
  2513. * Login and add the new devices to our port list.
  2514. */
  2515. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2516. if (atomic_read(&vha->loop_down_timer) ||
  2517. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2518. break;
  2519. /* Find a new loop ID to use. */
  2520. fcport->loop_id = next_loopid;
  2521. rval = qla2x00_find_new_loop_id(base_vha, fcport);
  2522. if (rval != QLA_SUCCESS) {
  2523. /* Ran out of IDs to use */
  2524. break;
  2525. }
  2526. /* Login and update database */
  2527. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2528. if (vha->vp_idx) {
  2529. fcport->vha = vha;
  2530. fcport->vp_idx = vha->vp_idx;
  2531. }
  2532. list_move_tail(&fcport->list, &vha->vp_fcports);
  2533. }
  2534. } while (0);
  2535. /* Free all new device structures not processed. */
  2536. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2537. list_del(&fcport->list);
  2538. kfree(fcport);
  2539. }
  2540. if (rval) {
  2541. DEBUG2(printk("scsi(%ld): Configure fabric error exit: "
  2542. "rval=%d\n", vha->host_no, rval));
  2543. }
  2544. return (rval);
  2545. }
  2546. /*
  2547. * qla2x00_find_all_fabric_devs
  2548. *
  2549. * Input:
  2550. * ha = adapter block pointer.
  2551. * dev = database device entry pointer.
  2552. *
  2553. * Returns:
  2554. * 0 = success.
  2555. *
  2556. * Context:
  2557. * Kernel context.
  2558. */
  2559. static int
  2560. qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha,
  2561. struct list_head *new_fcports)
  2562. {
  2563. int rval;
  2564. uint16_t loop_id;
  2565. fc_port_t *fcport, *new_fcport, *fcptemp;
  2566. int found;
  2567. sw_info_t *swl;
  2568. int swl_idx;
  2569. int first_dev, last_dev;
  2570. port_id_t wrap, nxt_d_id;
  2571. struct qla_hw_data *ha = vha->hw;
  2572. struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev);
  2573. struct scsi_qla_host *tvp;
  2574. rval = QLA_SUCCESS;
  2575. /* Try GID_PT to get device list, else GAN. */
  2576. swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), GFP_KERNEL);
  2577. if (!swl) {
  2578. /*EMPTY*/
  2579. DEBUG2(printk("scsi(%ld): GID_PT allocations failed, fallback "
  2580. "on GA_NXT\n", vha->host_no));
  2581. } else {
  2582. if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
  2583. kfree(swl);
  2584. swl = NULL;
  2585. } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
  2586. kfree(swl);
  2587. swl = NULL;
  2588. } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
  2589. kfree(swl);
  2590. swl = NULL;
  2591. } else if (ql2xiidmaenable &&
  2592. qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) {
  2593. qla2x00_gpsc(vha, swl);
  2594. }
  2595. }
  2596. swl_idx = 0;
  2597. /* Allocate temporary fcport for any new fcports discovered. */
  2598. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2599. if (new_fcport == NULL) {
  2600. kfree(swl);
  2601. return (QLA_MEMORY_ALLOC_FAILED);
  2602. }
  2603. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2604. /* Set start port ID scan at adapter ID. */
  2605. first_dev = 1;
  2606. last_dev = 0;
  2607. /* Starting free loop ID. */
  2608. loop_id = ha->min_external_loopid;
  2609. for (; loop_id <= ha->max_loop_id; loop_id++) {
  2610. if (qla2x00_is_reserved_id(vha, loop_id))
  2611. continue;
  2612. if (atomic_read(&vha->loop_down_timer) ||
  2613. LOOP_TRANSITION(vha)) {
  2614. atomic_set(&vha->loop_down_timer, 0);
  2615. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2616. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  2617. break;
  2618. }
  2619. if (swl != NULL) {
  2620. if (last_dev) {
  2621. wrap.b24 = new_fcport->d_id.b24;
  2622. } else {
  2623. new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
  2624. memcpy(new_fcport->node_name,
  2625. swl[swl_idx].node_name, WWN_SIZE);
  2626. memcpy(new_fcport->port_name,
  2627. swl[swl_idx].port_name, WWN_SIZE);
  2628. memcpy(new_fcport->fabric_port_name,
  2629. swl[swl_idx].fabric_port_name, WWN_SIZE);
  2630. new_fcport->fp_speed = swl[swl_idx].fp_speed;
  2631. if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
  2632. last_dev = 1;
  2633. }
  2634. swl_idx++;
  2635. }
  2636. } else {
  2637. /* Send GA_NXT to the switch */
  2638. rval = qla2x00_ga_nxt(vha, new_fcport);
  2639. if (rval != QLA_SUCCESS) {
  2640. qla_printk(KERN_WARNING, ha,
  2641. "SNS scan failed -- assuming zero-entry "
  2642. "result...\n");
  2643. list_for_each_entry_safe(fcport, fcptemp,
  2644. new_fcports, list) {
  2645. list_del(&fcport->list);
  2646. kfree(fcport);
  2647. }
  2648. rval = QLA_SUCCESS;
  2649. break;
  2650. }
  2651. }
  2652. /* If wrap on switch device list, exit. */
  2653. if (first_dev) {
  2654. wrap.b24 = new_fcport->d_id.b24;
  2655. first_dev = 0;
  2656. } else if (new_fcport->d_id.b24 == wrap.b24) {
  2657. DEBUG2(printk("scsi(%ld): device wrap (%02x%02x%02x)\n",
  2658. vha->host_no, new_fcport->d_id.b.domain,
  2659. new_fcport->d_id.b.area, new_fcport->d_id.b.al_pa));
  2660. break;
  2661. }
  2662. /* Bypass if same physical adapter. */
  2663. if (new_fcport->d_id.b24 == base_vha->d_id.b24)
  2664. continue;
  2665. /* Bypass virtual ports of the same host. */
  2666. found = 0;
  2667. if (ha->num_vhosts) {
  2668. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2669. if (new_fcport->d_id.b24 == vp->d_id.b24) {
  2670. found = 1;
  2671. break;
  2672. }
  2673. }
  2674. if (found)
  2675. continue;
  2676. }
  2677. /* Bypass if same domain and area of adapter. */
  2678. if (((new_fcport->d_id.b24 & 0xffff00) ==
  2679. (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
  2680. ISP_CFG_FL)
  2681. continue;
  2682. /* Bypass reserved domain fields. */
  2683. if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
  2684. continue;
  2685. /* Locate matching device in database. */
  2686. found = 0;
  2687. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2688. if (memcmp(new_fcport->port_name, fcport->port_name,
  2689. WWN_SIZE))
  2690. continue;
  2691. found++;
  2692. /* Update port state. */
  2693. memcpy(fcport->fabric_port_name,
  2694. new_fcport->fabric_port_name, WWN_SIZE);
  2695. fcport->fp_speed = new_fcport->fp_speed;
  2696. /*
  2697. * If address the same and state FCS_ONLINE, nothing
  2698. * changed.
  2699. */
  2700. if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
  2701. atomic_read(&fcport->state) == FCS_ONLINE) {
  2702. break;
  2703. }
  2704. /*
  2705. * If device was not a fabric device before.
  2706. */
  2707. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2708. fcport->d_id.b24 = new_fcport->d_id.b24;
  2709. fcport->loop_id = FC_NO_LOOP_ID;
  2710. fcport->flags |= (FCF_FABRIC_DEVICE |
  2711. FCF_LOGIN_NEEDED);
  2712. break;
  2713. }
  2714. /*
  2715. * Port ID changed or device was marked to be updated;
  2716. * Log it out if still logged in and mark it for
  2717. * relogin later.
  2718. */
  2719. fcport->d_id.b24 = new_fcport->d_id.b24;
  2720. fcport->flags |= FCF_LOGIN_NEEDED;
  2721. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2722. (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
  2723. fcport->port_type != FCT_INITIATOR &&
  2724. fcport->port_type != FCT_BROADCAST) {
  2725. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2726. fcport->d_id.b.domain, fcport->d_id.b.area,
  2727. fcport->d_id.b.al_pa);
  2728. fcport->loop_id = FC_NO_LOOP_ID;
  2729. }
  2730. break;
  2731. }
  2732. if (found)
  2733. continue;
  2734. /* If device was not in our fcports list, then add it. */
  2735. list_add_tail(&new_fcport->list, new_fcports);
  2736. /* Allocate a new replacement fcport. */
  2737. nxt_d_id.b24 = new_fcport->d_id.b24;
  2738. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2739. if (new_fcport == NULL) {
  2740. kfree(swl);
  2741. return (QLA_MEMORY_ALLOC_FAILED);
  2742. }
  2743. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2744. new_fcport->d_id.b24 = nxt_d_id.b24;
  2745. }
  2746. kfree(swl);
  2747. kfree(new_fcport);
  2748. return (rval);
  2749. }
  2750. /*
  2751. * qla2x00_find_new_loop_id
  2752. * Scan through our port list and find a new usable loop ID.
  2753. *
  2754. * Input:
  2755. * ha: adapter state pointer.
  2756. * dev: port structure pointer.
  2757. *
  2758. * Returns:
  2759. * qla2x00 local function return status code.
  2760. *
  2761. * Context:
  2762. * Kernel context.
  2763. */
  2764. static int
  2765. qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
  2766. {
  2767. int rval;
  2768. int found;
  2769. fc_port_t *fcport;
  2770. uint16_t first_loop_id;
  2771. struct qla_hw_data *ha = vha->hw;
  2772. struct scsi_qla_host *vp;
  2773. struct scsi_qla_host *tvp;
  2774. rval = QLA_SUCCESS;
  2775. /* Save starting loop ID. */
  2776. first_loop_id = dev->loop_id;
  2777. for (;;) {
  2778. /* Skip loop ID if already used by adapter. */
  2779. if (dev->loop_id == vha->loop_id)
  2780. dev->loop_id++;
  2781. /* Skip reserved loop IDs. */
  2782. while (qla2x00_is_reserved_id(vha, dev->loop_id))
  2783. dev->loop_id++;
  2784. /* Reset loop ID if passed the end. */
  2785. if (dev->loop_id > ha->max_loop_id) {
  2786. /* first loop ID. */
  2787. dev->loop_id = ha->min_external_loopid;
  2788. }
  2789. /* Check for loop ID being already in use. */
  2790. found = 0;
  2791. fcport = NULL;
  2792. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2793. list_for_each_entry(fcport, &vp->vp_fcports, list) {
  2794. if (fcport->loop_id == dev->loop_id &&
  2795. fcport != dev) {
  2796. /* ID possibly in use */
  2797. found++;
  2798. break;
  2799. }
  2800. }
  2801. if (found)
  2802. break;
  2803. }
  2804. /* If not in use then it is free to use. */
  2805. if (!found) {
  2806. break;
  2807. }
  2808. /* ID in use. Try next value. */
  2809. dev->loop_id++;
  2810. /* If wrap around. No free ID to use. */
  2811. if (dev->loop_id == first_loop_id) {
  2812. dev->loop_id = FC_NO_LOOP_ID;
  2813. rval = QLA_FUNCTION_FAILED;
  2814. break;
  2815. }
  2816. }
  2817. return (rval);
  2818. }
  2819. /*
  2820. * qla2x00_device_resync
  2821. * Marks devices in the database that needs resynchronization.
  2822. *
  2823. * Input:
  2824. * ha = adapter block pointer.
  2825. *
  2826. * Context:
  2827. * Kernel context.
  2828. */
  2829. static int
  2830. qla2x00_device_resync(scsi_qla_host_t *vha)
  2831. {
  2832. int rval;
  2833. uint32_t mask;
  2834. fc_port_t *fcport;
  2835. uint32_t rscn_entry;
  2836. uint8_t rscn_out_iter;
  2837. uint8_t format;
  2838. port_id_t d_id;
  2839. rval = QLA_RSCNS_HANDLED;
  2840. while (vha->rscn_out_ptr != vha->rscn_in_ptr ||
  2841. vha->flags.rscn_queue_overflow) {
  2842. rscn_entry = vha->rscn_queue[vha->rscn_out_ptr];
  2843. format = MSB(MSW(rscn_entry));
  2844. d_id.b.domain = LSB(MSW(rscn_entry));
  2845. d_id.b.area = MSB(LSW(rscn_entry));
  2846. d_id.b.al_pa = LSB(LSW(rscn_entry));
  2847. DEBUG(printk("scsi(%ld): RSCN queue entry[%d] = "
  2848. "[%02x/%02x%02x%02x].\n",
  2849. vha->host_no, vha->rscn_out_ptr, format, d_id.b.domain,
  2850. d_id.b.area, d_id.b.al_pa));
  2851. vha->rscn_out_ptr++;
  2852. if (vha->rscn_out_ptr == MAX_RSCN_COUNT)
  2853. vha->rscn_out_ptr = 0;
  2854. /* Skip duplicate entries. */
  2855. for (rscn_out_iter = vha->rscn_out_ptr;
  2856. !vha->flags.rscn_queue_overflow &&
  2857. rscn_out_iter != vha->rscn_in_ptr;
  2858. rscn_out_iter = (rscn_out_iter ==
  2859. (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) {
  2860. if (rscn_entry != vha->rscn_queue[rscn_out_iter])
  2861. break;
  2862. DEBUG(printk("scsi(%ld): Skipping duplicate RSCN queue "
  2863. "entry found at [%d].\n", vha->host_no,
  2864. rscn_out_iter));
  2865. vha->rscn_out_ptr = rscn_out_iter;
  2866. }
  2867. /* Queue overflow, set switch default case. */
  2868. if (vha->flags.rscn_queue_overflow) {
  2869. DEBUG(printk("scsi(%ld): device_resync: rscn "
  2870. "overflow.\n", vha->host_no));
  2871. format = 3;
  2872. vha->flags.rscn_queue_overflow = 0;
  2873. }
  2874. switch (format) {
  2875. case 0:
  2876. mask = 0xffffff;
  2877. break;
  2878. case 1:
  2879. mask = 0xffff00;
  2880. break;
  2881. case 2:
  2882. mask = 0xff0000;
  2883. break;
  2884. default:
  2885. mask = 0x0;
  2886. d_id.b24 = 0;
  2887. vha->rscn_out_ptr = vha->rscn_in_ptr;
  2888. break;
  2889. }
  2890. rval = QLA_SUCCESS;
  2891. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2892. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2893. (fcport->d_id.b24 & mask) != d_id.b24 ||
  2894. fcport->port_type == FCT_BROADCAST)
  2895. continue;
  2896. if (atomic_read(&fcport->state) == FCS_ONLINE) {
  2897. if (format != 3 ||
  2898. fcport->port_type != FCT_INITIATOR) {
  2899. qla2x00_mark_device_lost(vha, fcport,
  2900. 0, 0);
  2901. }
  2902. }
  2903. }
  2904. }
  2905. return (rval);
  2906. }
  2907. /*
  2908. * qla2x00_fabric_dev_login
  2909. * Login fabric target device and update FC port database.
  2910. *
  2911. * Input:
  2912. * ha: adapter state pointer.
  2913. * fcport: port structure list pointer.
  2914. * next_loopid: contains value of a new loop ID that can be used
  2915. * by the next login attempt.
  2916. *
  2917. * Returns:
  2918. * qla2x00 local function return status code.
  2919. *
  2920. * Context:
  2921. * Kernel context.
  2922. */
  2923. static int
  2924. qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  2925. uint16_t *next_loopid)
  2926. {
  2927. int rval;
  2928. int retry;
  2929. uint8_t opts;
  2930. struct qla_hw_data *ha = vha->hw;
  2931. rval = QLA_SUCCESS;
  2932. retry = 0;
  2933. if (IS_ALOGIO_CAPABLE(ha)) {
  2934. if (fcport->flags & FCF_ASYNC_SENT)
  2935. return rval;
  2936. fcport->flags |= FCF_ASYNC_SENT;
  2937. rval = qla2x00_post_async_login_work(vha, fcport, NULL);
  2938. if (!rval)
  2939. return rval;
  2940. }
  2941. fcport->flags &= ~FCF_ASYNC_SENT;
  2942. rval = qla2x00_fabric_login(vha, fcport, next_loopid);
  2943. if (rval == QLA_SUCCESS) {
  2944. /* Send an ADISC to FCP2 devices.*/
  2945. opts = 0;
  2946. if (fcport->flags & FCF_FCP2_DEVICE)
  2947. opts |= BIT_1;
  2948. rval = qla2x00_get_port_database(vha, fcport, opts);
  2949. if (rval != QLA_SUCCESS) {
  2950. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2951. fcport->d_id.b.domain, fcport->d_id.b.area,
  2952. fcport->d_id.b.al_pa);
  2953. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  2954. } else {
  2955. qla2x00_update_fcport(vha, fcport);
  2956. }
  2957. }
  2958. return (rval);
  2959. }
  2960. /*
  2961. * qla2x00_fabric_login
  2962. * Issue fabric login command.
  2963. *
  2964. * Input:
  2965. * ha = adapter block pointer.
  2966. * device = pointer to FC device type structure.
  2967. *
  2968. * Returns:
  2969. * 0 - Login successfully
  2970. * 1 - Login failed
  2971. * 2 - Initiator device
  2972. * 3 - Fatal error
  2973. */
  2974. int
  2975. qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  2976. uint16_t *next_loopid)
  2977. {
  2978. int rval;
  2979. int retry;
  2980. uint16_t tmp_loopid;
  2981. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2982. struct qla_hw_data *ha = vha->hw;
  2983. retry = 0;
  2984. tmp_loopid = 0;
  2985. for (;;) {
  2986. DEBUG(printk("scsi(%ld): Trying Fabric Login w/loop id 0x%04x "
  2987. "for port %02x%02x%02x.\n",
  2988. vha->host_no, fcport->loop_id, fcport->d_id.b.domain,
  2989. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  2990. /* Login fcport on switch. */
  2991. ha->isp_ops->fabric_login(vha, fcport->loop_id,
  2992. fcport->d_id.b.domain, fcport->d_id.b.area,
  2993. fcport->d_id.b.al_pa, mb, BIT_0);
  2994. if (mb[0] == MBS_PORT_ID_USED) {
  2995. /*
  2996. * Device has another loop ID. The firmware team
  2997. * recommends the driver perform an implicit login with
  2998. * the specified ID again. The ID we just used is save
  2999. * here so we return with an ID that can be tried by
  3000. * the next login.
  3001. */
  3002. retry++;
  3003. tmp_loopid = fcport->loop_id;
  3004. fcport->loop_id = mb[1];
  3005. DEBUG(printk("Fabric Login: port in use - next "
  3006. "loop id=0x%04x, port Id=%02x%02x%02x.\n",
  3007. fcport->loop_id, fcport->d_id.b.domain,
  3008. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  3009. } else if (mb[0] == MBS_COMMAND_COMPLETE) {
  3010. /*
  3011. * Login succeeded.
  3012. */
  3013. if (retry) {
  3014. /* A retry occurred before. */
  3015. *next_loopid = tmp_loopid;
  3016. } else {
  3017. /*
  3018. * No retry occurred before. Just increment the
  3019. * ID value for next login.
  3020. */
  3021. *next_loopid = (fcport->loop_id + 1);
  3022. }
  3023. if (mb[1] & BIT_0) {
  3024. fcport->port_type = FCT_INITIATOR;
  3025. } else {
  3026. fcport->port_type = FCT_TARGET;
  3027. if (mb[1] & BIT_1) {
  3028. fcport->flags |= FCF_FCP2_DEVICE;
  3029. }
  3030. }
  3031. if (mb[10] & BIT_0)
  3032. fcport->supported_classes |= FC_COS_CLASS2;
  3033. if (mb[10] & BIT_1)
  3034. fcport->supported_classes |= FC_COS_CLASS3;
  3035. rval = QLA_SUCCESS;
  3036. break;
  3037. } else if (mb[0] == MBS_LOOP_ID_USED) {
  3038. /*
  3039. * Loop ID already used, try next loop ID.
  3040. */
  3041. fcport->loop_id++;
  3042. rval = qla2x00_find_new_loop_id(vha, fcport);
  3043. if (rval != QLA_SUCCESS) {
  3044. /* Ran out of loop IDs to use */
  3045. break;
  3046. }
  3047. } else if (mb[0] == MBS_COMMAND_ERROR) {
  3048. /*
  3049. * Firmware possibly timed out during login. If NO
  3050. * retries are left to do then the device is declared
  3051. * dead.
  3052. */
  3053. *next_loopid = fcport->loop_id;
  3054. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  3055. fcport->d_id.b.domain, fcport->d_id.b.area,
  3056. fcport->d_id.b.al_pa);
  3057. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  3058. rval = 1;
  3059. break;
  3060. } else {
  3061. /*
  3062. * unrecoverable / not handled error
  3063. */
  3064. DEBUG2(printk("%s(%ld): failed=%x port_id=%02x%02x%02x "
  3065. "loop_id=%x jiffies=%lx.\n",
  3066. __func__, vha->host_no, mb[0],
  3067. fcport->d_id.b.domain, fcport->d_id.b.area,
  3068. fcport->d_id.b.al_pa, fcport->loop_id, jiffies));
  3069. *next_loopid = fcport->loop_id;
  3070. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  3071. fcport->d_id.b.domain, fcport->d_id.b.area,
  3072. fcport->d_id.b.al_pa);
  3073. fcport->loop_id = FC_NO_LOOP_ID;
  3074. fcport->login_retry = 0;
  3075. rval = 3;
  3076. break;
  3077. }
  3078. }
  3079. return (rval);
  3080. }
  3081. /*
  3082. * qla2x00_local_device_login
  3083. * Issue local device login command.
  3084. *
  3085. * Input:
  3086. * ha = adapter block pointer.
  3087. * loop_id = loop id of device to login to.
  3088. *
  3089. * Returns (Where's the #define!!!!):
  3090. * 0 - Login successfully
  3091. * 1 - Login failed
  3092. * 3 - Fatal error
  3093. */
  3094. int
  3095. qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
  3096. {
  3097. int rval;
  3098. uint16_t mb[MAILBOX_REGISTER_COUNT];
  3099. memset(mb, 0, sizeof(mb));
  3100. rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
  3101. if (rval == QLA_SUCCESS) {
  3102. /* Interrogate mailbox registers for any errors */
  3103. if (mb[0] == MBS_COMMAND_ERROR)
  3104. rval = 1;
  3105. else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
  3106. /* device not in PCB table */
  3107. rval = 3;
  3108. }
  3109. return (rval);
  3110. }
  3111. /*
  3112. * qla2x00_loop_resync
  3113. * Resync with fibre channel devices.
  3114. *
  3115. * Input:
  3116. * ha = adapter block pointer.
  3117. *
  3118. * Returns:
  3119. * 0 = success
  3120. */
  3121. int
  3122. qla2x00_loop_resync(scsi_qla_host_t *vha)
  3123. {
  3124. int rval = QLA_SUCCESS;
  3125. uint32_t wait_time;
  3126. struct req_que *req;
  3127. struct rsp_que *rsp;
  3128. if (vha->hw->flags.cpu_affinity_enabled)
  3129. req = vha->hw->req_q_map[0];
  3130. else
  3131. req = vha->req;
  3132. rsp = req->rsp;
  3133. atomic_set(&vha->loop_state, LOOP_UPDATE);
  3134. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3135. if (vha->flags.online) {
  3136. if (!(rval = qla2x00_fw_ready(vha))) {
  3137. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  3138. wait_time = 256;
  3139. do {
  3140. atomic_set(&vha->loop_state, LOOP_UPDATE);
  3141. /* Issue a marker after FW becomes ready. */
  3142. qla2x00_marker(vha, req, rsp, 0, 0,
  3143. MK_SYNC_ALL);
  3144. vha->marker_needed = 0;
  3145. /* Remap devices on Loop. */
  3146. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3147. qla2x00_configure_loop(vha);
  3148. wait_time--;
  3149. } while (!atomic_read(&vha->loop_down_timer) &&
  3150. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3151. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  3152. &vha->dpc_flags)));
  3153. }
  3154. }
  3155. if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3156. return (QLA_FUNCTION_FAILED);
  3157. if (rval)
  3158. DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__));
  3159. return (rval);
  3160. }
  3161. void
  3162. qla2x00_update_fcports(scsi_qla_host_t *base_vha)
  3163. {
  3164. fc_port_t *fcport;
  3165. struct scsi_qla_host *tvp, *vha;
  3166. /* Go with deferred removal of rport references. */
  3167. list_for_each_entry_safe(vha, tvp, &base_vha->hw->vp_list, list)
  3168. list_for_each_entry(fcport, &vha->vp_fcports, list)
  3169. if (fcport && fcport->drport &&
  3170. atomic_read(&fcport->state) != FCS_UNCONFIGURED)
  3171. qla2x00_rport_del(fcport);
  3172. }
  3173. void
  3174. qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha)
  3175. {
  3176. struct qla_hw_data *ha = vha->hw;
  3177. struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev);
  3178. struct scsi_qla_host *tvp;
  3179. vha->flags.online = 0;
  3180. ha->flags.chip_reset_done = 0;
  3181. clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  3182. ha->qla_stats.total_isp_aborts++;
  3183. qla_printk(KERN_INFO, ha,
  3184. "Performing ISP error recovery - ha= %p.\n", ha);
  3185. /* Chip reset does not apply to 82XX */
  3186. if (!IS_QLA82XX(ha))
  3187. ha->isp_ops->reset_chip(vha);
  3188. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  3189. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  3190. atomic_set(&vha->loop_state, LOOP_DOWN);
  3191. qla2x00_mark_all_devices_lost(vha, 0);
  3192. list_for_each_entry_safe(vp, tvp, &base_vha->hw->vp_list, list)
  3193. qla2x00_mark_all_devices_lost(vp, 0);
  3194. } else {
  3195. if (!atomic_read(&vha->loop_down_timer))
  3196. atomic_set(&vha->loop_down_timer,
  3197. LOOP_DOWN_TIME);
  3198. }
  3199. /* Make sure for ISP 82XX IO DMA is complete */
  3200. if (IS_QLA82XX(ha))
  3201. qla82xx_wait_for_pending_commands(vha);
  3202. /* Requeue all commands in outstanding command list. */
  3203. qla2x00_abort_all_cmds(vha, DID_RESET << 16);
  3204. }
  3205. /*
  3206. * qla2x00_abort_isp
  3207. * Resets ISP and aborts all outstanding commands.
  3208. *
  3209. * Input:
  3210. * ha = adapter block pointer.
  3211. *
  3212. * Returns:
  3213. * 0 = success
  3214. */
  3215. int
  3216. qla2x00_abort_isp(scsi_qla_host_t *vha)
  3217. {
  3218. int rval;
  3219. uint8_t status = 0;
  3220. struct qla_hw_data *ha = vha->hw;
  3221. struct scsi_qla_host *vp;
  3222. struct scsi_qla_host *tvp;
  3223. struct req_que *req = ha->req_q_map[0];
  3224. if (vha->flags.online) {
  3225. qla2x00_abort_isp_cleanup(vha);
  3226. if (unlikely(pci_channel_offline(ha->pdev) &&
  3227. ha->flags.pci_channel_io_perm_failure)) {
  3228. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3229. status = 0;
  3230. return status;
  3231. }
  3232. ha->isp_ops->get_flash_version(vha, req->ring);
  3233. ha->isp_ops->nvram_config(vha);
  3234. if (!qla2x00_restart_isp(vha)) {
  3235. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3236. if (!atomic_read(&vha->loop_down_timer)) {
  3237. /*
  3238. * Issue marker command only when we are going
  3239. * to start the I/O .
  3240. */
  3241. vha->marker_needed = 1;
  3242. }
  3243. vha->flags.online = 1;
  3244. ha->isp_ops->enable_intrs(ha);
  3245. ha->isp_abort_cnt = 0;
  3246. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3247. if (IS_QLA81XX(ha))
  3248. qla2x00_get_fw_version(vha,
  3249. &ha->fw_major_version,
  3250. &ha->fw_minor_version,
  3251. &ha->fw_subminor_version,
  3252. &ha->fw_attributes, &ha->fw_memory_size,
  3253. ha->mpi_version, &ha->mpi_capabilities,
  3254. ha->phy_version);
  3255. if (ha->fce) {
  3256. ha->flags.fce_enabled = 1;
  3257. memset(ha->fce, 0,
  3258. fce_calc_size(ha->fce_bufs));
  3259. rval = qla2x00_enable_fce_trace(vha,
  3260. ha->fce_dma, ha->fce_bufs, ha->fce_mb,
  3261. &ha->fce_bufs);
  3262. if (rval) {
  3263. qla_printk(KERN_WARNING, ha,
  3264. "Unable to reinitialize FCE "
  3265. "(%d).\n", rval);
  3266. ha->flags.fce_enabled = 0;
  3267. }
  3268. }
  3269. if (ha->eft) {
  3270. memset(ha->eft, 0, EFT_SIZE);
  3271. rval = qla2x00_enable_eft_trace(vha,
  3272. ha->eft_dma, EFT_NUM_BUFFERS);
  3273. if (rval) {
  3274. qla_printk(KERN_WARNING, ha,
  3275. "Unable to reinitialize EFT "
  3276. "(%d).\n", rval);
  3277. }
  3278. }
  3279. } else { /* failed the ISP abort */
  3280. vha->flags.online = 1;
  3281. if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
  3282. if (ha->isp_abort_cnt == 0) {
  3283. qla_printk(KERN_WARNING, ha,
  3284. "ISP error recovery failed - "
  3285. "board disabled\n");
  3286. /*
  3287. * The next call disables the board
  3288. * completely.
  3289. */
  3290. ha->isp_ops->reset_adapter(vha);
  3291. vha->flags.online = 0;
  3292. clear_bit(ISP_ABORT_RETRY,
  3293. &vha->dpc_flags);
  3294. status = 0;
  3295. } else { /* schedule another ISP abort */
  3296. ha->isp_abort_cnt--;
  3297. DEBUG(printk("qla%ld: ISP abort - "
  3298. "retry remaining %d\n",
  3299. vha->host_no, ha->isp_abort_cnt));
  3300. status = 1;
  3301. }
  3302. } else {
  3303. ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
  3304. DEBUG(printk("qla2x00(%ld): ISP error recovery "
  3305. "- retrying (%d) more times\n",
  3306. vha->host_no, ha->isp_abort_cnt));
  3307. set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3308. status = 1;
  3309. }
  3310. }
  3311. }
  3312. if (!status) {
  3313. DEBUG(printk(KERN_INFO
  3314. "qla2x00_abort_isp(%ld): succeeded.\n",
  3315. vha->host_no));
  3316. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  3317. if (vp->vp_idx)
  3318. qla2x00_vp_abort_isp(vp);
  3319. }
  3320. } else {
  3321. qla_printk(KERN_INFO, ha,
  3322. "qla2x00_abort_isp: **** FAILED ****\n");
  3323. }
  3324. return(status);
  3325. }
  3326. /*
  3327. * qla2x00_restart_isp
  3328. * restarts the ISP after a reset
  3329. *
  3330. * Input:
  3331. * ha = adapter block pointer.
  3332. *
  3333. * Returns:
  3334. * 0 = success
  3335. */
  3336. static int
  3337. qla2x00_restart_isp(scsi_qla_host_t *vha)
  3338. {
  3339. int status = 0;
  3340. uint32_t wait_time;
  3341. struct qla_hw_data *ha = vha->hw;
  3342. struct req_que *req = ha->req_q_map[0];
  3343. struct rsp_que *rsp = ha->rsp_q_map[0];
  3344. /* If firmware needs to be loaded */
  3345. if (qla2x00_isp_firmware(vha)) {
  3346. vha->flags.online = 0;
  3347. status = ha->isp_ops->chip_diag(vha);
  3348. if (!status)
  3349. status = qla2x00_setup_chip(vha);
  3350. }
  3351. if (!status && !(status = qla2x00_init_rings(vha))) {
  3352. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3353. ha->flags.chip_reset_done = 1;
  3354. /* Initialize the queues in use */
  3355. qla25xx_init_queues(ha);
  3356. status = qla2x00_fw_ready(vha);
  3357. if (!status) {
  3358. DEBUG(printk("%s(): Start configure loop, "
  3359. "status = %d\n", __func__, status));
  3360. /* Issue a marker after FW becomes ready. */
  3361. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  3362. vha->flags.online = 1;
  3363. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  3364. wait_time = 256;
  3365. do {
  3366. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3367. qla2x00_configure_loop(vha);
  3368. wait_time--;
  3369. } while (!atomic_read(&vha->loop_down_timer) &&
  3370. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3371. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  3372. &vha->dpc_flags)));
  3373. }
  3374. /* if no cable then assume it's good */
  3375. if ((vha->device_flags & DFLG_NO_CABLE))
  3376. status = 0;
  3377. DEBUG(printk("%s(): Configure loop done, status = 0x%x\n",
  3378. __func__,
  3379. status));
  3380. }
  3381. return (status);
  3382. }
  3383. static int
  3384. qla25xx_init_queues(struct qla_hw_data *ha)
  3385. {
  3386. struct rsp_que *rsp = NULL;
  3387. struct req_que *req = NULL;
  3388. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  3389. int ret = -1;
  3390. int i;
  3391. for (i = 1; i < ha->max_rsp_queues; i++) {
  3392. rsp = ha->rsp_q_map[i];
  3393. if (rsp) {
  3394. rsp->options &= ~BIT_0;
  3395. ret = qla25xx_init_rsp_que(base_vha, rsp);
  3396. if (ret != QLA_SUCCESS)
  3397. DEBUG2_17(printk(KERN_WARNING
  3398. "%s Rsp que:%d init failed\n", __func__,
  3399. rsp->id));
  3400. else
  3401. DEBUG2_17(printk(KERN_INFO
  3402. "%s Rsp que:%d inited\n", __func__,
  3403. rsp->id));
  3404. }
  3405. }
  3406. for (i = 1; i < ha->max_req_queues; i++) {
  3407. req = ha->req_q_map[i];
  3408. if (req) {
  3409. /* Clear outstanding commands array. */
  3410. req->options &= ~BIT_0;
  3411. ret = qla25xx_init_req_que(base_vha, req);
  3412. if (ret != QLA_SUCCESS)
  3413. DEBUG2_17(printk(KERN_WARNING
  3414. "%s Req que:%d init failed\n", __func__,
  3415. req->id));
  3416. else
  3417. DEBUG2_17(printk(KERN_WARNING
  3418. "%s Req que:%d inited\n", __func__,
  3419. req->id));
  3420. }
  3421. }
  3422. return ret;
  3423. }
  3424. /*
  3425. * qla2x00_reset_adapter
  3426. * Reset adapter.
  3427. *
  3428. * Input:
  3429. * ha = adapter block pointer.
  3430. */
  3431. void
  3432. qla2x00_reset_adapter(scsi_qla_host_t *vha)
  3433. {
  3434. unsigned long flags = 0;
  3435. struct qla_hw_data *ha = vha->hw;
  3436. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  3437. vha->flags.online = 0;
  3438. ha->isp_ops->disable_intrs(ha);
  3439. spin_lock_irqsave(&ha->hardware_lock, flags);
  3440. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  3441. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3442. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  3443. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3444. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3445. }
  3446. void
  3447. qla24xx_reset_adapter(scsi_qla_host_t *vha)
  3448. {
  3449. unsigned long flags = 0;
  3450. struct qla_hw_data *ha = vha->hw;
  3451. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  3452. if (IS_QLA82XX(ha))
  3453. return;
  3454. vha->flags.online = 0;
  3455. ha->isp_ops->disable_intrs(ha);
  3456. spin_lock_irqsave(&ha->hardware_lock, flags);
  3457. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  3458. RD_REG_DWORD(&reg->hccr);
  3459. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  3460. RD_REG_DWORD(&reg->hccr);
  3461. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3462. if (IS_NOPOLLING_TYPE(ha))
  3463. ha->isp_ops->enable_intrs(ha);
  3464. }
  3465. /* On sparc systems, obtain port and node WWN from firmware
  3466. * properties.
  3467. */
  3468. static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
  3469. struct nvram_24xx *nv)
  3470. {
  3471. #ifdef CONFIG_SPARC
  3472. struct qla_hw_data *ha = vha->hw;
  3473. struct pci_dev *pdev = ha->pdev;
  3474. struct device_node *dp = pci_device_to_OF_node(pdev);
  3475. const u8 *val;
  3476. int len;
  3477. val = of_get_property(dp, "port-wwn", &len);
  3478. if (val && len >= WWN_SIZE)
  3479. memcpy(nv->port_name, val, WWN_SIZE);
  3480. val = of_get_property(dp, "node-wwn", &len);
  3481. if (val && len >= WWN_SIZE)
  3482. memcpy(nv->node_name, val, WWN_SIZE);
  3483. #endif
  3484. }
  3485. int
  3486. qla24xx_nvram_config(scsi_qla_host_t *vha)
  3487. {
  3488. int rval;
  3489. struct init_cb_24xx *icb;
  3490. struct nvram_24xx *nv;
  3491. uint32_t *dptr;
  3492. uint8_t *dptr1, *dptr2;
  3493. uint32_t chksum;
  3494. uint16_t cnt;
  3495. struct qla_hw_data *ha = vha->hw;
  3496. rval = QLA_SUCCESS;
  3497. icb = (struct init_cb_24xx *)ha->init_cb;
  3498. nv = ha->nvram;
  3499. /* Determine NVRAM starting address. */
  3500. if (ha->flags.port0) {
  3501. ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
  3502. ha->vpd_base = FA_NVRAM_VPD0_ADDR;
  3503. } else {
  3504. ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
  3505. ha->vpd_base = FA_NVRAM_VPD1_ADDR;
  3506. }
  3507. ha->nvram_size = sizeof(struct nvram_24xx);
  3508. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  3509. if (IS_QLA82XX(ha))
  3510. ha->vpd_size = FA_VPD_SIZE_82XX;
  3511. /* Get VPD data into cache */
  3512. ha->vpd = ha->nvram + VPD_OFFSET;
  3513. ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
  3514. ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
  3515. /* Get NVRAM data into cache and calculate checksum. */
  3516. dptr = (uint32_t *)nv;
  3517. ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
  3518. ha->nvram_size);
  3519. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  3520. chksum += le32_to_cpu(*dptr++);
  3521. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  3522. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  3523. /* Bad NVRAM data, set defaults parameters. */
  3524. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  3525. || nv->id[3] != ' ' ||
  3526. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  3527. /* Reset NVRAM data. */
  3528. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  3529. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  3530. le16_to_cpu(nv->nvram_version));
  3531. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  3532. "invalid -- WWPN) defaults.\n");
  3533. /*
  3534. * Set default initialization control block.
  3535. */
  3536. memset(nv, 0, ha->nvram_size);
  3537. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  3538. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  3539. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  3540. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3541. nv->exchange_count = __constant_cpu_to_le16(0);
  3542. nv->hard_address = __constant_cpu_to_le16(124);
  3543. nv->port_name[0] = 0x21;
  3544. nv->port_name[1] = 0x00 + ha->port_no;
  3545. nv->port_name[2] = 0x00;
  3546. nv->port_name[3] = 0xe0;
  3547. nv->port_name[4] = 0x8b;
  3548. nv->port_name[5] = 0x1c;
  3549. nv->port_name[6] = 0x55;
  3550. nv->port_name[7] = 0x86;
  3551. nv->node_name[0] = 0x20;
  3552. nv->node_name[1] = 0x00;
  3553. nv->node_name[2] = 0x00;
  3554. nv->node_name[3] = 0xe0;
  3555. nv->node_name[4] = 0x8b;
  3556. nv->node_name[5] = 0x1c;
  3557. nv->node_name[6] = 0x55;
  3558. nv->node_name[7] = 0x86;
  3559. qla24xx_nvram_wwn_from_ofw(vha, nv);
  3560. nv->login_retry_count = __constant_cpu_to_le16(8);
  3561. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  3562. nv->login_timeout = __constant_cpu_to_le16(0);
  3563. nv->firmware_options_1 =
  3564. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  3565. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  3566. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  3567. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  3568. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  3569. nv->efi_parameters = __constant_cpu_to_le32(0);
  3570. nv->reset_delay = 5;
  3571. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  3572. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  3573. nv->link_down_timeout = __constant_cpu_to_le16(30);
  3574. rval = 1;
  3575. }
  3576. /* Reset Initialization control block */
  3577. memset(icb, 0, ha->init_cb_size);
  3578. /* Copy 1st segment. */
  3579. dptr1 = (uint8_t *)icb;
  3580. dptr2 = (uint8_t *)&nv->version;
  3581. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  3582. while (cnt--)
  3583. *dptr1++ = *dptr2++;
  3584. icb->login_retry_count = nv->login_retry_count;
  3585. icb->link_down_on_nos = nv->link_down_on_nos;
  3586. /* Copy 2nd segment. */
  3587. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  3588. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  3589. cnt = (uint8_t *)&icb->reserved_3 -
  3590. (uint8_t *)&icb->interrupt_delay_timer;
  3591. while (cnt--)
  3592. *dptr1++ = *dptr2++;
  3593. /*
  3594. * Setup driver NVRAM options.
  3595. */
  3596. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  3597. "QLA2462");
  3598. /* Use alternate WWN? */
  3599. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  3600. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  3601. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  3602. }
  3603. /* Prepare nodename */
  3604. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  3605. /*
  3606. * Firmware will apply the following mask if the nodename was
  3607. * not provided.
  3608. */
  3609. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  3610. icb->node_name[0] &= 0xF0;
  3611. }
  3612. /* Set host adapter parameters. */
  3613. ha->flags.disable_risc_code_load = 0;
  3614. ha->flags.enable_lip_reset = 0;
  3615. ha->flags.enable_lip_full_login =
  3616. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  3617. ha->flags.enable_target_reset =
  3618. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  3619. ha->flags.enable_led_scheme = 0;
  3620. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  3621. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  3622. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  3623. memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
  3624. sizeof(ha->fw_seriallink_options24));
  3625. /* save HBA serial number */
  3626. ha->serial0 = icb->port_name[5];
  3627. ha->serial1 = icb->port_name[6];
  3628. ha->serial2 = icb->port_name[7];
  3629. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  3630. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  3631. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3632. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  3633. /* Set minimum login_timeout to 4 seconds. */
  3634. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  3635. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  3636. if (le16_to_cpu(nv->login_timeout) < 4)
  3637. nv->login_timeout = __constant_cpu_to_le16(4);
  3638. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  3639. icb->login_timeout = nv->login_timeout;
  3640. /* Set minimum RATOV to 100 tenths of a second. */
  3641. ha->r_a_tov = 100;
  3642. ha->loop_reset_delay = nv->reset_delay;
  3643. /* Link Down Timeout = 0:
  3644. *
  3645. * When Port Down timer expires we will start returning
  3646. * I/O's to OS with "DID_NO_CONNECT".
  3647. *
  3648. * Link Down Timeout != 0:
  3649. *
  3650. * The driver waits for the link to come up after link down
  3651. * before returning I/Os to OS with "DID_NO_CONNECT".
  3652. */
  3653. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  3654. ha->loop_down_abort_time =
  3655. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  3656. } else {
  3657. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  3658. ha->loop_down_abort_time =
  3659. (LOOP_DOWN_TIME - ha->link_down_timeout);
  3660. }
  3661. /* Need enough time to try and get the port back. */
  3662. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  3663. if (qlport_down_retry)
  3664. ha->port_down_retry_count = qlport_down_retry;
  3665. /* Set login_retry_count */
  3666. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  3667. if (ha->port_down_retry_count ==
  3668. le16_to_cpu(nv->port_down_retry_count) &&
  3669. ha->port_down_retry_count > 3)
  3670. ha->login_retry_count = ha->port_down_retry_count;
  3671. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  3672. ha->login_retry_count = ha->port_down_retry_count;
  3673. if (ql2xloginretrycount)
  3674. ha->login_retry_count = ql2xloginretrycount;
  3675. /* Enable ZIO. */
  3676. if (!vha->flags.init_done) {
  3677. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  3678. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  3679. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  3680. le16_to_cpu(icb->interrupt_delay_timer): 2;
  3681. }
  3682. icb->firmware_options_2 &= __constant_cpu_to_le32(
  3683. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  3684. vha->flags.process_response_queue = 0;
  3685. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  3686. ha->zio_mode = QLA_ZIO_MODE_6;
  3687. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  3688. "(%d us).\n", vha->host_no, ha->zio_mode,
  3689. ha->zio_timer * 100));
  3690. qla_printk(KERN_INFO, ha,
  3691. "ZIO mode %d enabled; timer delay (%d us).\n",
  3692. ha->zio_mode, ha->zio_timer * 100);
  3693. icb->firmware_options_2 |= cpu_to_le32(
  3694. (uint32_t)ha->zio_mode);
  3695. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  3696. vha->flags.process_response_queue = 1;
  3697. }
  3698. if (rval) {
  3699. DEBUG2_3(printk(KERN_WARNING
  3700. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  3701. }
  3702. return (rval);
  3703. }
  3704. static int
  3705. qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
  3706. uint32_t faddr)
  3707. {
  3708. int rval = QLA_SUCCESS;
  3709. int segments, fragment;
  3710. uint32_t *dcode, dlen;
  3711. uint32_t risc_addr;
  3712. uint32_t risc_size;
  3713. uint32_t i;
  3714. struct qla_hw_data *ha = vha->hw;
  3715. struct req_que *req = ha->req_q_map[0];
  3716. qla_printk(KERN_INFO, ha,
  3717. "FW: Loading from flash (%x)...\n", faddr);
  3718. rval = QLA_SUCCESS;
  3719. segments = FA_RISC_CODE_SEGMENTS;
  3720. dcode = (uint32_t *)req->ring;
  3721. *srisc_addr = 0;
  3722. /* Validate firmware image by checking version. */
  3723. qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
  3724. for (i = 0; i < 4; i++)
  3725. dcode[i] = be32_to_cpu(dcode[i]);
  3726. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3727. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3728. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3729. dcode[3] == 0)) {
  3730. qla_printk(KERN_WARNING, ha,
  3731. "Unable to verify integrity of flash firmware image!\n");
  3732. qla_printk(KERN_WARNING, ha,
  3733. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3734. dcode[1], dcode[2], dcode[3]);
  3735. return QLA_FUNCTION_FAILED;
  3736. }
  3737. while (segments && rval == QLA_SUCCESS) {
  3738. /* Read segment's load information. */
  3739. qla24xx_read_flash_data(vha, dcode, faddr, 4);
  3740. risc_addr = be32_to_cpu(dcode[2]);
  3741. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3742. risc_size = be32_to_cpu(dcode[3]);
  3743. fragment = 0;
  3744. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3745. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3746. if (dlen > risc_size)
  3747. dlen = risc_size;
  3748. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3749. "addr %x, number of dwords 0x%x, offset 0x%x.\n",
  3750. vha->host_no, risc_addr, dlen, faddr));
  3751. qla24xx_read_flash_data(vha, dcode, faddr, dlen);
  3752. for (i = 0; i < dlen; i++)
  3753. dcode[i] = swab32(dcode[i]);
  3754. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3755. dlen);
  3756. if (rval) {
  3757. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3758. "segment %d of firmware\n", vha->host_no,
  3759. fragment));
  3760. qla_printk(KERN_WARNING, ha,
  3761. "[ERROR] Failed to load segment %d of "
  3762. "firmware\n", fragment);
  3763. break;
  3764. }
  3765. faddr += dlen;
  3766. risc_addr += dlen;
  3767. risc_size -= dlen;
  3768. fragment++;
  3769. }
  3770. /* Next segment. */
  3771. segments--;
  3772. }
  3773. return rval;
  3774. }
  3775. #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/"
  3776. int
  3777. qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3778. {
  3779. int rval;
  3780. int i, fragment;
  3781. uint16_t *wcode, *fwcode;
  3782. uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
  3783. struct fw_blob *blob;
  3784. struct qla_hw_data *ha = vha->hw;
  3785. struct req_que *req = ha->req_q_map[0];
  3786. /* Load firmware blob. */
  3787. blob = qla2x00_request_firmware(vha);
  3788. if (!blob) {
  3789. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3790. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3791. "from: " QLA_FW_URL ".\n");
  3792. return QLA_FUNCTION_FAILED;
  3793. }
  3794. rval = QLA_SUCCESS;
  3795. wcode = (uint16_t *)req->ring;
  3796. *srisc_addr = 0;
  3797. fwcode = (uint16_t *)blob->fw->data;
  3798. fwclen = 0;
  3799. /* Validate firmware image by checking version. */
  3800. if (blob->fw->size < 8 * sizeof(uint16_t)) {
  3801. qla_printk(KERN_WARNING, ha,
  3802. "Unable to verify integrity of firmware image (%Zd)!\n",
  3803. blob->fw->size);
  3804. goto fail_fw_integrity;
  3805. }
  3806. for (i = 0; i < 4; i++)
  3807. wcode[i] = be16_to_cpu(fwcode[i + 4]);
  3808. if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
  3809. wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
  3810. wcode[2] == 0 && wcode[3] == 0)) {
  3811. qla_printk(KERN_WARNING, ha,
  3812. "Unable to verify integrity of firmware image!\n");
  3813. qla_printk(KERN_WARNING, ha,
  3814. "Firmware data: %04x %04x %04x %04x!\n", wcode[0],
  3815. wcode[1], wcode[2], wcode[3]);
  3816. goto fail_fw_integrity;
  3817. }
  3818. seg = blob->segs;
  3819. while (*seg && rval == QLA_SUCCESS) {
  3820. risc_addr = *seg;
  3821. *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
  3822. risc_size = be16_to_cpu(fwcode[3]);
  3823. /* Validate firmware image size. */
  3824. fwclen += risc_size * sizeof(uint16_t);
  3825. if (blob->fw->size < fwclen) {
  3826. qla_printk(KERN_WARNING, ha,
  3827. "Unable to verify integrity of firmware image "
  3828. "(%Zd)!\n", blob->fw->size);
  3829. goto fail_fw_integrity;
  3830. }
  3831. fragment = 0;
  3832. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3833. wlen = (uint16_t)(ha->fw_transfer_size >> 1);
  3834. if (wlen > risc_size)
  3835. wlen = risc_size;
  3836. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3837. "addr %x, number of words 0x%x.\n", vha->host_no,
  3838. risc_addr, wlen));
  3839. for (i = 0; i < wlen; i++)
  3840. wcode[i] = swab16(fwcode[i]);
  3841. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3842. wlen);
  3843. if (rval) {
  3844. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3845. "segment %d of firmware\n", vha->host_no,
  3846. fragment));
  3847. qla_printk(KERN_WARNING, ha,
  3848. "[ERROR] Failed to load segment %d of "
  3849. "firmware\n", fragment);
  3850. break;
  3851. }
  3852. fwcode += wlen;
  3853. risc_addr += wlen;
  3854. risc_size -= wlen;
  3855. fragment++;
  3856. }
  3857. /* Next segment. */
  3858. seg++;
  3859. }
  3860. return rval;
  3861. fail_fw_integrity:
  3862. return QLA_FUNCTION_FAILED;
  3863. }
  3864. static int
  3865. qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3866. {
  3867. int rval;
  3868. int segments, fragment;
  3869. uint32_t *dcode, dlen;
  3870. uint32_t risc_addr;
  3871. uint32_t risc_size;
  3872. uint32_t i;
  3873. struct fw_blob *blob;
  3874. uint32_t *fwcode, fwclen;
  3875. struct qla_hw_data *ha = vha->hw;
  3876. struct req_que *req = ha->req_q_map[0];
  3877. /* Load firmware blob. */
  3878. blob = qla2x00_request_firmware(vha);
  3879. if (!blob) {
  3880. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3881. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3882. "from: " QLA_FW_URL ".\n");
  3883. return QLA_FUNCTION_FAILED;
  3884. }
  3885. qla_printk(KERN_INFO, ha,
  3886. "FW: Loading via request-firmware...\n");
  3887. rval = QLA_SUCCESS;
  3888. segments = FA_RISC_CODE_SEGMENTS;
  3889. dcode = (uint32_t *)req->ring;
  3890. *srisc_addr = 0;
  3891. fwcode = (uint32_t *)blob->fw->data;
  3892. fwclen = 0;
  3893. /* Validate firmware image by checking version. */
  3894. if (blob->fw->size < 8 * sizeof(uint32_t)) {
  3895. qla_printk(KERN_WARNING, ha,
  3896. "Unable to verify integrity of firmware image (%Zd)!\n",
  3897. blob->fw->size);
  3898. goto fail_fw_integrity;
  3899. }
  3900. for (i = 0; i < 4; i++)
  3901. dcode[i] = be32_to_cpu(fwcode[i + 4]);
  3902. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3903. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3904. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3905. dcode[3] == 0)) {
  3906. qla_printk(KERN_WARNING, ha,
  3907. "Unable to verify integrity of firmware image!\n");
  3908. qla_printk(KERN_WARNING, ha,
  3909. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3910. dcode[1], dcode[2], dcode[3]);
  3911. goto fail_fw_integrity;
  3912. }
  3913. while (segments && rval == QLA_SUCCESS) {
  3914. risc_addr = be32_to_cpu(fwcode[2]);
  3915. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3916. risc_size = be32_to_cpu(fwcode[3]);
  3917. /* Validate firmware image size. */
  3918. fwclen += risc_size * sizeof(uint32_t);
  3919. if (blob->fw->size < fwclen) {
  3920. qla_printk(KERN_WARNING, ha,
  3921. "Unable to verify integrity of firmware image "
  3922. "(%Zd)!\n", blob->fw->size);
  3923. goto fail_fw_integrity;
  3924. }
  3925. fragment = 0;
  3926. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3927. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3928. if (dlen > risc_size)
  3929. dlen = risc_size;
  3930. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3931. "addr %x, number of dwords 0x%x.\n", vha->host_no,
  3932. risc_addr, dlen));
  3933. for (i = 0; i < dlen; i++)
  3934. dcode[i] = swab32(fwcode[i]);
  3935. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3936. dlen);
  3937. if (rval) {
  3938. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3939. "segment %d of firmware\n", vha->host_no,
  3940. fragment));
  3941. qla_printk(KERN_WARNING, ha,
  3942. "[ERROR] Failed to load segment %d of "
  3943. "firmware\n", fragment);
  3944. break;
  3945. }
  3946. fwcode += dlen;
  3947. risc_addr += dlen;
  3948. risc_size -= dlen;
  3949. fragment++;
  3950. }
  3951. /* Next segment. */
  3952. segments--;
  3953. }
  3954. return rval;
  3955. fail_fw_integrity:
  3956. return QLA_FUNCTION_FAILED;
  3957. }
  3958. int
  3959. qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3960. {
  3961. int rval;
  3962. if (ql2xfwloadbin == 1)
  3963. return qla81xx_load_risc(vha, srisc_addr);
  3964. /*
  3965. * FW Load priority:
  3966. * 1) Firmware via request-firmware interface (.bin file).
  3967. * 2) Firmware residing in flash.
  3968. */
  3969. rval = qla24xx_load_risc_blob(vha, srisc_addr);
  3970. if (rval == QLA_SUCCESS)
  3971. return rval;
  3972. return qla24xx_load_risc_flash(vha, srisc_addr,
  3973. vha->hw->flt_region_fw);
  3974. }
  3975. int
  3976. qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3977. {
  3978. int rval;
  3979. struct qla_hw_data *ha = vha->hw;
  3980. if (ql2xfwloadbin == 2)
  3981. goto try_blob_fw;
  3982. /*
  3983. * FW Load priority:
  3984. * 1) Firmware residing in flash.
  3985. * 2) Firmware via request-firmware interface (.bin file).
  3986. * 3) Golden-Firmware residing in flash -- limited operation.
  3987. */
  3988. rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
  3989. if (rval == QLA_SUCCESS)
  3990. return rval;
  3991. try_blob_fw:
  3992. rval = qla24xx_load_risc_blob(vha, srisc_addr);
  3993. if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw)
  3994. return rval;
  3995. qla_printk(KERN_ERR, ha,
  3996. "FW: Attempting to fallback to golden firmware...\n");
  3997. rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
  3998. if (rval != QLA_SUCCESS)
  3999. return rval;
  4000. qla_printk(KERN_ERR, ha,
  4001. "FW: Please update operational firmware...\n");
  4002. ha->flags.running_gold_fw = 1;
  4003. return rval;
  4004. }
  4005. void
  4006. qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
  4007. {
  4008. int ret, retries;
  4009. struct qla_hw_data *ha = vha->hw;
  4010. if (ha->flags.pci_channel_io_perm_failure)
  4011. return;
  4012. if (!IS_FWI2_CAPABLE(ha))
  4013. return;
  4014. if (!ha->fw_major_version)
  4015. return;
  4016. ret = qla2x00_stop_firmware(vha);
  4017. for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
  4018. ret != QLA_INVALID_COMMAND && retries ; retries--) {
  4019. ha->isp_ops->reset_chip(vha);
  4020. if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
  4021. continue;
  4022. if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
  4023. continue;
  4024. qla_printk(KERN_INFO, ha,
  4025. "Attempting retry of stop-firmware command...\n");
  4026. ret = qla2x00_stop_firmware(vha);
  4027. }
  4028. }
  4029. int
  4030. qla24xx_configure_vhba(scsi_qla_host_t *vha)
  4031. {
  4032. int rval = QLA_SUCCESS;
  4033. uint16_t mb[MAILBOX_REGISTER_COUNT];
  4034. struct qla_hw_data *ha = vha->hw;
  4035. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  4036. struct req_que *req;
  4037. struct rsp_que *rsp;
  4038. if (!vha->vp_idx)
  4039. return -EINVAL;
  4040. rval = qla2x00_fw_ready(base_vha);
  4041. if (ha->flags.cpu_affinity_enabled)
  4042. req = ha->req_q_map[0];
  4043. else
  4044. req = vha->req;
  4045. rsp = req->rsp;
  4046. if (rval == QLA_SUCCESS) {
  4047. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  4048. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  4049. }
  4050. vha->flags.management_server_logged_in = 0;
  4051. /* Login to SNS first */
  4052. ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, BIT_1);
  4053. if (mb[0] != MBS_COMMAND_COMPLETE) {
  4054. DEBUG15(qla_printk(KERN_INFO, ha,
  4055. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  4056. "mb[2]=%x mb[6]=%x mb[7]=%x\n", NPH_SNS,
  4057. mb[0], mb[1], mb[2], mb[6], mb[7]));
  4058. return (QLA_FUNCTION_FAILED);
  4059. }
  4060. atomic_set(&vha->loop_down_timer, 0);
  4061. atomic_set(&vha->loop_state, LOOP_UP);
  4062. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  4063. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  4064. rval = qla2x00_loop_resync(base_vha);
  4065. return rval;
  4066. }
  4067. /* 84XX Support **************************************************************/
  4068. static LIST_HEAD(qla_cs84xx_list);
  4069. static DEFINE_MUTEX(qla_cs84xx_mutex);
  4070. static struct qla_chip_state_84xx *
  4071. qla84xx_get_chip(struct scsi_qla_host *vha)
  4072. {
  4073. struct qla_chip_state_84xx *cs84xx;
  4074. struct qla_hw_data *ha = vha->hw;
  4075. mutex_lock(&qla_cs84xx_mutex);
  4076. /* Find any shared 84xx chip. */
  4077. list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
  4078. if (cs84xx->bus == ha->pdev->bus) {
  4079. kref_get(&cs84xx->kref);
  4080. goto done;
  4081. }
  4082. }
  4083. cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
  4084. if (!cs84xx)
  4085. goto done;
  4086. kref_init(&cs84xx->kref);
  4087. spin_lock_init(&cs84xx->access_lock);
  4088. mutex_init(&cs84xx->fw_update_mutex);
  4089. cs84xx->bus = ha->pdev->bus;
  4090. list_add_tail(&cs84xx->list, &qla_cs84xx_list);
  4091. done:
  4092. mutex_unlock(&qla_cs84xx_mutex);
  4093. return cs84xx;
  4094. }
  4095. static void
  4096. __qla84xx_chip_release(struct kref *kref)
  4097. {
  4098. struct qla_chip_state_84xx *cs84xx =
  4099. container_of(kref, struct qla_chip_state_84xx, kref);
  4100. mutex_lock(&qla_cs84xx_mutex);
  4101. list_del(&cs84xx->list);
  4102. mutex_unlock(&qla_cs84xx_mutex);
  4103. kfree(cs84xx);
  4104. }
  4105. void
  4106. qla84xx_put_chip(struct scsi_qla_host *vha)
  4107. {
  4108. struct qla_hw_data *ha = vha->hw;
  4109. if (ha->cs84xx)
  4110. kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
  4111. }
  4112. static int
  4113. qla84xx_init_chip(scsi_qla_host_t *vha)
  4114. {
  4115. int rval;
  4116. uint16_t status[2];
  4117. struct qla_hw_data *ha = vha->hw;
  4118. mutex_lock(&ha->cs84xx->fw_update_mutex);
  4119. rval = qla84xx_verify_chip(vha, status);
  4120. mutex_unlock(&ha->cs84xx->fw_update_mutex);
  4121. return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
  4122. QLA_SUCCESS;
  4123. }
  4124. /* 81XX Support **************************************************************/
  4125. int
  4126. qla81xx_nvram_config(scsi_qla_host_t *vha)
  4127. {
  4128. int rval;
  4129. struct init_cb_81xx *icb;
  4130. struct nvram_81xx *nv;
  4131. uint32_t *dptr;
  4132. uint8_t *dptr1, *dptr2;
  4133. uint32_t chksum;
  4134. uint16_t cnt;
  4135. struct qla_hw_data *ha = vha->hw;
  4136. rval = QLA_SUCCESS;
  4137. icb = (struct init_cb_81xx *)ha->init_cb;
  4138. nv = ha->nvram;
  4139. /* Determine NVRAM starting address. */
  4140. ha->nvram_size = sizeof(struct nvram_81xx);
  4141. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  4142. /* Get VPD data into cache */
  4143. ha->vpd = ha->nvram + VPD_OFFSET;
  4144. ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2,
  4145. ha->vpd_size);
  4146. /* Get NVRAM data into cache and calculate checksum. */
  4147. ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2,
  4148. ha->nvram_size);
  4149. dptr = (uint32_t *)nv;
  4150. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  4151. chksum += le32_to_cpu(*dptr++);
  4152. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  4153. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  4154. /* Bad NVRAM data, set defaults parameters. */
  4155. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  4156. || nv->id[3] != ' ' ||
  4157. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  4158. /* Reset NVRAM data. */
  4159. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  4160. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  4161. le16_to_cpu(nv->nvram_version));
  4162. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  4163. "invalid -- WWPN) defaults.\n");
  4164. /*
  4165. * Set default initialization control block.
  4166. */
  4167. memset(nv, 0, ha->nvram_size);
  4168. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  4169. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  4170. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  4171. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  4172. nv->exchange_count = __constant_cpu_to_le16(0);
  4173. nv->port_name[0] = 0x21;
  4174. nv->port_name[1] = 0x00 + ha->port_no;
  4175. nv->port_name[2] = 0x00;
  4176. nv->port_name[3] = 0xe0;
  4177. nv->port_name[4] = 0x8b;
  4178. nv->port_name[5] = 0x1c;
  4179. nv->port_name[6] = 0x55;
  4180. nv->port_name[7] = 0x86;
  4181. nv->node_name[0] = 0x20;
  4182. nv->node_name[1] = 0x00;
  4183. nv->node_name[2] = 0x00;
  4184. nv->node_name[3] = 0xe0;
  4185. nv->node_name[4] = 0x8b;
  4186. nv->node_name[5] = 0x1c;
  4187. nv->node_name[6] = 0x55;
  4188. nv->node_name[7] = 0x86;
  4189. nv->login_retry_count = __constant_cpu_to_le16(8);
  4190. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  4191. nv->login_timeout = __constant_cpu_to_le16(0);
  4192. nv->firmware_options_1 =
  4193. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  4194. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  4195. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  4196. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  4197. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  4198. nv->efi_parameters = __constant_cpu_to_le32(0);
  4199. nv->reset_delay = 5;
  4200. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  4201. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  4202. nv->link_down_timeout = __constant_cpu_to_le16(30);
  4203. nv->enode_mac[0] = 0x00;
  4204. nv->enode_mac[1] = 0x02;
  4205. nv->enode_mac[2] = 0x03;
  4206. nv->enode_mac[3] = 0x04;
  4207. nv->enode_mac[4] = 0x05;
  4208. nv->enode_mac[5] = 0x06 + ha->port_no;
  4209. rval = 1;
  4210. }
  4211. /* Reset Initialization control block */
  4212. memset(icb, 0, sizeof(struct init_cb_81xx));
  4213. /* Copy 1st segment. */
  4214. dptr1 = (uint8_t *)icb;
  4215. dptr2 = (uint8_t *)&nv->version;
  4216. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  4217. while (cnt--)
  4218. *dptr1++ = *dptr2++;
  4219. icb->login_retry_count = nv->login_retry_count;
  4220. /* Copy 2nd segment. */
  4221. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  4222. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  4223. cnt = (uint8_t *)&icb->reserved_5 -
  4224. (uint8_t *)&icb->interrupt_delay_timer;
  4225. while (cnt--)
  4226. *dptr1++ = *dptr2++;
  4227. memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
  4228. /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
  4229. if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
  4230. icb->enode_mac[0] = 0x01;
  4231. icb->enode_mac[1] = 0x02;
  4232. icb->enode_mac[2] = 0x03;
  4233. icb->enode_mac[3] = 0x04;
  4234. icb->enode_mac[4] = 0x05;
  4235. icb->enode_mac[5] = 0x06 + ha->port_no;
  4236. }
  4237. /* Use extended-initialization control block. */
  4238. memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
  4239. /*
  4240. * Setup driver NVRAM options.
  4241. */
  4242. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  4243. "QLE8XXX");
  4244. /* Use alternate WWN? */
  4245. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  4246. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  4247. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  4248. }
  4249. /* Prepare nodename */
  4250. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  4251. /*
  4252. * Firmware will apply the following mask if the nodename was
  4253. * not provided.
  4254. */
  4255. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  4256. icb->node_name[0] &= 0xF0;
  4257. }
  4258. /* Set host adapter parameters. */
  4259. ha->flags.disable_risc_code_load = 0;
  4260. ha->flags.enable_lip_reset = 0;
  4261. ha->flags.enable_lip_full_login =
  4262. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  4263. ha->flags.enable_target_reset =
  4264. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  4265. ha->flags.enable_led_scheme = 0;
  4266. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  4267. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  4268. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  4269. /* save HBA serial number */
  4270. ha->serial0 = icb->port_name[5];
  4271. ha->serial1 = icb->port_name[6];
  4272. ha->serial2 = icb->port_name[7];
  4273. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  4274. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  4275. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  4276. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  4277. /* Set minimum login_timeout to 4 seconds. */
  4278. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  4279. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  4280. if (le16_to_cpu(nv->login_timeout) < 4)
  4281. nv->login_timeout = __constant_cpu_to_le16(4);
  4282. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  4283. icb->login_timeout = nv->login_timeout;
  4284. /* Set minimum RATOV to 100 tenths of a second. */
  4285. ha->r_a_tov = 100;
  4286. ha->loop_reset_delay = nv->reset_delay;
  4287. /* Link Down Timeout = 0:
  4288. *
  4289. * When Port Down timer expires we will start returning
  4290. * I/O's to OS with "DID_NO_CONNECT".
  4291. *
  4292. * Link Down Timeout != 0:
  4293. *
  4294. * The driver waits for the link to come up after link down
  4295. * before returning I/Os to OS with "DID_NO_CONNECT".
  4296. */
  4297. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  4298. ha->loop_down_abort_time =
  4299. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  4300. } else {
  4301. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  4302. ha->loop_down_abort_time =
  4303. (LOOP_DOWN_TIME - ha->link_down_timeout);
  4304. }
  4305. /* Need enough time to try and get the port back. */
  4306. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  4307. if (qlport_down_retry)
  4308. ha->port_down_retry_count = qlport_down_retry;
  4309. /* Set login_retry_count */
  4310. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  4311. if (ha->port_down_retry_count ==
  4312. le16_to_cpu(nv->port_down_retry_count) &&
  4313. ha->port_down_retry_count > 3)
  4314. ha->login_retry_count = ha->port_down_retry_count;
  4315. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  4316. ha->login_retry_count = ha->port_down_retry_count;
  4317. if (ql2xloginretrycount)
  4318. ha->login_retry_count = ql2xloginretrycount;
  4319. /* Enable ZIO. */
  4320. if (!vha->flags.init_done) {
  4321. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  4322. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  4323. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  4324. le16_to_cpu(icb->interrupt_delay_timer): 2;
  4325. }
  4326. icb->firmware_options_2 &= __constant_cpu_to_le32(
  4327. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  4328. vha->flags.process_response_queue = 0;
  4329. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  4330. ha->zio_mode = QLA_ZIO_MODE_6;
  4331. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  4332. "(%d us).\n", vha->host_no, ha->zio_mode,
  4333. ha->zio_timer * 100));
  4334. qla_printk(KERN_INFO, ha,
  4335. "ZIO mode %d enabled; timer delay (%d us).\n",
  4336. ha->zio_mode, ha->zio_timer * 100);
  4337. icb->firmware_options_2 |= cpu_to_le32(
  4338. (uint32_t)ha->zio_mode);
  4339. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  4340. vha->flags.process_response_queue = 1;
  4341. }
  4342. if (rval) {
  4343. DEBUG2_3(printk(KERN_WARNING
  4344. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  4345. }
  4346. return (rval);
  4347. }
  4348. int
  4349. qla82xx_restart_isp(scsi_qla_host_t *vha)
  4350. {
  4351. int status, rval;
  4352. uint32_t wait_time;
  4353. struct qla_hw_data *ha = vha->hw;
  4354. struct req_que *req = ha->req_q_map[0];
  4355. struct rsp_que *rsp = ha->rsp_q_map[0];
  4356. struct scsi_qla_host *vp;
  4357. struct scsi_qla_host *tvp;
  4358. status = qla2x00_init_rings(vha);
  4359. if (!status) {
  4360. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  4361. ha->flags.chip_reset_done = 1;
  4362. status = qla2x00_fw_ready(vha);
  4363. if (!status) {
  4364. qla_printk(KERN_INFO, ha,
  4365. "%s(): Start configure loop, "
  4366. "status = %d\n", __func__, status);
  4367. /* Issue a marker after FW becomes ready. */
  4368. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  4369. vha->flags.online = 1;
  4370. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  4371. wait_time = 256;
  4372. do {
  4373. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  4374. qla2x00_configure_loop(vha);
  4375. wait_time--;
  4376. } while (!atomic_read(&vha->loop_down_timer) &&
  4377. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) &&
  4378. wait_time &&
  4379. (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)));
  4380. }
  4381. /* if no cable then assume it's good */
  4382. if ((vha->device_flags & DFLG_NO_CABLE))
  4383. status = 0;
  4384. qla_printk(KERN_INFO, ha,
  4385. "%s(): Configure loop done, status = 0x%x\n",
  4386. __func__, status);
  4387. }
  4388. if (!status) {
  4389. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  4390. if (!atomic_read(&vha->loop_down_timer)) {
  4391. /*
  4392. * Issue marker command only when we are going
  4393. * to start the I/O .
  4394. */
  4395. vha->marker_needed = 1;
  4396. }
  4397. vha->flags.online = 1;
  4398. ha->isp_ops->enable_intrs(ha);
  4399. ha->isp_abort_cnt = 0;
  4400. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  4401. if (ha->fce) {
  4402. ha->flags.fce_enabled = 1;
  4403. memset(ha->fce, 0,
  4404. fce_calc_size(ha->fce_bufs));
  4405. rval = qla2x00_enable_fce_trace(vha,
  4406. ha->fce_dma, ha->fce_bufs, ha->fce_mb,
  4407. &ha->fce_bufs);
  4408. if (rval) {
  4409. qla_printk(KERN_WARNING, ha,
  4410. "Unable to reinitialize FCE "
  4411. "(%d).\n", rval);
  4412. ha->flags.fce_enabled = 0;
  4413. }
  4414. }
  4415. if (ha->eft) {
  4416. memset(ha->eft, 0, EFT_SIZE);
  4417. rval = qla2x00_enable_eft_trace(vha,
  4418. ha->eft_dma, EFT_NUM_BUFFERS);
  4419. if (rval) {
  4420. qla_printk(KERN_WARNING, ha,
  4421. "Unable to reinitialize EFT "
  4422. "(%d).\n", rval);
  4423. }
  4424. }
  4425. } else { /* failed the ISP abort */
  4426. vha->flags.online = 1;
  4427. if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
  4428. if (ha->isp_abort_cnt == 0) {
  4429. qla_printk(KERN_WARNING, ha,
  4430. "ISP error recovery failed - "
  4431. "board disabled\n");
  4432. /*
  4433. * The next call disables the board
  4434. * completely.
  4435. */
  4436. ha->isp_ops->reset_adapter(vha);
  4437. vha->flags.online = 0;
  4438. clear_bit(ISP_ABORT_RETRY,
  4439. &vha->dpc_flags);
  4440. status = 0;
  4441. } else { /* schedule another ISP abort */
  4442. ha->isp_abort_cnt--;
  4443. qla_printk(KERN_INFO, ha,
  4444. "qla%ld: ISP abort - "
  4445. "retry remaining %d\n",
  4446. vha->host_no, ha->isp_abort_cnt);
  4447. status = 1;
  4448. }
  4449. } else {
  4450. ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
  4451. qla_printk(KERN_INFO, ha,
  4452. "(%ld): ISP error recovery "
  4453. "- retrying (%d) more times\n",
  4454. vha->host_no, ha->isp_abort_cnt);
  4455. set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  4456. status = 1;
  4457. }
  4458. }
  4459. if (!status) {
  4460. DEBUG(printk(KERN_INFO
  4461. "qla82xx_restart_isp(%ld): succeeded.\n",
  4462. vha->host_no));
  4463. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  4464. if (vp->vp_idx)
  4465. qla2x00_vp_abort_isp(vp);
  4466. }
  4467. } else {
  4468. qla_printk(KERN_INFO, ha,
  4469. "qla82xx_restart_isp: **** FAILED ****\n");
  4470. }
  4471. return status;
  4472. }
  4473. void
  4474. qla81xx_update_fw_options(scsi_qla_host_t *vha)
  4475. {
  4476. struct qla_hw_data *ha = vha->hw;
  4477. if (!ql2xetsenable)
  4478. return;
  4479. /* Enable ETS Burst. */
  4480. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  4481. ha->fw_options[2] |= BIT_9;
  4482. qla2x00_set_fw_options(vha, ha->fw_options);
  4483. }
  4484. /*
  4485. * qla24xx_get_fcp_prio
  4486. * Gets the fcp cmd priority value for the logged in port.
  4487. * Looks for a match of the port descriptors within
  4488. * each of the fcp prio config entries. If a match is found,
  4489. * the tag (priority) value is returned.
  4490. *
  4491. * Input:
  4492. * ha = adapter block po
  4493. * fcport = port structure pointer.
  4494. *
  4495. * Return:
  4496. * non-zero (if found)
  4497. * 0 (if not found)
  4498. *
  4499. * Context:
  4500. * Kernel context
  4501. */
  4502. uint8_t
  4503. qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
  4504. {
  4505. int i, entries;
  4506. uint8_t pid_match, wwn_match;
  4507. uint8_t priority;
  4508. uint32_t pid1, pid2;
  4509. uint64_t wwn1, wwn2;
  4510. struct qla_fcp_prio_entry *pri_entry;
  4511. struct qla_hw_data *ha = vha->hw;
  4512. if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled)
  4513. return 0;
  4514. priority = 0;
  4515. entries = ha->fcp_prio_cfg->num_entries;
  4516. pri_entry = &ha->fcp_prio_cfg->entry[0];
  4517. for (i = 0; i < entries; i++) {
  4518. pid_match = wwn_match = 0;
  4519. if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) {
  4520. pri_entry++;
  4521. continue;
  4522. }
  4523. /* check source pid for a match */
  4524. if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) {
  4525. pid1 = pri_entry->src_pid & INVALID_PORT_ID;
  4526. pid2 = vha->d_id.b24 & INVALID_PORT_ID;
  4527. if (pid1 == INVALID_PORT_ID)
  4528. pid_match++;
  4529. else if (pid1 == pid2)
  4530. pid_match++;
  4531. }
  4532. /* check destination pid for a match */
  4533. if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) {
  4534. pid1 = pri_entry->dst_pid & INVALID_PORT_ID;
  4535. pid2 = fcport->d_id.b24 & INVALID_PORT_ID;
  4536. if (pid1 == INVALID_PORT_ID)
  4537. pid_match++;
  4538. else if (pid1 == pid2)
  4539. pid_match++;
  4540. }
  4541. /* check source WWN for a match */
  4542. if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) {
  4543. wwn1 = wwn_to_u64(vha->port_name);
  4544. wwn2 = wwn_to_u64(pri_entry->src_wwpn);
  4545. if (wwn2 == (uint64_t)-1)
  4546. wwn_match++;
  4547. else if (wwn1 == wwn2)
  4548. wwn_match++;
  4549. }
  4550. /* check destination WWN for a match */
  4551. if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) {
  4552. wwn1 = wwn_to_u64(fcport->port_name);
  4553. wwn2 = wwn_to_u64(pri_entry->dst_wwpn);
  4554. if (wwn2 == (uint64_t)-1)
  4555. wwn_match++;
  4556. else if (wwn1 == wwn2)
  4557. wwn_match++;
  4558. }
  4559. if (pid_match == 2 || wwn_match == 2) {
  4560. /* Found a matching entry */
  4561. if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID)
  4562. priority = pri_entry->tag;
  4563. break;
  4564. }
  4565. pri_entry++;
  4566. }
  4567. return priority;
  4568. }
  4569. /*
  4570. * qla24xx_update_fcport_fcp_prio
  4571. * Activates fcp priority for the logged in fc port
  4572. *
  4573. * Input:
  4574. * ha = adapter block pointer.
  4575. * fcp = port structure pointer.
  4576. *
  4577. * Return:
  4578. * QLA_SUCCESS or QLA_FUNCTION_FAILED
  4579. *
  4580. * Context:
  4581. * Kernel context.
  4582. */
  4583. int
  4584. qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *ha, fc_port_t *fcport)
  4585. {
  4586. int ret;
  4587. uint8_t priority;
  4588. uint16_t mb[5];
  4589. if (atomic_read(&fcport->state) == FCS_UNCONFIGURED ||
  4590. fcport->port_type != FCT_TARGET ||
  4591. fcport->loop_id == FC_NO_LOOP_ID)
  4592. return QLA_FUNCTION_FAILED;
  4593. priority = qla24xx_get_fcp_prio(ha, fcport);
  4594. ret = qla24xx_set_fcp_prio(ha, fcport->loop_id, priority, mb);
  4595. if (ret == QLA_SUCCESS)
  4596. fcport->fcp_prio = priority;
  4597. else
  4598. DEBUG2(printk(KERN_WARNING
  4599. "scsi(%ld): Unable to activate fcp priority, "
  4600. " ret=0x%x\n", ha->host_no, ret));
  4601. return ret;
  4602. }
  4603. /*
  4604. * qla24xx_update_all_fcp_prio
  4605. * Activates fcp priority for all the logged in ports
  4606. *
  4607. * Input:
  4608. * ha = adapter block pointer.
  4609. *
  4610. * Return:
  4611. * QLA_SUCCESS or QLA_FUNCTION_FAILED
  4612. *
  4613. * Context:
  4614. * Kernel context.
  4615. */
  4616. int
  4617. qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha)
  4618. {
  4619. int ret;
  4620. fc_port_t *fcport;
  4621. ret = QLA_FUNCTION_FAILED;
  4622. /* We need to set priority for all logged in ports */
  4623. list_for_each_entry(fcport, &vha->vp_fcports, list)
  4624. ret = qla24xx_update_fcport_fcp_prio(vha, fcport);
  4625. return ret;
  4626. }