cx88-dvb.c 25 KB

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  1. /*
  2. *
  3. * device driver for Conexant 2388x based TV cards
  4. * MPEG Transport Stream (DVB) routines
  5. *
  6. * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
  7. * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. */
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/device.h>
  26. #include <linux/fs.h>
  27. #include <linux/kthread.h>
  28. #include <linux/file.h>
  29. #include <linux/suspend.h>
  30. #include "cx88.h"
  31. #include "dvb-pll.h"
  32. #include <media/v4l2-common.h>
  33. #include "mt352.h"
  34. #include "mt352_priv.h"
  35. #ifdef HAVE_VP3054_I2C
  36. # include "cx88-vp3054-i2c.h"
  37. #endif
  38. #include "zl10353.h"
  39. #include "cx22702.h"
  40. #include "or51132.h"
  41. #include "lgdt330x.h"
  42. #include "lg_h06xf.h"
  43. #include "nxt200x.h"
  44. #include "cx24123.h"
  45. #include "isl6421.h"
  46. MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
  47. MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
  48. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  49. MODULE_LICENSE("GPL");
  50. static unsigned int debug = 0;
  51. module_param(debug, int, 0644);
  52. MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
  53. #define dprintk(level,fmt, arg...) if (debug >= level) \
  54. printk(KERN_DEBUG "%s/2-dvb: " fmt, dev->core->name , ## arg)
  55. /* ------------------------------------------------------------------ */
  56. static int dvb_buf_setup(struct videobuf_queue *q,
  57. unsigned int *count, unsigned int *size)
  58. {
  59. struct cx8802_dev *dev = q->priv_data;
  60. dev->ts_packet_size = 188 * 4;
  61. dev->ts_packet_count = 32;
  62. *size = dev->ts_packet_size * dev->ts_packet_count;
  63. *count = 32;
  64. return 0;
  65. }
  66. static int dvb_buf_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
  67. enum v4l2_field field)
  68. {
  69. struct cx8802_dev *dev = q->priv_data;
  70. return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
  71. }
  72. static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
  73. {
  74. struct cx8802_dev *dev = q->priv_data;
  75. cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
  76. }
  77. static void dvb_buf_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
  78. {
  79. cx88_free_buffer(q, (struct cx88_buffer*)vb);
  80. }
  81. static struct videobuf_queue_ops dvb_qops = {
  82. .buf_setup = dvb_buf_setup,
  83. .buf_prepare = dvb_buf_prepare,
  84. .buf_queue = dvb_buf_queue,
  85. .buf_release = dvb_buf_release,
  86. };
  87. /* ------------------------------------------------------------------ */
  88. static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
  89. {
  90. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
  91. static u8 reset [] = { RESET, 0x80 };
  92. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  93. static u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
  94. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  95. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  96. mt352_write(fe, clock_config, sizeof(clock_config));
  97. udelay(200);
  98. mt352_write(fe, reset, sizeof(reset));
  99. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  100. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  101. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  102. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  103. return 0;
  104. }
  105. static int dvico_dual_demod_init(struct dvb_frontend *fe)
  106. {
  107. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
  108. static u8 reset [] = { RESET, 0x80 };
  109. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  110. static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
  111. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  112. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  113. mt352_write(fe, clock_config, sizeof(clock_config));
  114. udelay(200);
  115. mt352_write(fe, reset, sizeof(reset));
  116. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  117. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  118. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  119. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  120. return 0;
  121. }
  122. static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
  123. {
  124. static u8 clock_config [] = { 0x89, 0x38, 0x39 };
  125. static u8 reset [] = { 0x50, 0x80 };
  126. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  127. static u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
  128. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  129. static u8 dntv_extra[] = { 0xB5, 0x7A };
  130. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  131. mt352_write(fe, clock_config, sizeof(clock_config));
  132. udelay(2000);
  133. mt352_write(fe, reset, sizeof(reset));
  134. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  135. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  136. udelay(2000);
  137. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  138. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  139. return 0;
  140. }
  141. static struct mt352_config dvico_fusionhdtv = {
  142. .demod_address = 0x0f,
  143. .demod_init = dvico_fusionhdtv_demod_init,
  144. };
  145. static struct mt352_config dntv_live_dvbt_config = {
  146. .demod_address = 0x0f,
  147. .demod_init = dntv_live_dvbt_demod_init,
  148. };
  149. static struct mt352_config dvico_fusionhdtv_dual = {
  150. .demod_address = 0x0f,
  151. .demod_init = dvico_dual_demod_init,
  152. };
  153. #ifdef HAVE_VP3054_I2C
  154. static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
  155. {
  156. static u8 clock_config [] = { 0x89, 0x38, 0x38 };
  157. static u8 reset [] = { 0x50, 0x80 };
  158. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  159. static u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
  160. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  161. static u8 dntv_extra[] = { 0xB5, 0x7A };
  162. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  163. mt352_write(fe, clock_config, sizeof(clock_config));
  164. udelay(2000);
  165. mt352_write(fe, reset, sizeof(reset));
  166. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  167. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  168. udelay(2000);
  169. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  170. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  171. return 0;
  172. }
  173. static int philips_fmd1216_pll_init(struct dvb_frontend *fe)
  174. {
  175. struct cx8802_dev *dev= fe->dvb->priv;
  176. /* this message is to set up ATC and ALC */
  177. static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0xa0 };
  178. struct i2c_msg msg =
  179. { .addr = dev->core->pll_addr, .flags = 0,
  180. .buf = fmd1216_init, .len = sizeof(fmd1216_init) };
  181. int err;
  182. if (fe->ops.i2c_gate_ctrl)
  183. fe->ops.i2c_gate_ctrl(fe, 1);
  184. if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
  185. if (err < 0)
  186. return err;
  187. else
  188. return -EREMOTEIO;
  189. }
  190. return 0;
  191. }
  192. static int dntv_live_dvbt_pro_tuner_set_params(struct dvb_frontend* fe,
  193. struct dvb_frontend_parameters* params)
  194. {
  195. struct cx8802_dev *dev= fe->dvb->priv;
  196. u8 buf[4];
  197. struct i2c_msg msg =
  198. { .addr = dev->core->pll_addr, .flags = 0,
  199. .buf = buf, .len = 4 };
  200. int err;
  201. /* Switch PLL to DVB mode */
  202. err = philips_fmd1216_pll_init(fe);
  203. if (err)
  204. return err;
  205. /* Tune PLL */
  206. dvb_pll_configure(dev->core->pll_desc, buf,
  207. params->frequency,
  208. params->u.ofdm.bandwidth);
  209. if (fe->ops.i2c_gate_ctrl)
  210. fe->ops.i2c_gate_ctrl(fe, 1);
  211. if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
  212. printk(KERN_WARNING "cx88-dvb: %s error "
  213. "(addr %02x <- %02x, err = %i)\n",
  214. __FUNCTION__, dev->core->pll_addr, buf[0], err);
  215. if (err < 0)
  216. return err;
  217. else
  218. return -EREMOTEIO;
  219. }
  220. return 0;
  221. }
  222. static struct mt352_config dntv_live_dvbt_pro_config = {
  223. .demod_address = 0x0f,
  224. .no_tuner = 1,
  225. .demod_init = dntv_live_dvbt_pro_demod_init,
  226. };
  227. #endif
  228. static int dvico_hybrid_tuner_set_params(struct dvb_frontend *fe,
  229. struct dvb_frontend_parameters *params)
  230. {
  231. u8 pllbuf[4];
  232. struct cx8802_dev *dev= fe->dvb->priv;
  233. struct i2c_msg msg =
  234. { .addr = dev->core->pll_addr, .flags = 0,
  235. .buf = pllbuf, .len = 4 };
  236. int err;
  237. dvb_pll_configure(dev->core->pll_desc, pllbuf,
  238. params->frequency,
  239. params->u.ofdm.bandwidth);
  240. if (fe->ops.i2c_gate_ctrl)
  241. fe->ops.i2c_gate_ctrl(fe, 1);
  242. if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
  243. printk(KERN_WARNING "cx88-dvb: %s error "
  244. "(addr %02x <- %02x, err = %i)\n",
  245. __FUNCTION__, pllbuf[0], pllbuf[1], err);
  246. if (err < 0)
  247. return err;
  248. else
  249. return -EREMOTEIO;
  250. }
  251. return 0;
  252. }
  253. static struct zl10353_config dvico_fusionhdtv_hybrid = {
  254. .demod_address = 0x0f,
  255. .no_tuner = 1,
  256. };
  257. static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
  258. .demod_address = 0x0f,
  259. };
  260. static struct cx22702_config connexant_refboard_config = {
  261. .demod_address = 0x43,
  262. .output_mode = CX22702_SERIAL_OUTPUT,
  263. };
  264. static struct cx22702_config hauppauge_novat_config = {
  265. .demod_address = 0x43,
  266. .output_mode = CX22702_SERIAL_OUTPUT,
  267. };
  268. static struct cx22702_config hauppauge_hvr1100_config = {
  269. .demod_address = 0x63,
  270. .output_mode = CX22702_SERIAL_OUTPUT,
  271. };
  272. static struct cx22702_config hauppauge_hvr1300_config = {
  273. .demod_address = 0x63,
  274. .output_mode = CX22702_SERIAL_OUTPUT,
  275. };
  276. static int or51132_set_ts_param(struct dvb_frontend* fe,
  277. int is_punctured)
  278. {
  279. struct cx8802_dev *dev= fe->dvb->priv;
  280. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  281. return 0;
  282. }
  283. static struct or51132_config pchdtv_hd3000 = {
  284. .demod_address = 0x15,
  285. .set_ts_params = or51132_set_ts_param,
  286. };
  287. static int lgdt3302_tuner_set_params(struct dvb_frontend* fe,
  288. struct dvb_frontend_parameters* params)
  289. {
  290. /* FIXME make this routine use the tuner-simple code.
  291. * It could probably be shared with a number of ATSC
  292. * frontends. Many share the same tuner with analog TV. */
  293. struct cx8802_dev *dev= fe->dvb->priv;
  294. struct cx88_core *core = dev->core;
  295. u8 buf[4];
  296. struct i2c_msg msg =
  297. { .addr = dev->core->pll_addr, .flags = 0, .buf = buf, .len = 4 };
  298. int err;
  299. dvb_pll_configure(core->pll_desc, buf, params->frequency, 0);
  300. dprintk(1, "%s: tuner at 0x%02x bytes: 0x%02x 0x%02x 0x%02x 0x%02x\n",
  301. __FUNCTION__, msg.addr, buf[0],buf[1],buf[2],buf[3]);
  302. if (fe->ops.i2c_gate_ctrl)
  303. fe->ops.i2c_gate_ctrl(fe, 1);
  304. if ((err = i2c_transfer(&core->i2c_adap, &msg, 1)) != 1) {
  305. printk(KERN_WARNING "cx88-dvb: %s error "
  306. "(addr %02x <- %02x, err = %i)\n",
  307. __FUNCTION__, buf[0], buf[1], err);
  308. if (err < 0)
  309. return err;
  310. else
  311. return -EREMOTEIO;
  312. }
  313. return 0;
  314. }
  315. static int lgdt3303_tuner_set_params(struct dvb_frontend* fe,
  316. struct dvb_frontend_parameters* params)
  317. {
  318. struct cx8802_dev *dev= fe->dvb->priv;
  319. struct cx88_core *core = dev->core;
  320. /* Put the analog decoder in standby to keep it quiet */
  321. cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
  322. return lg_h06xf_pll_set(fe, &core->i2c_adap, params);
  323. }
  324. static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
  325. {
  326. struct cx8802_dev *dev= fe->dvb->priv;
  327. struct cx88_core *core = dev->core;
  328. dprintk(1, "%s: index = %d\n", __FUNCTION__, index);
  329. if (index == 0)
  330. cx_clear(MO_GP0_IO, 8);
  331. else
  332. cx_set(MO_GP0_IO, 8);
  333. return 0;
  334. }
  335. static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  336. {
  337. struct cx8802_dev *dev= fe->dvb->priv;
  338. if (is_punctured)
  339. dev->ts_gen_cntrl |= 0x04;
  340. else
  341. dev->ts_gen_cntrl &= ~0x04;
  342. return 0;
  343. }
  344. static struct lgdt330x_config fusionhdtv_3_gold = {
  345. .demod_address = 0x0e,
  346. .demod_chip = LGDT3302,
  347. .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
  348. .set_ts_params = lgdt330x_set_ts_param,
  349. };
  350. static struct lgdt330x_config fusionhdtv_5_gold = {
  351. .demod_address = 0x0e,
  352. .demod_chip = LGDT3303,
  353. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  354. .set_ts_params = lgdt330x_set_ts_param,
  355. };
  356. static struct lgdt330x_config pchdtv_hd5500 = {
  357. .demod_address = 0x59,
  358. .demod_chip = LGDT3303,
  359. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  360. .set_ts_params = lgdt330x_set_ts_param,
  361. };
  362. static int nxt200x_set_ts_param(struct dvb_frontend* fe,
  363. int is_punctured)
  364. {
  365. struct cx8802_dev *dev= fe->dvb->priv;
  366. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  367. return 0;
  368. }
  369. static int nxt200x_set_pll_input(u8* buf, int input)
  370. {
  371. if (input)
  372. buf[3] |= 0x08;
  373. else
  374. buf[3] &= ~0x08;
  375. return 0;
  376. }
  377. static struct nxt200x_config ati_hdtvwonder = {
  378. .demod_address = 0x0a,
  379. .set_pll_input = nxt200x_set_pll_input,
  380. .set_ts_params = nxt200x_set_ts_param,
  381. };
  382. static int cx24123_set_ts_param(struct dvb_frontend* fe,
  383. int is_punctured)
  384. {
  385. struct cx8802_dev *dev= fe->dvb->priv;
  386. dev->ts_gen_cntrl = 0x02;
  387. return 0;
  388. }
  389. static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
  390. fe_sec_voltage_t voltage)
  391. {
  392. struct cx8802_dev *dev= fe->dvb->priv;
  393. struct cx88_core *core = dev->core;
  394. if (voltage == SEC_VOLTAGE_OFF) {
  395. cx_write(MO_GP0_IO, 0x000006fb);
  396. } else {
  397. cx_write(MO_GP0_IO, 0x000006f9);
  398. }
  399. if (core->prev_set_voltage)
  400. return core->prev_set_voltage(fe, voltage);
  401. return 0;
  402. }
  403. static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
  404. fe_sec_voltage_t voltage)
  405. {
  406. struct cx8802_dev *dev= fe->dvb->priv;
  407. struct cx88_core *core = dev->core;
  408. if (voltage == SEC_VOLTAGE_OFF) {
  409. dprintk(1,"LNB Voltage OFF\n");
  410. cx_write(MO_GP0_IO, 0x0000efff);
  411. }
  412. if (core->prev_set_voltage)
  413. return core->prev_set_voltage(fe, voltage);
  414. return 0;
  415. }
  416. static struct cx24123_config geniatech_dvbs_config = {
  417. .demod_address = 0x55,
  418. .set_ts_params = cx24123_set_ts_param,
  419. };
  420. static struct cx24123_config hauppauge_novas_config = {
  421. .demod_address = 0x55,
  422. .set_ts_params = cx24123_set_ts_param,
  423. };
  424. static struct cx24123_config kworld_dvbs_100_config = {
  425. .demod_address = 0x15,
  426. .set_ts_params = cx24123_set_ts_param,
  427. .lnb_polarity = 1,
  428. };
  429. static int dvb_register(struct cx8802_dev *dev)
  430. {
  431. /* init struct videobuf_dvb */
  432. dev->dvb.name = dev->core->name;
  433. dev->ts_gen_cntrl = 0x0c;
  434. /* init frontend */
  435. switch (dev->core->board) {
  436. case CX88_BOARD_HAUPPAUGE_DVB_T1:
  437. dev->dvb.frontend = dvb_attach(cx22702_attach,
  438. &hauppauge_novat_config,
  439. &dev->core->i2c_adap);
  440. if (dev->dvb.frontend != NULL) {
  441. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  442. &dev->core->i2c_adap,
  443. &dvb_pll_thomson_dtt759x);
  444. }
  445. break;
  446. case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
  447. case CX88_BOARD_CONEXANT_DVB_T1:
  448. case CX88_BOARD_KWORLD_DVB_T_CX22702:
  449. case CX88_BOARD_WINFAST_DTV1000:
  450. dev->dvb.frontend = dvb_attach(cx22702_attach,
  451. &connexant_refboard_config,
  452. &dev->core->i2c_adap);
  453. if (dev->dvb.frontend != NULL) {
  454. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
  455. &dev->core->i2c_adap,
  456. &dvb_pll_thomson_dtt7579);
  457. }
  458. break;
  459. case CX88_BOARD_WINFAST_DTV2000H:
  460. case CX88_BOARD_HAUPPAUGE_HVR1100:
  461. case CX88_BOARD_HAUPPAUGE_HVR1100LP:
  462. dev->dvb.frontend = dvb_attach(cx22702_attach,
  463. &hauppauge_hvr1100_config,
  464. &dev->core->i2c_adap);
  465. if (dev->dvb.frontend != NULL) {
  466. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  467. &dev->core->i2c_adap,
  468. &dvb_pll_fmd1216me);
  469. }
  470. break;
  471. case CX88_BOARD_HAUPPAUGE_HVR1300:
  472. dev->dvb.frontend = dvb_attach(cx22702_attach,
  473. &hauppauge_hvr1300_config,
  474. &dev->core->i2c_adap);
  475. if (dev->dvb.frontend != NULL) {
  476. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  477. &dev->core->i2c_adap,
  478. &dvb_pll_fmd1216me);
  479. }
  480. break;
  481. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
  482. dev->dvb.frontend = dvb_attach(mt352_attach,
  483. &dvico_fusionhdtv,
  484. &dev->core->i2c_adap);
  485. if (dev->dvb.frontend != NULL) {
  486. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
  487. NULL, &dvb_pll_thomson_dtt7579);
  488. break;
  489. }
  490. /* ZL10353 replaces MT352 on later cards */
  491. dev->dvb.frontend = dvb_attach(zl10353_attach,
  492. &dvico_fusionhdtv_plus_v1_1,
  493. &dev->core->i2c_adap);
  494. if (dev->dvb.frontend != NULL) {
  495. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
  496. NULL, &dvb_pll_thomson_dtt7579);
  497. }
  498. break;
  499. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
  500. /* The tin box says DEE1601, but it seems to be DTT7579
  501. * compatible, with a slightly different MT352 AGC gain. */
  502. dev->dvb.frontend = dvb_attach(mt352_attach,
  503. &dvico_fusionhdtv_dual,
  504. &dev->core->i2c_adap);
  505. if (dev->dvb.frontend != NULL) {
  506. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  507. NULL, &dvb_pll_thomson_dtt7579);
  508. break;
  509. }
  510. /* ZL10353 replaces MT352 on later cards */
  511. dev->dvb.frontend = dvb_attach(zl10353_attach,
  512. &dvico_fusionhdtv_plus_v1_1,
  513. &dev->core->i2c_adap);
  514. if (dev->dvb.frontend != NULL) {
  515. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  516. NULL, &dvb_pll_thomson_dtt7579);
  517. }
  518. break;
  519. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
  520. dev->dvb.frontend = dvb_attach(mt352_attach,
  521. &dvico_fusionhdtv,
  522. &dev->core->i2c_adap);
  523. if (dev->dvb.frontend != NULL) {
  524. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  525. NULL, &dvb_pll_lg_z201);
  526. }
  527. break;
  528. case CX88_BOARD_KWORLD_DVB_T:
  529. case CX88_BOARD_DNTV_LIVE_DVB_T:
  530. case CX88_BOARD_ADSTECH_DVB_T_PCI:
  531. dev->dvb.frontend = dvb_attach(mt352_attach,
  532. &dntv_live_dvbt_config,
  533. &dev->core->i2c_adap);
  534. if (dev->dvb.frontend != NULL) {
  535. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  536. NULL, &dvb_pll_unknown_1);
  537. }
  538. break;
  539. case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
  540. #ifdef HAVE_VP3054_I2C
  541. dev->core->pll_addr = 0x61;
  542. dev->core->pll_desc = &dvb_pll_fmd1216me;
  543. dev->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
  544. &((struct vp3054_i2c_state *)dev->card_priv)->adap);
  545. if (dev->dvb.frontend != NULL) {
  546. dev->dvb.frontend->ops.tuner_ops.set_params = dntv_live_dvbt_pro_tuner_set_params;
  547. }
  548. #else
  549. printk("%s: built without vp3054 support\n", dev->core->name);
  550. #endif
  551. break;
  552. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
  553. dev->core->pll_addr = 0x61;
  554. dev->core->pll_desc = &dvb_pll_thomson_fe6600;
  555. dev->dvb.frontend = dvb_attach(zl10353_attach,
  556. &dvico_fusionhdtv_hybrid,
  557. &dev->core->i2c_adap);
  558. if (dev->dvb.frontend != NULL) {
  559. dev->dvb.frontend->ops.tuner_ops.set_params = dvico_hybrid_tuner_set_params;
  560. }
  561. break;
  562. case CX88_BOARD_PCHDTV_HD3000:
  563. dev->dvb.frontend = dvb_attach(or51132_attach,
  564. &pchdtv_hd3000,
  565. &dev->core->i2c_adap);
  566. if (dev->dvb.frontend != NULL) {
  567. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  568. &dev->core->i2c_adap,
  569. &dvb_pll_thomson_dtt761x);
  570. }
  571. break;
  572. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
  573. dev->ts_gen_cntrl = 0x08;
  574. {
  575. /* Do a hardware reset of chip before using it. */
  576. struct cx88_core *core = dev->core;
  577. cx_clear(MO_GP0_IO, 1);
  578. mdelay(100);
  579. cx_set(MO_GP0_IO, 1);
  580. mdelay(200);
  581. /* Select RF connector callback */
  582. fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
  583. dev->core->pll_addr = 0x61;
  584. dev->core->pll_desc = &dvb_pll_microtune_4042;
  585. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  586. &fusionhdtv_3_gold,
  587. &dev->core->i2c_adap);
  588. if (dev->dvb.frontend != NULL) {
  589. dev->dvb.frontend->ops.tuner_ops.set_params = lgdt3302_tuner_set_params;
  590. }
  591. }
  592. break;
  593. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
  594. dev->ts_gen_cntrl = 0x08;
  595. {
  596. /* Do a hardware reset of chip before using it. */
  597. struct cx88_core *core = dev->core;
  598. cx_clear(MO_GP0_IO, 1);
  599. mdelay(100);
  600. cx_set(MO_GP0_IO, 9);
  601. mdelay(200);
  602. dev->core->pll_addr = 0x61;
  603. dev->core->pll_desc = &dvb_pll_thomson_dtt761x;
  604. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  605. &fusionhdtv_3_gold,
  606. &dev->core->i2c_adap);
  607. if (dev->dvb.frontend != NULL) {
  608. dev->dvb.frontend->ops.tuner_ops.set_params = lgdt3302_tuner_set_params;
  609. }
  610. }
  611. break;
  612. case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
  613. dev->ts_gen_cntrl = 0x08;
  614. {
  615. /* Do a hardware reset of chip before using it. */
  616. struct cx88_core *core = dev->core;
  617. cx_clear(MO_GP0_IO, 1);
  618. mdelay(100);
  619. cx_set(MO_GP0_IO, 1);
  620. mdelay(200);
  621. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  622. &fusionhdtv_5_gold,
  623. &dev->core->i2c_adap);
  624. if (dev->dvb.frontend != NULL) {
  625. dev->dvb.frontend->ops.tuner_ops.set_params = lgdt3303_tuner_set_params;
  626. }
  627. }
  628. break;
  629. case CX88_BOARD_PCHDTV_HD5500:
  630. dev->ts_gen_cntrl = 0x08;
  631. {
  632. /* Do a hardware reset of chip before using it. */
  633. struct cx88_core *core = dev->core;
  634. cx_clear(MO_GP0_IO, 1);
  635. mdelay(100);
  636. cx_set(MO_GP0_IO, 1);
  637. mdelay(200);
  638. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  639. &pchdtv_hd5500,
  640. &dev->core->i2c_adap);
  641. if (dev->dvb.frontend != NULL) {
  642. dev->dvb.frontend->ops.tuner_ops.set_params = lgdt3303_tuner_set_params;
  643. }
  644. }
  645. break;
  646. case CX88_BOARD_ATI_HDTVWONDER:
  647. dev->dvb.frontend = dvb_attach(nxt200x_attach,
  648. &ati_hdtvwonder,
  649. &dev->core->i2c_adap);
  650. if (dev->dvb.frontend != NULL) {
  651. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  652. NULL, &dvb_pll_tuv1236d);
  653. }
  654. break;
  655. case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
  656. case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
  657. dev->dvb.frontend = dvb_attach(cx24123_attach,
  658. &hauppauge_novas_config,
  659. &dev->core->i2c_adap);
  660. if (dev->dvb.frontend) {
  661. dvb_attach(isl6421_attach, dev->dvb.frontend,
  662. &dev->core->i2c_adap, 0x08, 0x00, 0x00);
  663. }
  664. break;
  665. case CX88_BOARD_KWORLD_DVBS_100:
  666. dev->dvb.frontend = dvb_attach(cx24123_attach,
  667. &kworld_dvbs_100_config,
  668. &dev->core->i2c_adap);
  669. if (dev->dvb.frontend) {
  670. dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
  671. dev->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
  672. }
  673. break;
  674. case CX88_BOARD_GENIATECH_DVBS:
  675. dev->dvb.frontend = dvb_attach(cx24123_attach,
  676. &geniatech_dvbs_config,
  677. &dev->core->i2c_adap);
  678. if (dev->dvb.frontend) {
  679. dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
  680. dev->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
  681. }
  682. break;
  683. default:
  684. printk("%s: The frontend of your DVB/ATSC card isn't supported yet\n",
  685. dev->core->name);
  686. break;
  687. }
  688. if (NULL == dev->dvb.frontend) {
  689. printk("%s: frontend initialization failed\n",dev->core->name);
  690. return -1;
  691. }
  692. if (dev->core->pll_desc) {
  693. dev->dvb.frontend->ops.info.frequency_min = dev->core->pll_desc->min;
  694. dev->dvb.frontend->ops.info.frequency_max = dev->core->pll_desc->max;
  695. }
  696. /* Put the analog decoder in standby to keep it quiet */
  697. cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
  698. /* register everything */
  699. return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev, &dev->pci->dev);
  700. }
  701. /* ----------------------------------------------------------- */
  702. static int __devinit dvb_probe(struct pci_dev *pci_dev,
  703. const struct pci_device_id *pci_id)
  704. {
  705. struct cx8802_dev *dev;
  706. struct cx88_core *core;
  707. int err;
  708. /* general setup */
  709. core = cx88_core_get(pci_dev);
  710. if (NULL == core)
  711. return -EINVAL;
  712. err = -ENODEV;
  713. if (!(cx88_boards[core->board].mpeg & CX88_MPEG_DVB))
  714. goto fail_core;
  715. err = -ENOMEM;
  716. dev = kzalloc(sizeof(*dev),GFP_KERNEL);
  717. if (NULL == dev)
  718. goto fail_core;
  719. dev->pci = pci_dev;
  720. dev->core = core;
  721. err = cx8802_init_common(dev);
  722. if (0 != err)
  723. goto fail_free;
  724. #ifdef HAVE_VP3054_I2C
  725. err = vp3054_i2c_probe(dev);
  726. if (0 != err)
  727. goto fail_free;
  728. #endif
  729. /* dvb stuff */
  730. printk("%s/2: cx2388x based dvb card\n", core->name);
  731. videobuf_queue_init(&dev->dvb.dvbq, &dvb_qops,
  732. dev->pci, &dev->slock,
  733. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  734. V4L2_FIELD_TOP,
  735. sizeof(struct cx88_buffer),
  736. dev);
  737. err = dvb_register(dev);
  738. if (0 != err)
  739. goto fail_fini;
  740. /* Maintain a reference to cx88-video can query the 8802 device. */
  741. core->dvbdev = dev;
  742. return 0;
  743. fail_fini:
  744. cx8802_fini_common(dev);
  745. fail_free:
  746. kfree(dev);
  747. fail_core:
  748. cx88_core_put(core,pci_dev);
  749. return err;
  750. }
  751. static void __devexit dvb_remove(struct pci_dev *pci_dev)
  752. {
  753. struct cx8802_dev *dev = pci_get_drvdata(pci_dev);
  754. /* Destroy any 8802 reference. */
  755. dev->core->dvbdev = NULL;
  756. /* dvb */
  757. videobuf_dvb_unregister(&dev->dvb);
  758. #ifdef HAVE_VP3054_I2C
  759. vp3054_i2c_remove(dev);
  760. #endif
  761. /* common */
  762. cx8802_fini_common(dev);
  763. cx88_core_put(dev->core,dev->pci);
  764. kfree(dev);
  765. }
  766. static struct pci_device_id cx8802_pci_tbl[] = {
  767. {
  768. .vendor = 0x14f1,
  769. .device = 0x8802,
  770. .subvendor = PCI_ANY_ID,
  771. .subdevice = PCI_ANY_ID,
  772. },{
  773. /* --- end of list --- */
  774. }
  775. };
  776. MODULE_DEVICE_TABLE(pci, cx8802_pci_tbl);
  777. static struct pci_driver dvb_pci_driver = {
  778. .name = "cx88-dvb",
  779. .id_table = cx8802_pci_tbl,
  780. .probe = dvb_probe,
  781. .remove = __devexit_p(dvb_remove),
  782. #ifdef CONFIG_PM
  783. .suspend = cx8802_suspend_common,
  784. .resume = cx8802_resume_common,
  785. #endif
  786. };
  787. static int dvb_init(void)
  788. {
  789. printk(KERN_INFO "cx2388x dvb driver version %d.%d.%d loaded\n",
  790. (CX88_VERSION_CODE >> 16) & 0xff,
  791. (CX88_VERSION_CODE >> 8) & 0xff,
  792. CX88_VERSION_CODE & 0xff);
  793. #ifdef SNAPSHOT
  794. printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
  795. SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
  796. #endif
  797. return pci_register_driver(&dvb_pci_driver);
  798. }
  799. static void dvb_fini(void)
  800. {
  801. pci_unregister_driver(&dvb_pci_driver);
  802. }
  803. module_init(dvb_init);
  804. module_exit(dvb_fini);
  805. /*
  806. * Local variables:
  807. * c-basic-offset: 8
  808. * compile-command: "make DVB=1"
  809. * End:
  810. */