v2m.c 11 KB

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  1. /*
  2. * Versatile Express V2M Motherboard Support
  3. */
  4. #include <linux/device.h>
  5. #include <linux/amba/bus.h>
  6. #include <linux/amba/mmci.h>
  7. #include <linux/io.h>
  8. #include <linux/init.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/ata_platform.h>
  11. #include <linux/smsc911x.h>
  12. #include <linux/spinlock.h>
  13. #include <linux/device.h>
  14. #include <linux/usb/isp1760.h>
  15. #include <linux/clkdev.h>
  16. #include <linux/mtd/physmap.h>
  17. #include <asm/mach-types.h>
  18. #include <asm/sizes.h>
  19. #include <asm/mach/arch.h>
  20. #include <asm/mach/map.h>
  21. #include <asm/mach/time.h>
  22. #include <asm/hardware/arm_timer.h>
  23. #include <asm/hardware/timer-sp.h>
  24. #include <asm/hardware/sp810.h>
  25. #include <asm/hardware/gic.h>
  26. #include <mach/ct-ca9x4.h>
  27. #include <mach/motherboard.h>
  28. #include <plat/sched_clock.h>
  29. #include "core.h"
  30. #define V2M_PA_CS0 0x40000000
  31. #define V2M_PA_CS1 0x44000000
  32. #define V2M_PA_CS2 0x48000000
  33. #define V2M_PA_CS3 0x4c000000
  34. #define V2M_PA_CS7 0x10000000
  35. static struct map_desc v2m_io_desc[] __initdata = {
  36. {
  37. .virtual = V2M_PERIPH,
  38. .pfn = __phys_to_pfn(V2M_PA_CS7),
  39. .length = SZ_128K,
  40. .type = MT_DEVICE,
  41. },
  42. };
  43. static void __iomem *v2m_sysreg_base;
  44. static void __init v2m_sysctl_init(void __iomem *base)
  45. {
  46. u32 scctrl;
  47. if (WARN_ON(!base))
  48. return;
  49. /* Select 1MHz TIMCLK as the reference clock for SP804 timers */
  50. scctrl = readl(base + SCCTRL);
  51. scctrl |= SCCTRL_TIMEREN0SEL_TIMCLK;
  52. scctrl |= SCCTRL_TIMEREN1SEL_TIMCLK;
  53. writel(scctrl, base + SCCTRL);
  54. }
  55. static void __init v2m_sp804_init(void __iomem *base, unsigned int irq)
  56. {
  57. if (WARN_ON(!base || irq == NO_IRQ))
  58. return;
  59. writel(0, base + TIMER_1_BASE + TIMER_CTRL);
  60. writel(0, base + TIMER_2_BASE + TIMER_CTRL);
  61. sp804_clocksource_init(base + TIMER_2_BASE, "v2m-timer1");
  62. sp804_clockevents_init(base + TIMER_1_BASE, irq, "v2m-timer0");
  63. }
  64. static void __init v2m_timer_init(void)
  65. {
  66. v2m_sysctl_init(ioremap(V2M_SYSCTL, SZ_4K));
  67. v2m_sp804_init(ioremap(V2M_TIMER01, SZ_4K), IRQ_V2M_TIMER0);
  68. }
  69. static struct sys_timer v2m_timer = {
  70. .init = v2m_timer_init,
  71. };
  72. static DEFINE_SPINLOCK(v2m_cfg_lock);
  73. int v2m_cfg_write(u32 devfn, u32 data)
  74. {
  75. /* Configuration interface broken? */
  76. u32 val;
  77. printk("%s: writing %08x to %08x\n", __func__, data, devfn);
  78. devfn |= SYS_CFG_START | SYS_CFG_WRITE;
  79. spin_lock(&v2m_cfg_lock);
  80. val = readl(v2m_sysreg_base + V2M_SYS_CFGSTAT);
  81. writel(val & ~SYS_CFG_COMPLETE, v2m_sysreg_base + V2M_SYS_CFGSTAT);
  82. writel(data, v2m_sysreg_base + V2M_SYS_CFGDATA);
  83. writel(devfn, v2m_sysreg_base + V2M_SYS_CFGCTRL);
  84. do {
  85. val = readl(v2m_sysreg_base + V2M_SYS_CFGSTAT);
  86. } while (val == 0);
  87. spin_unlock(&v2m_cfg_lock);
  88. return !!(val & SYS_CFG_ERR);
  89. }
  90. int v2m_cfg_read(u32 devfn, u32 *data)
  91. {
  92. u32 val;
  93. devfn |= SYS_CFG_START;
  94. spin_lock(&v2m_cfg_lock);
  95. writel(0, v2m_sysreg_base + V2M_SYS_CFGSTAT);
  96. writel(devfn, v2m_sysreg_base + V2M_SYS_CFGCTRL);
  97. mb();
  98. do {
  99. cpu_relax();
  100. val = readl(v2m_sysreg_base + V2M_SYS_CFGSTAT);
  101. } while (val == 0);
  102. *data = readl(v2m_sysreg_base + V2M_SYS_CFGDATA);
  103. spin_unlock(&v2m_cfg_lock);
  104. return !!(val & SYS_CFG_ERR);
  105. }
  106. void __init v2m_flags_set(u32 data)
  107. {
  108. writel(~0, v2m_sysreg_base + V2M_SYS_FLAGSCLR);
  109. writel(data, v2m_sysreg_base + V2M_SYS_FLAGSSET);
  110. }
  111. static struct resource v2m_pcie_i2c_resource = {
  112. .start = V2M_SERIAL_BUS_PCI,
  113. .end = V2M_SERIAL_BUS_PCI + SZ_4K - 1,
  114. .flags = IORESOURCE_MEM,
  115. };
  116. static struct platform_device v2m_pcie_i2c_device = {
  117. .name = "versatile-i2c",
  118. .id = 0,
  119. .num_resources = 1,
  120. .resource = &v2m_pcie_i2c_resource,
  121. };
  122. static struct resource v2m_ddc_i2c_resource = {
  123. .start = V2M_SERIAL_BUS_DVI,
  124. .end = V2M_SERIAL_BUS_DVI + SZ_4K - 1,
  125. .flags = IORESOURCE_MEM,
  126. };
  127. static struct platform_device v2m_ddc_i2c_device = {
  128. .name = "versatile-i2c",
  129. .id = 1,
  130. .num_resources = 1,
  131. .resource = &v2m_ddc_i2c_resource,
  132. };
  133. static struct resource v2m_eth_resources[] = {
  134. {
  135. .start = V2M_LAN9118,
  136. .end = V2M_LAN9118 + SZ_64K - 1,
  137. .flags = IORESOURCE_MEM,
  138. }, {
  139. .start = IRQ_V2M_LAN9118,
  140. .end = IRQ_V2M_LAN9118,
  141. .flags = IORESOURCE_IRQ,
  142. },
  143. };
  144. static struct smsc911x_platform_config v2m_eth_config = {
  145. .flags = SMSC911X_USE_32BIT,
  146. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
  147. .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
  148. .phy_interface = PHY_INTERFACE_MODE_MII,
  149. };
  150. static struct platform_device v2m_eth_device = {
  151. .name = "smsc911x",
  152. .id = -1,
  153. .resource = v2m_eth_resources,
  154. .num_resources = ARRAY_SIZE(v2m_eth_resources),
  155. .dev.platform_data = &v2m_eth_config,
  156. };
  157. static struct resource v2m_usb_resources[] = {
  158. {
  159. .start = V2M_ISP1761,
  160. .end = V2M_ISP1761 + SZ_128K - 1,
  161. .flags = IORESOURCE_MEM,
  162. }, {
  163. .start = IRQ_V2M_ISP1761,
  164. .end = IRQ_V2M_ISP1761,
  165. .flags = IORESOURCE_IRQ,
  166. },
  167. };
  168. static struct isp1760_platform_data v2m_usb_config = {
  169. .is_isp1761 = true,
  170. .bus_width_16 = false,
  171. .port1_otg = true,
  172. .analog_oc = false,
  173. .dack_polarity_high = false,
  174. .dreq_polarity_high = false,
  175. };
  176. static struct platform_device v2m_usb_device = {
  177. .name = "isp1760",
  178. .id = -1,
  179. .resource = v2m_usb_resources,
  180. .num_resources = ARRAY_SIZE(v2m_usb_resources),
  181. .dev.platform_data = &v2m_usb_config,
  182. };
  183. static void v2m_flash_set_vpp(struct platform_device *pdev, int on)
  184. {
  185. writel(on != 0, v2m_sysreg_base + V2M_SYS_FLASH);
  186. }
  187. static struct physmap_flash_data v2m_flash_data = {
  188. .width = 4,
  189. .set_vpp = v2m_flash_set_vpp,
  190. };
  191. static struct resource v2m_flash_resources[] = {
  192. {
  193. .start = V2M_NOR0,
  194. .end = V2M_NOR0 + SZ_64M - 1,
  195. .flags = IORESOURCE_MEM,
  196. }, {
  197. .start = V2M_NOR1,
  198. .end = V2M_NOR1 + SZ_64M - 1,
  199. .flags = IORESOURCE_MEM,
  200. },
  201. };
  202. static struct platform_device v2m_flash_device = {
  203. .name = "physmap-flash",
  204. .id = -1,
  205. .resource = v2m_flash_resources,
  206. .num_resources = ARRAY_SIZE(v2m_flash_resources),
  207. .dev.platform_data = &v2m_flash_data,
  208. };
  209. static struct pata_platform_info v2m_pata_data = {
  210. .ioport_shift = 2,
  211. };
  212. static struct resource v2m_pata_resources[] = {
  213. {
  214. .start = V2M_CF,
  215. .end = V2M_CF + 0xff,
  216. .flags = IORESOURCE_MEM,
  217. }, {
  218. .start = V2M_CF + 0x100,
  219. .end = V2M_CF + SZ_4K - 1,
  220. .flags = IORESOURCE_MEM,
  221. },
  222. };
  223. static struct platform_device v2m_cf_device = {
  224. .name = "pata_platform",
  225. .id = -1,
  226. .resource = v2m_pata_resources,
  227. .num_resources = ARRAY_SIZE(v2m_pata_resources),
  228. .dev.platform_data = &v2m_pata_data,
  229. };
  230. static unsigned int v2m_mmci_status(struct device *dev)
  231. {
  232. return readl(v2m_sysreg_base + V2M_SYS_MCI) & (1 << 0);
  233. }
  234. static struct mmci_platform_data v2m_mmci_data = {
  235. .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
  236. .status = v2m_mmci_status,
  237. };
  238. static AMBA_APB_DEVICE(aaci, "mb:aaci", 0, V2M_AACI, IRQ_V2M_AACI, NULL);
  239. static AMBA_APB_DEVICE(mmci, "mb:mmci", 0, V2M_MMCI, IRQ_V2M_MMCI, &v2m_mmci_data);
  240. static AMBA_APB_DEVICE(kmi0, "mb:kmi0", 0, V2M_KMI0, IRQ_V2M_KMI0, NULL);
  241. static AMBA_APB_DEVICE(kmi1, "mb:kmi1", 0, V2M_KMI1, IRQ_V2M_KMI1, NULL);
  242. static AMBA_APB_DEVICE(uart0, "mb:uart0", 0, V2M_UART0, IRQ_V2M_UART0, NULL);
  243. static AMBA_APB_DEVICE(uart1, "mb:uart1", 0, V2M_UART1, IRQ_V2M_UART1, NULL);
  244. static AMBA_APB_DEVICE(uart2, "mb:uart2", 0, V2M_UART2, IRQ_V2M_UART2, NULL);
  245. static AMBA_APB_DEVICE(uart3, "mb:uart3", 0, V2M_UART3, IRQ_V2M_UART3, NULL);
  246. static AMBA_APB_DEVICE(wdt, "mb:wdt", 0, V2M_WDT, IRQ_V2M_WDT, NULL);
  247. static AMBA_APB_DEVICE(rtc, "mb:rtc", 0, V2M_RTC, IRQ_V2M_RTC, NULL);
  248. static struct amba_device *v2m_amba_devs[] __initdata = {
  249. &aaci_device,
  250. &mmci_device,
  251. &kmi0_device,
  252. &kmi1_device,
  253. &uart0_device,
  254. &uart1_device,
  255. &uart2_device,
  256. &uart3_device,
  257. &wdt_device,
  258. &rtc_device,
  259. };
  260. static long v2m_osc_round(struct clk *clk, unsigned long rate)
  261. {
  262. return rate;
  263. }
  264. static int v2m_osc1_set(struct clk *clk, unsigned long rate)
  265. {
  266. return v2m_cfg_write(SYS_CFG_OSC | SYS_CFG_SITE_MB | 1, rate);
  267. }
  268. static const struct clk_ops osc1_clk_ops = {
  269. .round = v2m_osc_round,
  270. .set = v2m_osc1_set,
  271. };
  272. static struct clk osc1_clk = {
  273. .ops = &osc1_clk_ops,
  274. .rate = 24000000,
  275. };
  276. static struct clk osc2_clk = {
  277. .rate = 24000000,
  278. };
  279. static struct clk v2m_sp804_clk = {
  280. .rate = 1000000,
  281. };
  282. static struct clk v2m_ref_clk = {
  283. .rate = 32768,
  284. };
  285. static struct clk dummy_apb_pclk;
  286. static struct clk_lookup v2m_lookups[] = {
  287. { /* AMBA bus clock */
  288. .con_id = "apb_pclk",
  289. .clk = &dummy_apb_pclk,
  290. }, { /* UART0 */
  291. .dev_id = "mb:uart0",
  292. .clk = &osc2_clk,
  293. }, { /* UART1 */
  294. .dev_id = "mb:uart1",
  295. .clk = &osc2_clk,
  296. }, { /* UART2 */
  297. .dev_id = "mb:uart2",
  298. .clk = &osc2_clk,
  299. }, { /* UART3 */
  300. .dev_id = "mb:uart3",
  301. .clk = &osc2_clk,
  302. }, { /* KMI0 */
  303. .dev_id = "mb:kmi0",
  304. .clk = &osc2_clk,
  305. }, { /* KMI1 */
  306. .dev_id = "mb:kmi1",
  307. .clk = &osc2_clk,
  308. }, { /* MMC0 */
  309. .dev_id = "mb:mmci",
  310. .clk = &osc2_clk,
  311. }, { /* CLCD */
  312. .dev_id = "mb:clcd",
  313. .clk = &osc1_clk,
  314. }, { /* SP805 WDT */
  315. .dev_id = "mb:wdt",
  316. .clk = &v2m_ref_clk,
  317. }, { /* SP804 timers */
  318. .dev_id = "sp804",
  319. .con_id = "v2m-timer0",
  320. .clk = &v2m_sp804_clk,
  321. }, { /* SP804 timers */
  322. .dev_id = "sp804",
  323. .con_id = "v2m-timer1",
  324. .clk = &v2m_sp804_clk,
  325. },
  326. };
  327. static void __init v2m_init_early(void)
  328. {
  329. ct_desc->init_early();
  330. clkdev_add_table(v2m_lookups, ARRAY_SIZE(v2m_lookups));
  331. versatile_sched_clock_init(v2m_sysreg_base + V2M_SYS_24MHZ, 24000000);
  332. }
  333. static void v2m_power_off(void)
  334. {
  335. if (v2m_cfg_write(SYS_CFG_SHUTDOWN | SYS_CFG_SITE_MB, 0))
  336. printk(KERN_EMERG "Unable to shutdown\n");
  337. }
  338. static void v2m_restart(char str, const char *cmd)
  339. {
  340. if (v2m_cfg_write(SYS_CFG_REBOOT | SYS_CFG_SITE_MB, 0))
  341. printk(KERN_EMERG "Unable to reboot\n");
  342. }
  343. struct ct_desc *ct_desc;
  344. static struct ct_desc *ct_descs[] __initdata = {
  345. #ifdef CONFIG_ARCH_VEXPRESS_CA9X4
  346. &ct_ca9x4_desc,
  347. #endif
  348. };
  349. static void __init v2m_populate_ct_desc(void)
  350. {
  351. int i;
  352. u32 current_tile_id;
  353. ct_desc = NULL;
  354. current_tile_id = readl(v2m_sysreg_base + V2M_SYS_PROCID0)
  355. & V2M_CT_ID_MASK;
  356. for (i = 0; i < ARRAY_SIZE(ct_descs) && !ct_desc; ++i)
  357. if (ct_descs[i]->id == current_tile_id)
  358. ct_desc = ct_descs[i];
  359. if (!ct_desc)
  360. panic("vexpress: failed to populate core tile description "
  361. "for tile ID 0x%8x\n", current_tile_id);
  362. }
  363. static void __init v2m_map_io(void)
  364. {
  365. iotable_init(v2m_io_desc, ARRAY_SIZE(v2m_io_desc));
  366. v2m_sysreg_base = ioremap(V2M_SYSREGS, SZ_4K);
  367. v2m_populate_ct_desc();
  368. ct_desc->map_io();
  369. }
  370. static void __init v2m_init_irq(void)
  371. {
  372. ct_desc->init_irq();
  373. }
  374. static void __init v2m_init(void)
  375. {
  376. int i;
  377. platform_device_register(&v2m_pcie_i2c_device);
  378. platform_device_register(&v2m_ddc_i2c_device);
  379. platform_device_register(&v2m_flash_device);
  380. platform_device_register(&v2m_cf_device);
  381. platform_device_register(&v2m_eth_device);
  382. platform_device_register(&v2m_usb_device);
  383. for (i = 0; i < ARRAY_SIZE(v2m_amba_devs); i++)
  384. amba_device_register(v2m_amba_devs[i], &iomem_resource);
  385. pm_power_off = v2m_power_off;
  386. ct_desc->init_tile();
  387. }
  388. MACHINE_START(VEXPRESS, "ARM-Versatile Express")
  389. .atag_offset = 0x100,
  390. .map_io = v2m_map_io,
  391. .init_early = v2m_init_early,
  392. .init_irq = v2m_init_irq,
  393. .timer = &v2m_timer,
  394. .handle_irq = gic_handle_irq,
  395. .init_machine = v2m_init,
  396. .restart = v2m_restart,
  397. MACHINE_END