sh_mmcif.h 1.9 KB

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  1. /*
  2. * include/linux/mmc/sh_mmcif.h
  3. *
  4. * platform data for eMMC driver
  5. *
  6. * Copyright (C) 2010 Renesas Solutions Corp.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License.
  11. *
  12. */
  13. #ifndef __SH_MMCIF_H__
  14. #define __SH_MMCIF_H__
  15. #include <linux/platform_device.h>
  16. #include <linux/io.h>
  17. /*
  18. * MMCIF : CE_CLK_CTRL [19:16]
  19. * 1000 : Peripheral clock / 512
  20. * 0111 : Peripheral clock / 256
  21. * 0110 : Peripheral clock / 128
  22. * 0101 : Peripheral clock / 64
  23. * 0100 : Peripheral clock / 32
  24. * 0011 : Peripheral clock / 16
  25. * 0010 : Peripheral clock / 8
  26. * 0001 : Peripheral clock / 4
  27. * 0000 : Peripheral clock / 2
  28. * 1111 : Peripheral clock (sup_pclk set '1')
  29. */
  30. struct sh_mmcif_plat_data {
  31. void (*set_pwr)(struct platform_device *pdev, int state);
  32. void (*down_pwr)(struct platform_device *pdev);
  33. u8 sup_pclk; /* 1 :SH7757, 0: SH7724/SH7372 */
  34. unsigned long caps;
  35. u32 ocr;
  36. };
  37. #define MMCIF_CE_CMD_SET 0x00000000
  38. #define MMCIF_CE_ARG 0x00000008
  39. #define MMCIF_CE_ARG_CMD12 0x0000000C
  40. #define MMCIF_CE_CMD_CTRL 0x00000010
  41. #define MMCIF_CE_BLOCK_SET 0x00000014
  42. #define MMCIF_CE_CLK_CTRL 0x00000018
  43. #define MMCIF_CE_BUF_ACC 0x0000001C
  44. #define MMCIF_CE_RESP3 0x00000020
  45. #define MMCIF_CE_RESP2 0x00000024
  46. #define MMCIF_CE_RESP1 0x00000028
  47. #define MMCIF_CE_RESP0 0x0000002C
  48. #define MMCIF_CE_RESP_CMD12 0x00000030
  49. #define MMCIF_CE_DATA 0x00000034
  50. #define MMCIF_CE_INT 0x00000040
  51. #define MMCIF_CE_INT_MASK 0x00000044
  52. #define MMCIF_CE_HOST_STS1 0x00000048
  53. #define MMCIF_CE_HOST_STS2 0x0000004C
  54. #define MMCIF_CE_VERSION 0x0000007C
  55. extern inline u32 sh_mmcif_readl(void __iomem *addr, int reg)
  56. {
  57. return readl(addr + reg);
  58. }
  59. extern inline void sh_mmcif_writel(void __iomem *addr, int reg, u32 val)
  60. {
  61. writel(val, addr + reg);
  62. }
  63. #endif /* __SH_MMCIF_H__ */