cx23885-dvb.c 22 KB

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  1. /*
  2. * Driver for the Conexant CX23885 PCIe bridge
  3. *
  4. * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. *
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20. */
  21. #include <linux/module.h>
  22. #include <linux/init.h>
  23. #include <linux/device.h>
  24. #include <linux/fs.h>
  25. #include <linux/kthread.h>
  26. #include <linux/file.h>
  27. #include <linux/suspend.h>
  28. #include "cx23885.h"
  29. #include <media/v4l2-common.h>
  30. #include "dvb_ca_en50221.h"
  31. #include "s5h1409.h"
  32. #include "s5h1411.h"
  33. #include "mt2131.h"
  34. #include "tda8290.h"
  35. #include "tda18271.h"
  36. #include "lgdt330x.h"
  37. #include "xc5000.h"
  38. #include "tda10048.h"
  39. #include "tuner-xc2028.h"
  40. #include "tuner-simple.h"
  41. #include "dib7000p.h"
  42. #include "dibx000_common.h"
  43. #include "zl10353.h"
  44. #include "stv0900.h"
  45. #include "stv6110.h"
  46. #include "lnbh24.h"
  47. #include "cx24116.h"
  48. #include "cimax2.h"
  49. #include "netup-eeprom.h"
  50. #include "netup-init.h"
  51. static unsigned int debug;
  52. #define dprintk(level, fmt, arg...)\
  53. do { if (debug >= level)\
  54. printk(KERN_DEBUG "%s/0: " fmt, dev->name, ## arg);\
  55. } while (0)
  56. /* ------------------------------------------------------------------ */
  57. static unsigned int alt_tuner;
  58. module_param(alt_tuner, int, 0644);
  59. MODULE_PARM_DESC(alt_tuner, "Enable alternate tuner configuration");
  60. DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
  61. /* ------------------------------------------------------------------ */
  62. static int dvb_buf_setup(struct videobuf_queue *q,
  63. unsigned int *count, unsigned int *size)
  64. {
  65. struct cx23885_tsport *port = q->priv_data;
  66. port->ts_packet_size = 188 * 4;
  67. port->ts_packet_count = 32;
  68. *size = port->ts_packet_size * port->ts_packet_count;
  69. *count = 32;
  70. return 0;
  71. }
  72. static int dvb_buf_prepare(struct videobuf_queue *q,
  73. struct videobuf_buffer *vb, enum v4l2_field field)
  74. {
  75. struct cx23885_tsport *port = q->priv_data;
  76. return cx23885_buf_prepare(q, port, (struct cx23885_buffer *)vb, field);
  77. }
  78. static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
  79. {
  80. struct cx23885_tsport *port = q->priv_data;
  81. cx23885_buf_queue(port, (struct cx23885_buffer *)vb);
  82. }
  83. static void dvb_buf_release(struct videobuf_queue *q,
  84. struct videobuf_buffer *vb)
  85. {
  86. cx23885_free_buffer(q, (struct cx23885_buffer *)vb);
  87. }
  88. static struct videobuf_queue_ops dvb_qops = {
  89. .buf_setup = dvb_buf_setup,
  90. .buf_prepare = dvb_buf_prepare,
  91. .buf_queue = dvb_buf_queue,
  92. .buf_release = dvb_buf_release,
  93. };
  94. static struct s5h1409_config hauppauge_generic_config = {
  95. .demod_address = 0x32 >> 1,
  96. .output_mode = S5H1409_SERIAL_OUTPUT,
  97. .gpio = S5H1409_GPIO_ON,
  98. .qam_if = 44000,
  99. .inversion = S5H1409_INVERSION_OFF,
  100. .status_mode = S5H1409_DEMODLOCKING,
  101. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  102. };
  103. static struct tda10048_config hauppauge_hvr1200_config = {
  104. .demod_address = 0x10 >> 1,
  105. .output_mode = TDA10048_SERIAL_OUTPUT,
  106. .fwbulkwritelen = TDA10048_BULKWRITE_200,
  107. .inversion = TDA10048_INVERSION_ON,
  108. .if_freq_khz = TDA10048_IF_4300,
  109. .clk_freq_khz = TDA10048_CLK_16000,
  110. };
  111. static struct s5h1409_config hauppauge_ezqam_config = {
  112. .demod_address = 0x32 >> 1,
  113. .output_mode = S5H1409_SERIAL_OUTPUT,
  114. .gpio = S5H1409_GPIO_OFF,
  115. .qam_if = 4000,
  116. .inversion = S5H1409_INVERSION_ON,
  117. .status_mode = S5H1409_DEMODLOCKING,
  118. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  119. };
  120. static struct s5h1409_config hauppauge_hvr1800lp_config = {
  121. .demod_address = 0x32 >> 1,
  122. .output_mode = S5H1409_SERIAL_OUTPUT,
  123. .gpio = S5H1409_GPIO_OFF,
  124. .qam_if = 44000,
  125. .inversion = S5H1409_INVERSION_OFF,
  126. .status_mode = S5H1409_DEMODLOCKING,
  127. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  128. };
  129. static struct s5h1409_config hauppauge_hvr1500_config = {
  130. .demod_address = 0x32 >> 1,
  131. .output_mode = S5H1409_SERIAL_OUTPUT,
  132. .gpio = S5H1409_GPIO_OFF,
  133. .inversion = S5H1409_INVERSION_OFF,
  134. .status_mode = S5H1409_DEMODLOCKING,
  135. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  136. };
  137. static struct mt2131_config hauppauge_generic_tunerconfig = {
  138. 0x61
  139. };
  140. static struct lgdt330x_config fusionhdtv_5_express = {
  141. .demod_address = 0x0e,
  142. .demod_chip = LGDT3303,
  143. .serial_mpeg = 0x40,
  144. };
  145. static struct s5h1409_config hauppauge_hvr1500q_config = {
  146. .demod_address = 0x32 >> 1,
  147. .output_mode = S5H1409_SERIAL_OUTPUT,
  148. .gpio = S5H1409_GPIO_ON,
  149. .qam_if = 44000,
  150. .inversion = S5H1409_INVERSION_OFF,
  151. .status_mode = S5H1409_DEMODLOCKING,
  152. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  153. };
  154. static struct s5h1409_config dvico_s5h1409_config = {
  155. .demod_address = 0x32 >> 1,
  156. .output_mode = S5H1409_SERIAL_OUTPUT,
  157. .gpio = S5H1409_GPIO_ON,
  158. .qam_if = 44000,
  159. .inversion = S5H1409_INVERSION_OFF,
  160. .status_mode = S5H1409_DEMODLOCKING,
  161. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  162. };
  163. static struct s5h1411_config dvico_s5h1411_config = {
  164. .output_mode = S5H1411_SERIAL_OUTPUT,
  165. .gpio = S5H1411_GPIO_ON,
  166. .qam_if = S5H1411_IF_44000,
  167. .vsb_if = S5H1411_IF_44000,
  168. .inversion = S5H1411_INVERSION_OFF,
  169. .status_mode = S5H1411_DEMODLOCKING,
  170. .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  171. };
  172. static struct xc5000_config hauppauge_hvr1500q_tunerconfig = {
  173. .i2c_address = 0x61,
  174. .if_khz = 5380,
  175. };
  176. static struct xc5000_config dvico_xc5000_tunerconfig = {
  177. .i2c_address = 0x64,
  178. .if_khz = 5380,
  179. };
  180. static struct tda829x_config tda829x_no_probe = {
  181. .probe_tuner = TDA829X_DONT_PROBE,
  182. };
  183. static struct tda18271_std_map hauppauge_tda18271_std_map = {
  184. .atsc_6 = { .if_freq = 5380, .agc_mode = 3, .std = 3,
  185. .if_lvl = 6, .rfagc_top = 0x37 },
  186. .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 0,
  187. .if_lvl = 6, .rfagc_top = 0x37 },
  188. };
  189. static struct tda18271_config hauppauge_tda18271_config = {
  190. .std_map = &hauppauge_tda18271_std_map,
  191. .gate = TDA18271_GATE_ANALOG,
  192. };
  193. static struct tda18271_config hauppauge_hvr1200_tuner_config = {
  194. .gate = TDA18271_GATE_ANALOG,
  195. };
  196. static struct dibx000_agc_config xc3028_agc_config = {
  197. BAND_VHF | BAND_UHF, /* band_caps */
  198. /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0,
  199. * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
  200. * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0,
  201. * P_agc_nb_est=2, P_agc_write=0
  202. */
  203. (0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) |
  204. (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), /* setup */
  205. 712, /* inv_gain */
  206. 21, /* time_stabiliz */
  207. 0, /* alpha_level */
  208. 118, /* thlock */
  209. 0, /* wbd_inv */
  210. 2867, /* wbd_ref */
  211. 0, /* wbd_sel */
  212. 2, /* wbd_alpha */
  213. 0, /* agc1_max */
  214. 0, /* agc1_min */
  215. 39718, /* agc2_max */
  216. 9930, /* agc2_min */
  217. 0, /* agc1_pt1 */
  218. 0, /* agc1_pt2 */
  219. 0, /* agc1_pt3 */
  220. 0, /* agc1_slope1 */
  221. 0, /* agc1_slope2 */
  222. 0, /* agc2_pt1 */
  223. 128, /* agc2_pt2 */
  224. 29, /* agc2_slope1 */
  225. 29, /* agc2_slope2 */
  226. 17, /* alpha_mant */
  227. 27, /* alpha_exp */
  228. 23, /* beta_mant */
  229. 51, /* beta_exp */
  230. 1, /* perform_agc_softsplit */
  231. };
  232. /* PLL Configuration for COFDM BW_MHz = 8.000000
  233. * With external clock = 30.000000 */
  234. static struct dibx000_bandwidth_config xc3028_bw_config = {
  235. 60000, /* internal */
  236. 30000, /* sampling */
  237. 1, /* pll_cfg: prediv */
  238. 8, /* pll_cfg: ratio */
  239. 3, /* pll_cfg: range */
  240. 1, /* pll_cfg: reset */
  241. 0, /* pll_cfg: bypass */
  242. 0, /* misc: refdiv */
  243. 0, /* misc: bypclk_div */
  244. 1, /* misc: IO_CLK_en_core */
  245. 1, /* misc: ADClkSrc */
  246. 0, /* misc: modulo */
  247. (3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */
  248. (1 << 25) | 5816102, /* ifreq = 5.200000 MHz */
  249. 20452225, /* timf */
  250. 30000000 /* xtal_hz */
  251. };
  252. static struct dib7000p_config hauppauge_hvr1400_dib7000_config = {
  253. .output_mpeg2_in_188_bytes = 1,
  254. .hostbus_diversity = 1,
  255. .tuner_is_baseband = 0,
  256. .update_lna = NULL,
  257. .agc_config_count = 1,
  258. .agc = &xc3028_agc_config,
  259. .bw = &xc3028_bw_config,
  260. .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
  261. .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
  262. .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
  263. .pwm_freq_div = 0,
  264. .agc_control = NULL,
  265. .spur_protect = 0,
  266. .output_mode = OUTMODE_MPEG2_SERIAL,
  267. };
  268. static struct zl10353_config dvico_fusionhdtv_xc3028 = {
  269. .demod_address = 0x0f,
  270. .if2 = 45600,
  271. .no_tuner = 1,
  272. .disable_i2c_gate_ctrl = 1,
  273. };
  274. static struct stv0900_config netup_stv0900_config = {
  275. .demod_address = 0x68,
  276. .xtal = 27000000,
  277. .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
  278. .diseqc_mode = 2,/* 2/3 PWM */
  279. .path1_mode = 2,/*Serial continues clock */
  280. .path2_mode = 2,/*Serial continues clock */
  281. .tun1_maddress = 0,/* 0x60 */
  282. .tun2_maddress = 3,/* 0x63 */
  283. .tun1_adc = 1,/* 1 Vpp */
  284. .tun2_adc = 1,/* 1 Vpp */
  285. };
  286. static struct stv6110_config netup_stv6110_tunerconfig_a = {
  287. .i2c_address = 0x60,
  288. .mclk = 27000000,
  289. .iq_wiring = 0,
  290. };
  291. static struct stv6110_config netup_stv6110_tunerconfig_b = {
  292. .i2c_address = 0x63,
  293. .mclk = 27000000,
  294. .iq_wiring = 1,
  295. };
  296. static int tbs_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
  297. {
  298. struct cx23885_tsport *port = fe->dvb->priv;
  299. struct cx23885_dev *dev = port->dev;
  300. if (voltage == SEC_VOLTAGE_18)
  301. cx_write(MC417_RWD, 0x00001e00);/* GPIO-13 high */
  302. else if (voltage == SEC_VOLTAGE_13)
  303. cx_write(MC417_RWD, 0x00001a00);/* GPIO-13 low */
  304. else
  305. cx_write(MC417_RWD, 0x00001800);/* GPIO-12 low */
  306. return 0;
  307. }
  308. static struct cx24116_config tbs_cx24116_config = {
  309. .demod_address = 0x05,
  310. };
  311. static struct cx24116_config tevii_cx24116_config = {
  312. .demod_address = 0x55,
  313. };
  314. static struct cx24116_config dvbworld_cx24116_config = {
  315. .demod_address = 0x05,
  316. };
  317. static int dvb_register(struct cx23885_tsport *port)
  318. {
  319. struct cx23885_dev *dev = port->dev;
  320. struct cx23885_i2c *i2c_bus = NULL;
  321. struct videobuf_dvb_frontend *fe0;
  322. int ret;
  323. /* Get the first frontend */
  324. fe0 = videobuf_dvb_get_frontend(&port->frontends, 1);
  325. if (!fe0)
  326. return -EINVAL;
  327. /* init struct videobuf_dvb */
  328. fe0->dvb.name = dev->name;
  329. /* init frontend */
  330. switch (dev->board) {
  331. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  332. i2c_bus = &dev->i2c_bus[0];
  333. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  334. &hauppauge_generic_config,
  335. &i2c_bus->i2c_adap);
  336. if (fe0->dvb.frontend != NULL) {
  337. dvb_attach(mt2131_attach, fe0->dvb.frontend,
  338. &i2c_bus->i2c_adap,
  339. &hauppauge_generic_tunerconfig, 0);
  340. }
  341. break;
  342. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  343. i2c_bus = &dev->i2c_bus[0];
  344. switch (alt_tuner) {
  345. case 1:
  346. fe0->dvb.frontend =
  347. dvb_attach(s5h1409_attach,
  348. &hauppauge_ezqam_config,
  349. &i2c_bus->i2c_adap);
  350. if (fe0->dvb.frontend != NULL) {
  351. dvb_attach(tda829x_attach, fe0->dvb.frontend,
  352. &dev->i2c_bus[1].i2c_adap, 0x42,
  353. &tda829x_no_probe);
  354. dvb_attach(tda18271_attach, fe0->dvb.frontend,
  355. 0x60, &dev->i2c_bus[1].i2c_adap,
  356. &hauppauge_tda18271_config);
  357. }
  358. break;
  359. case 0:
  360. default:
  361. fe0->dvb.frontend =
  362. dvb_attach(s5h1409_attach,
  363. &hauppauge_generic_config,
  364. &i2c_bus->i2c_adap);
  365. if (fe0->dvb.frontend != NULL)
  366. dvb_attach(mt2131_attach, fe0->dvb.frontend,
  367. &i2c_bus->i2c_adap,
  368. &hauppauge_generic_tunerconfig, 0);
  369. break;
  370. }
  371. break;
  372. case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
  373. i2c_bus = &dev->i2c_bus[0];
  374. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  375. &hauppauge_hvr1800lp_config,
  376. &i2c_bus->i2c_adap);
  377. if (fe0->dvb.frontend != NULL) {
  378. dvb_attach(mt2131_attach, fe0->dvb.frontend,
  379. &i2c_bus->i2c_adap,
  380. &hauppauge_generic_tunerconfig, 0);
  381. }
  382. break;
  383. case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
  384. i2c_bus = &dev->i2c_bus[0];
  385. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  386. &fusionhdtv_5_express,
  387. &i2c_bus->i2c_adap);
  388. if (fe0->dvb.frontend != NULL) {
  389. dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  390. &i2c_bus->i2c_adap, 0x61,
  391. TUNER_LG_TDVS_H06XF);
  392. }
  393. break;
  394. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  395. i2c_bus = &dev->i2c_bus[1];
  396. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  397. &hauppauge_hvr1500q_config,
  398. &dev->i2c_bus[0].i2c_adap);
  399. if (fe0->dvb.frontend != NULL)
  400. dvb_attach(xc5000_attach, fe0->dvb.frontend,
  401. &i2c_bus->i2c_adap,
  402. &hauppauge_hvr1500q_tunerconfig);
  403. break;
  404. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  405. i2c_bus = &dev->i2c_bus[1];
  406. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  407. &hauppauge_hvr1500_config,
  408. &dev->i2c_bus[0].i2c_adap);
  409. if (fe0->dvb.frontend != NULL) {
  410. struct dvb_frontend *fe;
  411. struct xc2028_config cfg = {
  412. .i2c_adap = &i2c_bus->i2c_adap,
  413. .i2c_addr = 0x61,
  414. };
  415. static struct xc2028_ctrl ctl = {
  416. .fname = XC2028_DEFAULT_FIRMWARE,
  417. .max_len = 64,
  418. .demod = XC3028_FE_OREN538,
  419. };
  420. fe = dvb_attach(xc2028_attach,
  421. fe0->dvb.frontend, &cfg);
  422. if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
  423. fe->ops.tuner_ops.set_config(fe, &ctl);
  424. }
  425. break;
  426. case CX23885_BOARD_HAUPPAUGE_HVR1200:
  427. case CX23885_BOARD_HAUPPAUGE_HVR1700:
  428. i2c_bus = &dev->i2c_bus[0];
  429. fe0->dvb.frontend = dvb_attach(tda10048_attach,
  430. &hauppauge_hvr1200_config,
  431. &i2c_bus->i2c_adap);
  432. if (fe0->dvb.frontend != NULL) {
  433. dvb_attach(tda829x_attach, fe0->dvb.frontend,
  434. &dev->i2c_bus[1].i2c_adap, 0x42,
  435. &tda829x_no_probe);
  436. dvb_attach(tda18271_attach, fe0->dvb.frontend,
  437. 0x60, &dev->i2c_bus[1].i2c_adap,
  438. &hauppauge_hvr1200_tuner_config);
  439. }
  440. break;
  441. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  442. i2c_bus = &dev->i2c_bus[0];
  443. fe0->dvb.frontend = dvb_attach(dib7000p_attach,
  444. &i2c_bus->i2c_adap,
  445. 0x12, &hauppauge_hvr1400_dib7000_config);
  446. if (fe0->dvb.frontend != NULL) {
  447. struct dvb_frontend *fe;
  448. struct xc2028_config cfg = {
  449. .i2c_adap = &dev->i2c_bus[1].i2c_adap,
  450. .i2c_addr = 0x64,
  451. };
  452. static struct xc2028_ctrl ctl = {
  453. .fname = XC3028L_DEFAULT_FIRMWARE,
  454. .max_len = 64,
  455. .demod = 5000,
  456. /* This is true for all demods with
  457. v36 firmware? */
  458. .type = XC2028_D2633,
  459. };
  460. fe = dvb_attach(xc2028_attach,
  461. fe0->dvb.frontend, &cfg);
  462. if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
  463. fe->ops.tuner_ops.set_config(fe, &ctl);
  464. }
  465. break;
  466. case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
  467. i2c_bus = &dev->i2c_bus[port->nr - 1];
  468. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  469. &dvico_s5h1409_config,
  470. &i2c_bus->i2c_adap);
  471. if (fe0->dvb.frontend == NULL)
  472. fe0->dvb.frontend = dvb_attach(s5h1411_attach,
  473. &dvico_s5h1411_config,
  474. &i2c_bus->i2c_adap);
  475. if (fe0->dvb.frontend != NULL)
  476. dvb_attach(xc5000_attach, fe0->dvb.frontend,
  477. &i2c_bus->i2c_adap,
  478. &dvico_xc5000_tunerconfig);
  479. break;
  480. case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: {
  481. i2c_bus = &dev->i2c_bus[port->nr - 1];
  482. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  483. &dvico_fusionhdtv_xc3028,
  484. &i2c_bus->i2c_adap);
  485. if (fe0->dvb.frontend != NULL) {
  486. struct dvb_frontend *fe;
  487. struct xc2028_config cfg = {
  488. .i2c_adap = &i2c_bus->i2c_adap,
  489. .i2c_addr = 0x61,
  490. };
  491. static struct xc2028_ctrl ctl = {
  492. .fname = XC2028_DEFAULT_FIRMWARE,
  493. .max_len = 64,
  494. .demod = XC3028_FE_ZARLINK456,
  495. };
  496. fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
  497. &cfg);
  498. if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
  499. fe->ops.tuner_ops.set_config(fe, &ctl);
  500. }
  501. break;
  502. }
  503. case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
  504. case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
  505. i2c_bus = &dev->i2c_bus[0];
  506. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  507. &dvico_fusionhdtv_xc3028,
  508. &i2c_bus->i2c_adap);
  509. if (fe0->dvb.frontend != NULL) {
  510. struct dvb_frontend *fe;
  511. struct xc2028_config cfg = {
  512. .i2c_adap = &dev->i2c_bus[1].i2c_adap,
  513. .i2c_addr = 0x61,
  514. };
  515. static struct xc2028_ctrl ctl = {
  516. .fname = XC2028_DEFAULT_FIRMWARE,
  517. .max_len = 64,
  518. .demod = XC3028_FE_ZARLINK456,
  519. };
  520. fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
  521. &cfg);
  522. if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
  523. fe->ops.tuner_ops.set_config(fe, &ctl);
  524. }
  525. break;
  526. case CX23885_BOARD_TBS_6920:
  527. i2c_bus = &dev->i2c_bus[0];
  528. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  529. &tbs_cx24116_config,
  530. &i2c_bus->i2c_adap);
  531. if (fe0->dvb.frontend != NULL)
  532. fe0->dvb.frontend->ops.set_voltage = tbs_set_voltage;
  533. break;
  534. case CX23885_BOARD_TEVII_S470:
  535. i2c_bus = &dev->i2c_bus[1];
  536. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  537. &tevii_cx24116_config,
  538. &i2c_bus->i2c_adap);
  539. if (fe0->dvb.frontend != NULL)
  540. fe0->dvb.frontend->ops.set_voltage = tbs_set_voltage;
  541. break;
  542. case CX23885_BOARD_DVBWORLD_2005:
  543. i2c_bus = &dev->i2c_bus[1];
  544. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  545. &dvbworld_cx24116_config,
  546. &i2c_bus->i2c_adap);
  547. break;
  548. case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
  549. i2c_bus = &dev->i2c_bus[0];
  550. switch (port->nr) {
  551. /* port B */
  552. case 1:
  553. fe0->dvb.frontend = dvb_attach(stv0900_attach,
  554. &netup_stv0900_config,
  555. &i2c_bus->i2c_adap, 0);
  556. if (fe0->dvb.frontend != NULL) {
  557. if (dvb_attach(stv6110_attach,
  558. fe0->dvb.frontend,
  559. &netup_stv6110_tunerconfig_a,
  560. &i2c_bus->i2c_adap)) {
  561. if (!dvb_attach(lnbh24_attach,
  562. fe0->dvb.frontend,
  563. &i2c_bus->i2c_adap,
  564. LNBH24_PCL, 0, 0x09))
  565. printk(KERN_ERR
  566. "No LNBH24 found!\n");
  567. }
  568. }
  569. break;
  570. /* port C */
  571. case 2:
  572. fe0->dvb.frontend = dvb_attach(stv0900_attach,
  573. &netup_stv0900_config,
  574. &i2c_bus->i2c_adap, 1);
  575. if (fe0->dvb.frontend != NULL) {
  576. if (dvb_attach(stv6110_attach,
  577. fe0->dvb.frontend,
  578. &netup_stv6110_tunerconfig_b,
  579. &i2c_bus->i2c_adap)) {
  580. if (!dvb_attach(lnbh24_attach,
  581. fe0->dvb.frontend,
  582. &i2c_bus->i2c_adap,
  583. LNBH24_PCL, 0, 0x0a))
  584. printk(KERN_ERR
  585. "No LNBH24 found!\n");
  586. }
  587. }
  588. break;
  589. }
  590. break;
  591. default:
  592. printk(KERN_INFO "%s: The frontend of your DVB/ATSC card "
  593. " isn't supported yet\n",
  594. dev->name);
  595. break;
  596. }
  597. if (NULL == fe0->dvb.frontend) {
  598. printk(KERN_ERR "%s: frontend initialization failed\n",
  599. dev->name);
  600. return -1;
  601. }
  602. /* define general-purpose callback pointer */
  603. fe0->dvb.frontend->callback = cx23885_tuner_callback;
  604. /* Put the analog decoder in standby to keep it quiet */
  605. call_all(dev, tuner, s_standby);
  606. if (fe0->dvb.frontend->ops.analog_ops.standby)
  607. fe0->dvb.frontend->ops.analog_ops.standby(fe0->dvb.frontend);
  608. /* register everything */
  609. ret = videobuf_dvb_register_bus(&port->frontends, THIS_MODULE, port,
  610. &dev->pci->dev, adapter_nr, 0);
  611. /* init CI & MAC */
  612. switch (dev->board) {
  613. case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: {
  614. static struct netup_card_info cinfo;
  615. netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo);
  616. memcpy(port->frontends.adapter.proposed_mac,
  617. cinfo.port[port->nr - 1].mac, 6);
  618. printk(KERN_INFO "NetUP Dual DVB-S2 CI card port%d MAC="
  619. "%02X:%02X:%02X:%02X:%02X:%02X\n",
  620. port->nr,
  621. port->frontends.adapter.proposed_mac[0],
  622. port->frontends.adapter.proposed_mac[1],
  623. port->frontends.adapter.proposed_mac[2],
  624. port->frontends.adapter.proposed_mac[3],
  625. port->frontends.adapter.proposed_mac[4],
  626. port->frontends.adapter.proposed_mac[5]);
  627. netup_ci_init(port);
  628. break;
  629. }
  630. }
  631. return ret;
  632. }
  633. int cx23885_dvb_register(struct cx23885_tsport *port)
  634. {
  635. struct videobuf_dvb_frontend *fe0;
  636. struct cx23885_dev *dev = port->dev;
  637. int err, i;
  638. /* Here we need to allocate the correct number of frontends,
  639. * as reflected in the cards struct. The reality is that currrently
  640. * no cx23885 boards support this - yet. But, if we don't modify this
  641. * code then the second frontend would never be allocated (later)
  642. * and fail with error before the attach in dvb_register().
  643. * Without these changes we risk an OOPS later. The changes here
  644. * are for safety, and should provide a good foundation for the
  645. * future addition of any multi-frontend cx23885 based boards.
  646. */
  647. printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__,
  648. port->num_frontends);
  649. for (i = 1; i <= port->num_frontends; i++) {
  650. if (videobuf_dvb_alloc_frontend(
  651. &port->frontends, i) == NULL) {
  652. printk(KERN_ERR "%s() failed to alloc\n", __func__);
  653. return -ENOMEM;
  654. }
  655. fe0 = videobuf_dvb_get_frontend(&port->frontends, i);
  656. if (!fe0)
  657. err = -EINVAL;
  658. dprintk(1, "%s\n", __func__);
  659. dprintk(1, " ->probed by Card=%d Name=%s, PCI %02x:%02x\n",
  660. dev->board,
  661. dev->name,
  662. dev->pci_bus,
  663. dev->pci_slot);
  664. err = -ENODEV;
  665. /* dvb stuff */
  666. /* We have to init the queue for each frontend on a port. */
  667. printk(KERN_INFO "%s: cx23885 based dvb card\n", dev->name);
  668. videobuf_queue_sg_init(&fe0->dvb.dvbq, &dvb_qops,
  669. &dev->pci->dev, &port->slock,
  670. V4L2_BUF_TYPE_VIDEO_CAPTURE, V4L2_FIELD_TOP,
  671. sizeof(struct cx23885_buffer), port);
  672. }
  673. err = dvb_register(port);
  674. if (err != 0)
  675. printk(KERN_ERR "%s() dvb_register failed err = %d\n",
  676. __func__, err);
  677. return err;
  678. }
  679. int cx23885_dvb_unregister(struct cx23885_tsport *port)
  680. {
  681. struct videobuf_dvb_frontend *fe0;
  682. /* FIXME: in an error condition where the we have
  683. * an expected number of frontends (attach problem)
  684. * then this might not clean up correctly, if 1
  685. * is invalid.
  686. * This comment only applies to future boards IF they
  687. * implement MFE support.
  688. */
  689. fe0 = videobuf_dvb_get_frontend(&port->frontends, 1);
  690. if (fe0->dvb.frontend)
  691. videobuf_dvb_unregister_bus(&port->frontends);
  692. switch (port->dev->board) {
  693. case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
  694. netup_ci_exit(port);
  695. break;
  696. }
  697. return 0;
  698. }