exception-64s.h 9.7 KB

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  1. #ifndef _ASM_POWERPC_EXCEPTION_H
  2. #define _ASM_POWERPC_EXCEPTION_H
  3. /*
  4. * Extracted from head_64.S
  5. *
  6. * PowerPC version
  7. * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
  8. *
  9. * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
  10. * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
  11. * Adapted for Power Macintosh by Paul Mackerras.
  12. * Low-level exception handlers and MMU support
  13. * rewritten by Paul Mackerras.
  14. * Copyright (C) 1996 Paul Mackerras.
  15. *
  16. * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
  17. * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com
  18. *
  19. * This file contains the low-level support and setup for the
  20. * PowerPC-64 platform, including trap and interrupt dispatch.
  21. *
  22. * This program is free software; you can redistribute it and/or
  23. * modify it under the terms of the GNU General Public License
  24. * as published by the Free Software Foundation; either version
  25. * 2 of the License, or (at your option) any later version.
  26. */
  27. /*
  28. * The following macros define the code that appears as
  29. * the prologue to each of the exception handlers. They
  30. * are split into two parts to allow a single kernel binary
  31. * to be used for pSeries and iSeries.
  32. *
  33. * We make as much of the exception code common between native
  34. * exception handlers (including pSeries LPAR) and iSeries LPAR
  35. * implementations as possible.
  36. */
  37. #define EX_R9 0
  38. #define EX_R10 8
  39. #define EX_R11 16
  40. #define EX_R12 24
  41. #define EX_R13 32
  42. #define EX_SRR0 40
  43. #define EX_DAR 48
  44. #define EX_DSISR 56
  45. #define EX_CCR 60
  46. #define EX_R3 64
  47. #define EX_LR 72
  48. #define EX_CFAR 80
  49. /*
  50. * We're short on space and time in the exception prolog, so we can't
  51. * use the normal SET_REG_IMMEDIATE macro. Normally we just need the
  52. * low halfword of the address, but for Kdump we need the whole low
  53. * word.
  54. */
  55. #define LOAD_HANDLER(reg, label) \
  56. addi reg,reg,(label)-_stext; /* virt addr of handler ... */
  57. /* Exception register prefixes */
  58. #define EXC_HV H
  59. #define EXC_STD
  60. #define EXCEPTION_PROLOG_1(area) \
  61. GET_PACA(r13); \
  62. std r9,area+EX_R9(r13); /* save r9 - r12 */ \
  63. std r10,area+EX_R10(r13); \
  64. std r11,area+EX_R11(r13); \
  65. std r12,area+EX_R12(r13); \
  66. BEGIN_FTR_SECTION_NESTED(66); \
  67. mfspr r10,SPRN_CFAR; \
  68. std r10,area+EX_CFAR(r13); \
  69. END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \
  70. GET_SCRATCH0(r9); \
  71. std r9,area+EX_R13(r13); \
  72. mfcr r9
  73. #define __EXCEPTION_PROLOG_PSERIES_1(label, h) \
  74. ld r12,PACAKBASE(r13); /* get high part of &label */ \
  75. ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \
  76. mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
  77. LOAD_HANDLER(r12,label) \
  78. mtspr SPRN_##h##SRR0,r12; \
  79. mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
  80. mtspr SPRN_##h##SRR1,r10; \
  81. h##rfid; \
  82. b . /* prevent speculative execution */
  83. #define EXCEPTION_PROLOG_PSERIES_1(label, h) \
  84. __EXCEPTION_PROLOG_PSERIES_1(label, h)
  85. #define EXCEPTION_PROLOG_PSERIES(area, label, h) \
  86. EXCEPTION_PROLOG_1(area); \
  87. EXCEPTION_PROLOG_PSERIES_1(label, h);
  88. /*
  89. * The common exception prolog is used for all except a few exceptions
  90. * such as a segment miss on a kernel address. We have to be prepared
  91. * to take another exception from the point where we first touch the
  92. * kernel stack onwards.
  93. *
  94. * On entry r13 points to the paca, r9-r13 are saved in the paca,
  95. * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and
  96. * SRR1, and relocation is on.
  97. */
  98. #define EXCEPTION_PROLOG_COMMON(n, area) \
  99. andi. r10,r12,MSR_PR; /* See if coming from user */ \
  100. mr r10,r1; /* Save r1 */ \
  101. subi r1,r1,INT_FRAME_SIZE; /* alloc frame on kernel stack */ \
  102. beq- 1f; \
  103. ld r1,PACAKSAVE(r13); /* kernel stack to use */ \
  104. 1: cmpdi cr1,r1,0; /* check if r1 is in userspace */ \
  105. blt+ cr1,3f; /* abort if it is */ \
  106. li r1,(n); /* will be reloaded later */ \
  107. sth r1,PACA_TRAP_SAVE(r13); \
  108. std r3,area+EX_R3(r13); \
  109. addi r3,r13,area; /* r3 -> where regs are saved*/ \
  110. b bad_stack; \
  111. 3: std r9,_CCR(r1); /* save CR in stackframe */ \
  112. std r11,_NIP(r1); /* save SRR0 in stackframe */ \
  113. std r12,_MSR(r1); /* save SRR1 in stackframe */ \
  114. std r10,0(r1); /* make stack chain pointer */ \
  115. std r0,GPR0(r1); /* save r0 in stackframe */ \
  116. std r10,GPR1(r1); /* save r1 in stackframe */ \
  117. ACCOUNT_CPU_USER_ENTRY(r9, r10); \
  118. std r2,GPR2(r1); /* save r2 in stackframe */ \
  119. SAVE_4GPRS(3, r1); /* save r3 - r6 in stackframe */ \
  120. SAVE_2GPRS(7, r1); /* save r7, r8 in stackframe */ \
  121. ld r9,area+EX_R9(r13); /* move r9, r10 to stackframe */ \
  122. ld r10,area+EX_R10(r13); \
  123. std r9,GPR9(r1); \
  124. std r10,GPR10(r1); \
  125. ld r9,area+EX_R11(r13); /* move r11 - r13 to stackframe */ \
  126. ld r10,area+EX_R12(r13); \
  127. ld r11,area+EX_R13(r13); \
  128. std r9,GPR11(r1); \
  129. std r10,GPR12(r1); \
  130. std r11,GPR13(r1); \
  131. BEGIN_FTR_SECTION_NESTED(66); \
  132. ld r10,area+EX_CFAR(r13); \
  133. std r10,ORIG_GPR3(r1); \
  134. END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \
  135. ld r2,PACATOC(r13); /* get kernel TOC into r2 */ \
  136. mflr r9; /* save LR in stackframe */ \
  137. std r9,_LINK(r1); \
  138. mfctr r10; /* save CTR in stackframe */ \
  139. std r10,_CTR(r1); \
  140. lbz r10,PACASOFTIRQEN(r13); \
  141. mfspr r11,SPRN_XER; /* save XER in stackframe */ \
  142. std r10,SOFTE(r1); \
  143. std r11,_XER(r1); \
  144. li r9,(n)+1; \
  145. std r9,_TRAP(r1); /* set trap number */ \
  146. li r10,0; \
  147. ld r11,exception_marker@toc(r2); \
  148. std r10,RESULT(r1); /* clear regs->result */ \
  149. std r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */ \
  150. ACCOUNT_STOLEN_TIME
  151. /*
  152. * Exception vectors.
  153. */
  154. #define STD_EXCEPTION_PSERIES(loc, vec, label) \
  155. . = loc; \
  156. .globl label##_pSeries; \
  157. label##_pSeries: \
  158. HMT_MEDIUM; \
  159. DO_KVM vec; \
  160. SET_SCRATCH0(r13); /* save r13 */ \
  161. EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, EXC_STD)
  162. #define STD_EXCEPTION_HV(loc, vec, label) \
  163. . = loc; \
  164. .globl label##_hv; \
  165. label##_hv: \
  166. HMT_MEDIUM; \
  167. DO_KVM vec; \
  168. SET_SCRATCH0(r13); /* save r13 */ \
  169. EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, EXC_HV)
  170. #define __MASKABLE_EXCEPTION_PSERIES(vec, label, h) \
  171. HMT_MEDIUM; \
  172. DO_KVM vec; \
  173. SET_SCRATCH0(r13); /* save r13 */ \
  174. GET_PACA(r13); \
  175. std r9,PACA_EXGEN+EX_R9(r13); /* save r9, r10 */ \
  176. std r10,PACA_EXGEN+EX_R10(r13); \
  177. lbz r10,PACASOFTIRQEN(r13); \
  178. mfcr r9; \
  179. cmpwi r10,0; \
  180. beq masked_##h##interrupt; \
  181. GET_SCRATCH0(r10); \
  182. std r10,PACA_EXGEN+EX_R13(r13); \
  183. std r11,PACA_EXGEN+EX_R11(r13); \
  184. std r12,PACA_EXGEN+EX_R12(r13); \
  185. ld r12,PACAKBASE(r13); /* get high part of &label */ \
  186. ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \
  187. mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
  188. LOAD_HANDLER(r12,label##_common) \
  189. mtspr SPRN_##h##SRR0,r12; \
  190. mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
  191. mtspr SPRN_##h##SRR1,r10; \
  192. h##rfid; \
  193. b . /* prevent speculative execution */
  194. #define _MASKABLE_EXCEPTION_PSERIES(vec, label, h) \
  195. __MASKABLE_EXCEPTION_PSERIES(vec, label, h)
  196. #define MASKABLE_EXCEPTION_PSERIES(loc, vec, label) \
  197. . = loc; \
  198. .globl label##_pSeries; \
  199. label##_pSeries: \
  200. _MASKABLE_EXCEPTION_PSERIES(vec, label, EXC_STD)
  201. #define MASKABLE_EXCEPTION_HV(loc, vec, label) \
  202. . = loc; \
  203. .globl label##_hv; \
  204. label##_hv: \
  205. _MASKABLE_EXCEPTION_PSERIES(vec, label, EXC_HV)
  206. #ifdef CONFIG_PPC_ISERIES
  207. #define DISABLE_INTS \
  208. li r11,0; \
  209. stb r11,PACASOFTIRQEN(r13); \
  210. BEGIN_FW_FTR_SECTION; \
  211. stb r11,PACAHARDIRQEN(r13); \
  212. END_FW_FTR_SECTION_IFCLR(FW_FEATURE_ISERIES); \
  213. TRACE_DISABLE_INTS; \
  214. BEGIN_FW_FTR_SECTION; \
  215. mfmsr r10; \
  216. ori r10,r10,MSR_EE; \
  217. mtmsrd r10,1; \
  218. END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
  219. #else
  220. #define DISABLE_INTS \
  221. li r11,0; \
  222. stb r11,PACASOFTIRQEN(r13); \
  223. stb r11,PACAHARDIRQEN(r13); \
  224. TRACE_DISABLE_INTS
  225. #endif /* CONFIG_PPC_ISERIES */
  226. #define ENABLE_INTS \
  227. ld r12,_MSR(r1); \
  228. mfmsr r11; \
  229. rlwimi r11,r12,0,MSR_EE; \
  230. mtmsrd r11,1
  231. #define STD_EXCEPTION_COMMON(trap, label, hdlr) \
  232. .align 7; \
  233. .globl label##_common; \
  234. label##_common: \
  235. EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \
  236. DISABLE_INTS; \
  237. bl .save_nvgprs; \
  238. addi r3,r1,STACK_FRAME_OVERHEAD; \
  239. bl hdlr; \
  240. b .ret_from_except
  241. /*
  242. * Like STD_EXCEPTION_COMMON, but for exceptions that can occur
  243. * in the idle task and therefore need the special idle handling.
  244. */
  245. #define STD_EXCEPTION_COMMON_IDLE(trap, label, hdlr) \
  246. .align 7; \
  247. .globl label##_common; \
  248. label##_common: \
  249. EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \
  250. FINISH_NAP; \
  251. DISABLE_INTS; \
  252. bl .save_nvgprs; \
  253. addi r3,r1,STACK_FRAME_OVERHEAD; \
  254. bl hdlr; \
  255. b .ret_from_except
  256. #define STD_EXCEPTION_COMMON_LITE(trap, label, hdlr) \
  257. .align 7; \
  258. .globl label##_common; \
  259. label##_common: \
  260. EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \
  261. FINISH_NAP; \
  262. DISABLE_INTS; \
  263. BEGIN_FTR_SECTION \
  264. bl .ppc64_runlatch_on; \
  265. END_FTR_SECTION_IFSET(CPU_FTR_CTRL) \
  266. addi r3,r1,STACK_FRAME_OVERHEAD; \
  267. bl hdlr; \
  268. b .ret_from_except_lite
  269. /*
  270. * When the idle code in power4_idle puts the CPU into NAP mode,
  271. * it has to do so in a loop, and relies on the external interrupt
  272. * and decrementer interrupt entry code to get it out of the loop.
  273. * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags
  274. * to signal that it is in the loop and needs help to get out.
  275. */
  276. #ifdef CONFIG_PPC_970_NAP
  277. #define FINISH_NAP \
  278. BEGIN_FTR_SECTION \
  279. clrrdi r11,r1,THREAD_SHIFT; \
  280. ld r9,TI_LOCAL_FLAGS(r11); \
  281. andi. r10,r9,_TLF_NAPPING; \
  282. bnel power4_fixup_nap; \
  283. END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
  284. #else
  285. #define FINISH_NAP
  286. #endif
  287. #endif /* _ASM_POWERPC_EXCEPTION_H */