vxge-main.c 118 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622262326242625262626272628262926302631263226332634263526362637263826392640264126422643264426452646264726482649265026512652265326542655265626572658265926602661266226632664266526662667266826692670267126722673267426752676267726782679268026812682268326842685268626872688268926902691269226932694269526962697269826992700270127022703270427052706270727082709271027112712271327142715271627172718271927202721272227232724272527262727272827292730273127322733273427352736273727382739274027412742274327442745274627472748274927502751275227532754275527562757275827592760276127622763276427652766276727682769277027712772277327742775277627772778277927802781278227832784278527862787278827892790279127922793279427952796279727982799280028012802280328042805280628072808280928102811281228132814281528162817281828192820282128222823282428252826282728282829283028312832283328342835283628372838283928402841284228432844284528462847284828492850285128522853285428552856285728582859286028612862286328642865286628672868286928702871287228732874287528762877287828792880288128822883288428852886288728882889289028912892289328942895289628972898289929002901290229032904290529062907290829092910291129122913291429152916291729182919292029212922292329242925292629272928292929302931293229332934293529362937293829392940294129422943294429452946294729482949295029512952295329542955295629572958295929602961296229632964296529662967296829692970297129722973297429752976297729782979298029812982298329842985298629872988298929902991299229932994299529962997299829993000300130023003300430053006300730083009301030113012301330143015301630173018301930203021302230233024302530263027302830293030303130323033303430353036303730383039304030413042304330443045304630473048304930503051305230533054305530563057305830593060306130623063306430653066306730683069307030713072307330743075307630773078307930803081308230833084308530863087308830893090309130923093309430953096309730983099310031013102310331043105310631073108310931103111311231133114311531163117311831193120312131223123312431253126312731283129313031313132313331343135313631373138313931403141314231433144314531463147314831493150315131523153315431553156315731583159316031613162316331643165316631673168316931703171317231733174317531763177317831793180318131823183318431853186318731883189319031913192319331943195319631973198319932003201320232033204320532063207320832093210321132123213321432153216321732183219322032213222322332243225322632273228322932303231323232333234323532363237323832393240324132423243324432453246324732483249325032513252325332543255325632573258325932603261326232633264326532663267326832693270327132723273327432753276327732783279328032813282328332843285328632873288328932903291329232933294329532963297329832993300330133023303330433053306330733083309331033113312331333143315331633173318331933203321332233233324332533263327332833293330333133323333333433353336333733383339334033413342334333443345334633473348334933503351335233533354335533563357335833593360336133623363336433653366336733683369337033713372337333743375337633773378337933803381338233833384338533863387338833893390339133923393339433953396339733983399340034013402340334043405340634073408340934103411341234133414341534163417341834193420342134223423342434253426342734283429343034313432343334343435343634373438343934403441344234433444344534463447344834493450345134523453345434553456345734583459346034613462346334643465346634673468346934703471347234733474347534763477347834793480348134823483348434853486348734883489349034913492349334943495349634973498349935003501350235033504350535063507350835093510351135123513351435153516351735183519352035213522352335243525352635273528352935303531353235333534353535363537353835393540354135423543354435453546354735483549355035513552355335543555355635573558355935603561356235633564356535663567356835693570357135723573357435753576357735783579358035813582358335843585358635873588358935903591359235933594359535963597359835993600360136023603360436053606360736083609361036113612361336143615361636173618361936203621362236233624362536263627362836293630363136323633363436353636363736383639364036413642364336443645364636473648364936503651365236533654365536563657365836593660366136623663366436653666366736683669367036713672367336743675367636773678367936803681368236833684368536863687368836893690369136923693369436953696369736983699370037013702370337043705370637073708370937103711371237133714371537163717371837193720372137223723372437253726372737283729373037313732373337343735373637373738373937403741374237433744374537463747374837493750375137523753375437553756375737583759376037613762376337643765376637673768376937703771377237733774377537763777377837793780378137823783378437853786378737883789379037913792379337943795379637973798379938003801380238033804380538063807380838093810381138123813381438153816381738183819382038213822382338243825382638273828382938303831383238333834383538363837383838393840384138423843384438453846384738483849385038513852385338543855385638573858385938603861386238633864386538663867386838693870387138723873387438753876387738783879388038813882388338843885388638873888388938903891389238933894389538963897389838993900390139023903390439053906390739083909391039113912391339143915391639173918391939203921392239233924392539263927392839293930393139323933393439353936393739383939394039413942394339443945394639473948394939503951395239533954395539563957395839593960396139623963396439653966396739683969397039713972397339743975397639773978397939803981398239833984398539863987398839893990399139923993399439953996399739983999400040014002400340044005400640074008400940104011401240134014401540164017401840194020402140224023402440254026402740284029403040314032403340344035403640374038403940404041404240434044404540464047404840494050405140524053405440554056405740584059406040614062406340644065406640674068406940704071407240734074407540764077407840794080408140824083408440854086408740884089409040914092409340944095409640974098409941004101410241034104410541064107410841094110411141124113411441154116411741184119412041214122412341244125412641274128412941304131413241334134413541364137413841394140414141424143414441454146414741484149415041514152415341544155415641574158415941604161416241634164416541664167416841694170417141724173417441754176417741784179418041814182418341844185418641874188418941904191419241934194419541964197419841994200420142024203420442054206420742084209421042114212421342144215421642174218421942204221422242234224422542264227422842294230423142324233423442354236423742384239424042414242424342444245424642474248424942504251425242534254425542564257425842594260426142624263426442654266426742684269427042714272427342744275427642774278427942804281428242834284428542864287428842894290429142924293429442954296429742984299430043014302430343044305430643074308430943104311431243134314431543164317431843194320432143224323432443254326432743284329433043314332433343344335433643374338433943404341434243434344434543464347434843494350435143524353435443554356435743584359436043614362436343644365436643674368436943704371437243734374437543764377437843794380438143824383438443854386438743884389439043914392439343944395439643974398439944004401440244034404440544064407440844094410441144124413441444154416441744184419442044214422442344244425442644274428442944304431443244334434443544364437443844394440444144424443444444454446444744484449445044514452445344544455445644574458445944604461446244634464446544664467446844694470447144724473447444754476447744784479448044814482
  1. /******************************************************************************
  2. * This software may be used and distributed according to the terms of
  3. * the GNU General Public License (GPL), incorporated herein by reference.
  4. * Drivers based on or derived from this code fall under the GPL and must
  5. * retain the authorship, copyright and license notice. This file is not
  6. * a complete program and may only be used when the entire operating
  7. * system is licensed under the GPL.
  8. * See the file COPYING in this distribution for more information.
  9. *
  10. * vxge-main.c: Driver for Exar Corp's X3100 Series 10GbE PCIe I/O
  11. * Virtualized Server Adapter.
  12. * Copyright(c) 2002-2010 Exar Corp.
  13. *
  14. * The module loadable parameters that are supported by the driver and a brief
  15. * explanation of all the variables:
  16. * vlan_tag_strip:
  17. * Strip VLAN Tag enable/disable. Instructs the device to remove
  18. * the VLAN tag from all received tagged frames that are not
  19. * replicated at the internal L2 switch.
  20. * 0 - Do not strip the VLAN tag.
  21. * 1 - Strip the VLAN tag.
  22. *
  23. * addr_learn_en:
  24. * Enable learning the mac address of the guest OS interface in
  25. * a virtualization environment.
  26. * 0 - DISABLE
  27. * 1 - ENABLE
  28. *
  29. * max_config_port:
  30. * Maximum number of port to be supported.
  31. * MIN -1 and MAX - 2
  32. *
  33. * max_config_vpath:
  34. * This configures the maximum no of VPATH configures for each
  35. * device function.
  36. * MIN - 1 and MAX - 17
  37. *
  38. * max_config_dev:
  39. * This configures maximum no of Device function to be enabled.
  40. * MIN - 1 and MAX - 17
  41. *
  42. ******************************************************************************/
  43. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  44. #include <linux/if_vlan.h>
  45. #include <linux/pci.h>
  46. #include <linux/slab.h>
  47. #include <linux/tcp.h>
  48. #include <net/ip.h>
  49. #include <linux/netdevice.h>
  50. #include <linux/etherdevice.h>
  51. #include "vxge-main.h"
  52. #include "vxge-reg.h"
  53. MODULE_LICENSE("Dual BSD/GPL");
  54. MODULE_DESCRIPTION("Neterion's X3100 Series 10GbE PCIe I/O"
  55. "Virtualized Server Adapter");
  56. static DEFINE_PCI_DEVICE_TABLE(vxge_id_table) = {
  57. {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_TITAN_WIN, PCI_ANY_ID,
  58. PCI_ANY_ID},
  59. {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_TITAN_UNI, PCI_ANY_ID,
  60. PCI_ANY_ID},
  61. {0}
  62. };
  63. MODULE_DEVICE_TABLE(pci, vxge_id_table);
  64. VXGE_MODULE_PARAM_INT(vlan_tag_strip, VXGE_HW_VPATH_RPA_STRIP_VLAN_TAG_ENABLE);
  65. VXGE_MODULE_PARAM_INT(addr_learn_en, VXGE_HW_MAC_ADDR_LEARN_DEFAULT);
  66. VXGE_MODULE_PARAM_INT(max_config_port, VXGE_MAX_CONFIG_PORT);
  67. VXGE_MODULE_PARAM_INT(max_config_vpath, VXGE_USE_DEFAULT);
  68. VXGE_MODULE_PARAM_INT(max_mac_vpath, VXGE_MAX_MAC_ADDR_COUNT);
  69. VXGE_MODULE_PARAM_INT(max_config_dev, VXGE_MAX_CONFIG_DEV);
  70. static u16 vpath_selector[VXGE_HW_MAX_VIRTUAL_PATHS] =
  71. {0, 1, 3, 3, 7, 7, 7, 7, 15, 15, 15, 15, 15, 15, 15, 15, 31};
  72. static unsigned int bw_percentage[VXGE_HW_MAX_VIRTUAL_PATHS] =
  73. {[0 ...(VXGE_HW_MAX_VIRTUAL_PATHS - 1)] = 0xFF};
  74. module_param_array(bw_percentage, uint, NULL, 0);
  75. static struct vxge_drv_config *driver_config;
  76. static enum vxge_hw_status vxge_add_mac_addr(struct vxgedev *vdev,
  77. struct macInfo *mac);
  78. static enum vxge_hw_status vxge_del_mac_addr(struct vxgedev *vdev,
  79. struct macInfo *mac);
  80. static int vxge_mac_list_add(struct vxge_vpath *vpath, struct macInfo *mac);
  81. static int vxge_mac_list_del(struct vxge_vpath *vpath, struct macInfo *mac);
  82. static enum vxge_hw_status vxge_restore_vpath_vid_table(struct vxge_vpath *vpath);
  83. static enum vxge_hw_status vxge_restore_vpath_mac_addr(struct vxge_vpath *vpath);
  84. static enum vxge_hw_status vxge_reset_all_vpaths(struct vxgedev *vdev);
  85. static inline int is_vxge_card_up(struct vxgedev *vdev)
  86. {
  87. return test_bit(__VXGE_STATE_CARD_UP, &vdev->state);
  88. }
  89. static inline void VXGE_COMPLETE_VPATH_TX(struct vxge_fifo *fifo)
  90. {
  91. struct sk_buff **skb_ptr = NULL;
  92. struct sk_buff **temp;
  93. #define NR_SKB_COMPLETED 128
  94. struct sk_buff *completed[NR_SKB_COMPLETED];
  95. int more;
  96. do {
  97. more = 0;
  98. skb_ptr = completed;
  99. if (__netif_tx_trylock(fifo->txq)) {
  100. vxge_hw_vpath_poll_tx(fifo->handle, &skb_ptr,
  101. NR_SKB_COMPLETED, &more);
  102. __netif_tx_unlock(fifo->txq);
  103. }
  104. /* free SKBs */
  105. for (temp = completed; temp != skb_ptr; temp++)
  106. dev_kfree_skb_irq(*temp);
  107. } while (more);
  108. }
  109. static inline void VXGE_COMPLETE_ALL_TX(struct vxgedev *vdev)
  110. {
  111. int i;
  112. /* Complete all transmits */
  113. for (i = 0; i < vdev->no_of_vpath; i++)
  114. VXGE_COMPLETE_VPATH_TX(&vdev->vpaths[i].fifo);
  115. }
  116. static inline void VXGE_COMPLETE_ALL_RX(struct vxgedev *vdev)
  117. {
  118. int i;
  119. struct vxge_ring *ring;
  120. /* Complete all receives*/
  121. for (i = 0; i < vdev->no_of_vpath; i++) {
  122. ring = &vdev->vpaths[i].ring;
  123. vxge_hw_vpath_poll_rx(ring->handle);
  124. }
  125. }
  126. /*
  127. * vxge_callback_link_up
  128. *
  129. * This function is called during interrupt context to notify link up state
  130. * change.
  131. */
  132. static void
  133. vxge_callback_link_up(struct __vxge_hw_device *hldev)
  134. {
  135. struct net_device *dev = hldev->ndev;
  136. struct vxgedev *vdev = (struct vxgedev *)netdev_priv(dev);
  137. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  138. vdev->ndev->name, __func__, __LINE__);
  139. netdev_notice(vdev->ndev, "Link Up\n");
  140. vdev->stats.link_up++;
  141. netif_carrier_on(vdev->ndev);
  142. netif_tx_wake_all_queues(vdev->ndev);
  143. vxge_debug_entryexit(VXGE_TRACE,
  144. "%s: %s:%d Exiting...", vdev->ndev->name, __func__, __LINE__);
  145. }
  146. /*
  147. * vxge_callback_link_down
  148. *
  149. * This function is called during interrupt context to notify link down state
  150. * change.
  151. */
  152. static void
  153. vxge_callback_link_down(struct __vxge_hw_device *hldev)
  154. {
  155. struct net_device *dev = hldev->ndev;
  156. struct vxgedev *vdev = (struct vxgedev *)netdev_priv(dev);
  157. vxge_debug_entryexit(VXGE_TRACE,
  158. "%s: %s:%d", vdev->ndev->name, __func__, __LINE__);
  159. netdev_notice(vdev->ndev, "Link Down\n");
  160. vdev->stats.link_down++;
  161. netif_carrier_off(vdev->ndev);
  162. netif_tx_stop_all_queues(vdev->ndev);
  163. vxge_debug_entryexit(VXGE_TRACE,
  164. "%s: %s:%d Exiting...", vdev->ndev->name, __func__, __LINE__);
  165. }
  166. /*
  167. * vxge_rx_alloc
  168. *
  169. * Allocate SKB.
  170. */
  171. static struct sk_buff*
  172. vxge_rx_alloc(void *dtrh, struct vxge_ring *ring, const int skb_size)
  173. {
  174. struct net_device *dev;
  175. struct sk_buff *skb;
  176. struct vxge_rx_priv *rx_priv;
  177. dev = ring->ndev;
  178. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  179. ring->ndev->name, __func__, __LINE__);
  180. rx_priv = vxge_hw_ring_rxd_private_get(dtrh);
  181. /* try to allocate skb first. this one may fail */
  182. skb = netdev_alloc_skb(dev, skb_size +
  183. VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
  184. if (skb == NULL) {
  185. vxge_debug_mem(VXGE_ERR,
  186. "%s: out of memory to allocate SKB", dev->name);
  187. ring->stats.skb_alloc_fail++;
  188. return NULL;
  189. }
  190. vxge_debug_mem(VXGE_TRACE,
  191. "%s: %s:%d Skb : 0x%p", ring->ndev->name,
  192. __func__, __LINE__, skb);
  193. skb_reserve(skb, VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
  194. rx_priv->skb = skb;
  195. rx_priv->skb_data = NULL;
  196. rx_priv->data_size = skb_size;
  197. vxge_debug_entryexit(VXGE_TRACE,
  198. "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
  199. return skb;
  200. }
  201. /*
  202. * vxge_rx_map
  203. */
  204. static int vxge_rx_map(void *dtrh, struct vxge_ring *ring)
  205. {
  206. struct vxge_rx_priv *rx_priv;
  207. dma_addr_t dma_addr;
  208. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  209. ring->ndev->name, __func__, __LINE__);
  210. rx_priv = vxge_hw_ring_rxd_private_get(dtrh);
  211. rx_priv->skb_data = rx_priv->skb->data;
  212. dma_addr = pci_map_single(ring->pdev, rx_priv->skb_data,
  213. rx_priv->data_size, PCI_DMA_FROMDEVICE);
  214. if (unlikely(pci_dma_mapping_error(ring->pdev, dma_addr))) {
  215. ring->stats.pci_map_fail++;
  216. return -EIO;
  217. }
  218. vxge_debug_mem(VXGE_TRACE,
  219. "%s: %s:%d 1 buffer mode dma_addr = 0x%llx",
  220. ring->ndev->name, __func__, __LINE__,
  221. (unsigned long long)dma_addr);
  222. vxge_hw_ring_rxd_1b_set(dtrh, dma_addr, rx_priv->data_size);
  223. rx_priv->data_dma = dma_addr;
  224. vxge_debug_entryexit(VXGE_TRACE,
  225. "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
  226. return 0;
  227. }
  228. /*
  229. * vxge_rx_initial_replenish
  230. * Allocation of RxD as an initial replenish procedure.
  231. */
  232. static enum vxge_hw_status
  233. vxge_rx_initial_replenish(void *dtrh, void *userdata)
  234. {
  235. struct vxge_ring *ring = (struct vxge_ring *)userdata;
  236. struct vxge_rx_priv *rx_priv;
  237. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  238. ring->ndev->name, __func__, __LINE__);
  239. if (vxge_rx_alloc(dtrh, ring,
  240. VXGE_LL_MAX_FRAME_SIZE(ring->ndev)) == NULL)
  241. return VXGE_HW_FAIL;
  242. if (vxge_rx_map(dtrh, ring)) {
  243. rx_priv = vxge_hw_ring_rxd_private_get(dtrh);
  244. dev_kfree_skb(rx_priv->skb);
  245. return VXGE_HW_FAIL;
  246. }
  247. vxge_debug_entryexit(VXGE_TRACE,
  248. "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
  249. return VXGE_HW_OK;
  250. }
  251. static inline void
  252. vxge_rx_complete(struct vxge_ring *ring, struct sk_buff *skb, u16 vlan,
  253. int pkt_length, struct vxge_hw_ring_rxd_info *ext_info)
  254. {
  255. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  256. ring->ndev->name, __func__, __LINE__);
  257. skb_record_rx_queue(skb, ring->driver_id);
  258. skb->protocol = eth_type_trans(skb, ring->ndev);
  259. ring->stats.rx_frms++;
  260. ring->stats.rx_bytes += pkt_length;
  261. if (skb->pkt_type == PACKET_MULTICAST)
  262. ring->stats.rx_mcast++;
  263. vxge_debug_rx(VXGE_TRACE,
  264. "%s: %s:%d skb protocol = %d",
  265. ring->ndev->name, __func__, __LINE__, skb->protocol);
  266. if (ring->gro_enable) {
  267. if (ring->vlgrp && ext_info->vlan &&
  268. (ring->vlan_tag_strip ==
  269. VXGE_HW_VPATH_RPA_STRIP_VLAN_TAG_ENABLE))
  270. vlan_gro_receive(ring->napi_p, ring->vlgrp,
  271. ext_info->vlan, skb);
  272. else
  273. napi_gro_receive(ring->napi_p, skb);
  274. } else {
  275. if (ring->vlgrp && vlan &&
  276. (ring->vlan_tag_strip ==
  277. VXGE_HW_VPATH_RPA_STRIP_VLAN_TAG_ENABLE))
  278. vlan_hwaccel_receive_skb(skb, ring->vlgrp, vlan);
  279. else
  280. netif_receive_skb(skb);
  281. }
  282. vxge_debug_entryexit(VXGE_TRACE,
  283. "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
  284. }
  285. static inline void vxge_re_pre_post(void *dtr, struct vxge_ring *ring,
  286. struct vxge_rx_priv *rx_priv)
  287. {
  288. pci_dma_sync_single_for_device(ring->pdev,
  289. rx_priv->data_dma, rx_priv->data_size, PCI_DMA_FROMDEVICE);
  290. vxge_hw_ring_rxd_1b_set(dtr, rx_priv->data_dma, rx_priv->data_size);
  291. vxge_hw_ring_rxd_pre_post(ring->handle, dtr);
  292. }
  293. static inline void vxge_post(int *dtr_cnt, void **first_dtr,
  294. void *post_dtr, struct __vxge_hw_ring *ringh)
  295. {
  296. int dtr_count = *dtr_cnt;
  297. if ((*dtr_cnt % VXGE_HW_RXSYNC_FREQ_CNT) == 0) {
  298. if (*first_dtr)
  299. vxge_hw_ring_rxd_post_post_wmb(ringh, *first_dtr);
  300. *first_dtr = post_dtr;
  301. } else
  302. vxge_hw_ring_rxd_post_post(ringh, post_dtr);
  303. dtr_count++;
  304. *dtr_cnt = dtr_count;
  305. }
  306. /*
  307. * vxge_rx_1b_compl
  308. *
  309. * If the interrupt is because of a received frame or if the receive ring
  310. * contains fresh as yet un-processed frames, this function is called.
  311. */
  312. static enum vxge_hw_status
  313. vxge_rx_1b_compl(struct __vxge_hw_ring *ringh, void *dtr,
  314. u8 t_code, void *userdata)
  315. {
  316. struct vxge_ring *ring = (struct vxge_ring *)userdata;
  317. struct net_device *dev = ring->ndev;
  318. unsigned int dma_sizes;
  319. void *first_dtr = NULL;
  320. int dtr_cnt = 0;
  321. int data_size;
  322. dma_addr_t data_dma;
  323. int pkt_length;
  324. struct sk_buff *skb;
  325. struct vxge_rx_priv *rx_priv;
  326. struct vxge_hw_ring_rxd_info ext_info;
  327. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  328. ring->ndev->name, __func__, __LINE__);
  329. ring->pkts_processed = 0;
  330. vxge_hw_ring_replenish(ringh);
  331. do {
  332. prefetch((char *)dtr + L1_CACHE_BYTES);
  333. rx_priv = vxge_hw_ring_rxd_private_get(dtr);
  334. skb = rx_priv->skb;
  335. data_size = rx_priv->data_size;
  336. data_dma = rx_priv->data_dma;
  337. prefetch(rx_priv->skb_data);
  338. vxge_debug_rx(VXGE_TRACE,
  339. "%s: %s:%d skb = 0x%p",
  340. ring->ndev->name, __func__, __LINE__, skb);
  341. vxge_hw_ring_rxd_1b_get(ringh, dtr, &dma_sizes);
  342. pkt_length = dma_sizes;
  343. pkt_length -= ETH_FCS_LEN;
  344. vxge_debug_rx(VXGE_TRACE,
  345. "%s: %s:%d Packet Length = %d",
  346. ring->ndev->name, __func__, __LINE__, pkt_length);
  347. vxge_hw_ring_rxd_1b_info_get(ringh, dtr, &ext_info);
  348. /* check skb validity */
  349. vxge_assert(skb);
  350. prefetch((char *)skb + L1_CACHE_BYTES);
  351. if (unlikely(t_code)) {
  352. if (vxge_hw_ring_handle_tcode(ringh, dtr, t_code) !=
  353. VXGE_HW_OK) {
  354. ring->stats.rx_errors++;
  355. vxge_debug_rx(VXGE_TRACE,
  356. "%s: %s :%d Rx T_code is %d",
  357. ring->ndev->name, __func__,
  358. __LINE__, t_code);
  359. /* If the t_code is not supported and if the
  360. * t_code is other than 0x5 (unparseable packet
  361. * such as unknown UPV6 header), Drop it !!!
  362. */
  363. vxge_re_pre_post(dtr, ring, rx_priv);
  364. vxge_post(&dtr_cnt, &first_dtr, dtr, ringh);
  365. ring->stats.rx_dropped++;
  366. continue;
  367. }
  368. }
  369. if (pkt_length > VXGE_LL_RX_COPY_THRESHOLD) {
  370. if (vxge_rx_alloc(dtr, ring, data_size) != NULL) {
  371. if (!vxge_rx_map(dtr, ring)) {
  372. skb_put(skb, pkt_length);
  373. pci_unmap_single(ring->pdev, data_dma,
  374. data_size, PCI_DMA_FROMDEVICE);
  375. vxge_hw_ring_rxd_pre_post(ringh, dtr);
  376. vxge_post(&dtr_cnt, &first_dtr, dtr,
  377. ringh);
  378. } else {
  379. dev_kfree_skb(rx_priv->skb);
  380. rx_priv->skb = skb;
  381. rx_priv->data_size = data_size;
  382. vxge_re_pre_post(dtr, ring, rx_priv);
  383. vxge_post(&dtr_cnt, &first_dtr, dtr,
  384. ringh);
  385. ring->stats.rx_dropped++;
  386. break;
  387. }
  388. } else {
  389. vxge_re_pre_post(dtr, ring, rx_priv);
  390. vxge_post(&dtr_cnt, &first_dtr, dtr, ringh);
  391. ring->stats.rx_dropped++;
  392. break;
  393. }
  394. } else {
  395. struct sk_buff *skb_up;
  396. skb_up = netdev_alloc_skb(dev, pkt_length +
  397. VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
  398. if (skb_up != NULL) {
  399. skb_reserve(skb_up,
  400. VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
  401. pci_dma_sync_single_for_cpu(ring->pdev,
  402. data_dma, data_size,
  403. PCI_DMA_FROMDEVICE);
  404. vxge_debug_mem(VXGE_TRACE,
  405. "%s: %s:%d skb_up = %p",
  406. ring->ndev->name, __func__,
  407. __LINE__, skb);
  408. memcpy(skb_up->data, skb->data, pkt_length);
  409. vxge_re_pre_post(dtr, ring, rx_priv);
  410. vxge_post(&dtr_cnt, &first_dtr, dtr,
  411. ringh);
  412. /* will netif_rx small SKB instead */
  413. skb = skb_up;
  414. skb_put(skb, pkt_length);
  415. } else {
  416. vxge_re_pre_post(dtr, ring, rx_priv);
  417. vxge_post(&dtr_cnt, &first_dtr, dtr, ringh);
  418. vxge_debug_rx(VXGE_ERR,
  419. "%s: vxge_rx_1b_compl: out of "
  420. "memory", dev->name);
  421. ring->stats.skb_alloc_fail++;
  422. break;
  423. }
  424. }
  425. if ((ext_info.proto & VXGE_HW_FRAME_PROTO_TCP_OR_UDP) &&
  426. !(ext_info.proto & VXGE_HW_FRAME_PROTO_IP_FRAG) &&
  427. ring->rx_csum && /* Offload Rx side CSUM */
  428. ext_info.l3_cksum == VXGE_HW_L3_CKSUM_OK &&
  429. ext_info.l4_cksum == VXGE_HW_L4_CKSUM_OK)
  430. skb->ip_summed = CHECKSUM_UNNECESSARY;
  431. else
  432. skb_checksum_none_assert(skb);
  433. /* rth_hash_type and rth_it_hit are non-zero regardless of
  434. * whether rss is enabled. Only the rth_value is zero/non-zero
  435. * if rss is disabled/enabled, so key off of that.
  436. */
  437. if (ext_info.rth_value)
  438. skb->rxhash = ext_info.rth_value;
  439. vxge_rx_complete(ring, skb, ext_info.vlan,
  440. pkt_length, &ext_info);
  441. ring->budget--;
  442. ring->pkts_processed++;
  443. if (!ring->budget)
  444. break;
  445. } while (vxge_hw_ring_rxd_next_completed(ringh, &dtr,
  446. &t_code) == VXGE_HW_OK);
  447. if (first_dtr)
  448. vxge_hw_ring_rxd_post_post_wmb(ringh, first_dtr);
  449. vxge_debug_entryexit(VXGE_TRACE,
  450. "%s:%d Exiting...",
  451. __func__, __LINE__);
  452. return VXGE_HW_OK;
  453. }
  454. /*
  455. * vxge_xmit_compl
  456. *
  457. * If an interrupt was raised to indicate DMA complete of the Tx packet,
  458. * this function is called. It identifies the last TxD whose buffer was
  459. * freed and frees all skbs whose data have already DMA'ed into the NICs
  460. * internal memory.
  461. */
  462. static enum vxge_hw_status
  463. vxge_xmit_compl(struct __vxge_hw_fifo *fifo_hw, void *dtr,
  464. enum vxge_hw_fifo_tcode t_code, void *userdata,
  465. struct sk_buff ***skb_ptr, int nr_skb, int *more)
  466. {
  467. struct vxge_fifo *fifo = (struct vxge_fifo *)userdata;
  468. struct sk_buff *skb, **done_skb = *skb_ptr;
  469. int pkt_cnt = 0;
  470. vxge_debug_entryexit(VXGE_TRACE,
  471. "%s:%d Entered....", __func__, __LINE__);
  472. do {
  473. int frg_cnt;
  474. skb_frag_t *frag;
  475. int i = 0, j;
  476. struct vxge_tx_priv *txd_priv =
  477. vxge_hw_fifo_txdl_private_get(dtr);
  478. skb = txd_priv->skb;
  479. frg_cnt = skb_shinfo(skb)->nr_frags;
  480. frag = &skb_shinfo(skb)->frags[0];
  481. vxge_debug_tx(VXGE_TRACE,
  482. "%s: %s:%d fifo_hw = %p dtr = %p "
  483. "tcode = 0x%x", fifo->ndev->name, __func__,
  484. __LINE__, fifo_hw, dtr, t_code);
  485. /* check skb validity */
  486. vxge_assert(skb);
  487. vxge_debug_tx(VXGE_TRACE,
  488. "%s: %s:%d skb = %p itxd_priv = %p frg_cnt = %d",
  489. fifo->ndev->name, __func__, __LINE__,
  490. skb, txd_priv, frg_cnt);
  491. if (unlikely(t_code)) {
  492. fifo->stats.tx_errors++;
  493. vxge_debug_tx(VXGE_ERR,
  494. "%s: tx: dtr %p completed due to "
  495. "error t_code %01x", fifo->ndev->name,
  496. dtr, t_code);
  497. vxge_hw_fifo_handle_tcode(fifo_hw, dtr, t_code);
  498. }
  499. /* for unfragmented skb */
  500. pci_unmap_single(fifo->pdev, txd_priv->dma_buffers[i++],
  501. skb_headlen(skb), PCI_DMA_TODEVICE);
  502. for (j = 0; j < frg_cnt; j++) {
  503. pci_unmap_page(fifo->pdev,
  504. txd_priv->dma_buffers[i++],
  505. frag->size, PCI_DMA_TODEVICE);
  506. frag += 1;
  507. }
  508. vxge_hw_fifo_txdl_free(fifo_hw, dtr);
  509. /* Updating the statistics block */
  510. fifo->stats.tx_frms++;
  511. fifo->stats.tx_bytes += skb->len;
  512. *done_skb++ = skb;
  513. if (--nr_skb <= 0) {
  514. *more = 1;
  515. break;
  516. }
  517. pkt_cnt++;
  518. if (pkt_cnt > fifo->indicate_max_pkts)
  519. break;
  520. } while (vxge_hw_fifo_txdl_next_completed(fifo_hw,
  521. &dtr, &t_code) == VXGE_HW_OK);
  522. *skb_ptr = done_skb;
  523. if (netif_tx_queue_stopped(fifo->txq))
  524. netif_tx_wake_queue(fifo->txq);
  525. vxge_debug_entryexit(VXGE_TRACE,
  526. "%s: %s:%d Exiting...",
  527. fifo->ndev->name, __func__, __LINE__);
  528. return VXGE_HW_OK;
  529. }
  530. /* select a vpath to transmit the packet */
  531. static u32 vxge_get_vpath_no(struct vxgedev *vdev, struct sk_buff *skb)
  532. {
  533. u16 queue_len, counter = 0;
  534. if (skb->protocol == htons(ETH_P_IP)) {
  535. struct iphdr *ip;
  536. struct tcphdr *th;
  537. ip = ip_hdr(skb);
  538. if ((ip->frag_off & htons(IP_OFFSET|IP_MF)) == 0) {
  539. th = (struct tcphdr *)(((unsigned char *)ip) +
  540. ip->ihl*4);
  541. queue_len = vdev->no_of_vpath;
  542. counter = (ntohs(th->source) +
  543. ntohs(th->dest)) &
  544. vdev->vpath_selector[queue_len - 1];
  545. if (counter >= queue_len)
  546. counter = queue_len - 1;
  547. }
  548. }
  549. return counter;
  550. }
  551. static enum vxge_hw_status vxge_search_mac_addr_in_list(
  552. struct vxge_vpath *vpath, u64 del_mac)
  553. {
  554. struct list_head *entry, *next;
  555. list_for_each_safe(entry, next, &vpath->mac_addr_list) {
  556. if (((struct vxge_mac_addrs *)entry)->macaddr == del_mac)
  557. return TRUE;
  558. }
  559. return FALSE;
  560. }
  561. static int vxge_learn_mac(struct vxgedev *vdev, u8 *mac_header)
  562. {
  563. struct macInfo mac_info;
  564. u8 *mac_address = NULL;
  565. u64 mac_addr = 0, vpath_vector = 0;
  566. int vpath_idx = 0;
  567. enum vxge_hw_status status = VXGE_HW_OK;
  568. struct vxge_vpath *vpath = NULL;
  569. struct __vxge_hw_device *hldev;
  570. hldev = (struct __vxge_hw_device *) pci_get_drvdata(vdev->pdev);
  571. mac_address = (u8 *)&mac_addr;
  572. memcpy(mac_address, mac_header, ETH_ALEN);
  573. /* Is this mac address already in the list? */
  574. for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
  575. vpath = &vdev->vpaths[vpath_idx];
  576. if (vxge_search_mac_addr_in_list(vpath, mac_addr))
  577. return vpath_idx;
  578. }
  579. memset(&mac_info, 0, sizeof(struct macInfo));
  580. memcpy(mac_info.macaddr, mac_header, ETH_ALEN);
  581. /* Any vpath has room to add mac address to its da table? */
  582. for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
  583. vpath = &vdev->vpaths[vpath_idx];
  584. if (vpath->mac_addr_cnt < vpath->max_mac_addr_cnt) {
  585. /* Add this mac address to this vpath */
  586. mac_info.vpath_no = vpath_idx;
  587. mac_info.state = VXGE_LL_MAC_ADDR_IN_DA_TABLE;
  588. status = vxge_add_mac_addr(vdev, &mac_info);
  589. if (status != VXGE_HW_OK)
  590. return -EPERM;
  591. return vpath_idx;
  592. }
  593. }
  594. mac_info.state = VXGE_LL_MAC_ADDR_IN_LIST;
  595. vpath_idx = 0;
  596. mac_info.vpath_no = vpath_idx;
  597. /* Is the first vpath already selected as catch-basin ? */
  598. vpath = &vdev->vpaths[vpath_idx];
  599. if (vpath->mac_addr_cnt > vpath->max_mac_addr_cnt) {
  600. /* Add this mac address to this vpath */
  601. if (FALSE == vxge_mac_list_add(vpath, &mac_info))
  602. return -EPERM;
  603. return vpath_idx;
  604. }
  605. /* Select first vpath as catch-basin */
  606. vpath_vector = vxge_mBIT(vpath->device_id);
  607. status = vxge_hw_mgmt_reg_write(vpath->vdev->devh,
  608. vxge_hw_mgmt_reg_type_mrpcim,
  609. 0,
  610. (ulong)offsetof(
  611. struct vxge_hw_mrpcim_reg,
  612. rts_mgr_cbasin_cfg),
  613. vpath_vector);
  614. if (status != VXGE_HW_OK) {
  615. vxge_debug_tx(VXGE_ERR,
  616. "%s: Unable to set the vpath-%d in catch-basin mode",
  617. VXGE_DRIVER_NAME, vpath->device_id);
  618. return -EPERM;
  619. }
  620. if (FALSE == vxge_mac_list_add(vpath, &mac_info))
  621. return -EPERM;
  622. return vpath_idx;
  623. }
  624. /**
  625. * vxge_xmit
  626. * @skb : the socket buffer containing the Tx data.
  627. * @dev : device pointer.
  628. *
  629. * This function is the Tx entry point of the driver. Neterion NIC supports
  630. * certain protocol assist features on Tx side, namely CSO, S/G, LSO.
  631. */
  632. static netdev_tx_t
  633. vxge_xmit(struct sk_buff *skb, struct net_device *dev)
  634. {
  635. struct vxge_fifo *fifo = NULL;
  636. void *dtr_priv;
  637. void *dtr = NULL;
  638. struct vxgedev *vdev = NULL;
  639. enum vxge_hw_status status;
  640. int frg_cnt, first_frg_len;
  641. skb_frag_t *frag;
  642. int i = 0, j = 0, avail;
  643. u64 dma_pointer;
  644. struct vxge_tx_priv *txdl_priv = NULL;
  645. struct __vxge_hw_fifo *fifo_hw;
  646. int offload_type;
  647. int vpath_no = 0;
  648. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  649. dev->name, __func__, __LINE__);
  650. /* A buffer with no data will be dropped */
  651. if (unlikely(skb->len <= 0)) {
  652. vxge_debug_tx(VXGE_ERR,
  653. "%s: Buffer has no data..", dev->name);
  654. dev_kfree_skb(skb);
  655. return NETDEV_TX_OK;
  656. }
  657. vdev = (struct vxgedev *)netdev_priv(dev);
  658. if (unlikely(!is_vxge_card_up(vdev))) {
  659. vxge_debug_tx(VXGE_ERR,
  660. "%s: vdev not initialized", dev->name);
  661. dev_kfree_skb(skb);
  662. return NETDEV_TX_OK;
  663. }
  664. if (vdev->config.addr_learn_en) {
  665. vpath_no = vxge_learn_mac(vdev, skb->data + ETH_ALEN);
  666. if (vpath_no == -EPERM) {
  667. vxge_debug_tx(VXGE_ERR,
  668. "%s: Failed to store the mac address",
  669. dev->name);
  670. dev_kfree_skb(skb);
  671. return NETDEV_TX_OK;
  672. }
  673. }
  674. if (vdev->config.tx_steering_type == TX_MULTIQ_STEERING)
  675. vpath_no = skb_get_queue_mapping(skb);
  676. else if (vdev->config.tx_steering_type == TX_PORT_STEERING)
  677. vpath_no = vxge_get_vpath_no(vdev, skb);
  678. vxge_debug_tx(VXGE_TRACE, "%s: vpath_no= %d", dev->name, vpath_no);
  679. if (vpath_no >= vdev->no_of_vpath)
  680. vpath_no = 0;
  681. fifo = &vdev->vpaths[vpath_no].fifo;
  682. fifo_hw = fifo->handle;
  683. if (netif_tx_queue_stopped(fifo->txq))
  684. return NETDEV_TX_BUSY;
  685. avail = vxge_hw_fifo_free_txdl_count_get(fifo_hw);
  686. if (avail == 0) {
  687. vxge_debug_tx(VXGE_ERR,
  688. "%s: No free TXDs available", dev->name);
  689. fifo->stats.txd_not_free++;
  690. goto _exit0;
  691. }
  692. /* Last TXD? Stop tx queue to avoid dropping packets. TX
  693. * completion will resume the queue.
  694. */
  695. if (avail == 1)
  696. netif_tx_stop_queue(fifo->txq);
  697. status = vxge_hw_fifo_txdl_reserve(fifo_hw, &dtr, &dtr_priv);
  698. if (unlikely(status != VXGE_HW_OK)) {
  699. vxge_debug_tx(VXGE_ERR,
  700. "%s: Out of descriptors .", dev->name);
  701. fifo->stats.txd_out_of_desc++;
  702. goto _exit0;
  703. }
  704. vxge_debug_tx(VXGE_TRACE,
  705. "%s: %s:%d fifo_hw = %p dtr = %p dtr_priv = %p",
  706. dev->name, __func__, __LINE__,
  707. fifo_hw, dtr, dtr_priv);
  708. if (vlan_tx_tag_present(skb)) {
  709. u16 vlan_tag = vlan_tx_tag_get(skb);
  710. vxge_hw_fifo_txdl_vlan_set(dtr, vlan_tag);
  711. }
  712. first_frg_len = skb_headlen(skb);
  713. dma_pointer = pci_map_single(fifo->pdev, skb->data, first_frg_len,
  714. PCI_DMA_TODEVICE);
  715. if (unlikely(pci_dma_mapping_error(fifo->pdev, dma_pointer))) {
  716. vxge_hw_fifo_txdl_free(fifo_hw, dtr);
  717. fifo->stats.pci_map_fail++;
  718. goto _exit0;
  719. }
  720. txdl_priv = vxge_hw_fifo_txdl_private_get(dtr);
  721. txdl_priv->skb = skb;
  722. txdl_priv->dma_buffers[j] = dma_pointer;
  723. frg_cnt = skb_shinfo(skb)->nr_frags;
  724. vxge_debug_tx(VXGE_TRACE,
  725. "%s: %s:%d skb = %p txdl_priv = %p "
  726. "frag_cnt = %d dma_pointer = 0x%llx", dev->name,
  727. __func__, __LINE__, skb, txdl_priv,
  728. frg_cnt, (unsigned long long)dma_pointer);
  729. vxge_hw_fifo_txdl_buffer_set(fifo_hw, dtr, j++, dma_pointer,
  730. first_frg_len);
  731. frag = &skb_shinfo(skb)->frags[0];
  732. for (i = 0; i < frg_cnt; i++) {
  733. /* ignore 0 length fragment */
  734. if (!frag->size)
  735. continue;
  736. dma_pointer = (u64) pci_map_page(fifo->pdev, frag->page,
  737. frag->page_offset, frag->size,
  738. PCI_DMA_TODEVICE);
  739. if (unlikely(pci_dma_mapping_error(fifo->pdev, dma_pointer)))
  740. goto _exit2;
  741. vxge_debug_tx(VXGE_TRACE,
  742. "%s: %s:%d frag = %d dma_pointer = 0x%llx",
  743. dev->name, __func__, __LINE__, i,
  744. (unsigned long long)dma_pointer);
  745. txdl_priv->dma_buffers[j] = dma_pointer;
  746. vxge_hw_fifo_txdl_buffer_set(fifo_hw, dtr, j++, dma_pointer,
  747. frag->size);
  748. frag += 1;
  749. }
  750. offload_type = vxge_offload_type(skb);
  751. if (offload_type & (SKB_GSO_TCPV4 | SKB_GSO_TCPV6)) {
  752. int mss = vxge_tcp_mss(skb);
  753. if (mss) {
  754. vxge_debug_tx(VXGE_TRACE, "%s: %s:%d mss = %d",
  755. dev->name, __func__, __LINE__, mss);
  756. vxge_hw_fifo_txdl_mss_set(dtr, mss);
  757. } else {
  758. vxge_assert(skb->len <=
  759. dev->mtu + VXGE_HW_MAC_HEADER_MAX_SIZE);
  760. vxge_assert(0);
  761. goto _exit1;
  762. }
  763. }
  764. if (skb->ip_summed == CHECKSUM_PARTIAL)
  765. vxge_hw_fifo_txdl_cksum_set_bits(dtr,
  766. VXGE_HW_FIFO_TXD_TX_CKO_IPV4_EN |
  767. VXGE_HW_FIFO_TXD_TX_CKO_TCP_EN |
  768. VXGE_HW_FIFO_TXD_TX_CKO_UDP_EN);
  769. vxge_hw_fifo_txdl_post(fifo_hw, dtr);
  770. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d Exiting...",
  771. dev->name, __func__, __LINE__);
  772. return NETDEV_TX_OK;
  773. _exit2:
  774. vxge_debug_tx(VXGE_TRACE, "%s: pci_map_page failed", dev->name);
  775. _exit1:
  776. j = 0;
  777. frag = &skb_shinfo(skb)->frags[0];
  778. pci_unmap_single(fifo->pdev, txdl_priv->dma_buffers[j++],
  779. skb_headlen(skb), PCI_DMA_TODEVICE);
  780. for (; j < i; j++) {
  781. pci_unmap_page(fifo->pdev, txdl_priv->dma_buffers[j],
  782. frag->size, PCI_DMA_TODEVICE);
  783. frag += 1;
  784. }
  785. vxge_hw_fifo_txdl_free(fifo_hw, dtr);
  786. _exit0:
  787. netif_tx_stop_queue(fifo->txq);
  788. dev_kfree_skb(skb);
  789. return NETDEV_TX_OK;
  790. }
  791. /*
  792. * vxge_rx_term
  793. *
  794. * Function will be called by hw function to abort all outstanding receive
  795. * descriptors.
  796. */
  797. static void
  798. vxge_rx_term(void *dtrh, enum vxge_hw_rxd_state state, void *userdata)
  799. {
  800. struct vxge_ring *ring = (struct vxge_ring *)userdata;
  801. struct vxge_rx_priv *rx_priv =
  802. vxge_hw_ring_rxd_private_get(dtrh);
  803. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  804. ring->ndev->name, __func__, __LINE__);
  805. if (state != VXGE_HW_RXD_STATE_POSTED)
  806. return;
  807. pci_unmap_single(ring->pdev, rx_priv->data_dma,
  808. rx_priv->data_size, PCI_DMA_FROMDEVICE);
  809. dev_kfree_skb(rx_priv->skb);
  810. rx_priv->skb_data = NULL;
  811. vxge_debug_entryexit(VXGE_TRACE,
  812. "%s: %s:%d Exiting...",
  813. ring->ndev->name, __func__, __LINE__);
  814. }
  815. /*
  816. * vxge_tx_term
  817. *
  818. * Function will be called to abort all outstanding tx descriptors
  819. */
  820. static void
  821. vxge_tx_term(void *dtrh, enum vxge_hw_txdl_state state, void *userdata)
  822. {
  823. struct vxge_fifo *fifo = (struct vxge_fifo *)userdata;
  824. skb_frag_t *frag;
  825. int i = 0, j, frg_cnt;
  826. struct vxge_tx_priv *txd_priv = vxge_hw_fifo_txdl_private_get(dtrh);
  827. struct sk_buff *skb = txd_priv->skb;
  828. vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  829. if (state != VXGE_HW_TXDL_STATE_POSTED)
  830. return;
  831. /* check skb validity */
  832. vxge_assert(skb);
  833. frg_cnt = skb_shinfo(skb)->nr_frags;
  834. frag = &skb_shinfo(skb)->frags[0];
  835. /* for unfragmented skb */
  836. pci_unmap_single(fifo->pdev, txd_priv->dma_buffers[i++],
  837. skb_headlen(skb), PCI_DMA_TODEVICE);
  838. for (j = 0; j < frg_cnt; j++) {
  839. pci_unmap_page(fifo->pdev, txd_priv->dma_buffers[i++],
  840. frag->size, PCI_DMA_TODEVICE);
  841. frag += 1;
  842. }
  843. dev_kfree_skb(skb);
  844. vxge_debug_entryexit(VXGE_TRACE,
  845. "%s:%d Exiting...", __func__, __LINE__);
  846. }
  847. /**
  848. * vxge_set_multicast
  849. * @dev: pointer to the device structure
  850. *
  851. * Entry point for multicast address enable/disable
  852. * This function is a driver entry point which gets called by the kernel
  853. * whenever multicast addresses must be enabled/disabled. This also gets
  854. * called to set/reset promiscuous mode. Depending on the deivce flag, we
  855. * determine, if multicast address must be enabled or if promiscuous mode
  856. * is to be disabled etc.
  857. */
  858. static void vxge_set_multicast(struct net_device *dev)
  859. {
  860. struct netdev_hw_addr *ha;
  861. struct vxgedev *vdev;
  862. int i, mcast_cnt = 0;
  863. struct __vxge_hw_device *hldev;
  864. struct vxge_vpath *vpath;
  865. enum vxge_hw_status status = VXGE_HW_OK;
  866. struct macInfo mac_info;
  867. int vpath_idx = 0;
  868. struct vxge_mac_addrs *mac_entry;
  869. struct list_head *list_head;
  870. struct list_head *entry, *next;
  871. u8 *mac_address = NULL;
  872. vxge_debug_entryexit(VXGE_TRACE,
  873. "%s:%d", __func__, __LINE__);
  874. vdev = (struct vxgedev *)netdev_priv(dev);
  875. hldev = (struct __vxge_hw_device *)vdev->devh;
  876. if (unlikely(!is_vxge_card_up(vdev)))
  877. return;
  878. if ((dev->flags & IFF_ALLMULTI) && (!vdev->all_multi_flg)) {
  879. for (i = 0; i < vdev->no_of_vpath; i++) {
  880. vpath = &vdev->vpaths[i];
  881. vxge_assert(vpath->is_open);
  882. status = vxge_hw_vpath_mcast_enable(vpath->handle);
  883. if (status != VXGE_HW_OK)
  884. vxge_debug_init(VXGE_ERR, "failed to enable "
  885. "multicast, status %d", status);
  886. vdev->all_multi_flg = 1;
  887. }
  888. } else if (!(dev->flags & IFF_ALLMULTI) && (vdev->all_multi_flg)) {
  889. for (i = 0; i < vdev->no_of_vpath; i++) {
  890. vpath = &vdev->vpaths[i];
  891. vxge_assert(vpath->is_open);
  892. status = vxge_hw_vpath_mcast_disable(vpath->handle);
  893. if (status != VXGE_HW_OK)
  894. vxge_debug_init(VXGE_ERR, "failed to disable "
  895. "multicast, status %d", status);
  896. vdev->all_multi_flg = 0;
  897. }
  898. }
  899. if (!vdev->config.addr_learn_en) {
  900. for (i = 0; i < vdev->no_of_vpath; i++) {
  901. vpath = &vdev->vpaths[i];
  902. vxge_assert(vpath->is_open);
  903. if (dev->flags & IFF_PROMISC)
  904. status = vxge_hw_vpath_promisc_enable(
  905. vpath->handle);
  906. else
  907. status = vxge_hw_vpath_promisc_disable(
  908. vpath->handle);
  909. if (status != VXGE_HW_OK)
  910. vxge_debug_init(VXGE_ERR, "failed to %s promisc"
  911. ", status %d", dev->flags&IFF_PROMISC ?
  912. "enable" : "disable", status);
  913. }
  914. }
  915. memset(&mac_info, 0, sizeof(struct macInfo));
  916. /* Update individual M_CAST address list */
  917. if ((!vdev->all_multi_flg) && netdev_mc_count(dev)) {
  918. mcast_cnt = vdev->vpaths[0].mcast_addr_cnt;
  919. list_head = &vdev->vpaths[0].mac_addr_list;
  920. if ((netdev_mc_count(dev) +
  921. (vdev->vpaths[0].mac_addr_cnt - mcast_cnt)) >
  922. vdev->vpaths[0].max_mac_addr_cnt)
  923. goto _set_all_mcast;
  924. /* Delete previous MC's */
  925. for (i = 0; i < mcast_cnt; i++) {
  926. list_for_each_safe(entry, next, list_head) {
  927. mac_entry = (struct vxge_mac_addrs *) entry;
  928. /* Copy the mac address to delete */
  929. mac_address = (u8 *)&mac_entry->macaddr;
  930. memcpy(mac_info.macaddr, mac_address, ETH_ALEN);
  931. /* Is this a multicast address */
  932. if (0x01 & mac_info.macaddr[0]) {
  933. for (vpath_idx = 0; vpath_idx <
  934. vdev->no_of_vpath;
  935. vpath_idx++) {
  936. mac_info.vpath_no = vpath_idx;
  937. status = vxge_del_mac_addr(
  938. vdev,
  939. &mac_info);
  940. }
  941. }
  942. }
  943. }
  944. /* Add new ones */
  945. netdev_for_each_mc_addr(ha, dev) {
  946. memcpy(mac_info.macaddr, ha->addr, ETH_ALEN);
  947. for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath;
  948. vpath_idx++) {
  949. mac_info.vpath_no = vpath_idx;
  950. mac_info.state = VXGE_LL_MAC_ADDR_IN_DA_TABLE;
  951. status = vxge_add_mac_addr(vdev, &mac_info);
  952. if (status != VXGE_HW_OK) {
  953. vxge_debug_init(VXGE_ERR,
  954. "%s:%d Setting individual"
  955. "multicast address failed",
  956. __func__, __LINE__);
  957. goto _set_all_mcast;
  958. }
  959. }
  960. }
  961. return;
  962. _set_all_mcast:
  963. mcast_cnt = vdev->vpaths[0].mcast_addr_cnt;
  964. /* Delete previous MC's */
  965. for (i = 0; i < mcast_cnt; i++) {
  966. list_for_each_safe(entry, next, list_head) {
  967. mac_entry = (struct vxge_mac_addrs *) entry;
  968. /* Copy the mac address to delete */
  969. mac_address = (u8 *)&mac_entry->macaddr;
  970. memcpy(mac_info.macaddr, mac_address, ETH_ALEN);
  971. /* Is this a multicast address */
  972. if (0x01 & mac_info.macaddr[0])
  973. break;
  974. }
  975. for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath;
  976. vpath_idx++) {
  977. mac_info.vpath_no = vpath_idx;
  978. status = vxge_del_mac_addr(vdev, &mac_info);
  979. }
  980. }
  981. /* Enable all multicast */
  982. for (i = 0; i < vdev->no_of_vpath; i++) {
  983. vpath = &vdev->vpaths[i];
  984. vxge_assert(vpath->is_open);
  985. status = vxge_hw_vpath_mcast_enable(vpath->handle);
  986. if (status != VXGE_HW_OK) {
  987. vxge_debug_init(VXGE_ERR,
  988. "%s:%d Enabling all multicasts failed",
  989. __func__, __LINE__);
  990. }
  991. vdev->all_multi_flg = 1;
  992. }
  993. dev->flags |= IFF_ALLMULTI;
  994. }
  995. vxge_debug_entryexit(VXGE_TRACE,
  996. "%s:%d Exiting...", __func__, __LINE__);
  997. }
  998. /**
  999. * vxge_set_mac_addr
  1000. * @dev: pointer to the device structure
  1001. *
  1002. * Update entry "0" (default MAC addr)
  1003. */
  1004. static int vxge_set_mac_addr(struct net_device *dev, void *p)
  1005. {
  1006. struct sockaddr *addr = p;
  1007. struct vxgedev *vdev;
  1008. struct __vxge_hw_device *hldev;
  1009. enum vxge_hw_status status = VXGE_HW_OK;
  1010. struct macInfo mac_info_new, mac_info_old;
  1011. int vpath_idx = 0;
  1012. vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  1013. vdev = (struct vxgedev *)netdev_priv(dev);
  1014. hldev = vdev->devh;
  1015. if (!is_valid_ether_addr(addr->sa_data))
  1016. return -EINVAL;
  1017. memset(&mac_info_new, 0, sizeof(struct macInfo));
  1018. memset(&mac_info_old, 0, sizeof(struct macInfo));
  1019. vxge_debug_entryexit(VXGE_TRACE, "%s:%d Exiting...",
  1020. __func__, __LINE__);
  1021. /* Get the old address */
  1022. memcpy(mac_info_old.macaddr, dev->dev_addr, dev->addr_len);
  1023. /* Copy the new address */
  1024. memcpy(mac_info_new.macaddr, addr->sa_data, dev->addr_len);
  1025. /* First delete the old mac address from all the vpaths
  1026. as we can't specify the index while adding new mac address */
  1027. for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
  1028. struct vxge_vpath *vpath = &vdev->vpaths[vpath_idx];
  1029. if (!vpath->is_open) {
  1030. /* This can happen when this interface is added/removed
  1031. to the bonding interface. Delete this station address
  1032. from the linked list */
  1033. vxge_mac_list_del(vpath, &mac_info_old);
  1034. /* Add this new address to the linked list
  1035. for later restoring */
  1036. vxge_mac_list_add(vpath, &mac_info_new);
  1037. continue;
  1038. }
  1039. /* Delete the station address */
  1040. mac_info_old.vpath_no = vpath_idx;
  1041. status = vxge_del_mac_addr(vdev, &mac_info_old);
  1042. }
  1043. if (unlikely(!is_vxge_card_up(vdev))) {
  1044. memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
  1045. return VXGE_HW_OK;
  1046. }
  1047. /* Set this mac address to all the vpaths */
  1048. for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
  1049. mac_info_new.vpath_no = vpath_idx;
  1050. mac_info_new.state = VXGE_LL_MAC_ADDR_IN_DA_TABLE;
  1051. status = vxge_add_mac_addr(vdev, &mac_info_new);
  1052. if (status != VXGE_HW_OK)
  1053. return -EINVAL;
  1054. }
  1055. memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
  1056. return status;
  1057. }
  1058. /*
  1059. * vxge_vpath_intr_enable
  1060. * @vdev: pointer to vdev
  1061. * @vp_id: vpath for which to enable the interrupts
  1062. *
  1063. * Enables the interrupts for the vpath
  1064. */
  1065. static void vxge_vpath_intr_enable(struct vxgedev *vdev, int vp_id)
  1066. {
  1067. struct vxge_vpath *vpath = &vdev->vpaths[vp_id];
  1068. int msix_id = 0;
  1069. int tim_msix_id[4] = {0, 1, 0, 0};
  1070. int alarm_msix_id = VXGE_ALARM_MSIX_ID;
  1071. vxge_hw_vpath_intr_enable(vpath->handle);
  1072. if (vdev->config.intr_type == INTA)
  1073. vxge_hw_vpath_inta_unmask_tx_rx(vpath->handle);
  1074. else {
  1075. vxge_hw_vpath_msix_set(vpath->handle, tim_msix_id,
  1076. alarm_msix_id);
  1077. msix_id = vpath->device_id * VXGE_HW_VPATH_MSIX_ACTIVE;
  1078. vxge_hw_vpath_msix_unmask(vpath->handle, msix_id);
  1079. vxge_hw_vpath_msix_unmask(vpath->handle, msix_id + 1);
  1080. /* enable the alarm vector */
  1081. msix_id = (vpath->handle->vpath->hldev->first_vp_id *
  1082. VXGE_HW_VPATH_MSIX_ACTIVE) + alarm_msix_id;
  1083. vxge_hw_vpath_msix_unmask(vpath->handle, msix_id);
  1084. }
  1085. }
  1086. /*
  1087. * vxge_vpath_intr_disable
  1088. * @vdev: pointer to vdev
  1089. * @vp_id: vpath for which to disable the interrupts
  1090. *
  1091. * Disables the interrupts for the vpath
  1092. */
  1093. static void vxge_vpath_intr_disable(struct vxgedev *vdev, int vp_id)
  1094. {
  1095. struct vxge_vpath *vpath = &vdev->vpaths[vp_id];
  1096. int msix_id;
  1097. vxge_hw_vpath_intr_disable(vpath->handle);
  1098. if (vdev->config.intr_type == INTA)
  1099. vxge_hw_vpath_inta_mask_tx_rx(vpath->handle);
  1100. else {
  1101. msix_id = vpath->device_id * VXGE_HW_VPATH_MSIX_ACTIVE;
  1102. vxge_hw_vpath_msix_mask(vpath->handle, msix_id);
  1103. vxge_hw_vpath_msix_mask(vpath->handle, msix_id + 1);
  1104. /* disable the alarm vector */
  1105. msix_id = (vpath->handle->vpath->hldev->first_vp_id *
  1106. VXGE_HW_VPATH_MSIX_ACTIVE) + VXGE_ALARM_MSIX_ID;
  1107. vxge_hw_vpath_msix_mask(vpath->handle, msix_id);
  1108. }
  1109. }
  1110. /*
  1111. * vxge_reset_vpath
  1112. * @vdev: pointer to vdev
  1113. * @vp_id: vpath to reset
  1114. *
  1115. * Resets the vpath
  1116. */
  1117. static int vxge_reset_vpath(struct vxgedev *vdev, int vp_id)
  1118. {
  1119. enum vxge_hw_status status = VXGE_HW_OK;
  1120. struct vxge_vpath *vpath = &vdev->vpaths[vp_id];
  1121. int ret = 0;
  1122. /* check if device is down already */
  1123. if (unlikely(!is_vxge_card_up(vdev)))
  1124. return 0;
  1125. /* is device reset already scheduled */
  1126. if (test_bit(__VXGE_STATE_RESET_CARD, &vdev->state))
  1127. return 0;
  1128. if (vpath->handle) {
  1129. if (vxge_hw_vpath_reset(vpath->handle) == VXGE_HW_OK) {
  1130. if (is_vxge_card_up(vdev) &&
  1131. vxge_hw_vpath_recover_from_reset(vpath->handle)
  1132. != VXGE_HW_OK) {
  1133. vxge_debug_init(VXGE_ERR,
  1134. "vxge_hw_vpath_recover_from_reset"
  1135. "failed for vpath:%d", vp_id);
  1136. return status;
  1137. }
  1138. } else {
  1139. vxge_debug_init(VXGE_ERR,
  1140. "vxge_hw_vpath_reset failed for"
  1141. "vpath:%d", vp_id);
  1142. return status;
  1143. }
  1144. } else
  1145. return VXGE_HW_FAIL;
  1146. vxge_restore_vpath_mac_addr(vpath);
  1147. vxge_restore_vpath_vid_table(vpath);
  1148. /* Enable all broadcast */
  1149. vxge_hw_vpath_bcast_enable(vpath->handle);
  1150. /* Enable all multicast */
  1151. if (vdev->all_multi_flg) {
  1152. status = vxge_hw_vpath_mcast_enable(vpath->handle);
  1153. if (status != VXGE_HW_OK)
  1154. vxge_debug_init(VXGE_ERR,
  1155. "%s:%d Enabling multicast failed",
  1156. __func__, __LINE__);
  1157. }
  1158. /* Enable the interrupts */
  1159. vxge_vpath_intr_enable(vdev, vp_id);
  1160. smp_wmb();
  1161. /* Enable the flow of traffic through the vpath */
  1162. vxge_hw_vpath_enable(vpath->handle);
  1163. smp_wmb();
  1164. vxge_hw_vpath_rx_doorbell_init(vpath->handle);
  1165. vpath->ring.last_status = VXGE_HW_OK;
  1166. /* Vpath reset done */
  1167. clear_bit(vp_id, &vdev->vp_reset);
  1168. /* Start the vpath queue */
  1169. if (netif_tx_queue_stopped(vpath->fifo.txq))
  1170. netif_tx_wake_queue(vpath->fifo.txq);
  1171. return ret;
  1172. }
  1173. static int do_vxge_reset(struct vxgedev *vdev, int event)
  1174. {
  1175. enum vxge_hw_status status;
  1176. int ret = 0, vp_id, i;
  1177. vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  1178. if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_START_RESET)) {
  1179. /* check if device is down already */
  1180. if (unlikely(!is_vxge_card_up(vdev)))
  1181. return 0;
  1182. /* is reset already scheduled */
  1183. if (test_and_set_bit(__VXGE_STATE_RESET_CARD, &vdev->state))
  1184. return 0;
  1185. }
  1186. if (event == VXGE_LL_FULL_RESET) {
  1187. /* wait for all the vpath reset to complete */
  1188. for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
  1189. while (test_bit(vp_id, &vdev->vp_reset))
  1190. msleep(50);
  1191. }
  1192. /* if execution mode is set to debug, don't reset the adapter */
  1193. if (unlikely(vdev->exec_mode)) {
  1194. vxge_debug_init(VXGE_ERR,
  1195. "%s: execution mode is debug, returning..",
  1196. vdev->ndev->name);
  1197. clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
  1198. netif_tx_stop_all_queues(vdev->ndev);
  1199. return 0;
  1200. }
  1201. }
  1202. if (event == VXGE_LL_FULL_RESET) {
  1203. vxge_hw_device_intr_disable(vdev->devh);
  1204. switch (vdev->cric_err_event) {
  1205. case VXGE_HW_EVENT_UNKNOWN:
  1206. netif_tx_stop_all_queues(vdev->ndev);
  1207. vxge_debug_init(VXGE_ERR,
  1208. "fatal: %s: Disabling device due to"
  1209. "unknown error",
  1210. vdev->ndev->name);
  1211. ret = -EPERM;
  1212. goto out;
  1213. case VXGE_HW_EVENT_RESET_START:
  1214. break;
  1215. case VXGE_HW_EVENT_RESET_COMPLETE:
  1216. case VXGE_HW_EVENT_LINK_DOWN:
  1217. case VXGE_HW_EVENT_LINK_UP:
  1218. case VXGE_HW_EVENT_ALARM_CLEARED:
  1219. case VXGE_HW_EVENT_ECCERR:
  1220. case VXGE_HW_EVENT_MRPCIM_ECCERR:
  1221. ret = -EPERM;
  1222. goto out;
  1223. case VXGE_HW_EVENT_FIFO_ERR:
  1224. case VXGE_HW_EVENT_VPATH_ERR:
  1225. break;
  1226. case VXGE_HW_EVENT_CRITICAL_ERR:
  1227. netif_tx_stop_all_queues(vdev->ndev);
  1228. vxge_debug_init(VXGE_ERR,
  1229. "fatal: %s: Disabling device due to"
  1230. "serious error",
  1231. vdev->ndev->name);
  1232. /* SOP or device reset required */
  1233. /* This event is not currently used */
  1234. ret = -EPERM;
  1235. goto out;
  1236. case VXGE_HW_EVENT_SERR:
  1237. netif_tx_stop_all_queues(vdev->ndev);
  1238. vxge_debug_init(VXGE_ERR,
  1239. "fatal: %s: Disabling device due to"
  1240. "serious error",
  1241. vdev->ndev->name);
  1242. ret = -EPERM;
  1243. goto out;
  1244. case VXGE_HW_EVENT_SRPCIM_SERR:
  1245. case VXGE_HW_EVENT_MRPCIM_SERR:
  1246. ret = -EPERM;
  1247. goto out;
  1248. case VXGE_HW_EVENT_SLOT_FREEZE:
  1249. netif_tx_stop_all_queues(vdev->ndev);
  1250. vxge_debug_init(VXGE_ERR,
  1251. "fatal: %s: Disabling device due to"
  1252. "slot freeze",
  1253. vdev->ndev->name);
  1254. ret = -EPERM;
  1255. goto out;
  1256. default:
  1257. break;
  1258. }
  1259. }
  1260. if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_START_RESET))
  1261. netif_tx_stop_all_queues(vdev->ndev);
  1262. if (event == VXGE_LL_FULL_RESET) {
  1263. status = vxge_reset_all_vpaths(vdev);
  1264. if (status != VXGE_HW_OK) {
  1265. vxge_debug_init(VXGE_ERR,
  1266. "fatal: %s: can not reset vpaths",
  1267. vdev->ndev->name);
  1268. ret = -EPERM;
  1269. goto out;
  1270. }
  1271. }
  1272. if (event == VXGE_LL_COMPL_RESET) {
  1273. for (i = 0; i < vdev->no_of_vpath; i++)
  1274. if (vdev->vpaths[i].handle) {
  1275. if (vxge_hw_vpath_recover_from_reset(
  1276. vdev->vpaths[i].handle)
  1277. != VXGE_HW_OK) {
  1278. vxge_debug_init(VXGE_ERR,
  1279. "vxge_hw_vpath_recover_"
  1280. "from_reset failed for vpath: "
  1281. "%d", i);
  1282. ret = -EPERM;
  1283. goto out;
  1284. }
  1285. } else {
  1286. vxge_debug_init(VXGE_ERR,
  1287. "vxge_hw_vpath_reset failed for "
  1288. "vpath:%d", i);
  1289. ret = -EPERM;
  1290. goto out;
  1291. }
  1292. }
  1293. if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_COMPL_RESET)) {
  1294. /* Reprogram the DA table with populated mac addresses */
  1295. for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
  1296. vxge_restore_vpath_mac_addr(&vdev->vpaths[vp_id]);
  1297. vxge_restore_vpath_vid_table(&vdev->vpaths[vp_id]);
  1298. }
  1299. /* enable vpath interrupts */
  1300. for (i = 0; i < vdev->no_of_vpath; i++)
  1301. vxge_vpath_intr_enable(vdev, i);
  1302. vxge_hw_device_intr_enable(vdev->devh);
  1303. smp_wmb();
  1304. /* Indicate card up */
  1305. set_bit(__VXGE_STATE_CARD_UP, &vdev->state);
  1306. /* Get the traffic to flow through the vpaths */
  1307. for (i = 0; i < vdev->no_of_vpath; i++) {
  1308. vxge_hw_vpath_enable(vdev->vpaths[i].handle);
  1309. smp_wmb();
  1310. vxge_hw_vpath_rx_doorbell_init(vdev->vpaths[i].handle);
  1311. }
  1312. netif_tx_wake_all_queues(vdev->ndev);
  1313. }
  1314. out:
  1315. vxge_debug_entryexit(VXGE_TRACE,
  1316. "%s:%d Exiting...", __func__, __LINE__);
  1317. /* Indicate reset done */
  1318. if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_COMPL_RESET))
  1319. clear_bit(__VXGE_STATE_RESET_CARD, &vdev->state);
  1320. return ret;
  1321. }
  1322. /*
  1323. * vxge_reset
  1324. * @vdev: pointer to ll device
  1325. *
  1326. * driver may reset the chip on events of serr, eccerr, etc
  1327. */
  1328. static int vxge_reset(struct vxgedev *vdev)
  1329. {
  1330. return do_vxge_reset(vdev, VXGE_LL_FULL_RESET);
  1331. }
  1332. /**
  1333. * vxge_poll - Receive handler when Receive Polling is used.
  1334. * @dev: pointer to the device structure.
  1335. * @budget: Number of packets budgeted to be processed in this iteration.
  1336. *
  1337. * This function comes into picture only if Receive side is being handled
  1338. * through polling (called NAPI in linux). It mostly does what the normal
  1339. * Rx interrupt handler does in terms of descriptor and packet processing
  1340. * but not in an interrupt context. Also it will process a specified number
  1341. * of packets at most in one iteration. This value is passed down by the
  1342. * kernel as the function argument 'budget'.
  1343. */
  1344. static int vxge_poll_msix(struct napi_struct *napi, int budget)
  1345. {
  1346. struct vxge_ring *ring =
  1347. container_of(napi, struct vxge_ring, napi);
  1348. int budget_org = budget;
  1349. ring->budget = budget;
  1350. vxge_hw_vpath_poll_rx(ring->handle);
  1351. if (ring->pkts_processed < budget_org) {
  1352. napi_complete(napi);
  1353. /* Re enable the Rx interrupts for the vpath */
  1354. vxge_hw_channel_msix_unmask(
  1355. (struct __vxge_hw_channel *)ring->handle,
  1356. ring->rx_vector_no);
  1357. }
  1358. return ring->pkts_processed;
  1359. }
  1360. static int vxge_poll_inta(struct napi_struct *napi, int budget)
  1361. {
  1362. struct vxgedev *vdev = container_of(napi, struct vxgedev, napi);
  1363. int pkts_processed = 0;
  1364. int i;
  1365. int budget_org = budget;
  1366. struct vxge_ring *ring;
  1367. struct __vxge_hw_device *hldev = (struct __vxge_hw_device *)
  1368. pci_get_drvdata(vdev->pdev);
  1369. for (i = 0; i < vdev->no_of_vpath; i++) {
  1370. ring = &vdev->vpaths[i].ring;
  1371. ring->budget = budget;
  1372. vxge_hw_vpath_poll_rx(ring->handle);
  1373. pkts_processed += ring->pkts_processed;
  1374. budget -= ring->pkts_processed;
  1375. if (budget <= 0)
  1376. break;
  1377. }
  1378. VXGE_COMPLETE_ALL_TX(vdev);
  1379. if (pkts_processed < budget_org) {
  1380. napi_complete(napi);
  1381. /* Re enable the Rx interrupts for the ring */
  1382. vxge_hw_device_unmask_all(hldev);
  1383. vxge_hw_device_flush_io(hldev);
  1384. }
  1385. return pkts_processed;
  1386. }
  1387. #ifdef CONFIG_NET_POLL_CONTROLLER
  1388. /**
  1389. * vxge_netpoll - netpoll event handler entry point
  1390. * @dev : pointer to the device structure.
  1391. * Description:
  1392. * This function will be called by upper layer to check for events on the
  1393. * interface in situations where interrupts are disabled. It is used for
  1394. * specific in-kernel networking tasks, such as remote consoles and kernel
  1395. * debugging over the network (example netdump in RedHat).
  1396. */
  1397. static void vxge_netpoll(struct net_device *dev)
  1398. {
  1399. struct __vxge_hw_device *hldev;
  1400. struct vxgedev *vdev;
  1401. vdev = (struct vxgedev *)netdev_priv(dev);
  1402. hldev = (struct __vxge_hw_device *)pci_get_drvdata(vdev->pdev);
  1403. vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  1404. if (pci_channel_offline(vdev->pdev))
  1405. return;
  1406. disable_irq(dev->irq);
  1407. vxge_hw_device_clear_tx_rx(hldev);
  1408. vxge_hw_device_clear_tx_rx(hldev);
  1409. VXGE_COMPLETE_ALL_RX(vdev);
  1410. VXGE_COMPLETE_ALL_TX(vdev);
  1411. enable_irq(dev->irq);
  1412. vxge_debug_entryexit(VXGE_TRACE,
  1413. "%s:%d Exiting...", __func__, __LINE__);
  1414. }
  1415. #endif
  1416. /* RTH configuration */
  1417. static enum vxge_hw_status vxge_rth_configure(struct vxgedev *vdev)
  1418. {
  1419. enum vxge_hw_status status = VXGE_HW_OK;
  1420. struct vxge_hw_rth_hash_types hash_types;
  1421. u8 itable[256] = {0}; /* indirection table */
  1422. u8 mtable[256] = {0}; /* CPU to vpath mapping */
  1423. int index;
  1424. /*
  1425. * Filling
  1426. * - itable with bucket numbers
  1427. * - mtable with bucket-to-vpath mapping
  1428. */
  1429. for (index = 0; index < (1 << vdev->config.rth_bkt_sz); index++) {
  1430. itable[index] = index;
  1431. mtable[index] = index % vdev->no_of_vpath;
  1432. }
  1433. /* set indirection table, bucket-to-vpath mapping */
  1434. status = vxge_hw_vpath_rts_rth_itable_set(vdev->vp_handles,
  1435. vdev->no_of_vpath,
  1436. mtable, itable,
  1437. vdev->config.rth_bkt_sz);
  1438. if (status != VXGE_HW_OK) {
  1439. vxge_debug_init(VXGE_ERR,
  1440. "RTH indirection table configuration failed "
  1441. "for vpath:%d", vdev->vpaths[0].device_id);
  1442. return status;
  1443. }
  1444. /* Fill RTH hash types */
  1445. hash_types.hash_type_tcpipv4_en = vdev->config.rth_hash_type_tcpipv4;
  1446. hash_types.hash_type_ipv4_en = vdev->config.rth_hash_type_ipv4;
  1447. hash_types.hash_type_tcpipv6_en = vdev->config.rth_hash_type_tcpipv6;
  1448. hash_types.hash_type_ipv6_en = vdev->config.rth_hash_type_ipv6;
  1449. hash_types.hash_type_tcpipv6ex_en =
  1450. vdev->config.rth_hash_type_tcpipv6ex;
  1451. hash_types.hash_type_ipv6ex_en = vdev->config.rth_hash_type_ipv6ex;
  1452. /*
  1453. * Because the itable_set() method uses the active_table field
  1454. * for the target virtual path the RTH config should be updated
  1455. * for all VPATHs. The h/w only uses the lowest numbered VPATH
  1456. * when steering frames.
  1457. */
  1458. for (index = 0; index < vdev->no_of_vpath; index++) {
  1459. status = vxge_hw_vpath_rts_rth_set(
  1460. vdev->vpaths[index].handle,
  1461. vdev->config.rth_algorithm,
  1462. &hash_types,
  1463. vdev->config.rth_bkt_sz);
  1464. if (status != VXGE_HW_OK) {
  1465. vxge_debug_init(VXGE_ERR,
  1466. "RTH configuration failed for vpath:%d",
  1467. vdev->vpaths[index].device_id);
  1468. return status;
  1469. }
  1470. }
  1471. return status;
  1472. }
  1473. static int vxge_mac_list_add(struct vxge_vpath *vpath, struct macInfo *mac)
  1474. {
  1475. struct vxge_mac_addrs *new_mac_entry;
  1476. u8 *mac_address = NULL;
  1477. if (vpath->mac_addr_cnt >= VXGE_MAX_LEARN_MAC_ADDR_CNT)
  1478. return TRUE;
  1479. new_mac_entry = kzalloc(sizeof(struct vxge_mac_addrs), GFP_ATOMIC);
  1480. if (!new_mac_entry) {
  1481. vxge_debug_mem(VXGE_ERR,
  1482. "%s: memory allocation failed",
  1483. VXGE_DRIVER_NAME);
  1484. return FALSE;
  1485. }
  1486. list_add(&new_mac_entry->item, &vpath->mac_addr_list);
  1487. /* Copy the new mac address to the list */
  1488. mac_address = (u8 *)&new_mac_entry->macaddr;
  1489. memcpy(mac_address, mac->macaddr, ETH_ALEN);
  1490. new_mac_entry->state = mac->state;
  1491. vpath->mac_addr_cnt++;
  1492. /* Is this a multicast address */
  1493. if (0x01 & mac->macaddr[0])
  1494. vpath->mcast_addr_cnt++;
  1495. return TRUE;
  1496. }
  1497. /* Add a mac address to DA table */
  1498. static enum vxge_hw_status vxge_add_mac_addr(struct vxgedev *vdev,
  1499. struct macInfo *mac)
  1500. {
  1501. enum vxge_hw_status status = VXGE_HW_OK;
  1502. struct vxge_vpath *vpath;
  1503. enum vxge_hw_vpath_mac_addr_add_mode duplicate_mode;
  1504. if (0x01 & mac->macaddr[0]) /* multicast address */
  1505. duplicate_mode = VXGE_HW_VPATH_MAC_ADDR_ADD_DUPLICATE;
  1506. else
  1507. duplicate_mode = VXGE_HW_VPATH_MAC_ADDR_REPLACE_DUPLICATE;
  1508. vpath = &vdev->vpaths[mac->vpath_no];
  1509. status = vxge_hw_vpath_mac_addr_add(vpath->handle, mac->macaddr,
  1510. mac->macmask, duplicate_mode);
  1511. if (status != VXGE_HW_OK) {
  1512. vxge_debug_init(VXGE_ERR,
  1513. "DA config add entry failed for vpath:%d",
  1514. vpath->device_id);
  1515. } else
  1516. if (FALSE == vxge_mac_list_add(vpath, mac))
  1517. status = -EPERM;
  1518. return status;
  1519. }
  1520. static int vxge_mac_list_del(struct vxge_vpath *vpath, struct macInfo *mac)
  1521. {
  1522. struct list_head *entry, *next;
  1523. u64 del_mac = 0;
  1524. u8 *mac_address = (u8 *) (&del_mac);
  1525. /* Copy the mac address to delete from the list */
  1526. memcpy(mac_address, mac->macaddr, ETH_ALEN);
  1527. list_for_each_safe(entry, next, &vpath->mac_addr_list) {
  1528. if (((struct vxge_mac_addrs *)entry)->macaddr == del_mac) {
  1529. list_del(entry);
  1530. kfree((struct vxge_mac_addrs *)entry);
  1531. vpath->mac_addr_cnt--;
  1532. /* Is this a multicast address */
  1533. if (0x01 & mac->macaddr[0])
  1534. vpath->mcast_addr_cnt--;
  1535. return TRUE;
  1536. }
  1537. }
  1538. return FALSE;
  1539. }
  1540. /* delete a mac address from DA table */
  1541. static enum vxge_hw_status vxge_del_mac_addr(struct vxgedev *vdev,
  1542. struct macInfo *mac)
  1543. {
  1544. enum vxge_hw_status status = VXGE_HW_OK;
  1545. struct vxge_vpath *vpath;
  1546. vpath = &vdev->vpaths[mac->vpath_no];
  1547. status = vxge_hw_vpath_mac_addr_delete(vpath->handle, mac->macaddr,
  1548. mac->macmask);
  1549. if (status != VXGE_HW_OK) {
  1550. vxge_debug_init(VXGE_ERR,
  1551. "DA config delete entry failed for vpath:%d",
  1552. vpath->device_id);
  1553. } else
  1554. vxge_mac_list_del(vpath, mac);
  1555. return status;
  1556. }
  1557. /* list all mac addresses from DA table */
  1558. enum vxge_hw_status
  1559. static vxge_search_mac_addr_in_da_table(struct vxge_vpath *vpath,
  1560. struct macInfo *mac)
  1561. {
  1562. enum vxge_hw_status status = VXGE_HW_OK;
  1563. unsigned char macmask[ETH_ALEN];
  1564. unsigned char macaddr[ETH_ALEN];
  1565. status = vxge_hw_vpath_mac_addr_get(vpath->handle,
  1566. macaddr, macmask);
  1567. if (status != VXGE_HW_OK) {
  1568. vxge_debug_init(VXGE_ERR,
  1569. "DA config list entry failed for vpath:%d",
  1570. vpath->device_id);
  1571. return status;
  1572. }
  1573. while (memcmp(mac->macaddr, macaddr, ETH_ALEN)) {
  1574. status = vxge_hw_vpath_mac_addr_get_next(vpath->handle,
  1575. macaddr, macmask);
  1576. if (status != VXGE_HW_OK)
  1577. break;
  1578. }
  1579. return status;
  1580. }
  1581. /* Store all vlan ids from the list to the vid table */
  1582. static enum vxge_hw_status vxge_restore_vpath_vid_table(struct vxge_vpath *vpath)
  1583. {
  1584. enum vxge_hw_status status = VXGE_HW_OK;
  1585. struct vxgedev *vdev = vpath->vdev;
  1586. u16 vid;
  1587. if (vdev->vlgrp && vpath->is_open) {
  1588. for (vid = 0; vid < VLAN_N_VID; vid++) {
  1589. if (!vlan_group_get_device(vdev->vlgrp, vid))
  1590. continue;
  1591. /* Add these vlan to the vid table */
  1592. status = vxge_hw_vpath_vid_add(vpath->handle, vid);
  1593. }
  1594. }
  1595. return status;
  1596. }
  1597. /* Store all mac addresses from the list to the DA table */
  1598. static enum vxge_hw_status vxge_restore_vpath_mac_addr(struct vxge_vpath *vpath)
  1599. {
  1600. enum vxge_hw_status status = VXGE_HW_OK;
  1601. struct macInfo mac_info;
  1602. u8 *mac_address = NULL;
  1603. struct list_head *entry, *next;
  1604. memset(&mac_info, 0, sizeof(struct macInfo));
  1605. if (vpath->is_open) {
  1606. list_for_each_safe(entry, next, &vpath->mac_addr_list) {
  1607. mac_address =
  1608. (u8 *)&
  1609. ((struct vxge_mac_addrs *)entry)->macaddr;
  1610. memcpy(mac_info.macaddr, mac_address, ETH_ALEN);
  1611. ((struct vxge_mac_addrs *)entry)->state =
  1612. VXGE_LL_MAC_ADDR_IN_DA_TABLE;
  1613. /* does this mac address already exist in da table? */
  1614. status = vxge_search_mac_addr_in_da_table(vpath,
  1615. &mac_info);
  1616. if (status != VXGE_HW_OK) {
  1617. /* Add this mac address to the DA table */
  1618. status = vxge_hw_vpath_mac_addr_add(
  1619. vpath->handle, mac_info.macaddr,
  1620. mac_info.macmask,
  1621. VXGE_HW_VPATH_MAC_ADDR_ADD_DUPLICATE);
  1622. if (status != VXGE_HW_OK) {
  1623. vxge_debug_init(VXGE_ERR,
  1624. "DA add entry failed for vpath:%d",
  1625. vpath->device_id);
  1626. ((struct vxge_mac_addrs *)entry)->state
  1627. = VXGE_LL_MAC_ADDR_IN_LIST;
  1628. }
  1629. }
  1630. }
  1631. }
  1632. return status;
  1633. }
  1634. /* reset vpaths */
  1635. static enum vxge_hw_status vxge_reset_all_vpaths(struct vxgedev *vdev)
  1636. {
  1637. enum vxge_hw_status status = VXGE_HW_OK;
  1638. struct vxge_vpath *vpath;
  1639. int i;
  1640. for (i = 0; i < vdev->no_of_vpath; i++) {
  1641. vpath = &vdev->vpaths[i];
  1642. if (vpath->handle) {
  1643. if (vxge_hw_vpath_reset(vpath->handle) == VXGE_HW_OK) {
  1644. if (is_vxge_card_up(vdev) &&
  1645. vxge_hw_vpath_recover_from_reset(
  1646. vpath->handle) != VXGE_HW_OK) {
  1647. vxge_debug_init(VXGE_ERR,
  1648. "vxge_hw_vpath_recover_"
  1649. "from_reset failed for vpath: "
  1650. "%d", i);
  1651. return status;
  1652. }
  1653. } else {
  1654. vxge_debug_init(VXGE_ERR,
  1655. "vxge_hw_vpath_reset failed for "
  1656. "vpath:%d", i);
  1657. return status;
  1658. }
  1659. }
  1660. }
  1661. return status;
  1662. }
  1663. /* close vpaths */
  1664. static void vxge_close_vpaths(struct vxgedev *vdev, int index)
  1665. {
  1666. struct vxge_vpath *vpath;
  1667. int i;
  1668. for (i = index; i < vdev->no_of_vpath; i++) {
  1669. vpath = &vdev->vpaths[i];
  1670. if (vpath->handle && vpath->is_open) {
  1671. vxge_hw_vpath_close(vpath->handle);
  1672. vdev->stats.vpaths_open--;
  1673. }
  1674. vpath->is_open = 0;
  1675. vpath->handle = NULL;
  1676. }
  1677. }
  1678. /* open vpaths */
  1679. static int vxge_open_vpaths(struct vxgedev *vdev)
  1680. {
  1681. struct vxge_hw_vpath_attr attr;
  1682. enum vxge_hw_status status;
  1683. struct vxge_vpath *vpath;
  1684. u32 vp_id = 0;
  1685. int i;
  1686. for (i = 0; i < vdev->no_of_vpath; i++) {
  1687. vpath = &vdev->vpaths[i];
  1688. vxge_assert(vpath->is_configured);
  1689. attr.vp_id = vpath->device_id;
  1690. attr.fifo_attr.callback = vxge_xmit_compl;
  1691. attr.fifo_attr.txdl_term = vxge_tx_term;
  1692. attr.fifo_attr.per_txdl_space = sizeof(struct vxge_tx_priv);
  1693. attr.fifo_attr.userdata = &vpath->fifo;
  1694. attr.ring_attr.callback = vxge_rx_1b_compl;
  1695. attr.ring_attr.rxd_init = vxge_rx_initial_replenish;
  1696. attr.ring_attr.rxd_term = vxge_rx_term;
  1697. attr.ring_attr.per_rxd_space = sizeof(struct vxge_rx_priv);
  1698. attr.ring_attr.userdata = &vpath->ring;
  1699. vpath->ring.ndev = vdev->ndev;
  1700. vpath->ring.pdev = vdev->pdev;
  1701. status = vxge_hw_vpath_open(vdev->devh, &attr, &vpath->handle);
  1702. if (status == VXGE_HW_OK) {
  1703. vpath->fifo.handle =
  1704. (struct __vxge_hw_fifo *)attr.fifo_attr.userdata;
  1705. vpath->ring.handle =
  1706. (struct __vxge_hw_ring *)attr.ring_attr.userdata;
  1707. vpath->fifo.tx_steering_type =
  1708. vdev->config.tx_steering_type;
  1709. vpath->fifo.ndev = vdev->ndev;
  1710. vpath->fifo.pdev = vdev->pdev;
  1711. if (vdev->config.tx_steering_type)
  1712. vpath->fifo.txq =
  1713. netdev_get_tx_queue(vdev->ndev, i);
  1714. else
  1715. vpath->fifo.txq =
  1716. netdev_get_tx_queue(vdev->ndev, 0);
  1717. vpath->fifo.indicate_max_pkts =
  1718. vdev->config.fifo_indicate_max_pkts;
  1719. vpath->ring.rx_vector_no = 0;
  1720. vpath->ring.rx_csum = vdev->rx_csum;
  1721. vpath->is_open = 1;
  1722. vdev->vp_handles[i] = vpath->handle;
  1723. vpath->ring.gro_enable = vdev->config.gro_enable;
  1724. vpath->ring.vlan_tag_strip = vdev->vlan_tag_strip;
  1725. vdev->stats.vpaths_open++;
  1726. } else {
  1727. vdev->stats.vpath_open_fail++;
  1728. vxge_debug_init(VXGE_ERR,
  1729. "%s: vpath: %d failed to open "
  1730. "with status: %d",
  1731. vdev->ndev->name, vpath->device_id,
  1732. status);
  1733. vxge_close_vpaths(vdev, 0);
  1734. return -EPERM;
  1735. }
  1736. vp_id = vpath->handle->vpath->vp_id;
  1737. vdev->vpaths_deployed |= vxge_mBIT(vp_id);
  1738. }
  1739. return VXGE_HW_OK;
  1740. }
  1741. /*
  1742. * vxge_isr_napi
  1743. * @irq: the irq of the device.
  1744. * @dev_id: a void pointer to the hldev structure of the Titan device
  1745. * @ptregs: pointer to the registers pushed on the stack.
  1746. *
  1747. * This function is the ISR handler of the device when napi is enabled. It
  1748. * identifies the reason for the interrupt and calls the relevant service
  1749. * routines.
  1750. */
  1751. static irqreturn_t vxge_isr_napi(int irq, void *dev_id)
  1752. {
  1753. struct net_device *dev;
  1754. struct __vxge_hw_device *hldev;
  1755. u64 reason;
  1756. enum vxge_hw_status status;
  1757. struct vxgedev *vdev = (struct vxgedev *) dev_id;;
  1758. vxge_debug_intr(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  1759. dev = vdev->ndev;
  1760. hldev = (struct __vxge_hw_device *)pci_get_drvdata(vdev->pdev);
  1761. if (pci_channel_offline(vdev->pdev))
  1762. return IRQ_NONE;
  1763. if (unlikely(!is_vxge_card_up(vdev)))
  1764. return IRQ_NONE;
  1765. status = vxge_hw_device_begin_irq(hldev, vdev->exec_mode,
  1766. &reason);
  1767. if (status == VXGE_HW_OK) {
  1768. vxge_hw_device_mask_all(hldev);
  1769. if (reason &
  1770. VXGE_HW_TITAN_GENERAL_INT_STATUS_VPATH_TRAFFIC_INT(
  1771. vdev->vpaths_deployed >>
  1772. (64 - VXGE_HW_MAX_VIRTUAL_PATHS))) {
  1773. vxge_hw_device_clear_tx_rx(hldev);
  1774. napi_schedule(&vdev->napi);
  1775. vxge_debug_intr(VXGE_TRACE,
  1776. "%s:%d Exiting...", __func__, __LINE__);
  1777. return IRQ_HANDLED;
  1778. } else
  1779. vxge_hw_device_unmask_all(hldev);
  1780. } else if (unlikely((status == VXGE_HW_ERR_VPATH) ||
  1781. (status == VXGE_HW_ERR_CRITICAL) ||
  1782. (status == VXGE_HW_ERR_FIFO))) {
  1783. vxge_hw_device_mask_all(hldev);
  1784. vxge_hw_device_flush_io(hldev);
  1785. return IRQ_HANDLED;
  1786. } else if (unlikely(status == VXGE_HW_ERR_SLOT_FREEZE))
  1787. return IRQ_HANDLED;
  1788. vxge_debug_intr(VXGE_TRACE, "%s:%d Exiting...", __func__, __LINE__);
  1789. return IRQ_NONE;
  1790. }
  1791. #ifdef CONFIG_PCI_MSI
  1792. static irqreturn_t
  1793. vxge_tx_msix_handle(int irq, void *dev_id)
  1794. {
  1795. struct vxge_fifo *fifo = (struct vxge_fifo *)dev_id;
  1796. VXGE_COMPLETE_VPATH_TX(fifo);
  1797. return IRQ_HANDLED;
  1798. }
  1799. static irqreturn_t
  1800. vxge_rx_msix_napi_handle(int irq, void *dev_id)
  1801. {
  1802. struct vxge_ring *ring = (struct vxge_ring *)dev_id;
  1803. /* MSIX_IDX for Rx is 1 */
  1804. vxge_hw_channel_msix_mask((struct __vxge_hw_channel *)ring->handle,
  1805. ring->rx_vector_no);
  1806. napi_schedule(&ring->napi);
  1807. return IRQ_HANDLED;
  1808. }
  1809. static irqreturn_t
  1810. vxge_alarm_msix_handle(int irq, void *dev_id)
  1811. {
  1812. int i;
  1813. enum vxge_hw_status status;
  1814. struct vxge_vpath *vpath = (struct vxge_vpath *)dev_id;
  1815. struct vxgedev *vdev = vpath->vdev;
  1816. int msix_id = (vpath->handle->vpath->vp_id *
  1817. VXGE_HW_VPATH_MSIX_ACTIVE) + VXGE_ALARM_MSIX_ID;
  1818. for (i = 0; i < vdev->no_of_vpath; i++) {
  1819. vxge_hw_vpath_msix_mask(vdev->vpaths[i].handle, msix_id);
  1820. status = vxge_hw_vpath_alarm_process(vdev->vpaths[i].handle,
  1821. vdev->exec_mode);
  1822. if (status == VXGE_HW_OK) {
  1823. vxge_hw_vpath_msix_unmask(vdev->vpaths[i].handle,
  1824. msix_id);
  1825. continue;
  1826. }
  1827. vxge_debug_intr(VXGE_ERR,
  1828. "%s: vxge_hw_vpath_alarm_process failed %x ",
  1829. VXGE_DRIVER_NAME, status);
  1830. }
  1831. return IRQ_HANDLED;
  1832. }
  1833. static int vxge_alloc_msix(struct vxgedev *vdev)
  1834. {
  1835. int j, i, ret = 0;
  1836. int msix_intr_vect = 0, temp;
  1837. vdev->intr_cnt = 0;
  1838. start:
  1839. /* Tx/Rx MSIX Vectors count */
  1840. vdev->intr_cnt = vdev->no_of_vpath * 2;
  1841. /* Alarm MSIX Vectors count */
  1842. vdev->intr_cnt++;
  1843. vdev->entries = kcalloc(vdev->intr_cnt, sizeof(struct msix_entry),
  1844. GFP_KERNEL);
  1845. if (!vdev->entries) {
  1846. vxge_debug_init(VXGE_ERR,
  1847. "%s: memory allocation failed",
  1848. VXGE_DRIVER_NAME);
  1849. ret = -ENOMEM;
  1850. goto alloc_entries_failed;
  1851. }
  1852. vdev->vxge_entries = kcalloc(vdev->intr_cnt,
  1853. sizeof(struct vxge_msix_entry),
  1854. GFP_KERNEL);
  1855. if (!vdev->vxge_entries) {
  1856. vxge_debug_init(VXGE_ERR, "%s: memory allocation failed",
  1857. VXGE_DRIVER_NAME);
  1858. ret = -ENOMEM;
  1859. goto alloc_vxge_entries_failed;
  1860. }
  1861. for (i = 0, j = 0; i < vdev->no_of_vpath; i++) {
  1862. msix_intr_vect = i * VXGE_HW_VPATH_MSIX_ACTIVE;
  1863. /* Initialize the fifo vector */
  1864. vdev->entries[j].entry = msix_intr_vect;
  1865. vdev->vxge_entries[j].entry = msix_intr_vect;
  1866. vdev->vxge_entries[j].in_use = 0;
  1867. j++;
  1868. /* Initialize the ring vector */
  1869. vdev->entries[j].entry = msix_intr_vect + 1;
  1870. vdev->vxge_entries[j].entry = msix_intr_vect + 1;
  1871. vdev->vxge_entries[j].in_use = 0;
  1872. j++;
  1873. }
  1874. /* Initialize the alarm vector */
  1875. vdev->entries[j].entry = VXGE_ALARM_MSIX_ID;
  1876. vdev->vxge_entries[j].entry = VXGE_ALARM_MSIX_ID;
  1877. vdev->vxge_entries[j].in_use = 0;
  1878. ret = pci_enable_msix(vdev->pdev, vdev->entries, vdev->intr_cnt);
  1879. if (ret > 0) {
  1880. vxge_debug_init(VXGE_ERR,
  1881. "%s: MSI-X enable failed for %d vectors, ret: %d",
  1882. VXGE_DRIVER_NAME, vdev->intr_cnt, ret);
  1883. if ((max_config_vpath != VXGE_USE_DEFAULT) || (ret < 3)) {
  1884. ret = -ENODEV;
  1885. goto enable_msix_failed;
  1886. }
  1887. kfree(vdev->entries);
  1888. kfree(vdev->vxge_entries);
  1889. vdev->entries = NULL;
  1890. vdev->vxge_entries = NULL;
  1891. /* Try with less no of vector by reducing no of vpaths count */
  1892. temp = (ret - 1)/2;
  1893. vxge_close_vpaths(vdev, temp);
  1894. vdev->no_of_vpath = temp;
  1895. goto start;
  1896. } else if (ret < 0) {
  1897. ret = -ENODEV;
  1898. goto enable_msix_failed;
  1899. }
  1900. return 0;
  1901. enable_msix_failed:
  1902. kfree(vdev->vxge_entries);
  1903. alloc_vxge_entries_failed:
  1904. kfree(vdev->entries);
  1905. alloc_entries_failed:
  1906. return ret;
  1907. }
  1908. static int vxge_enable_msix(struct vxgedev *vdev)
  1909. {
  1910. int i, ret = 0;
  1911. /* 0 - Tx, 1 - Rx */
  1912. int tim_msix_id[4] = {0, 1, 0, 0};
  1913. vdev->intr_cnt = 0;
  1914. /* allocate msix vectors */
  1915. ret = vxge_alloc_msix(vdev);
  1916. if (!ret) {
  1917. for (i = 0; i < vdev->no_of_vpath; i++) {
  1918. struct vxge_vpath *vpath = &vdev->vpaths[i];
  1919. /* If fifo or ring are not enabled, the MSIX vector for
  1920. * it should be set to 0.
  1921. */
  1922. vpath->ring.rx_vector_no = (vpath->device_id *
  1923. VXGE_HW_VPATH_MSIX_ACTIVE) + 1;
  1924. vxge_hw_vpath_msix_set(vpath->handle, tim_msix_id,
  1925. VXGE_ALARM_MSIX_ID);
  1926. }
  1927. }
  1928. return ret;
  1929. }
  1930. static void vxge_rem_msix_isr(struct vxgedev *vdev)
  1931. {
  1932. int intr_cnt;
  1933. for (intr_cnt = 0; intr_cnt < (vdev->no_of_vpath * 2 + 1);
  1934. intr_cnt++) {
  1935. if (vdev->vxge_entries[intr_cnt].in_use) {
  1936. synchronize_irq(vdev->entries[intr_cnt].vector);
  1937. free_irq(vdev->entries[intr_cnt].vector,
  1938. vdev->vxge_entries[intr_cnt].arg);
  1939. vdev->vxge_entries[intr_cnt].in_use = 0;
  1940. }
  1941. }
  1942. kfree(vdev->entries);
  1943. kfree(vdev->vxge_entries);
  1944. vdev->entries = NULL;
  1945. vdev->vxge_entries = NULL;
  1946. if (vdev->config.intr_type == MSI_X)
  1947. pci_disable_msix(vdev->pdev);
  1948. }
  1949. #endif
  1950. static void vxge_rem_isr(struct vxgedev *vdev)
  1951. {
  1952. struct __vxge_hw_device *hldev;
  1953. hldev = (struct __vxge_hw_device *) pci_get_drvdata(vdev->pdev);
  1954. #ifdef CONFIG_PCI_MSI
  1955. if (vdev->config.intr_type == MSI_X) {
  1956. vxge_rem_msix_isr(vdev);
  1957. } else
  1958. #endif
  1959. if (vdev->config.intr_type == INTA) {
  1960. synchronize_irq(vdev->pdev->irq);
  1961. free_irq(vdev->pdev->irq, vdev);
  1962. }
  1963. }
  1964. static int vxge_add_isr(struct vxgedev *vdev)
  1965. {
  1966. int ret = 0;
  1967. #ifdef CONFIG_PCI_MSI
  1968. int vp_idx = 0, intr_idx = 0, intr_cnt = 0, msix_idx = 0, irq_req = 0;
  1969. int pci_fun = PCI_FUNC(vdev->pdev->devfn);
  1970. if (vdev->config.intr_type == MSI_X)
  1971. ret = vxge_enable_msix(vdev);
  1972. if (ret) {
  1973. vxge_debug_init(VXGE_ERR,
  1974. "%s: Enabling MSI-X Failed", VXGE_DRIVER_NAME);
  1975. vxge_debug_init(VXGE_ERR,
  1976. "%s: Defaulting to INTA", VXGE_DRIVER_NAME);
  1977. vdev->config.intr_type = INTA;
  1978. }
  1979. if (vdev->config.intr_type == MSI_X) {
  1980. for (intr_idx = 0;
  1981. intr_idx < (vdev->no_of_vpath *
  1982. VXGE_HW_VPATH_MSIX_ACTIVE); intr_idx++) {
  1983. msix_idx = intr_idx % VXGE_HW_VPATH_MSIX_ACTIVE;
  1984. irq_req = 0;
  1985. switch (msix_idx) {
  1986. case 0:
  1987. snprintf(vdev->desc[intr_cnt], VXGE_INTR_STRLEN,
  1988. "%s:vxge:MSI-X %d - Tx - fn:%d vpath:%d",
  1989. vdev->ndev->name,
  1990. vdev->entries[intr_cnt].entry,
  1991. pci_fun, vp_idx);
  1992. ret = request_irq(
  1993. vdev->entries[intr_cnt].vector,
  1994. vxge_tx_msix_handle, 0,
  1995. vdev->desc[intr_cnt],
  1996. &vdev->vpaths[vp_idx].fifo);
  1997. vdev->vxge_entries[intr_cnt].arg =
  1998. &vdev->vpaths[vp_idx].fifo;
  1999. irq_req = 1;
  2000. break;
  2001. case 1:
  2002. snprintf(vdev->desc[intr_cnt], VXGE_INTR_STRLEN,
  2003. "%s:vxge:MSI-X %d - Rx - fn:%d vpath:%d",
  2004. vdev->ndev->name,
  2005. vdev->entries[intr_cnt].entry,
  2006. pci_fun, vp_idx);
  2007. ret = request_irq(
  2008. vdev->entries[intr_cnt].vector,
  2009. vxge_rx_msix_napi_handle,
  2010. 0,
  2011. vdev->desc[intr_cnt],
  2012. &vdev->vpaths[vp_idx].ring);
  2013. vdev->vxge_entries[intr_cnt].arg =
  2014. &vdev->vpaths[vp_idx].ring;
  2015. irq_req = 1;
  2016. break;
  2017. }
  2018. if (ret) {
  2019. vxge_debug_init(VXGE_ERR,
  2020. "%s: MSIX - %d Registration failed",
  2021. vdev->ndev->name, intr_cnt);
  2022. vxge_rem_msix_isr(vdev);
  2023. vdev->config.intr_type = INTA;
  2024. vxge_debug_init(VXGE_ERR,
  2025. "%s: Defaulting to INTA"
  2026. , vdev->ndev->name);
  2027. goto INTA_MODE;
  2028. }
  2029. if (irq_req) {
  2030. /* We requested for this msix interrupt */
  2031. vdev->vxge_entries[intr_cnt].in_use = 1;
  2032. msix_idx += vdev->vpaths[vp_idx].device_id *
  2033. VXGE_HW_VPATH_MSIX_ACTIVE;
  2034. vxge_hw_vpath_msix_unmask(
  2035. vdev->vpaths[vp_idx].handle,
  2036. msix_idx);
  2037. intr_cnt++;
  2038. }
  2039. /* Point to next vpath handler */
  2040. if (((intr_idx + 1) % VXGE_HW_VPATH_MSIX_ACTIVE == 0) &&
  2041. (vp_idx < (vdev->no_of_vpath - 1)))
  2042. vp_idx++;
  2043. }
  2044. intr_cnt = vdev->no_of_vpath * 2;
  2045. snprintf(vdev->desc[intr_cnt], VXGE_INTR_STRLEN,
  2046. "%s:vxge:MSI-X %d - Alarm - fn:%d",
  2047. vdev->ndev->name,
  2048. vdev->entries[intr_cnt].entry,
  2049. pci_fun);
  2050. /* For Alarm interrupts */
  2051. ret = request_irq(vdev->entries[intr_cnt].vector,
  2052. vxge_alarm_msix_handle, 0,
  2053. vdev->desc[intr_cnt],
  2054. &vdev->vpaths[0]);
  2055. if (ret) {
  2056. vxge_debug_init(VXGE_ERR,
  2057. "%s: MSIX - %d Registration failed",
  2058. vdev->ndev->name, intr_cnt);
  2059. vxge_rem_msix_isr(vdev);
  2060. vdev->config.intr_type = INTA;
  2061. vxge_debug_init(VXGE_ERR,
  2062. "%s: Defaulting to INTA",
  2063. vdev->ndev->name);
  2064. goto INTA_MODE;
  2065. }
  2066. msix_idx = (vdev->vpaths[0].handle->vpath->vp_id *
  2067. VXGE_HW_VPATH_MSIX_ACTIVE) + VXGE_ALARM_MSIX_ID;
  2068. vxge_hw_vpath_msix_unmask(vdev->vpaths[vp_idx].handle,
  2069. msix_idx);
  2070. vdev->vxge_entries[intr_cnt].in_use = 1;
  2071. vdev->vxge_entries[intr_cnt].arg = &vdev->vpaths[0];
  2072. }
  2073. INTA_MODE:
  2074. #endif
  2075. if (vdev->config.intr_type == INTA) {
  2076. snprintf(vdev->desc[0], VXGE_INTR_STRLEN,
  2077. "%s:vxge:INTA", vdev->ndev->name);
  2078. vxge_hw_device_set_intr_type(vdev->devh,
  2079. VXGE_HW_INTR_MODE_IRQLINE);
  2080. vxge_hw_vpath_tti_ci_set(vdev->devh,
  2081. vdev->vpaths[0].device_id);
  2082. ret = request_irq((int) vdev->pdev->irq,
  2083. vxge_isr_napi,
  2084. IRQF_SHARED, vdev->desc[0], vdev);
  2085. if (ret) {
  2086. vxge_debug_init(VXGE_ERR,
  2087. "%s %s-%d: ISR registration failed",
  2088. VXGE_DRIVER_NAME, "IRQ", vdev->pdev->irq);
  2089. return -ENODEV;
  2090. }
  2091. vxge_debug_init(VXGE_TRACE,
  2092. "new %s-%d line allocated",
  2093. "IRQ", vdev->pdev->irq);
  2094. }
  2095. return VXGE_HW_OK;
  2096. }
  2097. static void vxge_poll_vp_reset(unsigned long data)
  2098. {
  2099. struct vxgedev *vdev = (struct vxgedev *)data;
  2100. int i, j = 0;
  2101. for (i = 0; i < vdev->no_of_vpath; i++) {
  2102. if (test_bit(i, &vdev->vp_reset)) {
  2103. vxge_reset_vpath(vdev, i);
  2104. j++;
  2105. }
  2106. }
  2107. if (j && (vdev->config.intr_type != MSI_X)) {
  2108. vxge_hw_device_unmask_all(vdev->devh);
  2109. vxge_hw_device_flush_io(vdev->devh);
  2110. }
  2111. mod_timer(&vdev->vp_reset_timer, jiffies + HZ / 2);
  2112. }
  2113. static void vxge_poll_vp_lockup(unsigned long data)
  2114. {
  2115. struct vxgedev *vdev = (struct vxgedev *)data;
  2116. enum vxge_hw_status status = VXGE_HW_OK;
  2117. struct vxge_vpath *vpath;
  2118. struct vxge_ring *ring;
  2119. int i;
  2120. for (i = 0; i < vdev->no_of_vpath; i++) {
  2121. ring = &vdev->vpaths[i].ring;
  2122. /* Did this vpath received any packets */
  2123. if (ring->stats.prev_rx_frms == ring->stats.rx_frms) {
  2124. status = vxge_hw_vpath_check_leak(ring->handle);
  2125. /* Did it received any packets last time */
  2126. if ((VXGE_HW_FAIL == status) &&
  2127. (VXGE_HW_FAIL == ring->last_status)) {
  2128. /* schedule vpath reset */
  2129. if (!test_and_set_bit(i, &vdev->vp_reset)) {
  2130. vpath = &vdev->vpaths[i];
  2131. /* disable interrupts for this vpath */
  2132. vxge_vpath_intr_disable(vdev, i);
  2133. /* stop the queue for this vpath */
  2134. netif_tx_stop_queue(vpath->fifo.txq);
  2135. continue;
  2136. }
  2137. }
  2138. }
  2139. ring->stats.prev_rx_frms = ring->stats.rx_frms;
  2140. ring->last_status = status;
  2141. }
  2142. /* Check every 1 milli second */
  2143. mod_timer(&vdev->vp_lockup_timer, jiffies + HZ / 1000);
  2144. }
  2145. /**
  2146. * vxge_open
  2147. * @dev: pointer to the device structure.
  2148. *
  2149. * This function is the open entry point of the driver. It mainly calls a
  2150. * function to allocate Rx buffers and inserts them into the buffer
  2151. * descriptors and then enables the Rx part of the NIC.
  2152. * Return value: '0' on success and an appropriate (-)ve integer as
  2153. * defined in errno.h file on failure.
  2154. */
  2155. static int
  2156. vxge_open(struct net_device *dev)
  2157. {
  2158. enum vxge_hw_status status;
  2159. struct vxgedev *vdev;
  2160. struct __vxge_hw_device *hldev;
  2161. struct vxge_vpath *vpath;
  2162. int ret = 0;
  2163. int i;
  2164. u64 val64, function_mode;
  2165. vxge_debug_entryexit(VXGE_TRACE,
  2166. "%s: %s:%d", dev->name, __func__, __LINE__);
  2167. vdev = (struct vxgedev *)netdev_priv(dev);
  2168. hldev = (struct __vxge_hw_device *) pci_get_drvdata(vdev->pdev);
  2169. function_mode = vdev->config.device_hw_info.function_mode;
  2170. /* make sure you have link off by default every time Nic is
  2171. * initialized */
  2172. netif_carrier_off(dev);
  2173. /* Open VPATHs */
  2174. status = vxge_open_vpaths(vdev);
  2175. if (status != VXGE_HW_OK) {
  2176. vxge_debug_init(VXGE_ERR,
  2177. "%s: fatal: Vpath open failed", vdev->ndev->name);
  2178. ret = -EPERM;
  2179. goto out0;
  2180. }
  2181. vdev->mtu = dev->mtu;
  2182. status = vxge_add_isr(vdev);
  2183. if (status != VXGE_HW_OK) {
  2184. vxge_debug_init(VXGE_ERR,
  2185. "%s: fatal: ISR add failed", dev->name);
  2186. ret = -EPERM;
  2187. goto out1;
  2188. }
  2189. if (vdev->config.intr_type != MSI_X) {
  2190. netif_napi_add(dev, &vdev->napi, vxge_poll_inta,
  2191. vdev->config.napi_weight);
  2192. napi_enable(&vdev->napi);
  2193. for (i = 0; i < vdev->no_of_vpath; i++) {
  2194. vpath = &vdev->vpaths[i];
  2195. vpath->ring.napi_p = &vdev->napi;
  2196. }
  2197. } else {
  2198. for (i = 0; i < vdev->no_of_vpath; i++) {
  2199. vpath = &vdev->vpaths[i];
  2200. netif_napi_add(dev, &vpath->ring.napi,
  2201. vxge_poll_msix, vdev->config.napi_weight);
  2202. napi_enable(&vpath->ring.napi);
  2203. vpath->ring.napi_p = &vpath->ring.napi;
  2204. }
  2205. }
  2206. /* configure RTH */
  2207. if (vdev->config.rth_steering) {
  2208. status = vxge_rth_configure(vdev);
  2209. if (status != VXGE_HW_OK) {
  2210. vxge_debug_init(VXGE_ERR,
  2211. "%s: fatal: RTH configuration failed",
  2212. dev->name);
  2213. ret = -EPERM;
  2214. goto out2;
  2215. }
  2216. }
  2217. printk(KERN_INFO "%s: Receive Hashing Offload %s\n", dev->name,
  2218. hldev->config.rth_en ? "enabled" : "disabled");
  2219. for (i = 0; i < vdev->no_of_vpath; i++) {
  2220. vpath = &vdev->vpaths[i];
  2221. /* set initial mtu before enabling the device */
  2222. status = vxge_hw_vpath_mtu_set(vpath->handle, vdev->mtu);
  2223. if (status != VXGE_HW_OK) {
  2224. vxge_debug_init(VXGE_ERR,
  2225. "%s: fatal: can not set new MTU", dev->name);
  2226. ret = -EPERM;
  2227. goto out2;
  2228. }
  2229. }
  2230. VXGE_DEVICE_DEBUG_LEVEL_SET(VXGE_TRACE, VXGE_COMPONENT_LL, vdev);
  2231. vxge_debug_init(vdev->level_trace,
  2232. "%s: MTU is %d", vdev->ndev->name, vdev->mtu);
  2233. VXGE_DEVICE_DEBUG_LEVEL_SET(VXGE_ERR, VXGE_COMPONENT_LL, vdev);
  2234. /* Restore the DA, VID table and also multicast and promiscuous mode
  2235. * states
  2236. */
  2237. if (vdev->all_multi_flg) {
  2238. for (i = 0; i < vdev->no_of_vpath; i++) {
  2239. vpath = &vdev->vpaths[i];
  2240. vxge_restore_vpath_mac_addr(vpath);
  2241. vxge_restore_vpath_vid_table(vpath);
  2242. status = vxge_hw_vpath_mcast_enable(vpath->handle);
  2243. if (status != VXGE_HW_OK)
  2244. vxge_debug_init(VXGE_ERR,
  2245. "%s:%d Enabling multicast failed",
  2246. __func__, __LINE__);
  2247. }
  2248. }
  2249. /* Enable vpath to sniff all unicast/multicast traffic that not
  2250. * addressed to them. We allow promiscous mode for PF only
  2251. */
  2252. val64 = 0;
  2253. for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
  2254. val64 |= VXGE_HW_RXMAC_AUTHORIZE_ALL_ADDR_VP(i);
  2255. vxge_hw_mgmt_reg_write(vdev->devh,
  2256. vxge_hw_mgmt_reg_type_mrpcim,
  2257. 0,
  2258. (ulong)offsetof(struct vxge_hw_mrpcim_reg,
  2259. rxmac_authorize_all_addr),
  2260. val64);
  2261. vxge_hw_mgmt_reg_write(vdev->devh,
  2262. vxge_hw_mgmt_reg_type_mrpcim,
  2263. 0,
  2264. (ulong)offsetof(struct vxge_hw_mrpcim_reg,
  2265. rxmac_authorize_all_vid),
  2266. val64);
  2267. vxge_set_multicast(dev);
  2268. /* Enabling Bcast and mcast for all vpath */
  2269. for (i = 0; i < vdev->no_of_vpath; i++) {
  2270. vpath = &vdev->vpaths[i];
  2271. status = vxge_hw_vpath_bcast_enable(vpath->handle);
  2272. if (status != VXGE_HW_OK)
  2273. vxge_debug_init(VXGE_ERR,
  2274. "%s : Can not enable bcast for vpath "
  2275. "id %d", dev->name, i);
  2276. if (vdev->config.addr_learn_en) {
  2277. status = vxge_hw_vpath_mcast_enable(vpath->handle);
  2278. if (status != VXGE_HW_OK)
  2279. vxge_debug_init(VXGE_ERR,
  2280. "%s : Can not enable mcast for vpath "
  2281. "id %d", dev->name, i);
  2282. }
  2283. }
  2284. vxge_hw_device_setpause_data(vdev->devh, 0,
  2285. vdev->config.tx_pause_enable,
  2286. vdev->config.rx_pause_enable);
  2287. if (vdev->vp_reset_timer.function == NULL)
  2288. vxge_os_timer(vdev->vp_reset_timer,
  2289. vxge_poll_vp_reset, vdev, (HZ/2));
  2290. if (vdev->vp_lockup_timer.function == NULL)
  2291. vxge_os_timer(vdev->vp_lockup_timer,
  2292. vxge_poll_vp_lockup, vdev, (HZ/2));
  2293. set_bit(__VXGE_STATE_CARD_UP, &vdev->state);
  2294. smp_wmb();
  2295. if (vxge_hw_device_link_state_get(vdev->devh) == VXGE_HW_LINK_UP) {
  2296. netif_carrier_on(vdev->ndev);
  2297. netdev_notice(vdev->ndev, "Link Up\n");
  2298. vdev->stats.link_up++;
  2299. }
  2300. vxge_hw_device_intr_enable(vdev->devh);
  2301. smp_wmb();
  2302. for (i = 0; i < vdev->no_of_vpath; i++) {
  2303. vpath = &vdev->vpaths[i];
  2304. vxge_hw_vpath_enable(vpath->handle);
  2305. smp_wmb();
  2306. vxge_hw_vpath_rx_doorbell_init(vpath->handle);
  2307. }
  2308. netif_tx_start_all_queues(vdev->ndev);
  2309. goto out0;
  2310. out2:
  2311. vxge_rem_isr(vdev);
  2312. /* Disable napi */
  2313. if (vdev->config.intr_type != MSI_X)
  2314. napi_disable(&vdev->napi);
  2315. else {
  2316. for (i = 0; i < vdev->no_of_vpath; i++)
  2317. napi_disable(&vdev->vpaths[i].ring.napi);
  2318. }
  2319. out1:
  2320. vxge_close_vpaths(vdev, 0);
  2321. out0:
  2322. vxge_debug_entryexit(VXGE_TRACE,
  2323. "%s: %s:%d Exiting...",
  2324. dev->name, __func__, __LINE__);
  2325. return ret;
  2326. }
  2327. /* Loop throught the mac address list and delete all the entries */
  2328. static void vxge_free_mac_add_list(struct vxge_vpath *vpath)
  2329. {
  2330. struct list_head *entry, *next;
  2331. if (list_empty(&vpath->mac_addr_list))
  2332. return;
  2333. list_for_each_safe(entry, next, &vpath->mac_addr_list) {
  2334. list_del(entry);
  2335. kfree((struct vxge_mac_addrs *)entry);
  2336. }
  2337. }
  2338. static void vxge_napi_del_all(struct vxgedev *vdev)
  2339. {
  2340. int i;
  2341. if (vdev->config.intr_type != MSI_X)
  2342. netif_napi_del(&vdev->napi);
  2343. else {
  2344. for (i = 0; i < vdev->no_of_vpath; i++)
  2345. netif_napi_del(&vdev->vpaths[i].ring.napi);
  2346. }
  2347. }
  2348. static int do_vxge_close(struct net_device *dev, int do_io)
  2349. {
  2350. enum vxge_hw_status status;
  2351. struct vxgedev *vdev;
  2352. struct __vxge_hw_device *hldev;
  2353. int i;
  2354. u64 val64, vpath_vector;
  2355. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
  2356. dev->name, __func__, __LINE__);
  2357. vdev = (struct vxgedev *)netdev_priv(dev);
  2358. hldev = (struct __vxge_hw_device *) pci_get_drvdata(vdev->pdev);
  2359. if (unlikely(!is_vxge_card_up(vdev)))
  2360. return 0;
  2361. /* If vxge_handle_crit_err task is executing,
  2362. * wait till it completes. */
  2363. while (test_and_set_bit(__VXGE_STATE_RESET_CARD, &vdev->state))
  2364. msleep(50);
  2365. clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
  2366. if (do_io) {
  2367. /* Put the vpath back in normal mode */
  2368. vpath_vector = vxge_mBIT(vdev->vpaths[0].device_id);
  2369. status = vxge_hw_mgmt_reg_read(vdev->devh,
  2370. vxge_hw_mgmt_reg_type_mrpcim,
  2371. 0,
  2372. (ulong)offsetof(
  2373. struct vxge_hw_mrpcim_reg,
  2374. rts_mgr_cbasin_cfg),
  2375. &val64);
  2376. if (status == VXGE_HW_OK) {
  2377. val64 &= ~vpath_vector;
  2378. status = vxge_hw_mgmt_reg_write(vdev->devh,
  2379. vxge_hw_mgmt_reg_type_mrpcim,
  2380. 0,
  2381. (ulong)offsetof(
  2382. struct vxge_hw_mrpcim_reg,
  2383. rts_mgr_cbasin_cfg),
  2384. val64);
  2385. }
  2386. /* Remove the function 0 from promiscous mode */
  2387. vxge_hw_mgmt_reg_write(vdev->devh,
  2388. vxge_hw_mgmt_reg_type_mrpcim,
  2389. 0,
  2390. (ulong)offsetof(struct vxge_hw_mrpcim_reg,
  2391. rxmac_authorize_all_addr),
  2392. 0);
  2393. vxge_hw_mgmt_reg_write(vdev->devh,
  2394. vxge_hw_mgmt_reg_type_mrpcim,
  2395. 0,
  2396. (ulong)offsetof(struct vxge_hw_mrpcim_reg,
  2397. rxmac_authorize_all_vid),
  2398. 0);
  2399. smp_wmb();
  2400. }
  2401. del_timer_sync(&vdev->vp_lockup_timer);
  2402. del_timer_sync(&vdev->vp_reset_timer);
  2403. /* Disable napi */
  2404. if (vdev->config.intr_type != MSI_X)
  2405. napi_disable(&vdev->napi);
  2406. else {
  2407. for (i = 0; i < vdev->no_of_vpath; i++)
  2408. napi_disable(&vdev->vpaths[i].ring.napi);
  2409. }
  2410. netif_carrier_off(vdev->ndev);
  2411. netdev_notice(vdev->ndev, "Link Down\n");
  2412. netif_tx_stop_all_queues(vdev->ndev);
  2413. /* Note that at this point xmit() is stopped by upper layer */
  2414. if (do_io)
  2415. vxge_hw_device_intr_disable(vdev->devh);
  2416. mdelay(1000);
  2417. vxge_rem_isr(vdev);
  2418. vxge_napi_del_all(vdev);
  2419. if (do_io)
  2420. vxge_reset_all_vpaths(vdev);
  2421. vxge_close_vpaths(vdev, 0);
  2422. vxge_debug_entryexit(VXGE_TRACE,
  2423. "%s: %s:%d Exiting...", dev->name, __func__, __LINE__);
  2424. clear_bit(__VXGE_STATE_RESET_CARD, &vdev->state);
  2425. return 0;
  2426. }
  2427. /**
  2428. * vxge_close
  2429. * @dev: device pointer.
  2430. *
  2431. * This is the stop entry point of the driver. It needs to undo exactly
  2432. * whatever was done by the open entry point, thus it's usually referred to
  2433. * as the close function.Among other things this function mainly stops the
  2434. * Rx side of the NIC and frees all the Rx buffers in the Rx rings.
  2435. * Return value: '0' on success and an appropriate (-)ve integer as
  2436. * defined in errno.h file on failure.
  2437. */
  2438. static int
  2439. vxge_close(struct net_device *dev)
  2440. {
  2441. do_vxge_close(dev, 1);
  2442. return 0;
  2443. }
  2444. /**
  2445. * vxge_change_mtu
  2446. * @dev: net device pointer.
  2447. * @new_mtu :the new MTU size for the device.
  2448. *
  2449. * A driver entry point to change MTU size for the device. Before changing
  2450. * the MTU the device must be stopped.
  2451. */
  2452. static int vxge_change_mtu(struct net_device *dev, int new_mtu)
  2453. {
  2454. struct vxgedev *vdev = netdev_priv(dev);
  2455. vxge_debug_entryexit(vdev->level_trace,
  2456. "%s:%d", __func__, __LINE__);
  2457. if ((new_mtu < VXGE_HW_MIN_MTU) || (new_mtu > VXGE_HW_MAX_MTU)) {
  2458. vxge_debug_init(vdev->level_err,
  2459. "%s: mtu size is invalid", dev->name);
  2460. return -EPERM;
  2461. }
  2462. /* check if device is down already */
  2463. if (unlikely(!is_vxge_card_up(vdev))) {
  2464. /* just store new value, will use later on open() */
  2465. dev->mtu = new_mtu;
  2466. vxge_debug_init(vdev->level_err,
  2467. "%s", "device is down on MTU change");
  2468. return 0;
  2469. }
  2470. vxge_debug_init(vdev->level_trace,
  2471. "trying to apply new MTU %d", new_mtu);
  2472. if (vxge_close(dev))
  2473. return -EIO;
  2474. dev->mtu = new_mtu;
  2475. vdev->mtu = new_mtu;
  2476. if (vxge_open(dev))
  2477. return -EIO;
  2478. vxge_debug_init(vdev->level_trace,
  2479. "%s: MTU changed to %d", vdev->ndev->name, new_mtu);
  2480. vxge_debug_entryexit(vdev->level_trace,
  2481. "%s:%d Exiting...", __func__, __LINE__);
  2482. return 0;
  2483. }
  2484. /**
  2485. * vxge_get_stats64
  2486. * @dev: pointer to the device structure
  2487. * @stats: pointer to struct rtnl_link_stats64
  2488. *
  2489. */
  2490. static struct rtnl_link_stats64 *
  2491. vxge_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *net_stats)
  2492. {
  2493. struct vxgedev *vdev = netdev_priv(dev);
  2494. int k;
  2495. /* net_stats already zeroed by caller */
  2496. for (k = 0; k < vdev->no_of_vpath; k++) {
  2497. net_stats->rx_packets += vdev->vpaths[k].ring.stats.rx_frms;
  2498. net_stats->rx_bytes += vdev->vpaths[k].ring.stats.rx_bytes;
  2499. net_stats->rx_errors += vdev->vpaths[k].ring.stats.rx_errors;
  2500. net_stats->multicast += vdev->vpaths[k].ring.stats.rx_mcast;
  2501. net_stats->rx_dropped +=
  2502. vdev->vpaths[k].ring.stats.rx_dropped;
  2503. net_stats->tx_packets += vdev->vpaths[k].fifo.stats.tx_frms;
  2504. net_stats->tx_bytes += vdev->vpaths[k].fifo.stats.tx_bytes;
  2505. net_stats->tx_errors += vdev->vpaths[k].fifo.stats.tx_errors;
  2506. }
  2507. return net_stats;
  2508. }
  2509. /**
  2510. * vxge_ioctl
  2511. * @dev: Device pointer.
  2512. * @ifr: An IOCTL specific structure, that can contain a pointer to
  2513. * a proprietary structure used to pass information to the driver.
  2514. * @cmd: This is used to distinguish between the different commands that
  2515. * can be passed to the IOCTL functions.
  2516. *
  2517. * Entry point for the Ioctl.
  2518. */
  2519. static int vxge_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
  2520. {
  2521. return -EOPNOTSUPP;
  2522. }
  2523. /**
  2524. * vxge_tx_watchdog
  2525. * @dev: pointer to net device structure
  2526. *
  2527. * Watchdog for transmit side.
  2528. * This function is triggered if the Tx Queue is stopped
  2529. * for a pre-defined amount of time when the Interface is still up.
  2530. */
  2531. static void
  2532. vxge_tx_watchdog(struct net_device *dev)
  2533. {
  2534. struct vxgedev *vdev;
  2535. vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  2536. vdev = (struct vxgedev *)netdev_priv(dev);
  2537. vdev->cric_err_event = VXGE_HW_EVENT_RESET_START;
  2538. vxge_reset(vdev);
  2539. vxge_debug_entryexit(VXGE_TRACE,
  2540. "%s:%d Exiting...", __func__, __LINE__);
  2541. }
  2542. /**
  2543. * vxge_vlan_rx_register
  2544. * @dev: net device pointer.
  2545. * @grp: vlan group
  2546. *
  2547. * Vlan group registration
  2548. */
  2549. static void
  2550. vxge_vlan_rx_register(struct net_device *dev, struct vlan_group *grp)
  2551. {
  2552. struct vxgedev *vdev;
  2553. struct vxge_vpath *vpath;
  2554. int vp;
  2555. u64 vid;
  2556. enum vxge_hw_status status;
  2557. int i;
  2558. vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  2559. vdev = (struct vxgedev *)netdev_priv(dev);
  2560. vpath = &vdev->vpaths[0];
  2561. if ((NULL == grp) && (vpath->is_open)) {
  2562. /* Get the first vlan */
  2563. status = vxge_hw_vpath_vid_get(vpath->handle, &vid);
  2564. while (status == VXGE_HW_OK) {
  2565. /* Delete this vlan from the vid table */
  2566. for (vp = 0; vp < vdev->no_of_vpath; vp++) {
  2567. vpath = &vdev->vpaths[vp];
  2568. if (!vpath->is_open)
  2569. continue;
  2570. vxge_hw_vpath_vid_delete(vpath->handle, vid);
  2571. }
  2572. /* Get the next vlan to be deleted */
  2573. vpath = &vdev->vpaths[0];
  2574. status = vxge_hw_vpath_vid_get(vpath->handle, &vid);
  2575. }
  2576. }
  2577. vdev->vlgrp = grp;
  2578. for (i = 0; i < vdev->no_of_vpath; i++) {
  2579. if (vdev->vpaths[i].is_configured)
  2580. vdev->vpaths[i].ring.vlgrp = grp;
  2581. }
  2582. vxge_debug_entryexit(VXGE_TRACE,
  2583. "%s:%d Exiting...", __func__, __LINE__);
  2584. }
  2585. /**
  2586. * vxge_vlan_rx_add_vid
  2587. * @dev: net device pointer.
  2588. * @vid: vid
  2589. *
  2590. * Add the vlan id to the devices vlan id table
  2591. */
  2592. static void
  2593. vxge_vlan_rx_add_vid(struct net_device *dev, unsigned short vid)
  2594. {
  2595. struct vxgedev *vdev;
  2596. struct vxge_vpath *vpath;
  2597. int vp_id;
  2598. vdev = (struct vxgedev *)netdev_priv(dev);
  2599. /* Add these vlan to the vid table */
  2600. for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
  2601. vpath = &vdev->vpaths[vp_id];
  2602. if (!vpath->is_open)
  2603. continue;
  2604. vxge_hw_vpath_vid_add(vpath->handle, vid);
  2605. }
  2606. }
  2607. /**
  2608. * vxge_vlan_rx_add_vid
  2609. * @dev: net device pointer.
  2610. * @vid: vid
  2611. *
  2612. * Remove the vlan id from the device's vlan id table
  2613. */
  2614. static void
  2615. vxge_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
  2616. {
  2617. struct vxgedev *vdev;
  2618. struct vxge_vpath *vpath;
  2619. int vp_id;
  2620. vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  2621. vdev = (struct vxgedev *)netdev_priv(dev);
  2622. vlan_group_set_device(vdev->vlgrp, vid, NULL);
  2623. /* Delete this vlan from the vid table */
  2624. for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
  2625. vpath = &vdev->vpaths[vp_id];
  2626. if (!vpath->is_open)
  2627. continue;
  2628. vxge_hw_vpath_vid_delete(vpath->handle, vid);
  2629. }
  2630. vxge_debug_entryexit(VXGE_TRACE,
  2631. "%s:%d Exiting...", __func__, __LINE__);
  2632. }
  2633. static const struct net_device_ops vxge_netdev_ops = {
  2634. .ndo_open = vxge_open,
  2635. .ndo_stop = vxge_close,
  2636. .ndo_get_stats64 = vxge_get_stats64,
  2637. .ndo_start_xmit = vxge_xmit,
  2638. .ndo_validate_addr = eth_validate_addr,
  2639. .ndo_set_multicast_list = vxge_set_multicast,
  2640. .ndo_do_ioctl = vxge_ioctl,
  2641. .ndo_set_mac_address = vxge_set_mac_addr,
  2642. .ndo_change_mtu = vxge_change_mtu,
  2643. .ndo_vlan_rx_register = vxge_vlan_rx_register,
  2644. .ndo_vlan_rx_kill_vid = vxge_vlan_rx_kill_vid,
  2645. .ndo_vlan_rx_add_vid = vxge_vlan_rx_add_vid,
  2646. .ndo_tx_timeout = vxge_tx_watchdog,
  2647. #ifdef CONFIG_NET_POLL_CONTROLLER
  2648. .ndo_poll_controller = vxge_netpoll,
  2649. #endif
  2650. };
  2651. static int __devinit vxge_device_register(struct __vxge_hw_device *hldev,
  2652. struct vxge_config *config,
  2653. int high_dma, int no_of_vpath,
  2654. struct vxgedev **vdev_out)
  2655. {
  2656. struct net_device *ndev;
  2657. enum vxge_hw_status status = VXGE_HW_OK;
  2658. struct vxgedev *vdev;
  2659. int ret = 0, no_of_queue = 1;
  2660. u64 stat;
  2661. *vdev_out = NULL;
  2662. if (config->tx_steering_type)
  2663. no_of_queue = no_of_vpath;
  2664. ndev = alloc_etherdev_mq(sizeof(struct vxgedev),
  2665. no_of_queue);
  2666. if (ndev == NULL) {
  2667. vxge_debug_init(
  2668. vxge_hw_device_trace_level_get(hldev),
  2669. "%s : device allocation failed", __func__);
  2670. ret = -ENODEV;
  2671. goto _out0;
  2672. }
  2673. vxge_debug_entryexit(
  2674. vxge_hw_device_trace_level_get(hldev),
  2675. "%s: %s:%d Entering...",
  2676. ndev->name, __func__, __LINE__);
  2677. vdev = netdev_priv(ndev);
  2678. memset(vdev, 0, sizeof(struct vxgedev));
  2679. vdev->ndev = ndev;
  2680. vdev->devh = hldev;
  2681. vdev->pdev = hldev->pdev;
  2682. memcpy(&vdev->config, config, sizeof(struct vxge_config));
  2683. vdev->rx_csum = 1; /* Enable Rx CSUM by default. */
  2684. SET_NETDEV_DEV(ndev, &vdev->pdev->dev);
  2685. ndev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX |
  2686. NETIF_F_HW_VLAN_FILTER;
  2687. /* Driver entry points */
  2688. ndev->irq = vdev->pdev->irq;
  2689. ndev->base_addr = (unsigned long) hldev->bar0;
  2690. ndev->netdev_ops = &vxge_netdev_ops;
  2691. ndev->watchdog_timeo = VXGE_LL_WATCH_DOG_TIMEOUT;
  2692. vxge_initialize_ethtool_ops(ndev);
  2693. if (vdev->config.rth_steering != NO_STEERING) {
  2694. ndev->features |= NETIF_F_RXHASH;
  2695. hldev->config.rth_en = VXGE_HW_RTH_ENABLE;
  2696. }
  2697. /* Allocate memory for vpath */
  2698. vdev->vpaths = kzalloc((sizeof(struct vxge_vpath)) *
  2699. no_of_vpath, GFP_KERNEL);
  2700. if (!vdev->vpaths) {
  2701. vxge_debug_init(VXGE_ERR,
  2702. "%s: vpath memory allocation failed",
  2703. vdev->ndev->name);
  2704. ret = -ENODEV;
  2705. goto _out1;
  2706. }
  2707. ndev->features |= NETIF_F_SG;
  2708. ndev->features |= NETIF_F_HW_CSUM;
  2709. vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
  2710. "%s : checksuming enabled", __func__);
  2711. if (high_dma) {
  2712. ndev->features |= NETIF_F_HIGHDMA;
  2713. vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
  2714. "%s : using High DMA", __func__);
  2715. }
  2716. ndev->features |= NETIF_F_TSO | NETIF_F_TSO6;
  2717. if (vdev->config.gro_enable)
  2718. ndev->features |= NETIF_F_GRO;
  2719. if (register_netdev(ndev)) {
  2720. vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
  2721. "%s: %s : device registration failed!",
  2722. ndev->name, __func__);
  2723. ret = -ENODEV;
  2724. goto _out2;
  2725. }
  2726. /* Set the factory defined MAC address initially */
  2727. ndev->addr_len = ETH_ALEN;
  2728. /* Make Link state as off at this point, when the Link change
  2729. * interrupt comes the state will be automatically changed to
  2730. * the right state.
  2731. */
  2732. netif_carrier_off(ndev);
  2733. vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
  2734. "%s: Ethernet device registered",
  2735. ndev->name);
  2736. *vdev_out = vdev;
  2737. /* Resetting the Device stats */
  2738. status = vxge_hw_mrpcim_stats_access(
  2739. hldev,
  2740. VXGE_HW_STATS_OP_CLEAR_ALL_STATS,
  2741. 0,
  2742. 0,
  2743. &stat);
  2744. if (status == VXGE_HW_ERR_PRIVILAGED_OPEARATION)
  2745. vxge_debug_init(
  2746. vxge_hw_device_trace_level_get(hldev),
  2747. "%s: device stats clear returns"
  2748. "VXGE_HW_ERR_PRIVILAGED_OPEARATION", ndev->name);
  2749. vxge_debug_entryexit(vxge_hw_device_trace_level_get(hldev),
  2750. "%s: %s:%d Exiting...",
  2751. ndev->name, __func__, __LINE__);
  2752. return ret;
  2753. _out2:
  2754. kfree(vdev->vpaths);
  2755. _out1:
  2756. free_netdev(ndev);
  2757. _out0:
  2758. return ret;
  2759. }
  2760. /*
  2761. * vxge_device_unregister
  2762. *
  2763. * This function will unregister and free network device
  2764. */
  2765. static void
  2766. vxge_device_unregister(struct __vxge_hw_device *hldev)
  2767. {
  2768. struct vxgedev *vdev;
  2769. struct net_device *dev;
  2770. char buf[IFNAMSIZ];
  2771. #if ((VXGE_DEBUG_INIT & VXGE_DEBUG_MASK) || \
  2772. (VXGE_DEBUG_ENTRYEXIT & VXGE_DEBUG_MASK))
  2773. u32 level_trace;
  2774. #endif
  2775. dev = hldev->ndev;
  2776. vdev = netdev_priv(dev);
  2777. #if ((VXGE_DEBUG_INIT & VXGE_DEBUG_MASK) || \
  2778. (VXGE_DEBUG_ENTRYEXIT & VXGE_DEBUG_MASK))
  2779. level_trace = vdev->level_trace;
  2780. #endif
  2781. vxge_debug_entryexit(level_trace,
  2782. "%s: %s:%d", vdev->ndev->name, __func__, __LINE__);
  2783. memcpy(buf, vdev->ndev->name, IFNAMSIZ);
  2784. /* in 2.6 will call stop() if device is up */
  2785. unregister_netdev(dev);
  2786. flush_scheduled_work();
  2787. vxge_debug_init(level_trace, "%s: ethernet device unregistered", buf);
  2788. vxge_debug_entryexit(level_trace,
  2789. "%s: %s:%d Exiting...", buf, __func__, __LINE__);
  2790. }
  2791. /*
  2792. * vxge_callback_crit_err
  2793. *
  2794. * This function is called by the alarm handler in interrupt context.
  2795. * Driver must analyze it based on the event type.
  2796. */
  2797. static void
  2798. vxge_callback_crit_err(struct __vxge_hw_device *hldev,
  2799. enum vxge_hw_event type, u64 vp_id)
  2800. {
  2801. struct net_device *dev = hldev->ndev;
  2802. struct vxgedev *vdev = (struct vxgedev *)netdev_priv(dev);
  2803. struct vxge_vpath *vpath = NULL;
  2804. int vpath_idx;
  2805. vxge_debug_entryexit(vdev->level_trace,
  2806. "%s: %s:%d", vdev->ndev->name, __func__, __LINE__);
  2807. /* Note: This event type should be used for device wide
  2808. * indications only - Serious errors, Slot freeze and critical errors
  2809. */
  2810. vdev->cric_err_event = type;
  2811. for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
  2812. vpath = &vdev->vpaths[vpath_idx];
  2813. if (vpath->device_id == vp_id)
  2814. break;
  2815. }
  2816. if (!test_bit(__VXGE_STATE_RESET_CARD, &vdev->state)) {
  2817. if (type == VXGE_HW_EVENT_SLOT_FREEZE) {
  2818. vxge_debug_init(VXGE_ERR,
  2819. "%s: Slot is frozen", vdev->ndev->name);
  2820. } else if (type == VXGE_HW_EVENT_SERR) {
  2821. vxge_debug_init(VXGE_ERR,
  2822. "%s: Encountered Serious Error",
  2823. vdev->ndev->name);
  2824. } else if (type == VXGE_HW_EVENT_CRITICAL_ERR)
  2825. vxge_debug_init(VXGE_ERR,
  2826. "%s: Encountered Critical Error",
  2827. vdev->ndev->name);
  2828. }
  2829. if ((type == VXGE_HW_EVENT_SERR) ||
  2830. (type == VXGE_HW_EVENT_SLOT_FREEZE)) {
  2831. if (unlikely(vdev->exec_mode))
  2832. clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
  2833. } else if (type == VXGE_HW_EVENT_CRITICAL_ERR) {
  2834. vxge_hw_device_mask_all(hldev);
  2835. if (unlikely(vdev->exec_mode))
  2836. clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
  2837. } else if ((type == VXGE_HW_EVENT_FIFO_ERR) ||
  2838. (type == VXGE_HW_EVENT_VPATH_ERR)) {
  2839. if (unlikely(vdev->exec_mode))
  2840. clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
  2841. else {
  2842. /* check if this vpath is already set for reset */
  2843. if (!test_and_set_bit(vpath_idx, &vdev->vp_reset)) {
  2844. /* disable interrupts for this vpath */
  2845. vxge_vpath_intr_disable(vdev, vpath_idx);
  2846. /* stop the queue for this vpath */
  2847. netif_tx_stop_queue(vpath->fifo.txq);
  2848. }
  2849. }
  2850. }
  2851. vxge_debug_entryexit(vdev->level_trace,
  2852. "%s: %s:%d Exiting...",
  2853. vdev->ndev->name, __func__, __LINE__);
  2854. }
  2855. static void verify_bandwidth(void)
  2856. {
  2857. int i, band_width, total = 0, equal_priority = 0;
  2858. /* 1. If user enters 0 for some fifo, give equal priority to all */
  2859. for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
  2860. if (bw_percentage[i] == 0) {
  2861. equal_priority = 1;
  2862. break;
  2863. }
  2864. }
  2865. if (!equal_priority) {
  2866. /* 2. If sum exceeds 100, give equal priority to all */
  2867. for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
  2868. if (bw_percentage[i] == 0xFF)
  2869. break;
  2870. total += bw_percentage[i];
  2871. if (total > VXGE_HW_VPATH_BANDWIDTH_MAX) {
  2872. equal_priority = 1;
  2873. break;
  2874. }
  2875. }
  2876. }
  2877. if (!equal_priority) {
  2878. /* Is all the bandwidth consumed? */
  2879. if (total < VXGE_HW_VPATH_BANDWIDTH_MAX) {
  2880. if (i < VXGE_HW_MAX_VIRTUAL_PATHS) {
  2881. /* Split rest of bw equally among next VPs*/
  2882. band_width =
  2883. (VXGE_HW_VPATH_BANDWIDTH_MAX - total) /
  2884. (VXGE_HW_MAX_VIRTUAL_PATHS - i);
  2885. if (band_width < 2) /* min of 2% */
  2886. equal_priority = 1;
  2887. else {
  2888. for (; i < VXGE_HW_MAX_VIRTUAL_PATHS;
  2889. i++)
  2890. bw_percentage[i] =
  2891. band_width;
  2892. }
  2893. }
  2894. } else if (i < VXGE_HW_MAX_VIRTUAL_PATHS)
  2895. equal_priority = 1;
  2896. }
  2897. if (equal_priority) {
  2898. vxge_debug_init(VXGE_ERR,
  2899. "%s: Assigning equal bandwidth to all the vpaths",
  2900. VXGE_DRIVER_NAME);
  2901. bw_percentage[0] = VXGE_HW_VPATH_BANDWIDTH_MAX /
  2902. VXGE_HW_MAX_VIRTUAL_PATHS;
  2903. for (i = 1; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
  2904. bw_percentage[i] = bw_percentage[0];
  2905. }
  2906. }
  2907. /*
  2908. * Vpath configuration
  2909. */
  2910. static int __devinit vxge_config_vpaths(
  2911. struct vxge_hw_device_config *device_config,
  2912. u64 vpath_mask, struct vxge_config *config_param)
  2913. {
  2914. int i, no_of_vpaths = 0, default_no_vpath = 0, temp;
  2915. u32 txdl_size, txdl_per_memblock;
  2916. temp = driver_config->vpath_per_dev;
  2917. if ((driver_config->vpath_per_dev == VXGE_USE_DEFAULT) &&
  2918. (max_config_dev == VXGE_MAX_CONFIG_DEV)) {
  2919. /* No more CPU. Return vpath number as zero.*/
  2920. if (driver_config->g_no_cpus == -1)
  2921. return 0;
  2922. if (!driver_config->g_no_cpus)
  2923. driver_config->g_no_cpus = num_online_cpus();
  2924. driver_config->vpath_per_dev = driver_config->g_no_cpus >> 1;
  2925. if (!driver_config->vpath_per_dev)
  2926. driver_config->vpath_per_dev = 1;
  2927. for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
  2928. if (!vxge_bVALn(vpath_mask, i, 1))
  2929. continue;
  2930. else
  2931. default_no_vpath++;
  2932. if (default_no_vpath < driver_config->vpath_per_dev)
  2933. driver_config->vpath_per_dev = default_no_vpath;
  2934. driver_config->g_no_cpus = driver_config->g_no_cpus -
  2935. (driver_config->vpath_per_dev * 2);
  2936. if (driver_config->g_no_cpus <= 0)
  2937. driver_config->g_no_cpus = -1;
  2938. }
  2939. if (driver_config->vpath_per_dev == 1) {
  2940. vxge_debug_ll_config(VXGE_TRACE,
  2941. "%s: Disable tx and rx steering, "
  2942. "as single vpath is configured", VXGE_DRIVER_NAME);
  2943. config_param->rth_steering = NO_STEERING;
  2944. config_param->tx_steering_type = NO_STEERING;
  2945. device_config->rth_en = 0;
  2946. }
  2947. /* configure bandwidth */
  2948. for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
  2949. device_config->vp_config[i].min_bandwidth = bw_percentage[i];
  2950. for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
  2951. device_config->vp_config[i].vp_id = i;
  2952. device_config->vp_config[i].mtu = VXGE_HW_DEFAULT_MTU;
  2953. if (no_of_vpaths < driver_config->vpath_per_dev) {
  2954. if (!vxge_bVALn(vpath_mask, i, 1)) {
  2955. vxge_debug_ll_config(VXGE_TRACE,
  2956. "%s: vpath: %d is not available",
  2957. VXGE_DRIVER_NAME, i);
  2958. continue;
  2959. } else {
  2960. vxge_debug_ll_config(VXGE_TRACE,
  2961. "%s: vpath: %d available",
  2962. VXGE_DRIVER_NAME, i);
  2963. no_of_vpaths++;
  2964. }
  2965. } else {
  2966. vxge_debug_ll_config(VXGE_TRACE,
  2967. "%s: vpath: %d is not configured, "
  2968. "max_config_vpath exceeded",
  2969. VXGE_DRIVER_NAME, i);
  2970. break;
  2971. }
  2972. /* Configure Tx fifo's */
  2973. device_config->vp_config[i].fifo.enable =
  2974. VXGE_HW_FIFO_ENABLE;
  2975. device_config->vp_config[i].fifo.max_frags =
  2976. MAX_SKB_FRAGS + 1;
  2977. device_config->vp_config[i].fifo.memblock_size =
  2978. VXGE_HW_MIN_FIFO_MEMBLOCK_SIZE;
  2979. txdl_size = device_config->vp_config[i].fifo.max_frags *
  2980. sizeof(struct vxge_hw_fifo_txd);
  2981. txdl_per_memblock = VXGE_HW_MIN_FIFO_MEMBLOCK_SIZE / txdl_size;
  2982. device_config->vp_config[i].fifo.fifo_blocks =
  2983. ((VXGE_DEF_FIFO_LENGTH - 1) / txdl_per_memblock) + 1;
  2984. device_config->vp_config[i].fifo.intr =
  2985. VXGE_HW_FIFO_QUEUE_INTR_DISABLE;
  2986. /* Configure tti properties */
  2987. device_config->vp_config[i].tti.intr_enable =
  2988. VXGE_HW_TIM_INTR_ENABLE;
  2989. device_config->vp_config[i].tti.btimer_val =
  2990. (VXGE_TTI_BTIMER_VAL * 1000) / 272;
  2991. device_config->vp_config[i].tti.timer_ac_en =
  2992. VXGE_HW_TIM_TIMER_AC_ENABLE;
  2993. /* For msi-x with napi (each vector
  2994. has a handler of its own) -
  2995. Set CI to OFF for all vpaths */
  2996. device_config->vp_config[i].tti.timer_ci_en =
  2997. VXGE_HW_TIM_TIMER_CI_DISABLE;
  2998. device_config->vp_config[i].tti.timer_ri_en =
  2999. VXGE_HW_TIM_TIMER_RI_DISABLE;
  3000. device_config->vp_config[i].tti.util_sel =
  3001. VXGE_HW_TIM_UTIL_SEL_LEGACY_TX_NET_UTIL;
  3002. device_config->vp_config[i].tti.ltimer_val =
  3003. (VXGE_TTI_LTIMER_VAL * 1000) / 272;
  3004. device_config->vp_config[i].tti.rtimer_val =
  3005. (VXGE_TTI_RTIMER_VAL * 1000) / 272;
  3006. device_config->vp_config[i].tti.urange_a = TTI_TX_URANGE_A;
  3007. device_config->vp_config[i].tti.urange_b = TTI_TX_URANGE_B;
  3008. device_config->vp_config[i].tti.urange_c = TTI_TX_URANGE_C;
  3009. device_config->vp_config[i].tti.uec_a = TTI_TX_UFC_A;
  3010. device_config->vp_config[i].tti.uec_b = TTI_TX_UFC_B;
  3011. device_config->vp_config[i].tti.uec_c = TTI_TX_UFC_C;
  3012. device_config->vp_config[i].tti.uec_d = TTI_TX_UFC_D;
  3013. /* Configure Rx rings */
  3014. device_config->vp_config[i].ring.enable =
  3015. VXGE_HW_RING_ENABLE;
  3016. device_config->vp_config[i].ring.ring_blocks =
  3017. VXGE_HW_DEF_RING_BLOCKS;
  3018. device_config->vp_config[i].ring.buffer_mode =
  3019. VXGE_HW_RING_RXD_BUFFER_MODE_1;
  3020. device_config->vp_config[i].ring.rxds_limit =
  3021. VXGE_HW_DEF_RING_RXDS_LIMIT;
  3022. device_config->vp_config[i].ring.scatter_mode =
  3023. VXGE_HW_RING_SCATTER_MODE_A;
  3024. /* Configure rti properties */
  3025. device_config->vp_config[i].rti.intr_enable =
  3026. VXGE_HW_TIM_INTR_ENABLE;
  3027. device_config->vp_config[i].rti.btimer_val =
  3028. (VXGE_RTI_BTIMER_VAL * 1000)/272;
  3029. device_config->vp_config[i].rti.timer_ac_en =
  3030. VXGE_HW_TIM_TIMER_AC_ENABLE;
  3031. device_config->vp_config[i].rti.timer_ci_en =
  3032. VXGE_HW_TIM_TIMER_CI_DISABLE;
  3033. device_config->vp_config[i].rti.timer_ri_en =
  3034. VXGE_HW_TIM_TIMER_RI_DISABLE;
  3035. device_config->vp_config[i].rti.util_sel =
  3036. VXGE_HW_TIM_UTIL_SEL_LEGACY_RX_NET_UTIL;
  3037. device_config->vp_config[i].rti.urange_a =
  3038. RTI_RX_URANGE_A;
  3039. device_config->vp_config[i].rti.urange_b =
  3040. RTI_RX_URANGE_B;
  3041. device_config->vp_config[i].rti.urange_c =
  3042. RTI_RX_URANGE_C;
  3043. device_config->vp_config[i].rti.uec_a = RTI_RX_UFC_A;
  3044. device_config->vp_config[i].rti.uec_b = RTI_RX_UFC_B;
  3045. device_config->vp_config[i].rti.uec_c = RTI_RX_UFC_C;
  3046. device_config->vp_config[i].rti.uec_d = RTI_RX_UFC_D;
  3047. device_config->vp_config[i].rti.rtimer_val =
  3048. (VXGE_RTI_RTIMER_VAL * 1000) / 272;
  3049. device_config->vp_config[i].rti.ltimer_val =
  3050. (VXGE_RTI_LTIMER_VAL * 1000) / 272;
  3051. device_config->vp_config[i].rpa_strip_vlan_tag =
  3052. vlan_tag_strip;
  3053. }
  3054. driver_config->vpath_per_dev = temp;
  3055. return no_of_vpaths;
  3056. }
  3057. /* initialize device configuratrions */
  3058. static void __devinit vxge_device_config_init(
  3059. struct vxge_hw_device_config *device_config,
  3060. int *intr_type)
  3061. {
  3062. /* Used for CQRQ/SRQ. */
  3063. device_config->dma_blockpool_initial =
  3064. VXGE_HW_INITIAL_DMA_BLOCK_POOL_SIZE;
  3065. device_config->dma_blockpool_max =
  3066. VXGE_HW_MAX_DMA_BLOCK_POOL_SIZE;
  3067. if (max_mac_vpath > VXGE_MAX_MAC_ADDR_COUNT)
  3068. max_mac_vpath = VXGE_MAX_MAC_ADDR_COUNT;
  3069. #ifndef CONFIG_PCI_MSI
  3070. vxge_debug_init(VXGE_ERR,
  3071. "%s: This Kernel does not support "
  3072. "MSI-X. Defaulting to INTA", VXGE_DRIVER_NAME);
  3073. *intr_type = INTA;
  3074. #endif
  3075. /* Configure whether MSI-X or IRQL. */
  3076. switch (*intr_type) {
  3077. case INTA:
  3078. device_config->intr_mode = VXGE_HW_INTR_MODE_IRQLINE;
  3079. break;
  3080. case MSI_X:
  3081. device_config->intr_mode = VXGE_HW_INTR_MODE_MSIX;
  3082. break;
  3083. }
  3084. /* Timer period between device poll */
  3085. device_config->device_poll_millis = VXGE_TIMER_DELAY;
  3086. /* Configure mac based steering. */
  3087. device_config->rts_mac_en = addr_learn_en;
  3088. /* Configure Vpaths */
  3089. device_config->rth_it_type = VXGE_HW_RTH_IT_TYPE_MULTI_IT;
  3090. vxge_debug_ll_config(VXGE_TRACE, "%s : Device Config Params ",
  3091. __func__);
  3092. vxge_debug_ll_config(VXGE_TRACE, "dma_blockpool_initial : %d",
  3093. device_config->dma_blockpool_initial);
  3094. vxge_debug_ll_config(VXGE_TRACE, "dma_blockpool_max : %d",
  3095. device_config->dma_blockpool_max);
  3096. vxge_debug_ll_config(VXGE_TRACE, "intr_mode : %d",
  3097. device_config->intr_mode);
  3098. vxge_debug_ll_config(VXGE_TRACE, "device_poll_millis : %d",
  3099. device_config->device_poll_millis);
  3100. vxge_debug_ll_config(VXGE_TRACE, "rts_mac_en : %d",
  3101. device_config->rts_mac_en);
  3102. vxge_debug_ll_config(VXGE_TRACE, "rth_en : %d",
  3103. device_config->rth_en);
  3104. vxge_debug_ll_config(VXGE_TRACE, "rth_it_type : %d",
  3105. device_config->rth_it_type);
  3106. }
  3107. static void __devinit vxge_print_parm(struct vxgedev *vdev, u64 vpath_mask)
  3108. {
  3109. int i;
  3110. vxge_debug_init(VXGE_TRACE,
  3111. "%s: %d Vpath(s) opened",
  3112. vdev->ndev->name, vdev->no_of_vpath);
  3113. switch (vdev->config.intr_type) {
  3114. case INTA:
  3115. vxge_debug_init(VXGE_TRACE,
  3116. "%s: Interrupt type INTA", vdev->ndev->name);
  3117. break;
  3118. case MSI_X:
  3119. vxge_debug_init(VXGE_TRACE,
  3120. "%s: Interrupt type MSI-X", vdev->ndev->name);
  3121. break;
  3122. }
  3123. if (vdev->config.rth_steering) {
  3124. vxge_debug_init(VXGE_TRACE,
  3125. "%s: RTH steering enabled for TCP_IPV4",
  3126. vdev->ndev->name);
  3127. } else {
  3128. vxge_debug_init(VXGE_TRACE,
  3129. "%s: RTH steering disabled", vdev->ndev->name);
  3130. }
  3131. switch (vdev->config.tx_steering_type) {
  3132. case NO_STEERING:
  3133. vxge_debug_init(VXGE_TRACE,
  3134. "%s: Tx steering disabled", vdev->ndev->name);
  3135. break;
  3136. case TX_PRIORITY_STEERING:
  3137. vxge_debug_init(VXGE_TRACE,
  3138. "%s: Unsupported tx steering option",
  3139. vdev->ndev->name);
  3140. vxge_debug_init(VXGE_TRACE,
  3141. "%s: Tx steering disabled", vdev->ndev->name);
  3142. vdev->config.tx_steering_type = 0;
  3143. break;
  3144. case TX_VLAN_STEERING:
  3145. vxge_debug_init(VXGE_TRACE,
  3146. "%s: Unsupported tx steering option",
  3147. vdev->ndev->name);
  3148. vxge_debug_init(VXGE_TRACE,
  3149. "%s: Tx steering disabled", vdev->ndev->name);
  3150. vdev->config.tx_steering_type = 0;
  3151. break;
  3152. case TX_MULTIQ_STEERING:
  3153. vxge_debug_init(VXGE_TRACE,
  3154. "%s: Tx multiqueue steering enabled",
  3155. vdev->ndev->name);
  3156. break;
  3157. case TX_PORT_STEERING:
  3158. vxge_debug_init(VXGE_TRACE,
  3159. "%s: Tx port steering enabled",
  3160. vdev->ndev->name);
  3161. break;
  3162. default:
  3163. vxge_debug_init(VXGE_ERR,
  3164. "%s: Unsupported tx steering type",
  3165. vdev->ndev->name);
  3166. vxge_debug_init(VXGE_TRACE,
  3167. "%s: Tx steering disabled", vdev->ndev->name);
  3168. vdev->config.tx_steering_type = 0;
  3169. }
  3170. if (vdev->config.gro_enable) {
  3171. vxge_debug_init(VXGE_ERR,
  3172. "%s: Generic receive offload enabled",
  3173. vdev->ndev->name);
  3174. } else
  3175. vxge_debug_init(VXGE_TRACE,
  3176. "%s: Generic receive offload disabled",
  3177. vdev->ndev->name);
  3178. if (vdev->config.addr_learn_en)
  3179. vxge_debug_init(VXGE_TRACE,
  3180. "%s: MAC Address learning enabled", vdev->ndev->name);
  3181. vxge_debug_init(VXGE_TRACE,
  3182. "%s: Rx doorbell mode enabled", vdev->ndev->name);
  3183. for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
  3184. if (!vxge_bVALn(vpath_mask, i, 1))
  3185. continue;
  3186. vxge_debug_ll_config(VXGE_TRACE,
  3187. "%s: MTU size - %d", vdev->ndev->name,
  3188. ((struct __vxge_hw_device *)(vdev->devh))->
  3189. config.vp_config[i].mtu);
  3190. vxge_debug_init(VXGE_TRACE,
  3191. "%s: VLAN tag stripping %s", vdev->ndev->name,
  3192. ((struct __vxge_hw_device *)(vdev->devh))->
  3193. config.vp_config[i].rpa_strip_vlan_tag
  3194. ? "Enabled" : "Disabled");
  3195. vxge_debug_init(VXGE_TRACE,
  3196. "%s: Ring blocks : %d", vdev->ndev->name,
  3197. ((struct __vxge_hw_device *)(vdev->devh))->
  3198. config.vp_config[i].ring.ring_blocks);
  3199. vxge_debug_init(VXGE_TRACE,
  3200. "%s: Fifo blocks : %d", vdev->ndev->name,
  3201. ((struct __vxge_hw_device *)(vdev->devh))->
  3202. config.vp_config[i].fifo.fifo_blocks);
  3203. vxge_debug_ll_config(VXGE_TRACE,
  3204. "%s: Max frags : %d", vdev->ndev->name,
  3205. ((struct __vxge_hw_device *)(vdev->devh))->
  3206. config.vp_config[i].fifo.max_frags);
  3207. break;
  3208. }
  3209. }
  3210. #ifdef CONFIG_PM
  3211. /**
  3212. * vxge_pm_suspend - vxge power management suspend entry point
  3213. *
  3214. */
  3215. static int vxge_pm_suspend(struct pci_dev *pdev, pm_message_t state)
  3216. {
  3217. return -ENOSYS;
  3218. }
  3219. /**
  3220. * vxge_pm_resume - vxge power management resume entry point
  3221. *
  3222. */
  3223. static int vxge_pm_resume(struct pci_dev *pdev)
  3224. {
  3225. return -ENOSYS;
  3226. }
  3227. #endif
  3228. /**
  3229. * vxge_io_error_detected - called when PCI error is detected
  3230. * @pdev: Pointer to PCI device
  3231. * @state: The current pci connection state
  3232. *
  3233. * This function is called after a PCI bus error affecting
  3234. * this device has been detected.
  3235. */
  3236. static pci_ers_result_t vxge_io_error_detected(struct pci_dev *pdev,
  3237. pci_channel_state_t state)
  3238. {
  3239. struct __vxge_hw_device *hldev =
  3240. (struct __vxge_hw_device *) pci_get_drvdata(pdev);
  3241. struct net_device *netdev = hldev->ndev;
  3242. netif_device_detach(netdev);
  3243. if (state == pci_channel_io_perm_failure)
  3244. return PCI_ERS_RESULT_DISCONNECT;
  3245. if (netif_running(netdev)) {
  3246. /* Bring down the card, while avoiding PCI I/O */
  3247. do_vxge_close(netdev, 0);
  3248. }
  3249. pci_disable_device(pdev);
  3250. return PCI_ERS_RESULT_NEED_RESET;
  3251. }
  3252. /**
  3253. * vxge_io_slot_reset - called after the pci bus has been reset.
  3254. * @pdev: Pointer to PCI device
  3255. *
  3256. * Restart the card from scratch, as if from a cold-boot.
  3257. * At this point, the card has exprienced a hard reset,
  3258. * followed by fixups by BIOS, and has its config space
  3259. * set up identically to what it was at cold boot.
  3260. */
  3261. static pci_ers_result_t vxge_io_slot_reset(struct pci_dev *pdev)
  3262. {
  3263. struct __vxge_hw_device *hldev =
  3264. (struct __vxge_hw_device *) pci_get_drvdata(pdev);
  3265. struct net_device *netdev = hldev->ndev;
  3266. struct vxgedev *vdev = netdev_priv(netdev);
  3267. if (pci_enable_device(pdev)) {
  3268. netdev_err(netdev, "Cannot re-enable device after reset\n");
  3269. return PCI_ERS_RESULT_DISCONNECT;
  3270. }
  3271. pci_set_master(pdev);
  3272. vxge_reset(vdev);
  3273. return PCI_ERS_RESULT_RECOVERED;
  3274. }
  3275. /**
  3276. * vxge_io_resume - called when traffic can start flowing again.
  3277. * @pdev: Pointer to PCI device
  3278. *
  3279. * This callback is called when the error recovery driver tells
  3280. * us that its OK to resume normal operation.
  3281. */
  3282. static void vxge_io_resume(struct pci_dev *pdev)
  3283. {
  3284. struct __vxge_hw_device *hldev =
  3285. (struct __vxge_hw_device *) pci_get_drvdata(pdev);
  3286. struct net_device *netdev = hldev->ndev;
  3287. if (netif_running(netdev)) {
  3288. if (vxge_open(netdev)) {
  3289. netdev_err(netdev,
  3290. "Can't bring device back up after reset\n");
  3291. return;
  3292. }
  3293. }
  3294. netif_device_attach(netdev);
  3295. }
  3296. static inline u32 vxge_get_num_vfs(u64 function_mode)
  3297. {
  3298. u32 num_functions = 0;
  3299. switch (function_mode) {
  3300. case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION:
  3301. case VXGE_HW_FUNCTION_MODE_SRIOV_8:
  3302. num_functions = 8;
  3303. break;
  3304. case VXGE_HW_FUNCTION_MODE_SINGLE_FUNCTION:
  3305. num_functions = 1;
  3306. break;
  3307. case VXGE_HW_FUNCTION_MODE_SRIOV:
  3308. case VXGE_HW_FUNCTION_MODE_MRIOV:
  3309. case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION_17:
  3310. num_functions = 17;
  3311. break;
  3312. case VXGE_HW_FUNCTION_MODE_SRIOV_4:
  3313. num_functions = 4;
  3314. break;
  3315. case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION_2:
  3316. num_functions = 2;
  3317. break;
  3318. case VXGE_HW_FUNCTION_MODE_MRIOV_8:
  3319. num_functions = 8; /* TODO */
  3320. break;
  3321. }
  3322. return num_functions;
  3323. }
  3324. /**
  3325. * vxge_probe
  3326. * @pdev : structure containing the PCI related information of the device.
  3327. * @pre: List of PCI devices supported by the driver listed in vxge_id_table.
  3328. * Description:
  3329. * This function is called when a new PCI device gets detected and initializes
  3330. * it.
  3331. * Return value:
  3332. * returns 0 on success and negative on failure.
  3333. *
  3334. */
  3335. static int __devinit
  3336. vxge_probe(struct pci_dev *pdev, const struct pci_device_id *pre)
  3337. {
  3338. struct __vxge_hw_device *hldev;
  3339. enum vxge_hw_status status;
  3340. int ret;
  3341. int high_dma = 0;
  3342. u64 vpath_mask = 0;
  3343. struct vxgedev *vdev;
  3344. struct vxge_config *ll_config = NULL;
  3345. struct vxge_hw_device_config *device_config = NULL;
  3346. struct vxge_hw_device_attr attr;
  3347. int i, j, no_of_vpath = 0, max_vpath_supported = 0;
  3348. u8 *macaddr;
  3349. struct vxge_mac_addrs *entry;
  3350. static int bus = -1, device = -1;
  3351. u32 host_type;
  3352. u8 new_device = 0;
  3353. enum vxge_hw_status is_privileged;
  3354. u32 function_mode;
  3355. u32 num_vfs = 0;
  3356. vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
  3357. attr.pdev = pdev;
  3358. /* In SRIOV-17 mode, functions of the same adapter
  3359. * can be deployed on different buses */
  3360. if ((!pdev->is_virtfn) && ((bus != pdev->bus->number) ||
  3361. (device != PCI_SLOT(pdev->devfn))))
  3362. new_device = 1;
  3363. bus = pdev->bus->number;
  3364. device = PCI_SLOT(pdev->devfn);
  3365. if (new_device) {
  3366. if (driver_config->config_dev_cnt &&
  3367. (driver_config->config_dev_cnt !=
  3368. driver_config->total_dev_cnt))
  3369. vxge_debug_init(VXGE_ERR,
  3370. "%s: Configured %d of %d devices",
  3371. VXGE_DRIVER_NAME,
  3372. driver_config->config_dev_cnt,
  3373. driver_config->total_dev_cnt);
  3374. driver_config->config_dev_cnt = 0;
  3375. driver_config->total_dev_cnt = 0;
  3376. }
  3377. /* Now making the CPU based no of vpath calculation
  3378. * applicable for individual functions as well.
  3379. */
  3380. driver_config->g_no_cpus = 0;
  3381. driver_config->vpath_per_dev = max_config_vpath;
  3382. driver_config->total_dev_cnt++;
  3383. if (++driver_config->config_dev_cnt > max_config_dev) {
  3384. ret = 0;
  3385. goto _exit0;
  3386. }
  3387. device_config = kzalloc(sizeof(struct vxge_hw_device_config),
  3388. GFP_KERNEL);
  3389. if (!device_config) {
  3390. ret = -ENOMEM;
  3391. vxge_debug_init(VXGE_ERR,
  3392. "device_config : malloc failed %s %d",
  3393. __FILE__, __LINE__);
  3394. goto _exit0;
  3395. }
  3396. ll_config = kzalloc(sizeof(*ll_config), GFP_KERNEL);
  3397. if (!ll_config) {
  3398. ret = -ENOMEM;
  3399. vxge_debug_init(VXGE_ERR,
  3400. "ll_config : malloc failed %s %d",
  3401. __FILE__, __LINE__);
  3402. goto _exit0;
  3403. }
  3404. ll_config->tx_steering_type = TX_MULTIQ_STEERING;
  3405. ll_config->intr_type = MSI_X;
  3406. ll_config->napi_weight = NEW_NAPI_WEIGHT;
  3407. ll_config->rth_steering = RTH_STEERING;
  3408. /* get the default configuration parameters */
  3409. vxge_hw_device_config_default_get(device_config);
  3410. /* initialize configuration parameters */
  3411. vxge_device_config_init(device_config, &ll_config->intr_type);
  3412. ret = pci_enable_device(pdev);
  3413. if (ret) {
  3414. vxge_debug_init(VXGE_ERR,
  3415. "%s : can not enable PCI device", __func__);
  3416. goto _exit0;
  3417. }
  3418. if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
  3419. vxge_debug_ll_config(VXGE_TRACE,
  3420. "%s : using 64bit DMA", __func__);
  3421. high_dma = 1;
  3422. if (pci_set_consistent_dma_mask(pdev,
  3423. DMA_BIT_MASK(64))) {
  3424. vxge_debug_init(VXGE_ERR,
  3425. "%s : unable to obtain 64bit DMA for "
  3426. "consistent allocations", __func__);
  3427. ret = -ENOMEM;
  3428. goto _exit1;
  3429. }
  3430. } else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
  3431. vxge_debug_ll_config(VXGE_TRACE,
  3432. "%s : using 32bit DMA", __func__);
  3433. } else {
  3434. ret = -ENOMEM;
  3435. goto _exit1;
  3436. }
  3437. if (pci_request_regions(pdev, VXGE_DRIVER_NAME)) {
  3438. vxge_debug_init(VXGE_ERR,
  3439. "%s : request regions failed", __func__);
  3440. ret = -ENODEV;
  3441. goto _exit1;
  3442. }
  3443. pci_set_master(pdev);
  3444. attr.bar0 = pci_ioremap_bar(pdev, 0);
  3445. if (!attr.bar0) {
  3446. vxge_debug_init(VXGE_ERR,
  3447. "%s : cannot remap io memory bar0", __func__);
  3448. ret = -ENODEV;
  3449. goto _exit2;
  3450. }
  3451. vxge_debug_ll_config(VXGE_TRACE,
  3452. "pci ioremap bar0: %p:0x%llx",
  3453. attr.bar0,
  3454. (unsigned long long)pci_resource_start(pdev, 0));
  3455. status = vxge_hw_device_hw_info_get(attr.bar0,
  3456. &ll_config->device_hw_info);
  3457. if (status != VXGE_HW_OK) {
  3458. vxge_debug_init(VXGE_ERR,
  3459. "%s: Reading of hardware info failed."
  3460. "Please try upgrading the firmware.", VXGE_DRIVER_NAME);
  3461. ret = -EINVAL;
  3462. goto _exit3;
  3463. }
  3464. if (ll_config->device_hw_info.fw_version.major !=
  3465. VXGE_DRIVER_FW_VERSION_MAJOR) {
  3466. vxge_debug_init(VXGE_ERR,
  3467. "%s: Incorrect firmware version."
  3468. "Please upgrade the firmware to version 1.x.x",
  3469. VXGE_DRIVER_NAME);
  3470. ret = -EINVAL;
  3471. goto _exit3;
  3472. }
  3473. vpath_mask = ll_config->device_hw_info.vpath_mask;
  3474. if (vpath_mask == 0) {
  3475. vxge_debug_ll_config(VXGE_TRACE,
  3476. "%s: No vpaths available in device", VXGE_DRIVER_NAME);
  3477. ret = -EINVAL;
  3478. goto _exit3;
  3479. }
  3480. vxge_debug_ll_config(VXGE_TRACE,
  3481. "%s:%d Vpath mask = %llx", __func__, __LINE__,
  3482. (unsigned long long)vpath_mask);
  3483. function_mode = ll_config->device_hw_info.function_mode;
  3484. host_type = ll_config->device_hw_info.host_type;
  3485. is_privileged = __vxge_hw_device_is_privilaged(host_type,
  3486. ll_config->device_hw_info.func_id);
  3487. /* Check how many vpaths are available */
  3488. for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
  3489. if (!((vpath_mask) & vxge_mBIT(i)))
  3490. continue;
  3491. max_vpath_supported++;
  3492. }
  3493. if (new_device)
  3494. num_vfs = vxge_get_num_vfs(function_mode) - 1;
  3495. /* Enable SRIOV mode, if firmware has SRIOV support and if it is a PF */
  3496. if (is_sriov(function_mode) && (max_config_dev > 1) &&
  3497. (ll_config->intr_type != INTA) &&
  3498. (is_privileged == VXGE_HW_OK)) {
  3499. ret = pci_enable_sriov(pdev, ((max_config_dev - 1) < num_vfs)
  3500. ? (max_config_dev - 1) : num_vfs);
  3501. if (ret)
  3502. vxge_debug_ll_config(VXGE_ERR,
  3503. "Failed in enabling SRIOV mode: %d\n", ret);
  3504. }
  3505. /*
  3506. * Configure vpaths and get driver configured number of vpaths
  3507. * which is less than or equal to the maximum vpaths per function.
  3508. */
  3509. no_of_vpath = vxge_config_vpaths(device_config, vpath_mask, ll_config);
  3510. if (!no_of_vpath) {
  3511. vxge_debug_ll_config(VXGE_ERR,
  3512. "%s: No more vpaths to configure", VXGE_DRIVER_NAME);
  3513. ret = 0;
  3514. goto _exit3;
  3515. }
  3516. /* Setting driver callbacks */
  3517. attr.uld_callbacks.link_up = vxge_callback_link_up;
  3518. attr.uld_callbacks.link_down = vxge_callback_link_down;
  3519. attr.uld_callbacks.crit_err = vxge_callback_crit_err;
  3520. status = vxge_hw_device_initialize(&hldev, &attr, device_config);
  3521. if (status != VXGE_HW_OK) {
  3522. vxge_debug_init(VXGE_ERR,
  3523. "Failed to initialize device (%d)", status);
  3524. ret = -EINVAL;
  3525. goto _exit3;
  3526. }
  3527. /* if FCS stripping is not disabled in MAC fail driver load */
  3528. if (vxge_hw_vpath_strip_fcs_check(hldev, vpath_mask) != VXGE_HW_OK) {
  3529. vxge_debug_init(VXGE_ERR,
  3530. "%s: FCS stripping is not disabled in MAC"
  3531. " failing driver load", VXGE_DRIVER_NAME);
  3532. ret = -EINVAL;
  3533. goto _exit4;
  3534. }
  3535. vxge_hw_device_debug_set(hldev, VXGE_ERR, VXGE_COMPONENT_LL);
  3536. /* set private device info */
  3537. pci_set_drvdata(pdev, hldev);
  3538. ll_config->gro_enable = VXGE_GRO_ALWAYS_AGGREGATE;
  3539. ll_config->fifo_indicate_max_pkts = VXGE_FIFO_INDICATE_MAX_PKTS;
  3540. ll_config->addr_learn_en = addr_learn_en;
  3541. ll_config->rth_algorithm = RTH_ALG_JENKINS;
  3542. ll_config->rth_hash_type_tcpipv4 = 1;
  3543. ll_config->rth_hash_type_ipv4 = 0;
  3544. ll_config->rth_hash_type_tcpipv6 = 0;
  3545. ll_config->rth_hash_type_ipv6 = 0;
  3546. ll_config->rth_hash_type_tcpipv6ex = 0;
  3547. ll_config->rth_hash_type_ipv6ex = 0;
  3548. ll_config->rth_bkt_sz = RTH_BUCKET_SIZE;
  3549. ll_config->tx_pause_enable = VXGE_PAUSE_CTRL_ENABLE;
  3550. ll_config->rx_pause_enable = VXGE_PAUSE_CTRL_ENABLE;
  3551. if (vxge_device_register(hldev, ll_config, high_dma, no_of_vpath,
  3552. &vdev)) {
  3553. ret = -EINVAL;
  3554. goto _exit4;
  3555. }
  3556. vxge_hw_device_debug_set(hldev, VXGE_TRACE, VXGE_COMPONENT_LL);
  3557. VXGE_COPY_DEBUG_INFO_TO_LL(vdev, vxge_hw_device_error_level_get(hldev),
  3558. vxge_hw_device_trace_level_get(hldev));
  3559. /* set private HW device info */
  3560. hldev->ndev = vdev->ndev;
  3561. vdev->mtu = VXGE_HW_DEFAULT_MTU;
  3562. vdev->bar0 = attr.bar0;
  3563. vdev->max_vpath_supported = max_vpath_supported;
  3564. vdev->no_of_vpath = no_of_vpath;
  3565. /* Virtual Path count */
  3566. for (i = 0, j = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
  3567. if (!vxge_bVALn(vpath_mask, i, 1))
  3568. continue;
  3569. if (j >= vdev->no_of_vpath)
  3570. break;
  3571. vdev->vpaths[j].is_configured = 1;
  3572. vdev->vpaths[j].device_id = i;
  3573. vdev->vpaths[j].ring.driver_id = j;
  3574. vdev->vpaths[j].vdev = vdev;
  3575. vdev->vpaths[j].max_mac_addr_cnt = max_mac_vpath;
  3576. memcpy((u8 *)vdev->vpaths[j].macaddr,
  3577. ll_config->device_hw_info.mac_addrs[i],
  3578. ETH_ALEN);
  3579. /* Initialize the mac address list header */
  3580. INIT_LIST_HEAD(&vdev->vpaths[j].mac_addr_list);
  3581. vdev->vpaths[j].mac_addr_cnt = 0;
  3582. vdev->vpaths[j].mcast_addr_cnt = 0;
  3583. j++;
  3584. }
  3585. vdev->exec_mode = VXGE_EXEC_MODE_DISABLE;
  3586. vdev->max_config_port = max_config_port;
  3587. vdev->vlan_tag_strip = vlan_tag_strip;
  3588. /* map the hashing selector table to the configured vpaths */
  3589. for (i = 0; i < vdev->no_of_vpath; i++)
  3590. vdev->vpath_selector[i] = vpath_selector[i];
  3591. macaddr = (u8 *)vdev->vpaths[0].macaddr;
  3592. ll_config->device_hw_info.serial_number[VXGE_HW_INFO_LEN - 1] = '\0';
  3593. ll_config->device_hw_info.product_desc[VXGE_HW_INFO_LEN - 1] = '\0';
  3594. ll_config->device_hw_info.part_number[VXGE_HW_INFO_LEN - 1] = '\0';
  3595. vxge_debug_init(VXGE_TRACE, "%s: SERIAL NUMBER: %s",
  3596. vdev->ndev->name, ll_config->device_hw_info.serial_number);
  3597. vxge_debug_init(VXGE_TRACE, "%s: PART NUMBER: %s",
  3598. vdev->ndev->name, ll_config->device_hw_info.part_number);
  3599. vxge_debug_init(VXGE_TRACE, "%s: Neterion %s Server Adapter",
  3600. vdev->ndev->name, ll_config->device_hw_info.product_desc);
  3601. vxge_debug_init(VXGE_TRACE, "%s: MAC ADDR: %pM",
  3602. vdev->ndev->name, macaddr);
  3603. vxge_debug_init(VXGE_TRACE, "%s: Link Width x%d",
  3604. vdev->ndev->name, vxge_hw_device_link_width_get(hldev));
  3605. vxge_debug_init(VXGE_TRACE,
  3606. "%s: Firmware version : %s Date : %s", vdev->ndev->name,
  3607. ll_config->device_hw_info.fw_version.version,
  3608. ll_config->device_hw_info.fw_date.date);
  3609. if (new_device) {
  3610. switch (ll_config->device_hw_info.function_mode) {
  3611. case VXGE_HW_FUNCTION_MODE_SINGLE_FUNCTION:
  3612. vxge_debug_init(VXGE_TRACE,
  3613. "%s: Single Function Mode Enabled", vdev->ndev->name);
  3614. break;
  3615. case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION:
  3616. vxge_debug_init(VXGE_TRACE,
  3617. "%s: Multi Function Mode Enabled", vdev->ndev->name);
  3618. break;
  3619. case VXGE_HW_FUNCTION_MODE_SRIOV:
  3620. vxge_debug_init(VXGE_TRACE,
  3621. "%s: Single Root IOV Mode Enabled", vdev->ndev->name);
  3622. break;
  3623. case VXGE_HW_FUNCTION_MODE_MRIOV:
  3624. vxge_debug_init(VXGE_TRACE,
  3625. "%s: Multi Root IOV Mode Enabled", vdev->ndev->name);
  3626. break;
  3627. }
  3628. }
  3629. vxge_print_parm(vdev, vpath_mask);
  3630. /* Store the fw version for ethttool option */
  3631. strcpy(vdev->fw_version, ll_config->device_hw_info.fw_version.version);
  3632. memcpy(vdev->ndev->dev_addr, (u8 *)vdev->vpaths[0].macaddr, ETH_ALEN);
  3633. memcpy(vdev->ndev->perm_addr, vdev->ndev->dev_addr, ETH_ALEN);
  3634. /* Copy the station mac address to the list */
  3635. for (i = 0; i < vdev->no_of_vpath; i++) {
  3636. entry = (struct vxge_mac_addrs *)
  3637. kzalloc(sizeof(struct vxge_mac_addrs),
  3638. GFP_KERNEL);
  3639. if (NULL == entry) {
  3640. vxge_debug_init(VXGE_ERR,
  3641. "%s: mac_addr_list : memory allocation failed",
  3642. vdev->ndev->name);
  3643. ret = -EPERM;
  3644. goto _exit5;
  3645. }
  3646. macaddr = (u8 *)&entry->macaddr;
  3647. memcpy(macaddr, vdev->ndev->dev_addr, ETH_ALEN);
  3648. list_add(&entry->item, &vdev->vpaths[i].mac_addr_list);
  3649. vdev->vpaths[i].mac_addr_cnt = 1;
  3650. }
  3651. kfree(device_config);
  3652. /*
  3653. * INTA is shared in multi-function mode. This is unlike the INTA
  3654. * implementation in MR mode, where each VH has its own INTA message.
  3655. * - INTA is masked (disabled) as long as at least one function sets
  3656. * its TITAN_MASK_ALL_INT.ALARM bit.
  3657. * - INTA is unmasked (enabled) when all enabled functions have cleared
  3658. * their own TITAN_MASK_ALL_INT.ALARM bit.
  3659. * The TITAN_MASK_ALL_INT ALARM & TRAFFIC bits are cleared on power up.
  3660. * Though this driver leaves the top level interrupts unmasked while
  3661. * leaving the required module interrupt bits masked on exit, there
  3662. * could be a rougue driver around that does not follow this procedure
  3663. * resulting in a failure to generate interrupts. The following code is
  3664. * present to prevent such a failure.
  3665. */
  3666. if (ll_config->device_hw_info.function_mode ==
  3667. VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION)
  3668. if (vdev->config.intr_type == INTA)
  3669. vxge_hw_device_unmask_all(hldev);
  3670. vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d Exiting...",
  3671. vdev->ndev->name, __func__, __LINE__);
  3672. vxge_hw_device_debug_set(hldev, VXGE_ERR, VXGE_COMPONENT_LL);
  3673. VXGE_COPY_DEBUG_INFO_TO_LL(vdev, vxge_hw_device_error_level_get(hldev),
  3674. vxge_hw_device_trace_level_get(hldev));
  3675. kfree(ll_config);
  3676. return 0;
  3677. _exit5:
  3678. for (i = 0; i < vdev->no_of_vpath; i++)
  3679. vxge_free_mac_add_list(&vdev->vpaths[i]);
  3680. vxge_device_unregister(hldev);
  3681. _exit4:
  3682. pci_disable_sriov(pdev);
  3683. vxge_hw_device_terminate(hldev);
  3684. _exit3:
  3685. iounmap(attr.bar0);
  3686. _exit2:
  3687. pci_release_regions(pdev);
  3688. _exit1:
  3689. pci_disable_device(pdev);
  3690. _exit0:
  3691. kfree(ll_config);
  3692. kfree(device_config);
  3693. driver_config->config_dev_cnt--;
  3694. pci_set_drvdata(pdev, NULL);
  3695. return ret;
  3696. }
  3697. /**
  3698. * vxge_rem_nic - Free the PCI device
  3699. * @pdev: structure containing the PCI related information of the device.
  3700. * Description: This function is called by the Pci subsystem to release a
  3701. * PCI device and free up all resource held up by the device.
  3702. */
  3703. static void __devexit
  3704. vxge_remove(struct pci_dev *pdev)
  3705. {
  3706. struct __vxge_hw_device *hldev;
  3707. struct vxgedev *vdev = NULL;
  3708. struct net_device *dev;
  3709. int i = 0;
  3710. #if ((VXGE_DEBUG_INIT & VXGE_DEBUG_MASK) || \
  3711. (VXGE_DEBUG_ENTRYEXIT & VXGE_DEBUG_MASK))
  3712. u32 level_trace;
  3713. #endif
  3714. hldev = (struct __vxge_hw_device *) pci_get_drvdata(pdev);
  3715. if (hldev == NULL)
  3716. return;
  3717. dev = hldev->ndev;
  3718. vdev = netdev_priv(dev);
  3719. #if ((VXGE_DEBUG_INIT & VXGE_DEBUG_MASK) || \
  3720. (VXGE_DEBUG_ENTRYEXIT & VXGE_DEBUG_MASK))
  3721. level_trace = vdev->level_trace;
  3722. #endif
  3723. vxge_debug_entryexit(level_trace,
  3724. "%s:%d", __func__, __LINE__);
  3725. vxge_debug_init(level_trace,
  3726. "%s : removing PCI device...", __func__);
  3727. vxge_device_unregister(hldev);
  3728. for (i = 0; i < vdev->no_of_vpath; i++) {
  3729. vxge_free_mac_add_list(&vdev->vpaths[i]);
  3730. vdev->vpaths[i].mcast_addr_cnt = 0;
  3731. vdev->vpaths[i].mac_addr_cnt = 0;
  3732. }
  3733. kfree(vdev->vpaths);
  3734. iounmap(vdev->bar0);
  3735. pci_disable_sriov(pdev);
  3736. /* we are safe to free it now */
  3737. free_netdev(dev);
  3738. vxge_debug_init(level_trace,
  3739. "%s:%d Device unregistered", __func__, __LINE__);
  3740. vxge_hw_device_terminate(hldev);
  3741. pci_disable_device(pdev);
  3742. pci_release_regions(pdev);
  3743. pci_set_drvdata(pdev, NULL);
  3744. vxge_debug_entryexit(level_trace,
  3745. "%s:%d Exiting...", __func__, __LINE__);
  3746. }
  3747. static struct pci_error_handlers vxge_err_handler = {
  3748. .error_detected = vxge_io_error_detected,
  3749. .slot_reset = vxge_io_slot_reset,
  3750. .resume = vxge_io_resume,
  3751. };
  3752. static struct pci_driver vxge_driver = {
  3753. .name = VXGE_DRIVER_NAME,
  3754. .id_table = vxge_id_table,
  3755. .probe = vxge_probe,
  3756. .remove = __devexit_p(vxge_remove),
  3757. #ifdef CONFIG_PM
  3758. .suspend = vxge_pm_suspend,
  3759. .resume = vxge_pm_resume,
  3760. #endif
  3761. .err_handler = &vxge_err_handler,
  3762. };
  3763. static int __init
  3764. vxge_starter(void)
  3765. {
  3766. int ret = 0;
  3767. pr_info("Copyright(c) 2002-2010 Exar Corp.\n");
  3768. pr_info("Driver version: %s\n", DRV_VERSION);
  3769. verify_bandwidth();
  3770. driver_config = kzalloc(sizeof(struct vxge_drv_config), GFP_KERNEL);
  3771. if (!driver_config)
  3772. return -ENOMEM;
  3773. ret = pci_register_driver(&vxge_driver);
  3774. if (driver_config->config_dev_cnt &&
  3775. (driver_config->config_dev_cnt != driver_config->total_dev_cnt))
  3776. vxge_debug_init(VXGE_ERR,
  3777. "%s: Configured %d of %d devices",
  3778. VXGE_DRIVER_NAME, driver_config->config_dev_cnt,
  3779. driver_config->total_dev_cnt);
  3780. if (ret)
  3781. kfree(driver_config);
  3782. return ret;
  3783. }
  3784. static void __exit
  3785. vxge_closer(void)
  3786. {
  3787. pci_unregister_driver(&vxge_driver);
  3788. kfree(driver_config);
  3789. }
  3790. module_init(vxge_starter);
  3791. module_exit(vxge_closer);