common.c 148 KB

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  1. /******************************************************************************
  2. *
  3. * GPL LICENSE SUMMARY
  4. *
  5. * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of version 2 of the GNU General Public License as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but
  12. * WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  19. * USA
  20. *
  21. * The full GNU General Public License is included in this distribution
  22. * in the file called LICENSE.GPL.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *****************************************************************************/
  28. #include <linux/kernel.h>
  29. #include <linux/module.h>
  30. #include <linux/etherdevice.h>
  31. #include <linux/sched.h>
  32. #include <linux/slab.h>
  33. #include <linux/types.h>
  34. #include <linux/lockdep.h>
  35. #include <linux/init.h>
  36. #include <linux/pci.h>
  37. #include <linux/dma-mapping.h>
  38. #include <linux/delay.h>
  39. #include <linux/skbuff.h>
  40. #include <net/mac80211.h>
  41. #include "iwl-debug.h"
  42. #include "common.h"
  43. const char *il_get_cmd_string(u8 cmd)
  44. {
  45. switch (cmd) {
  46. IL_CMD(N_ALIVE);
  47. IL_CMD(N_ERROR);
  48. IL_CMD(C_RXON);
  49. IL_CMD(C_RXON_ASSOC);
  50. IL_CMD(C_QOS_PARAM);
  51. IL_CMD(C_RXON_TIMING);
  52. IL_CMD(C_ADD_STA);
  53. IL_CMD(C_REM_STA);
  54. IL_CMD(C_WEPKEY);
  55. IL_CMD(N_3945_RX);
  56. IL_CMD(C_TX);
  57. IL_CMD(C_RATE_SCALE);
  58. IL_CMD(C_LEDS);
  59. IL_CMD(C_TX_LINK_QUALITY_CMD);
  60. IL_CMD(C_CHANNEL_SWITCH);
  61. IL_CMD(N_CHANNEL_SWITCH);
  62. IL_CMD(C_SPECTRUM_MEASUREMENT);
  63. IL_CMD(N_SPECTRUM_MEASUREMENT);
  64. IL_CMD(C_POWER_TBL);
  65. IL_CMD(N_PM_SLEEP);
  66. IL_CMD(N_PM_DEBUG_STATS);
  67. IL_CMD(C_SCAN);
  68. IL_CMD(C_SCAN_ABORT);
  69. IL_CMD(N_SCAN_START);
  70. IL_CMD(N_SCAN_RESULTS);
  71. IL_CMD(N_SCAN_COMPLETE);
  72. IL_CMD(N_BEACON);
  73. IL_CMD(C_TX_BEACON);
  74. IL_CMD(C_TX_PWR_TBL);
  75. IL_CMD(C_BT_CONFIG);
  76. IL_CMD(C_STATS);
  77. IL_CMD(N_STATS);
  78. IL_CMD(N_CARD_STATE);
  79. IL_CMD(N_MISSED_BEACONS);
  80. IL_CMD(C_CT_KILL_CONFIG);
  81. IL_CMD(C_SENSITIVITY);
  82. IL_CMD(C_PHY_CALIBRATION);
  83. IL_CMD(N_RX_PHY);
  84. IL_CMD(N_RX_MPDU);
  85. IL_CMD(N_RX);
  86. IL_CMD(N_COMPRESSED_BA);
  87. default:
  88. return "UNKNOWN";
  89. }
  90. }
  91. EXPORT_SYMBOL(il_get_cmd_string);
  92. #define HOST_COMPLETE_TIMEOUT (HZ / 2)
  93. static void il_generic_cmd_callback(struct il_priv *il,
  94. struct il_device_cmd *cmd,
  95. struct il_rx_pkt *pkt)
  96. {
  97. if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
  98. IL_ERR("Bad return from %s (0x%08X)\n",
  99. il_get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags);
  100. return;
  101. }
  102. #ifdef CONFIG_IWLEGACY_DEBUG
  103. switch (cmd->hdr.cmd) {
  104. case C_TX_LINK_QUALITY_CMD:
  105. case C_SENSITIVITY:
  106. D_HC_DUMP("back from %s (0x%08X)\n",
  107. il_get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags);
  108. break;
  109. default:
  110. D_HC("back from %s (0x%08X)\n",
  111. il_get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags);
  112. }
  113. #endif
  114. }
  115. static int
  116. il_send_cmd_async(struct il_priv *il, struct il_host_cmd *cmd)
  117. {
  118. int ret;
  119. BUG_ON(!(cmd->flags & CMD_ASYNC));
  120. /* An asynchronous command can not expect an SKB to be set. */
  121. BUG_ON(cmd->flags & CMD_WANT_SKB);
  122. /* Assign a generic callback if one is not provided */
  123. if (!cmd->callback)
  124. cmd->callback = il_generic_cmd_callback;
  125. if (test_bit(S_EXIT_PENDING, &il->status))
  126. return -EBUSY;
  127. ret = il_enqueue_hcmd(il, cmd);
  128. if (ret < 0) {
  129. IL_ERR("Error sending %s: enqueue_hcmd failed: %d\n",
  130. il_get_cmd_string(cmd->id), ret);
  131. return ret;
  132. }
  133. return 0;
  134. }
  135. int il_send_cmd_sync(struct il_priv *il, struct il_host_cmd *cmd)
  136. {
  137. int cmd_idx;
  138. int ret;
  139. lockdep_assert_held(&il->mutex);
  140. BUG_ON(cmd->flags & CMD_ASYNC);
  141. /* A synchronous command can not have a callback set. */
  142. BUG_ON(cmd->callback);
  143. D_INFO("Attempting to send sync command %s\n",
  144. il_get_cmd_string(cmd->id));
  145. set_bit(S_HCMD_ACTIVE, &il->status);
  146. D_INFO("Setting HCMD_ACTIVE for command %s\n",
  147. il_get_cmd_string(cmd->id));
  148. cmd_idx = il_enqueue_hcmd(il, cmd);
  149. if (cmd_idx < 0) {
  150. ret = cmd_idx;
  151. IL_ERR("Error sending %s: enqueue_hcmd failed: %d\n",
  152. il_get_cmd_string(cmd->id), ret);
  153. goto out;
  154. }
  155. ret = wait_event_timeout(il->wait_command_queue,
  156. !test_bit(S_HCMD_ACTIVE, &il->status),
  157. HOST_COMPLETE_TIMEOUT);
  158. if (!ret) {
  159. if (test_bit(S_HCMD_ACTIVE, &il->status)) {
  160. IL_ERR(
  161. "Error sending %s: time out after %dms.\n",
  162. il_get_cmd_string(cmd->id),
  163. jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
  164. clear_bit(S_HCMD_ACTIVE, &il->status);
  165. D_INFO(
  166. "Clearing HCMD_ACTIVE for command %s\n",
  167. il_get_cmd_string(cmd->id));
  168. ret = -ETIMEDOUT;
  169. goto cancel;
  170. }
  171. }
  172. if (test_bit(S_RF_KILL_HW, &il->status)) {
  173. IL_ERR("Command %s aborted: RF KILL Switch\n",
  174. il_get_cmd_string(cmd->id));
  175. ret = -ECANCELED;
  176. goto fail;
  177. }
  178. if (test_bit(S_FW_ERROR, &il->status)) {
  179. IL_ERR("Command %s failed: FW Error\n",
  180. il_get_cmd_string(cmd->id));
  181. ret = -EIO;
  182. goto fail;
  183. }
  184. if ((cmd->flags & CMD_WANT_SKB) && !cmd->reply_page) {
  185. IL_ERR("Error: Response NULL in '%s'\n",
  186. il_get_cmd_string(cmd->id));
  187. ret = -EIO;
  188. goto cancel;
  189. }
  190. ret = 0;
  191. goto out;
  192. cancel:
  193. if (cmd->flags & CMD_WANT_SKB) {
  194. /*
  195. * Cancel the CMD_WANT_SKB flag for the cmd in the
  196. * TX cmd queue. Otherwise in case the cmd comes
  197. * in later, it will possibly set an invalid
  198. * address (cmd->meta.source).
  199. */
  200. il->txq[il->cmd_queue].meta[cmd_idx].flags &=
  201. ~CMD_WANT_SKB;
  202. }
  203. fail:
  204. if (cmd->reply_page) {
  205. il_free_pages(il, cmd->reply_page);
  206. cmd->reply_page = 0;
  207. }
  208. out:
  209. return ret;
  210. }
  211. EXPORT_SYMBOL(il_send_cmd_sync);
  212. int il_send_cmd(struct il_priv *il, struct il_host_cmd *cmd)
  213. {
  214. if (cmd->flags & CMD_ASYNC)
  215. return il_send_cmd_async(il, cmd);
  216. return il_send_cmd_sync(il, cmd);
  217. }
  218. EXPORT_SYMBOL(il_send_cmd);
  219. int
  220. il_send_cmd_pdu(struct il_priv *il, u8 id, u16 len, const void *data)
  221. {
  222. struct il_host_cmd cmd = {
  223. .id = id,
  224. .len = len,
  225. .data = data,
  226. };
  227. return il_send_cmd_sync(il, &cmd);
  228. }
  229. EXPORT_SYMBOL(il_send_cmd_pdu);
  230. int il_send_cmd_pdu_async(struct il_priv *il,
  231. u8 id, u16 len, const void *data,
  232. void (*callback)(struct il_priv *il,
  233. struct il_device_cmd *cmd,
  234. struct il_rx_pkt *pkt))
  235. {
  236. struct il_host_cmd cmd = {
  237. .id = id,
  238. .len = len,
  239. .data = data,
  240. };
  241. cmd.flags |= CMD_ASYNC;
  242. cmd.callback = callback;
  243. return il_send_cmd_async(il, &cmd);
  244. }
  245. EXPORT_SYMBOL(il_send_cmd_pdu_async);
  246. /* default: IL_LED_BLINK(0) using blinking idx table */
  247. static int led_mode;
  248. module_param(led_mode, int, S_IRUGO);
  249. MODULE_PARM_DESC(led_mode, "0=system default, "
  250. "1=On(RF On)/Off(RF Off), 2=blinking");
  251. /* Throughput OFF time(ms) ON time (ms)
  252. * >300 25 25
  253. * >200 to 300 40 40
  254. * >100 to 200 55 55
  255. * >70 to 100 65 65
  256. * >50 to 70 75 75
  257. * >20 to 50 85 85
  258. * >10 to 20 95 95
  259. * >5 to 10 110 110
  260. * >1 to 5 130 130
  261. * >0 to 1 167 167
  262. * <=0 SOLID ON
  263. */
  264. static const struct ieee80211_tpt_blink il_blink[] = {
  265. { .throughput = 0, .blink_time = 334 },
  266. { .throughput = 1 * 1024 - 1, .blink_time = 260 },
  267. { .throughput = 5 * 1024 - 1, .blink_time = 220 },
  268. { .throughput = 10 * 1024 - 1, .blink_time = 190 },
  269. { .throughput = 20 * 1024 - 1, .blink_time = 170 },
  270. { .throughput = 50 * 1024 - 1, .blink_time = 150 },
  271. { .throughput = 70 * 1024 - 1, .blink_time = 130 },
  272. { .throughput = 100 * 1024 - 1, .blink_time = 110 },
  273. { .throughput = 200 * 1024 - 1, .blink_time = 80 },
  274. { .throughput = 300 * 1024 - 1, .blink_time = 50 },
  275. };
  276. /*
  277. * Adjust led blink rate to compensate on a MAC Clock difference on every HW
  278. * Led blink rate analysis showed an average deviation of 0% on 3945,
  279. * 5% on 4965 HW.
  280. * Need to compensate on the led on/off time per HW according to the deviation
  281. * to achieve the desired led frequency
  282. * The calculation is: (100-averageDeviation)/100 * blinkTime
  283. * For code efficiency the calculation will be:
  284. * compensation = (100 - averageDeviation) * 64 / 100
  285. * NewBlinkTime = (compensation * BlinkTime) / 64
  286. */
  287. static inline u8 il_blink_compensation(struct il_priv *il,
  288. u8 time, u16 compensation)
  289. {
  290. if (!compensation) {
  291. IL_ERR("undefined blink compensation: "
  292. "use pre-defined blinking time\n");
  293. return time;
  294. }
  295. return (u8)((time * compensation) >> 6);
  296. }
  297. /* Set led pattern command */
  298. static int il_led_cmd(struct il_priv *il,
  299. unsigned long on,
  300. unsigned long off)
  301. {
  302. struct il_led_cmd led_cmd = {
  303. .id = IL_LED_LINK,
  304. .interval = IL_DEF_LED_INTRVL
  305. };
  306. int ret;
  307. if (!test_bit(S_READY, &il->status))
  308. return -EBUSY;
  309. if (il->blink_on == on && il->blink_off == off)
  310. return 0;
  311. if (off == 0) {
  312. /* led is SOLID_ON */
  313. on = IL_LED_SOLID;
  314. }
  315. D_LED("Led blink time compensation=%u\n",
  316. il->cfg->base_params->led_compensation);
  317. led_cmd.on = il_blink_compensation(il, on,
  318. il->cfg->base_params->led_compensation);
  319. led_cmd.off = il_blink_compensation(il, off,
  320. il->cfg->base_params->led_compensation);
  321. ret = il->cfg->ops->led->cmd(il, &led_cmd);
  322. if (!ret) {
  323. il->blink_on = on;
  324. il->blink_off = off;
  325. }
  326. return ret;
  327. }
  328. static void il_led_brightness_set(struct led_classdev *led_cdev,
  329. enum led_brightness brightness)
  330. {
  331. struct il_priv *il = container_of(led_cdev, struct il_priv, led);
  332. unsigned long on = 0;
  333. if (brightness > 0)
  334. on = IL_LED_SOLID;
  335. il_led_cmd(il, on, 0);
  336. }
  337. static int il_led_blink_set(struct led_classdev *led_cdev,
  338. unsigned long *delay_on,
  339. unsigned long *delay_off)
  340. {
  341. struct il_priv *il = container_of(led_cdev, struct il_priv, led);
  342. return il_led_cmd(il, *delay_on, *delay_off);
  343. }
  344. void il_leds_init(struct il_priv *il)
  345. {
  346. int mode = led_mode;
  347. int ret;
  348. if (mode == IL_LED_DEFAULT)
  349. mode = il->cfg->led_mode;
  350. il->led.name = kasprintf(GFP_KERNEL, "%s-led",
  351. wiphy_name(il->hw->wiphy));
  352. il->led.brightness_set = il_led_brightness_set;
  353. il->led.blink_set = il_led_blink_set;
  354. il->led.max_brightness = 1;
  355. switch (mode) {
  356. case IL_LED_DEFAULT:
  357. WARN_ON(1);
  358. break;
  359. case IL_LED_BLINK:
  360. il->led.default_trigger =
  361. ieee80211_create_tpt_led_trigger(il->hw,
  362. IEEE80211_TPT_LEDTRIG_FL_CONNECTED,
  363. il_blink, ARRAY_SIZE(il_blink));
  364. break;
  365. case IL_LED_RF_STATE:
  366. il->led.default_trigger =
  367. ieee80211_get_radio_led_name(il->hw);
  368. break;
  369. }
  370. ret = led_classdev_register(&il->pci_dev->dev, &il->led);
  371. if (ret) {
  372. kfree(il->led.name);
  373. return;
  374. }
  375. il->led_registered = true;
  376. }
  377. EXPORT_SYMBOL(il_leds_init);
  378. void il_leds_exit(struct il_priv *il)
  379. {
  380. if (!il->led_registered)
  381. return;
  382. led_classdev_unregister(&il->led);
  383. kfree(il->led.name);
  384. }
  385. EXPORT_SYMBOL(il_leds_exit);
  386. /************************** EEPROM BANDS ****************************
  387. *
  388. * The il_eeprom_band definitions below provide the mapping from the
  389. * EEPROM contents to the specific channel number supported for each
  390. * band.
  391. *
  392. * For example, il_priv->eeprom.band_3_channels[4] from the band_3
  393. * definition below maps to physical channel 42 in the 5.2GHz spectrum.
  394. * The specific geography and calibration information for that channel
  395. * is contained in the eeprom map itself.
  396. *
  397. * During init, we copy the eeprom information and channel map
  398. * information into il->channel_info_24/52 and il->channel_map_24/52
  399. *
  400. * channel_map_24/52 provides the idx in the channel_info array for a
  401. * given channel. We have to have two separate maps as there is channel
  402. * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
  403. * band_2
  404. *
  405. * A value of 0xff stored in the channel_map indicates that the channel
  406. * is not supported by the hardware at all.
  407. *
  408. * A value of 0xfe in the channel_map indicates that the channel is not
  409. * valid for Tx with the current hardware. This means that
  410. * while the system can tune and receive on a given channel, it may not
  411. * be able to associate or transmit any frames on that
  412. * channel. There is no corresponding channel information for that
  413. * entry.
  414. *
  415. *********************************************************************/
  416. /* 2.4 GHz */
  417. const u8 il_eeprom_band_1[14] = {
  418. 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
  419. };
  420. /* 5.2 GHz bands */
  421. static const u8 il_eeprom_band_2[] = { /* 4915-5080MHz */
  422. 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
  423. };
  424. static const u8 il_eeprom_band_3[] = { /* 5170-5320MHz */
  425. 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
  426. };
  427. static const u8 il_eeprom_band_4[] = { /* 5500-5700MHz */
  428. 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
  429. };
  430. static const u8 il_eeprom_band_5[] = { /* 5725-5825MHz */
  431. 145, 149, 153, 157, 161, 165
  432. };
  433. static const u8 il_eeprom_band_6[] = { /* 2.4 ht40 channel */
  434. 1, 2, 3, 4, 5, 6, 7
  435. };
  436. static const u8 il_eeprom_band_7[] = { /* 5.2 ht40 channel */
  437. 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
  438. };
  439. /******************************************************************************
  440. *
  441. * EEPROM related functions
  442. *
  443. ******************************************************************************/
  444. static int il_eeprom_verify_signature(struct il_priv *il)
  445. {
  446. u32 gp = _il_rd(il, CSR_EEPROM_GP) & CSR_EEPROM_GP_VALID_MSK;
  447. int ret = 0;
  448. D_EEPROM("EEPROM signature=0x%08x\n", gp);
  449. switch (gp) {
  450. case CSR_EEPROM_GP_GOOD_SIG_EEP_LESS_THAN_4K:
  451. case CSR_EEPROM_GP_GOOD_SIG_EEP_MORE_THAN_4K:
  452. break;
  453. default:
  454. IL_ERR("bad EEPROM signature,"
  455. "EEPROM_GP=0x%08x\n", gp);
  456. ret = -ENOENT;
  457. break;
  458. }
  459. return ret;
  460. }
  461. const u8
  462. *il_eeprom_query_addr(const struct il_priv *il, size_t offset)
  463. {
  464. BUG_ON(offset >= il->cfg->base_params->eeprom_size);
  465. return &il->eeprom[offset];
  466. }
  467. EXPORT_SYMBOL(il_eeprom_query_addr);
  468. u16 il_eeprom_query16(const struct il_priv *il, size_t offset)
  469. {
  470. if (!il->eeprom)
  471. return 0;
  472. return (u16)il->eeprom[offset] | ((u16)il->eeprom[offset + 1] << 8);
  473. }
  474. EXPORT_SYMBOL(il_eeprom_query16);
  475. /**
  476. * il_eeprom_init - read EEPROM contents
  477. *
  478. * Load the EEPROM contents from adapter into il->eeprom
  479. *
  480. * NOTE: This routine uses the non-debug IO access functions.
  481. */
  482. int il_eeprom_init(struct il_priv *il)
  483. {
  484. __le16 *e;
  485. u32 gp = _il_rd(il, CSR_EEPROM_GP);
  486. int sz;
  487. int ret;
  488. u16 addr;
  489. /* allocate eeprom */
  490. sz = il->cfg->base_params->eeprom_size;
  491. D_EEPROM("NVM size = %d\n", sz);
  492. il->eeprom = kzalloc(sz, GFP_KERNEL);
  493. if (!il->eeprom) {
  494. ret = -ENOMEM;
  495. goto alloc_err;
  496. }
  497. e = (__le16 *)il->eeprom;
  498. il->cfg->ops->lib->apm_ops.init(il);
  499. ret = il_eeprom_verify_signature(il);
  500. if (ret < 0) {
  501. IL_ERR("EEPROM not found, EEPROM_GP=0x%08x\n", gp);
  502. ret = -ENOENT;
  503. goto err;
  504. }
  505. /* Make sure driver (instead of uCode) is allowed to read EEPROM */
  506. ret = il->cfg->ops->lib->eeprom_ops.acquire_semaphore(il);
  507. if (ret < 0) {
  508. IL_ERR("Failed to acquire EEPROM semaphore.\n");
  509. ret = -ENOENT;
  510. goto err;
  511. }
  512. /* eeprom is an array of 16bit values */
  513. for (addr = 0; addr < sz; addr += sizeof(u16)) {
  514. u32 r;
  515. _il_wr(il, CSR_EEPROM_REG,
  516. CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
  517. ret = _il_poll_bit(il, CSR_EEPROM_REG,
  518. CSR_EEPROM_REG_READ_VALID_MSK,
  519. CSR_EEPROM_REG_READ_VALID_MSK,
  520. IL_EEPROM_ACCESS_TIMEOUT);
  521. if (ret < 0) {
  522. IL_ERR("Time out reading EEPROM[%d]\n",
  523. addr);
  524. goto done;
  525. }
  526. r = _il_rd(il, CSR_EEPROM_REG);
  527. e[addr / 2] = cpu_to_le16(r >> 16);
  528. }
  529. D_EEPROM("NVM Type: %s, version: 0x%x\n",
  530. "EEPROM",
  531. il_eeprom_query16(il, EEPROM_VERSION));
  532. ret = 0;
  533. done:
  534. il->cfg->ops->lib->eeprom_ops.release_semaphore(il);
  535. err:
  536. if (ret)
  537. il_eeprom_free(il);
  538. /* Reset chip to save power until we load uCode during "up". */
  539. il_apm_stop(il);
  540. alloc_err:
  541. return ret;
  542. }
  543. EXPORT_SYMBOL(il_eeprom_init);
  544. void il_eeprom_free(struct il_priv *il)
  545. {
  546. kfree(il->eeprom);
  547. il->eeprom = NULL;
  548. }
  549. EXPORT_SYMBOL(il_eeprom_free);
  550. static void il_init_band_reference(const struct il_priv *il,
  551. int eep_band, int *eeprom_ch_count,
  552. const struct il_eeprom_channel **eeprom_ch_info,
  553. const u8 **eeprom_ch_idx)
  554. {
  555. u32 offset = il->cfg->ops->lib->
  556. eeprom_ops.regulatory_bands[eep_band - 1];
  557. switch (eep_band) {
  558. case 1: /* 2.4GHz band */
  559. *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_1);
  560. *eeprom_ch_info = (struct il_eeprom_channel *)
  561. il_eeprom_query_addr(il, offset);
  562. *eeprom_ch_idx = il_eeprom_band_1;
  563. break;
  564. case 2: /* 4.9GHz band */
  565. *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_2);
  566. *eeprom_ch_info = (struct il_eeprom_channel *)
  567. il_eeprom_query_addr(il, offset);
  568. *eeprom_ch_idx = il_eeprom_band_2;
  569. break;
  570. case 3: /* 5.2GHz band */
  571. *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_3);
  572. *eeprom_ch_info = (struct il_eeprom_channel *)
  573. il_eeprom_query_addr(il, offset);
  574. *eeprom_ch_idx = il_eeprom_band_3;
  575. break;
  576. case 4: /* 5.5GHz band */
  577. *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_4);
  578. *eeprom_ch_info = (struct il_eeprom_channel *)
  579. il_eeprom_query_addr(il, offset);
  580. *eeprom_ch_idx = il_eeprom_band_4;
  581. break;
  582. case 5: /* 5.7GHz band */
  583. *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_5);
  584. *eeprom_ch_info = (struct il_eeprom_channel *)
  585. il_eeprom_query_addr(il, offset);
  586. *eeprom_ch_idx = il_eeprom_band_5;
  587. break;
  588. case 6: /* 2.4GHz ht40 channels */
  589. *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_6);
  590. *eeprom_ch_info = (struct il_eeprom_channel *)
  591. il_eeprom_query_addr(il, offset);
  592. *eeprom_ch_idx = il_eeprom_band_6;
  593. break;
  594. case 7: /* 5 GHz ht40 channels */
  595. *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_7);
  596. *eeprom_ch_info = (struct il_eeprom_channel *)
  597. il_eeprom_query_addr(il, offset);
  598. *eeprom_ch_idx = il_eeprom_band_7;
  599. break;
  600. default:
  601. BUG();
  602. }
  603. }
  604. #define CHECK_AND_PRINT(x) ((eeprom_ch->flags & EEPROM_CHANNEL_##x) \
  605. ? # x " " : "")
  606. /**
  607. * il_mod_ht40_chan_info - Copy ht40 channel info into driver's il.
  608. *
  609. * Does not set up a command, or touch hardware.
  610. */
  611. static int il_mod_ht40_chan_info(struct il_priv *il,
  612. enum ieee80211_band band, u16 channel,
  613. const struct il_eeprom_channel *eeprom_ch,
  614. u8 clear_ht40_extension_channel)
  615. {
  616. struct il_channel_info *ch_info;
  617. ch_info = (struct il_channel_info *)
  618. il_get_channel_info(il, band, channel);
  619. if (!il_is_channel_valid(ch_info))
  620. return -1;
  621. D_EEPROM("HT40 Ch. %d [%sGHz] %s%s%s%s%s(0x%02x %ddBm):"
  622. " Ad-Hoc %ssupported\n",
  623. ch_info->channel,
  624. il_is_channel_a_band(ch_info) ?
  625. "5.2" : "2.4",
  626. CHECK_AND_PRINT(IBSS),
  627. CHECK_AND_PRINT(ACTIVE),
  628. CHECK_AND_PRINT(RADAR),
  629. CHECK_AND_PRINT(WIDE),
  630. CHECK_AND_PRINT(DFS),
  631. eeprom_ch->flags,
  632. eeprom_ch->max_power_avg,
  633. ((eeprom_ch->flags & EEPROM_CHANNEL_IBSS)
  634. && !(eeprom_ch->flags & EEPROM_CHANNEL_RADAR)) ?
  635. "" : "not ");
  636. ch_info->ht40_eeprom = *eeprom_ch;
  637. ch_info->ht40_max_power_avg = eeprom_ch->max_power_avg;
  638. ch_info->ht40_flags = eeprom_ch->flags;
  639. if (eeprom_ch->flags & EEPROM_CHANNEL_VALID)
  640. ch_info->ht40_extension_channel &=
  641. ~clear_ht40_extension_channel;
  642. return 0;
  643. }
  644. #define CHECK_AND_PRINT_I(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
  645. ? # x " " : "")
  646. /**
  647. * il_init_channel_map - Set up driver's info for all possible channels
  648. */
  649. int il_init_channel_map(struct il_priv *il)
  650. {
  651. int eeprom_ch_count = 0;
  652. const u8 *eeprom_ch_idx = NULL;
  653. const struct il_eeprom_channel *eeprom_ch_info = NULL;
  654. int band, ch;
  655. struct il_channel_info *ch_info;
  656. if (il->channel_count) {
  657. D_EEPROM("Channel map already initialized.\n");
  658. return 0;
  659. }
  660. D_EEPROM("Initializing regulatory info from EEPROM\n");
  661. il->channel_count =
  662. ARRAY_SIZE(il_eeprom_band_1) +
  663. ARRAY_SIZE(il_eeprom_band_2) +
  664. ARRAY_SIZE(il_eeprom_band_3) +
  665. ARRAY_SIZE(il_eeprom_band_4) +
  666. ARRAY_SIZE(il_eeprom_band_5);
  667. D_EEPROM("Parsing data for %d channels.\n",
  668. il->channel_count);
  669. il->channel_info = kzalloc(sizeof(struct il_channel_info) *
  670. il->channel_count, GFP_KERNEL);
  671. if (!il->channel_info) {
  672. IL_ERR("Could not allocate channel_info\n");
  673. il->channel_count = 0;
  674. return -ENOMEM;
  675. }
  676. ch_info = il->channel_info;
  677. /* Loop through the 5 EEPROM bands adding them in order to the
  678. * channel map we maintain (that contains additional information than
  679. * what just in the EEPROM) */
  680. for (band = 1; band <= 5; band++) {
  681. il_init_band_reference(il, band, &eeprom_ch_count,
  682. &eeprom_ch_info, &eeprom_ch_idx);
  683. /* Loop through each band adding each of the channels */
  684. for (ch = 0; ch < eeprom_ch_count; ch++) {
  685. ch_info->channel = eeprom_ch_idx[ch];
  686. ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
  687. IEEE80211_BAND_5GHZ;
  688. /* permanently store EEPROM's channel regulatory flags
  689. * and max power in channel info database. */
  690. ch_info->eeprom = eeprom_ch_info[ch];
  691. /* Copy the run-time flags so they are there even on
  692. * invalid channels */
  693. ch_info->flags = eeprom_ch_info[ch].flags;
  694. /* First write that ht40 is not enabled, and then enable
  695. * one by one */
  696. ch_info->ht40_extension_channel =
  697. IEEE80211_CHAN_NO_HT40;
  698. if (!(il_is_channel_valid(ch_info))) {
  699. D_EEPROM(
  700. "Ch. %d Flags %x [%sGHz] - "
  701. "No traffic\n",
  702. ch_info->channel,
  703. ch_info->flags,
  704. il_is_channel_a_band(ch_info) ?
  705. "5.2" : "2.4");
  706. ch_info++;
  707. continue;
  708. }
  709. /* Initialize regulatory-based run-time data */
  710. ch_info->max_power_avg = ch_info->curr_txpow =
  711. eeprom_ch_info[ch].max_power_avg;
  712. ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
  713. ch_info->min_power = 0;
  714. D_EEPROM("Ch. %d [%sGHz] "
  715. "%s%s%s%s%s%s(0x%02x %ddBm):"
  716. " Ad-Hoc %ssupported\n",
  717. ch_info->channel,
  718. il_is_channel_a_band(ch_info) ?
  719. "5.2" : "2.4",
  720. CHECK_AND_PRINT_I(VALID),
  721. CHECK_AND_PRINT_I(IBSS),
  722. CHECK_AND_PRINT_I(ACTIVE),
  723. CHECK_AND_PRINT_I(RADAR),
  724. CHECK_AND_PRINT_I(WIDE),
  725. CHECK_AND_PRINT_I(DFS),
  726. eeprom_ch_info[ch].flags,
  727. eeprom_ch_info[ch].max_power_avg,
  728. ((eeprom_ch_info[ch].
  729. flags & EEPROM_CHANNEL_IBSS)
  730. && !(eeprom_ch_info[ch].
  731. flags & EEPROM_CHANNEL_RADAR))
  732. ? "" : "not ");
  733. ch_info++;
  734. }
  735. }
  736. /* Check if we do have HT40 channels */
  737. if (il->cfg->ops->lib->eeprom_ops.regulatory_bands[5] ==
  738. EEPROM_REGULATORY_BAND_NO_HT40 &&
  739. il->cfg->ops->lib->eeprom_ops.regulatory_bands[6] ==
  740. EEPROM_REGULATORY_BAND_NO_HT40)
  741. return 0;
  742. /* Two additional EEPROM bands for 2.4 and 5 GHz HT40 channels */
  743. for (band = 6; band <= 7; band++) {
  744. enum ieee80211_band ieeeband;
  745. il_init_band_reference(il, band, &eeprom_ch_count,
  746. &eeprom_ch_info, &eeprom_ch_idx);
  747. /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
  748. ieeeband =
  749. (band == 6) ? IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
  750. /* Loop through each band adding each of the channels */
  751. for (ch = 0; ch < eeprom_ch_count; ch++) {
  752. /* Set up driver's info for lower half */
  753. il_mod_ht40_chan_info(il, ieeeband,
  754. eeprom_ch_idx[ch],
  755. &eeprom_ch_info[ch],
  756. IEEE80211_CHAN_NO_HT40PLUS);
  757. /* Set up driver's info for upper half */
  758. il_mod_ht40_chan_info(il, ieeeband,
  759. eeprom_ch_idx[ch] + 4,
  760. &eeprom_ch_info[ch],
  761. IEEE80211_CHAN_NO_HT40MINUS);
  762. }
  763. }
  764. return 0;
  765. }
  766. EXPORT_SYMBOL(il_init_channel_map);
  767. /*
  768. * il_free_channel_map - undo allocations in il_init_channel_map
  769. */
  770. void il_free_channel_map(struct il_priv *il)
  771. {
  772. kfree(il->channel_info);
  773. il->channel_count = 0;
  774. }
  775. EXPORT_SYMBOL(il_free_channel_map);
  776. /**
  777. * il_get_channel_info - Find driver's ilate channel info
  778. *
  779. * Based on band and channel number.
  780. */
  781. const struct
  782. il_channel_info *il_get_channel_info(const struct il_priv *il,
  783. enum ieee80211_band band, u16 channel)
  784. {
  785. int i;
  786. switch (band) {
  787. case IEEE80211_BAND_5GHZ:
  788. for (i = 14; i < il->channel_count; i++) {
  789. if (il->channel_info[i].channel == channel)
  790. return &il->channel_info[i];
  791. }
  792. break;
  793. case IEEE80211_BAND_2GHZ:
  794. if (channel >= 1 && channel <= 14)
  795. return &il->channel_info[channel - 1];
  796. break;
  797. default:
  798. BUG();
  799. }
  800. return NULL;
  801. }
  802. EXPORT_SYMBOL(il_get_channel_info);
  803. /*
  804. * Setting power level allows the card to go to sleep when not busy.
  805. *
  806. * We calculate a sleep command based on the required latency, which
  807. * we get from mac80211. In order to handle thermal throttling, we can
  808. * also use pre-defined power levels.
  809. */
  810. /*
  811. * This defines the old power levels. They are still used by default
  812. * (level 1) and for thermal throttle (levels 3 through 5)
  813. */
  814. struct il_power_vec_entry {
  815. struct il_powertable_cmd cmd;
  816. u8 no_dtim; /* number of skip dtim */
  817. };
  818. static void il_power_sleep_cam_cmd(struct il_priv *il,
  819. struct il_powertable_cmd *cmd)
  820. {
  821. memset(cmd, 0, sizeof(*cmd));
  822. if (il->power_data.pci_pm)
  823. cmd->flags |= IL_POWER_PCI_PM_MSK;
  824. D_POWER("Sleep command for CAM\n");
  825. }
  826. static int
  827. il_set_power(struct il_priv *il, struct il_powertable_cmd *cmd)
  828. {
  829. D_POWER("Sending power/sleep command\n");
  830. D_POWER("Flags value = 0x%08X\n", cmd->flags);
  831. D_POWER("Tx timeout = %u\n",
  832. le32_to_cpu(cmd->tx_data_timeout));
  833. D_POWER("Rx timeout = %u\n",
  834. le32_to_cpu(cmd->rx_data_timeout));
  835. D_POWER(
  836. "Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  837. le32_to_cpu(cmd->sleep_interval[0]),
  838. le32_to_cpu(cmd->sleep_interval[1]),
  839. le32_to_cpu(cmd->sleep_interval[2]),
  840. le32_to_cpu(cmd->sleep_interval[3]),
  841. le32_to_cpu(cmd->sleep_interval[4]));
  842. return il_send_cmd_pdu(il, C_POWER_TBL,
  843. sizeof(struct il_powertable_cmd), cmd);
  844. }
  845. int
  846. il_power_set_mode(struct il_priv *il, struct il_powertable_cmd *cmd,
  847. bool force)
  848. {
  849. int ret;
  850. bool update_chains;
  851. lockdep_assert_held(&il->mutex);
  852. /* Don't update the RX chain when chain noise calibration is running */
  853. update_chains = il->chain_noise_data.state == IL_CHAIN_NOISE_DONE ||
  854. il->chain_noise_data.state == IL_CHAIN_NOISE_ALIVE;
  855. if (!memcmp(&il->power_data.sleep_cmd, cmd, sizeof(*cmd)) && !force)
  856. return 0;
  857. if (!il_is_ready_rf(il))
  858. return -EIO;
  859. /* scan complete use sleep_power_next, need to be updated */
  860. memcpy(&il->power_data.sleep_cmd_next, cmd, sizeof(*cmd));
  861. if (test_bit(S_SCANNING, &il->status) && !force) {
  862. D_INFO("Defer power set mode while scanning\n");
  863. return 0;
  864. }
  865. if (cmd->flags & IL_POWER_DRIVER_ALLOW_SLEEP_MSK)
  866. set_bit(S_POWER_PMI, &il->status);
  867. ret = il_set_power(il, cmd);
  868. if (!ret) {
  869. if (!(cmd->flags & IL_POWER_DRIVER_ALLOW_SLEEP_MSK))
  870. clear_bit(S_POWER_PMI, &il->status);
  871. if (il->cfg->ops->lib->update_chain_flags && update_chains)
  872. il->cfg->ops->lib->update_chain_flags(il);
  873. else if (il->cfg->ops->lib->update_chain_flags)
  874. D_POWER(
  875. "Cannot update the power, chain noise "
  876. "calibration running: %d\n",
  877. il->chain_noise_data.state);
  878. memcpy(&il->power_data.sleep_cmd, cmd, sizeof(*cmd));
  879. } else
  880. IL_ERR("set power fail, ret = %d", ret);
  881. return ret;
  882. }
  883. int il_power_update_mode(struct il_priv *il, bool force)
  884. {
  885. struct il_powertable_cmd cmd;
  886. il_power_sleep_cam_cmd(il, &cmd);
  887. return il_power_set_mode(il, &cmd, force);
  888. }
  889. EXPORT_SYMBOL(il_power_update_mode);
  890. /* initialize to default */
  891. void il_power_initialize(struct il_priv *il)
  892. {
  893. u16 lctl = il_pcie_link_ctl(il);
  894. il->power_data.pci_pm = !(lctl & PCI_CFG_LINK_CTRL_VAL_L0S_EN);
  895. il->power_data.debug_sleep_level_override = -1;
  896. memset(&il->power_data.sleep_cmd, 0,
  897. sizeof(il->power_data.sleep_cmd));
  898. }
  899. EXPORT_SYMBOL(il_power_initialize);
  900. /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
  901. * sending probe req. This should be set long enough to hear probe responses
  902. * from more than one AP. */
  903. #define IL_ACTIVE_DWELL_TIME_24 (30) /* all times in msec */
  904. #define IL_ACTIVE_DWELL_TIME_52 (20)
  905. #define IL_ACTIVE_DWELL_FACTOR_24GHZ (3)
  906. #define IL_ACTIVE_DWELL_FACTOR_52GHZ (2)
  907. /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
  908. * Must be set longer than active dwell time.
  909. * For the most reliable scan, set > AP beacon interval (typically 100msec). */
  910. #define IL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
  911. #define IL_PASSIVE_DWELL_TIME_52 (10)
  912. #define IL_PASSIVE_DWELL_BASE (100)
  913. #define IL_CHANNEL_TUNE_TIME 5
  914. static int il_send_scan_abort(struct il_priv *il)
  915. {
  916. int ret;
  917. struct il_rx_pkt *pkt;
  918. struct il_host_cmd cmd = {
  919. .id = C_SCAN_ABORT,
  920. .flags = CMD_WANT_SKB,
  921. };
  922. /* Exit instantly with error when device is not ready
  923. * to receive scan abort command or it does not perform
  924. * hardware scan currently */
  925. if (!test_bit(S_READY, &il->status) ||
  926. !test_bit(S_GEO_CONFIGURED, &il->status) ||
  927. !test_bit(S_SCAN_HW, &il->status) ||
  928. test_bit(S_FW_ERROR, &il->status) ||
  929. test_bit(S_EXIT_PENDING, &il->status))
  930. return -EIO;
  931. ret = il_send_cmd_sync(il, &cmd);
  932. if (ret)
  933. return ret;
  934. pkt = (struct il_rx_pkt *)cmd.reply_page;
  935. if (pkt->u.status != CAN_ABORT_STATUS) {
  936. /* The scan abort will return 1 for success or
  937. * 2 for "failure". A failure condition can be
  938. * due to simply not being in an active scan which
  939. * can occur if we send the scan abort before we
  940. * the microcode has notified us that a scan is
  941. * completed. */
  942. D_SCAN("SCAN_ABORT ret %d.\n", pkt->u.status);
  943. ret = -EIO;
  944. }
  945. il_free_pages(il, cmd.reply_page);
  946. return ret;
  947. }
  948. static void il_complete_scan(struct il_priv *il, bool aborted)
  949. {
  950. /* check if scan was requested from mac80211 */
  951. if (il->scan_request) {
  952. D_SCAN("Complete scan in mac80211\n");
  953. ieee80211_scan_completed(il->hw, aborted);
  954. }
  955. il->scan_vif = NULL;
  956. il->scan_request = NULL;
  957. }
  958. void il_force_scan_end(struct il_priv *il)
  959. {
  960. lockdep_assert_held(&il->mutex);
  961. if (!test_bit(S_SCANNING, &il->status)) {
  962. D_SCAN("Forcing scan end while not scanning\n");
  963. return;
  964. }
  965. D_SCAN("Forcing scan end\n");
  966. clear_bit(S_SCANNING, &il->status);
  967. clear_bit(S_SCAN_HW, &il->status);
  968. clear_bit(S_SCAN_ABORTING, &il->status);
  969. il_complete_scan(il, true);
  970. }
  971. static void il_do_scan_abort(struct il_priv *il)
  972. {
  973. int ret;
  974. lockdep_assert_held(&il->mutex);
  975. if (!test_bit(S_SCANNING, &il->status)) {
  976. D_SCAN("Not performing scan to abort\n");
  977. return;
  978. }
  979. if (test_and_set_bit(S_SCAN_ABORTING, &il->status)) {
  980. D_SCAN("Scan abort in progress\n");
  981. return;
  982. }
  983. ret = il_send_scan_abort(il);
  984. if (ret) {
  985. D_SCAN("Send scan abort failed %d\n", ret);
  986. il_force_scan_end(il);
  987. } else
  988. D_SCAN("Successfully send scan abort\n");
  989. }
  990. /**
  991. * il_scan_cancel - Cancel any currently executing HW scan
  992. */
  993. int il_scan_cancel(struct il_priv *il)
  994. {
  995. D_SCAN("Queuing abort scan\n");
  996. queue_work(il->workqueue, &il->abort_scan);
  997. return 0;
  998. }
  999. EXPORT_SYMBOL(il_scan_cancel);
  1000. /**
  1001. * il_scan_cancel_timeout - Cancel any currently executing HW scan
  1002. * @ms: amount of time to wait (in milliseconds) for scan to abort
  1003. *
  1004. */
  1005. int il_scan_cancel_timeout(struct il_priv *il, unsigned long ms)
  1006. {
  1007. unsigned long timeout = jiffies + msecs_to_jiffies(ms);
  1008. lockdep_assert_held(&il->mutex);
  1009. D_SCAN("Scan cancel timeout\n");
  1010. il_do_scan_abort(il);
  1011. while (time_before_eq(jiffies, timeout)) {
  1012. if (!test_bit(S_SCAN_HW, &il->status))
  1013. break;
  1014. msleep(20);
  1015. }
  1016. return test_bit(S_SCAN_HW, &il->status);
  1017. }
  1018. EXPORT_SYMBOL(il_scan_cancel_timeout);
  1019. /* Service response to C_SCAN (0x80) */
  1020. static void il_hdl_scan(struct il_priv *il,
  1021. struct il_rx_buf *rxb)
  1022. {
  1023. #ifdef CONFIG_IWLEGACY_DEBUG
  1024. struct il_rx_pkt *pkt = rxb_addr(rxb);
  1025. struct il_scanreq_notification *notif =
  1026. (struct il_scanreq_notification *)pkt->u.raw;
  1027. D_SCAN("Scan request status = 0x%x\n", notif->status);
  1028. #endif
  1029. }
  1030. /* Service N_SCAN_START (0x82) */
  1031. static void il_hdl_scan_start(struct il_priv *il,
  1032. struct il_rx_buf *rxb)
  1033. {
  1034. struct il_rx_pkt *pkt = rxb_addr(rxb);
  1035. struct il_scanstart_notification *notif =
  1036. (struct il_scanstart_notification *)pkt->u.raw;
  1037. il->scan_start_tsf = le32_to_cpu(notif->tsf_low);
  1038. D_SCAN("Scan start: "
  1039. "%d [802.11%s] "
  1040. "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
  1041. notif->channel,
  1042. notif->band ? "bg" : "a",
  1043. le32_to_cpu(notif->tsf_high),
  1044. le32_to_cpu(notif->tsf_low),
  1045. notif->status, notif->beacon_timer);
  1046. }
  1047. /* Service N_SCAN_RESULTS (0x83) */
  1048. static void il_hdl_scan_results(struct il_priv *il,
  1049. struct il_rx_buf *rxb)
  1050. {
  1051. #ifdef CONFIG_IWLEGACY_DEBUG
  1052. struct il_rx_pkt *pkt = rxb_addr(rxb);
  1053. struct il_scanresults_notification *notif =
  1054. (struct il_scanresults_notification *)pkt->u.raw;
  1055. D_SCAN("Scan ch.res: "
  1056. "%d [802.11%s] "
  1057. "(TSF: 0x%08X:%08X) - %d "
  1058. "elapsed=%lu usec\n",
  1059. notif->channel,
  1060. notif->band ? "bg" : "a",
  1061. le32_to_cpu(notif->tsf_high),
  1062. le32_to_cpu(notif->tsf_low),
  1063. le32_to_cpu(notif->stats[0]),
  1064. le32_to_cpu(notif->tsf_low) - il->scan_start_tsf);
  1065. #endif
  1066. }
  1067. /* Service N_SCAN_COMPLETE (0x84) */
  1068. static void il_hdl_scan_complete(struct il_priv *il,
  1069. struct il_rx_buf *rxb)
  1070. {
  1071. #ifdef CONFIG_IWLEGACY_DEBUG
  1072. struct il_rx_pkt *pkt = rxb_addr(rxb);
  1073. struct il_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
  1074. #endif
  1075. D_SCAN(
  1076. "Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
  1077. scan_notif->scanned_channels,
  1078. scan_notif->tsf_low,
  1079. scan_notif->tsf_high, scan_notif->status);
  1080. /* The HW is no longer scanning */
  1081. clear_bit(S_SCAN_HW, &il->status);
  1082. D_SCAN("Scan on %sGHz took %dms\n",
  1083. (il->scan_band == IEEE80211_BAND_2GHZ) ? "2.4" : "5.2",
  1084. jiffies_to_msecs(jiffies - il->scan_start));
  1085. queue_work(il->workqueue, &il->scan_completed);
  1086. }
  1087. void il_setup_rx_scan_handlers(struct il_priv *il)
  1088. {
  1089. /* scan handlers */
  1090. il->handlers[C_SCAN] = il_hdl_scan;
  1091. il->handlers[N_SCAN_START] =
  1092. il_hdl_scan_start;
  1093. il->handlers[N_SCAN_RESULTS] =
  1094. il_hdl_scan_results;
  1095. il->handlers[N_SCAN_COMPLETE] =
  1096. il_hdl_scan_complete;
  1097. }
  1098. EXPORT_SYMBOL(il_setup_rx_scan_handlers);
  1099. inline u16 il_get_active_dwell_time(struct il_priv *il,
  1100. enum ieee80211_band band,
  1101. u8 n_probes)
  1102. {
  1103. if (band == IEEE80211_BAND_5GHZ)
  1104. return IL_ACTIVE_DWELL_TIME_52 +
  1105. IL_ACTIVE_DWELL_FACTOR_52GHZ * (n_probes + 1);
  1106. else
  1107. return IL_ACTIVE_DWELL_TIME_24 +
  1108. IL_ACTIVE_DWELL_FACTOR_24GHZ * (n_probes + 1);
  1109. }
  1110. EXPORT_SYMBOL(il_get_active_dwell_time);
  1111. u16 il_get_passive_dwell_time(struct il_priv *il,
  1112. enum ieee80211_band band,
  1113. struct ieee80211_vif *vif)
  1114. {
  1115. struct il_rxon_context *ctx = &il->ctx;
  1116. u16 value;
  1117. u16 passive = (band == IEEE80211_BAND_2GHZ) ?
  1118. IL_PASSIVE_DWELL_BASE + IL_PASSIVE_DWELL_TIME_24 :
  1119. IL_PASSIVE_DWELL_BASE + IL_PASSIVE_DWELL_TIME_52;
  1120. if (il_is_any_associated(il)) {
  1121. /*
  1122. * If we're associated, we clamp the maximum passive
  1123. * dwell time to be 98% of the smallest beacon interval
  1124. * (minus 2 * channel tune time)
  1125. */
  1126. value = ctx->vif ? ctx->vif->bss_conf.beacon_int : 0;
  1127. if (value > IL_PASSIVE_DWELL_BASE || !value)
  1128. value = IL_PASSIVE_DWELL_BASE;
  1129. value = (value * 98) / 100 - IL_CHANNEL_TUNE_TIME * 2;
  1130. passive = min(value, passive);
  1131. }
  1132. return passive;
  1133. }
  1134. EXPORT_SYMBOL(il_get_passive_dwell_time);
  1135. void il_init_scan_params(struct il_priv *il)
  1136. {
  1137. u8 ant_idx = fls(il->hw_params.valid_tx_ant) - 1;
  1138. if (!il->scan_tx_ant[IEEE80211_BAND_5GHZ])
  1139. il->scan_tx_ant[IEEE80211_BAND_5GHZ] = ant_idx;
  1140. if (!il->scan_tx_ant[IEEE80211_BAND_2GHZ])
  1141. il->scan_tx_ant[IEEE80211_BAND_2GHZ] = ant_idx;
  1142. }
  1143. EXPORT_SYMBOL(il_init_scan_params);
  1144. static int il_scan_initiate(struct il_priv *il,
  1145. struct ieee80211_vif *vif)
  1146. {
  1147. int ret;
  1148. lockdep_assert_held(&il->mutex);
  1149. if (WARN_ON(!il->cfg->ops->utils->request_scan))
  1150. return -EOPNOTSUPP;
  1151. cancel_delayed_work(&il->scan_check);
  1152. if (!il_is_ready_rf(il)) {
  1153. IL_WARN("Request scan called when driver not ready.\n");
  1154. return -EIO;
  1155. }
  1156. if (test_bit(S_SCAN_HW, &il->status)) {
  1157. D_SCAN(
  1158. "Multiple concurrent scan requests in parallel.\n");
  1159. return -EBUSY;
  1160. }
  1161. if (test_bit(S_SCAN_ABORTING, &il->status)) {
  1162. D_SCAN("Scan request while abort pending.\n");
  1163. return -EBUSY;
  1164. }
  1165. D_SCAN("Starting scan...\n");
  1166. set_bit(S_SCANNING, &il->status);
  1167. il->scan_start = jiffies;
  1168. ret = il->cfg->ops->utils->request_scan(il, vif);
  1169. if (ret) {
  1170. clear_bit(S_SCANNING, &il->status);
  1171. return ret;
  1172. }
  1173. queue_delayed_work(il->workqueue, &il->scan_check,
  1174. IL_SCAN_CHECK_WATCHDOG);
  1175. return 0;
  1176. }
  1177. int il_mac_hw_scan(struct ieee80211_hw *hw,
  1178. struct ieee80211_vif *vif,
  1179. struct cfg80211_scan_request *req)
  1180. {
  1181. struct il_priv *il = hw->priv;
  1182. int ret;
  1183. D_MAC80211("enter\n");
  1184. if (req->n_channels == 0)
  1185. return -EINVAL;
  1186. mutex_lock(&il->mutex);
  1187. if (test_bit(S_SCANNING, &il->status)) {
  1188. D_SCAN("Scan already in progress.\n");
  1189. ret = -EAGAIN;
  1190. goto out_unlock;
  1191. }
  1192. /* mac80211 will only ask for one band at a time */
  1193. il->scan_request = req;
  1194. il->scan_vif = vif;
  1195. il->scan_band = req->channels[0]->band;
  1196. ret = il_scan_initiate(il, vif);
  1197. D_MAC80211("leave\n");
  1198. out_unlock:
  1199. mutex_unlock(&il->mutex);
  1200. return ret;
  1201. }
  1202. EXPORT_SYMBOL(il_mac_hw_scan);
  1203. static void il_bg_scan_check(struct work_struct *data)
  1204. {
  1205. struct il_priv *il =
  1206. container_of(data, struct il_priv, scan_check.work);
  1207. D_SCAN("Scan check work\n");
  1208. /* Since we are here firmware does not finish scan and
  1209. * most likely is in bad shape, so we don't bother to
  1210. * send abort command, just force scan complete to mac80211 */
  1211. mutex_lock(&il->mutex);
  1212. il_force_scan_end(il);
  1213. mutex_unlock(&il->mutex);
  1214. }
  1215. /**
  1216. * il_fill_probe_req - fill in all required fields and IE for probe request
  1217. */
  1218. u16
  1219. il_fill_probe_req(struct il_priv *il, struct ieee80211_mgmt *frame,
  1220. const u8 *ta, const u8 *ies, int ie_len, int left)
  1221. {
  1222. int len = 0;
  1223. u8 *pos = NULL;
  1224. /* Make sure there is enough space for the probe request,
  1225. * two mandatory IEs and the data */
  1226. left -= 24;
  1227. if (left < 0)
  1228. return 0;
  1229. frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
  1230. memcpy(frame->da, il_bcast_addr, ETH_ALEN);
  1231. memcpy(frame->sa, ta, ETH_ALEN);
  1232. memcpy(frame->bssid, il_bcast_addr, ETH_ALEN);
  1233. frame->seq_ctrl = 0;
  1234. len += 24;
  1235. /* ...next IE... */
  1236. pos = &frame->u.probe_req.variable[0];
  1237. /* fill in our indirect SSID IE */
  1238. left -= 2;
  1239. if (left < 0)
  1240. return 0;
  1241. *pos++ = WLAN_EID_SSID;
  1242. *pos++ = 0;
  1243. len += 2;
  1244. if (WARN_ON(left < ie_len))
  1245. return len;
  1246. if (ies && ie_len) {
  1247. memcpy(pos, ies, ie_len);
  1248. len += ie_len;
  1249. }
  1250. return (u16)len;
  1251. }
  1252. EXPORT_SYMBOL(il_fill_probe_req);
  1253. static void il_bg_abort_scan(struct work_struct *work)
  1254. {
  1255. struct il_priv *il = container_of(work, struct il_priv, abort_scan);
  1256. D_SCAN("Abort scan work\n");
  1257. /* We keep scan_check work queued in case when firmware will not
  1258. * report back scan completed notification */
  1259. mutex_lock(&il->mutex);
  1260. il_scan_cancel_timeout(il, 200);
  1261. mutex_unlock(&il->mutex);
  1262. }
  1263. static void il_bg_scan_completed(struct work_struct *work)
  1264. {
  1265. struct il_priv *il =
  1266. container_of(work, struct il_priv, scan_completed);
  1267. bool aborted;
  1268. D_SCAN("Completed scan.\n");
  1269. cancel_delayed_work(&il->scan_check);
  1270. mutex_lock(&il->mutex);
  1271. aborted = test_and_clear_bit(S_SCAN_ABORTING, &il->status);
  1272. if (aborted)
  1273. D_SCAN("Aborted scan completed.\n");
  1274. if (!test_and_clear_bit(S_SCANNING, &il->status)) {
  1275. D_SCAN("Scan already completed.\n");
  1276. goto out_settings;
  1277. }
  1278. il_complete_scan(il, aborted);
  1279. out_settings:
  1280. /* Can we still talk to firmware ? */
  1281. if (!il_is_ready_rf(il))
  1282. goto out;
  1283. /*
  1284. * We do not commit power settings while scan is pending,
  1285. * do it now if the settings changed.
  1286. */
  1287. il_power_set_mode(il, &il->power_data.sleep_cmd_next, false);
  1288. il_set_tx_power(il, il->tx_power_next, false);
  1289. il->cfg->ops->utils->post_scan(il);
  1290. out:
  1291. mutex_unlock(&il->mutex);
  1292. }
  1293. void il_setup_scan_deferred_work(struct il_priv *il)
  1294. {
  1295. INIT_WORK(&il->scan_completed, il_bg_scan_completed);
  1296. INIT_WORK(&il->abort_scan, il_bg_abort_scan);
  1297. INIT_DELAYED_WORK(&il->scan_check, il_bg_scan_check);
  1298. }
  1299. EXPORT_SYMBOL(il_setup_scan_deferred_work);
  1300. void il_cancel_scan_deferred_work(struct il_priv *il)
  1301. {
  1302. cancel_work_sync(&il->abort_scan);
  1303. cancel_work_sync(&il->scan_completed);
  1304. if (cancel_delayed_work_sync(&il->scan_check)) {
  1305. mutex_lock(&il->mutex);
  1306. il_force_scan_end(il);
  1307. mutex_unlock(&il->mutex);
  1308. }
  1309. }
  1310. EXPORT_SYMBOL(il_cancel_scan_deferred_work);
  1311. /* il->sta_lock must be held */
  1312. static void il_sta_ucode_activate(struct il_priv *il, u8 sta_id)
  1313. {
  1314. if (!(il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE))
  1315. IL_ERR(
  1316. "ACTIVATE a non DRIVER active station id %u addr %pM\n",
  1317. sta_id, il->stations[sta_id].sta.sta.addr);
  1318. if (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE) {
  1319. D_ASSOC(
  1320. "STA id %u addr %pM already present"
  1321. " in uCode (according to driver)\n",
  1322. sta_id, il->stations[sta_id].sta.sta.addr);
  1323. } else {
  1324. il->stations[sta_id].used |= IL_STA_UCODE_ACTIVE;
  1325. D_ASSOC("Added STA id %u addr %pM to uCode\n",
  1326. sta_id, il->stations[sta_id].sta.sta.addr);
  1327. }
  1328. }
  1329. static int il_process_add_sta_resp(struct il_priv *il,
  1330. struct il_addsta_cmd *addsta,
  1331. struct il_rx_pkt *pkt,
  1332. bool sync)
  1333. {
  1334. u8 sta_id = addsta->sta.sta_id;
  1335. unsigned long flags;
  1336. int ret = -EIO;
  1337. if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
  1338. IL_ERR("Bad return from C_ADD_STA (0x%08X)\n",
  1339. pkt->hdr.flags);
  1340. return ret;
  1341. }
  1342. D_INFO("Processing response for adding station %u\n",
  1343. sta_id);
  1344. spin_lock_irqsave(&il->sta_lock, flags);
  1345. switch (pkt->u.add_sta.status) {
  1346. case ADD_STA_SUCCESS_MSK:
  1347. D_INFO("C_ADD_STA PASSED\n");
  1348. il_sta_ucode_activate(il, sta_id);
  1349. ret = 0;
  1350. break;
  1351. case ADD_STA_NO_ROOM_IN_TBL:
  1352. IL_ERR("Adding station %d failed, no room in table.\n",
  1353. sta_id);
  1354. break;
  1355. case ADD_STA_NO_BLOCK_ACK_RESOURCE:
  1356. IL_ERR(
  1357. "Adding station %d failed, no block ack resource.\n",
  1358. sta_id);
  1359. break;
  1360. case ADD_STA_MODIFY_NON_EXIST_STA:
  1361. IL_ERR("Attempting to modify non-existing station %d\n",
  1362. sta_id);
  1363. break;
  1364. default:
  1365. D_ASSOC("Received C_ADD_STA:(0x%08X)\n",
  1366. pkt->u.add_sta.status);
  1367. break;
  1368. }
  1369. D_INFO("%s station id %u addr %pM\n",
  1370. il->stations[sta_id].sta.mode ==
  1371. STA_CONTROL_MODIFY_MSK ? "Modified" : "Added",
  1372. sta_id, il->stations[sta_id].sta.sta.addr);
  1373. /*
  1374. * XXX: The MAC address in the command buffer is often changed from
  1375. * the original sent to the device. That is, the MAC address
  1376. * written to the command buffer often is not the same MAC address
  1377. * read from the command buffer when the command returns. This
  1378. * issue has not yet been resolved and this debugging is left to
  1379. * observe the problem.
  1380. */
  1381. D_INFO("%s station according to cmd buffer %pM\n",
  1382. il->stations[sta_id].sta.mode ==
  1383. STA_CONTROL_MODIFY_MSK ? "Modified" : "Added",
  1384. addsta->sta.addr);
  1385. spin_unlock_irqrestore(&il->sta_lock, flags);
  1386. return ret;
  1387. }
  1388. static void il_add_sta_callback(struct il_priv *il,
  1389. struct il_device_cmd *cmd,
  1390. struct il_rx_pkt *pkt)
  1391. {
  1392. struct il_addsta_cmd *addsta =
  1393. (struct il_addsta_cmd *)cmd->cmd.payload;
  1394. il_process_add_sta_resp(il, addsta, pkt, false);
  1395. }
  1396. int il_send_add_sta(struct il_priv *il,
  1397. struct il_addsta_cmd *sta, u8 flags)
  1398. {
  1399. struct il_rx_pkt *pkt = NULL;
  1400. int ret = 0;
  1401. u8 data[sizeof(*sta)];
  1402. struct il_host_cmd cmd = {
  1403. .id = C_ADD_STA,
  1404. .flags = flags,
  1405. .data = data,
  1406. };
  1407. u8 sta_id __maybe_unused = sta->sta.sta_id;
  1408. D_INFO("Adding sta %u (%pM) %ssynchronously\n",
  1409. sta_id, sta->sta.addr, flags & CMD_ASYNC ? "a" : "");
  1410. if (flags & CMD_ASYNC)
  1411. cmd.callback = il_add_sta_callback;
  1412. else {
  1413. cmd.flags |= CMD_WANT_SKB;
  1414. might_sleep();
  1415. }
  1416. cmd.len = il->cfg->ops->utils->build_addsta_hcmd(sta, data);
  1417. ret = il_send_cmd(il, &cmd);
  1418. if (ret || (flags & CMD_ASYNC))
  1419. return ret;
  1420. if (ret == 0) {
  1421. pkt = (struct il_rx_pkt *)cmd.reply_page;
  1422. ret = il_process_add_sta_resp(il, sta, pkt, true);
  1423. }
  1424. il_free_pages(il, cmd.reply_page);
  1425. return ret;
  1426. }
  1427. EXPORT_SYMBOL(il_send_add_sta);
  1428. static void il_set_ht_add_station(struct il_priv *il, u8 idx,
  1429. struct ieee80211_sta *sta,
  1430. struct il_rxon_context *ctx)
  1431. {
  1432. struct ieee80211_sta_ht_cap *sta_ht_inf = &sta->ht_cap;
  1433. __le32 sta_flags;
  1434. u8 mimo_ps_mode;
  1435. if (!sta || !sta_ht_inf->ht_supported)
  1436. goto done;
  1437. mimo_ps_mode = (sta_ht_inf->cap & IEEE80211_HT_CAP_SM_PS) >> 2;
  1438. D_ASSOC("spatial multiplexing power save mode: %s\n",
  1439. (mimo_ps_mode == WLAN_HT_CAP_SM_PS_STATIC) ?
  1440. "static" :
  1441. (mimo_ps_mode == WLAN_HT_CAP_SM_PS_DYNAMIC) ?
  1442. "dynamic" : "disabled");
  1443. sta_flags = il->stations[idx].sta.station_flags;
  1444. sta_flags &= ~(STA_FLG_RTS_MIMO_PROT_MSK | STA_FLG_MIMO_DIS_MSK);
  1445. switch (mimo_ps_mode) {
  1446. case WLAN_HT_CAP_SM_PS_STATIC:
  1447. sta_flags |= STA_FLG_MIMO_DIS_MSK;
  1448. break;
  1449. case WLAN_HT_CAP_SM_PS_DYNAMIC:
  1450. sta_flags |= STA_FLG_RTS_MIMO_PROT_MSK;
  1451. break;
  1452. case WLAN_HT_CAP_SM_PS_DISABLED:
  1453. break;
  1454. default:
  1455. IL_WARN("Invalid MIMO PS mode %d\n", mimo_ps_mode);
  1456. break;
  1457. }
  1458. sta_flags |= cpu_to_le32(
  1459. (u32)sta_ht_inf->ampdu_factor << STA_FLG_MAX_AGG_SIZE_POS);
  1460. sta_flags |= cpu_to_le32(
  1461. (u32)sta_ht_inf->ampdu_density << STA_FLG_AGG_MPDU_DENSITY_POS);
  1462. if (il_is_ht40_tx_allowed(il, ctx, &sta->ht_cap))
  1463. sta_flags |= STA_FLG_HT40_EN_MSK;
  1464. else
  1465. sta_flags &= ~STA_FLG_HT40_EN_MSK;
  1466. il->stations[idx].sta.station_flags = sta_flags;
  1467. done:
  1468. return;
  1469. }
  1470. /**
  1471. * il_prep_station - Prepare station information for addition
  1472. *
  1473. * should be called with sta_lock held
  1474. */
  1475. u8 il_prep_station(struct il_priv *il, struct il_rxon_context *ctx,
  1476. const u8 *addr, bool is_ap, struct ieee80211_sta *sta)
  1477. {
  1478. struct il_station_entry *station;
  1479. int i;
  1480. u8 sta_id = IL_INVALID_STATION;
  1481. u16 rate;
  1482. if (is_ap)
  1483. sta_id = ctx->ap_sta_id;
  1484. else if (is_broadcast_ether_addr(addr))
  1485. sta_id = ctx->bcast_sta_id;
  1486. else
  1487. for (i = IL_STA_ID; i < il->hw_params.max_stations; i++) {
  1488. if (!compare_ether_addr(il->stations[i].sta.sta.addr,
  1489. addr)) {
  1490. sta_id = i;
  1491. break;
  1492. }
  1493. if (!il->stations[i].used &&
  1494. sta_id == IL_INVALID_STATION)
  1495. sta_id = i;
  1496. }
  1497. /*
  1498. * These two conditions have the same outcome, but keep them
  1499. * separate
  1500. */
  1501. if (unlikely(sta_id == IL_INVALID_STATION))
  1502. return sta_id;
  1503. /*
  1504. * uCode is not able to deal with multiple requests to add a
  1505. * station. Keep track if one is in progress so that we do not send
  1506. * another.
  1507. */
  1508. if (il->stations[sta_id].used & IL_STA_UCODE_INPROGRESS) {
  1509. D_INFO(
  1510. "STA %d already in process of being added.\n",
  1511. sta_id);
  1512. return sta_id;
  1513. }
  1514. if ((il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE) &&
  1515. (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE) &&
  1516. !compare_ether_addr(il->stations[sta_id].sta.sta.addr, addr)) {
  1517. D_ASSOC(
  1518. "STA %d (%pM) already added, not adding again.\n",
  1519. sta_id, addr);
  1520. return sta_id;
  1521. }
  1522. station = &il->stations[sta_id];
  1523. station->used = IL_STA_DRIVER_ACTIVE;
  1524. D_ASSOC("Add STA to driver ID %d: %pM\n",
  1525. sta_id, addr);
  1526. il->num_stations++;
  1527. /* Set up the C_ADD_STA command to send to device */
  1528. memset(&station->sta, 0, sizeof(struct il_addsta_cmd));
  1529. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  1530. station->sta.mode = 0;
  1531. station->sta.sta.sta_id = sta_id;
  1532. station->sta.station_flags = ctx->station_flags;
  1533. station->ctxid = ctx->ctxid;
  1534. if (sta) {
  1535. struct il_station_priv_common *sta_priv;
  1536. sta_priv = (void *)sta->drv_priv;
  1537. sta_priv->ctx = ctx;
  1538. }
  1539. /*
  1540. * OK to call unconditionally, since local stations (IBSS BSSID
  1541. * STA and broadcast STA) pass in a NULL sta, and mac80211
  1542. * doesn't allow HT IBSS.
  1543. */
  1544. il_set_ht_add_station(il, sta_id, sta, ctx);
  1545. /* 3945 only */
  1546. rate = (il->band == IEEE80211_BAND_5GHZ) ?
  1547. RATE_6M_PLCP : RATE_1M_PLCP;
  1548. /* Turn on both antennas for the station... */
  1549. station->sta.rate_n_flags = cpu_to_le16(rate | RATE_MCS_ANT_AB_MSK);
  1550. return sta_id;
  1551. }
  1552. EXPORT_SYMBOL_GPL(il_prep_station);
  1553. #define STA_WAIT_TIMEOUT (HZ/2)
  1554. /**
  1555. * il_add_station_common -
  1556. */
  1557. int
  1558. il_add_station_common(struct il_priv *il,
  1559. struct il_rxon_context *ctx,
  1560. const u8 *addr, bool is_ap,
  1561. struct ieee80211_sta *sta, u8 *sta_id_r)
  1562. {
  1563. unsigned long flags_spin;
  1564. int ret = 0;
  1565. u8 sta_id;
  1566. struct il_addsta_cmd sta_cmd;
  1567. *sta_id_r = 0;
  1568. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1569. sta_id = il_prep_station(il, ctx, addr, is_ap, sta);
  1570. if (sta_id == IL_INVALID_STATION) {
  1571. IL_ERR("Unable to prepare station %pM for addition\n",
  1572. addr);
  1573. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1574. return -EINVAL;
  1575. }
  1576. /*
  1577. * uCode is not able to deal with multiple requests to add a
  1578. * station. Keep track if one is in progress so that we do not send
  1579. * another.
  1580. */
  1581. if (il->stations[sta_id].used & IL_STA_UCODE_INPROGRESS) {
  1582. D_INFO(
  1583. "STA %d already in process of being added.\n",
  1584. sta_id);
  1585. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1586. return -EEXIST;
  1587. }
  1588. if ((il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE) &&
  1589. (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE)) {
  1590. D_ASSOC(
  1591. "STA %d (%pM) already added, not adding again.\n",
  1592. sta_id, addr);
  1593. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1594. return -EEXIST;
  1595. }
  1596. il->stations[sta_id].used |= IL_STA_UCODE_INPROGRESS;
  1597. memcpy(&sta_cmd, &il->stations[sta_id].sta,
  1598. sizeof(struct il_addsta_cmd));
  1599. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1600. /* Add station to device's station table */
  1601. ret = il_send_add_sta(il, &sta_cmd, CMD_SYNC);
  1602. if (ret) {
  1603. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1604. IL_ERR("Adding station %pM failed.\n",
  1605. il->stations[sta_id].sta.sta.addr);
  1606. il->stations[sta_id].used &= ~IL_STA_DRIVER_ACTIVE;
  1607. il->stations[sta_id].used &= ~IL_STA_UCODE_INPROGRESS;
  1608. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1609. }
  1610. *sta_id_r = sta_id;
  1611. return ret;
  1612. }
  1613. EXPORT_SYMBOL(il_add_station_common);
  1614. /**
  1615. * il_sta_ucode_deactivate - deactivate ucode status for a station
  1616. *
  1617. * il->sta_lock must be held
  1618. */
  1619. static void il_sta_ucode_deactivate(struct il_priv *il, u8 sta_id)
  1620. {
  1621. /* Ucode must be active and driver must be non active */
  1622. if ((il->stations[sta_id].used &
  1623. (IL_STA_UCODE_ACTIVE | IL_STA_DRIVER_ACTIVE)) !=
  1624. IL_STA_UCODE_ACTIVE)
  1625. IL_ERR("removed non active STA %u\n", sta_id);
  1626. il->stations[sta_id].used &= ~IL_STA_UCODE_ACTIVE;
  1627. memset(&il->stations[sta_id], 0, sizeof(struct il_station_entry));
  1628. D_ASSOC("Removed STA %u\n", sta_id);
  1629. }
  1630. static int il_send_remove_station(struct il_priv *il,
  1631. const u8 *addr, int sta_id,
  1632. bool temporary)
  1633. {
  1634. struct il_rx_pkt *pkt;
  1635. int ret;
  1636. unsigned long flags_spin;
  1637. struct il_rem_sta_cmd rm_sta_cmd;
  1638. struct il_host_cmd cmd = {
  1639. .id = C_REM_STA,
  1640. .len = sizeof(struct il_rem_sta_cmd),
  1641. .flags = CMD_SYNC,
  1642. .data = &rm_sta_cmd,
  1643. };
  1644. memset(&rm_sta_cmd, 0, sizeof(rm_sta_cmd));
  1645. rm_sta_cmd.num_sta = 1;
  1646. memcpy(&rm_sta_cmd.addr, addr, ETH_ALEN);
  1647. cmd.flags |= CMD_WANT_SKB;
  1648. ret = il_send_cmd(il, &cmd);
  1649. if (ret)
  1650. return ret;
  1651. pkt = (struct il_rx_pkt *)cmd.reply_page;
  1652. if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
  1653. IL_ERR("Bad return from C_REM_STA (0x%08X)\n",
  1654. pkt->hdr.flags);
  1655. ret = -EIO;
  1656. }
  1657. if (!ret) {
  1658. switch (pkt->u.rem_sta.status) {
  1659. case REM_STA_SUCCESS_MSK:
  1660. if (!temporary) {
  1661. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1662. il_sta_ucode_deactivate(il, sta_id);
  1663. spin_unlock_irqrestore(&il->sta_lock,
  1664. flags_spin);
  1665. }
  1666. D_ASSOC("C_REM_STA PASSED\n");
  1667. break;
  1668. default:
  1669. ret = -EIO;
  1670. IL_ERR("C_REM_STA failed\n");
  1671. break;
  1672. }
  1673. }
  1674. il_free_pages(il, cmd.reply_page);
  1675. return ret;
  1676. }
  1677. /**
  1678. * il_remove_station - Remove driver's knowledge of station.
  1679. */
  1680. int il_remove_station(struct il_priv *il, const u8 sta_id,
  1681. const u8 *addr)
  1682. {
  1683. unsigned long flags;
  1684. if (!il_is_ready(il)) {
  1685. D_INFO(
  1686. "Unable to remove station %pM, device not ready.\n",
  1687. addr);
  1688. /*
  1689. * It is typical for stations to be removed when we are
  1690. * going down. Return success since device will be down
  1691. * soon anyway
  1692. */
  1693. return 0;
  1694. }
  1695. D_ASSOC("Removing STA from driver:%d %pM\n",
  1696. sta_id, addr);
  1697. if (WARN_ON(sta_id == IL_INVALID_STATION))
  1698. return -EINVAL;
  1699. spin_lock_irqsave(&il->sta_lock, flags);
  1700. if (!(il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE)) {
  1701. D_INFO("Removing %pM but non DRIVER active\n",
  1702. addr);
  1703. goto out_err;
  1704. }
  1705. if (!(il->stations[sta_id].used & IL_STA_UCODE_ACTIVE)) {
  1706. D_INFO("Removing %pM but non UCODE active\n",
  1707. addr);
  1708. goto out_err;
  1709. }
  1710. if (il->stations[sta_id].used & IL_STA_LOCAL) {
  1711. kfree(il->stations[sta_id].lq);
  1712. il->stations[sta_id].lq = NULL;
  1713. }
  1714. il->stations[sta_id].used &= ~IL_STA_DRIVER_ACTIVE;
  1715. il->num_stations--;
  1716. BUG_ON(il->num_stations < 0);
  1717. spin_unlock_irqrestore(&il->sta_lock, flags);
  1718. return il_send_remove_station(il, addr, sta_id, false);
  1719. out_err:
  1720. spin_unlock_irqrestore(&il->sta_lock, flags);
  1721. return -EINVAL;
  1722. }
  1723. EXPORT_SYMBOL_GPL(il_remove_station);
  1724. /**
  1725. * il_clear_ucode_stations - clear ucode station table bits
  1726. *
  1727. * This function clears all the bits in the driver indicating
  1728. * which stations are active in the ucode. Call when something
  1729. * other than explicit station management would cause this in
  1730. * the ucode, e.g. unassociated RXON.
  1731. */
  1732. void il_clear_ucode_stations(struct il_priv *il,
  1733. struct il_rxon_context *ctx)
  1734. {
  1735. int i;
  1736. unsigned long flags_spin;
  1737. bool cleared = false;
  1738. D_INFO("Clearing ucode stations in driver\n");
  1739. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1740. for (i = 0; i < il->hw_params.max_stations; i++) {
  1741. if (ctx && ctx->ctxid != il->stations[i].ctxid)
  1742. continue;
  1743. if (il->stations[i].used & IL_STA_UCODE_ACTIVE) {
  1744. D_INFO(
  1745. "Clearing ucode active for station %d\n", i);
  1746. il->stations[i].used &= ~IL_STA_UCODE_ACTIVE;
  1747. cleared = true;
  1748. }
  1749. }
  1750. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1751. if (!cleared)
  1752. D_INFO(
  1753. "No active stations found to be cleared\n");
  1754. }
  1755. EXPORT_SYMBOL(il_clear_ucode_stations);
  1756. /**
  1757. * il_restore_stations() - Restore driver known stations to device
  1758. *
  1759. * All stations considered active by driver, but not present in ucode, is
  1760. * restored.
  1761. *
  1762. * Function sleeps.
  1763. */
  1764. void
  1765. il_restore_stations(struct il_priv *il, struct il_rxon_context *ctx)
  1766. {
  1767. struct il_addsta_cmd sta_cmd;
  1768. struct il_link_quality_cmd lq;
  1769. unsigned long flags_spin;
  1770. int i;
  1771. bool found = false;
  1772. int ret;
  1773. bool send_lq;
  1774. if (!il_is_ready(il)) {
  1775. D_INFO(
  1776. "Not ready yet, not restoring any stations.\n");
  1777. return;
  1778. }
  1779. D_ASSOC("Restoring all known stations ... start.\n");
  1780. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1781. for (i = 0; i < il->hw_params.max_stations; i++) {
  1782. if (ctx->ctxid != il->stations[i].ctxid)
  1783. continue;
  1784. if ((il->stations[i].used & IL_STA_DRIVER_ACTIVE) &&
  1785. !(il->stations[i].used & IL_STA_UCODE_ACTIVE)) {
  1786. D_ASSOC("Restoring sta %pM\n",
  1787. il->stations[i].sta.sta.addr);
  1788. il->stations[i].sta.mode = 0;
  1789. il->stations[i].used |= IL_STA_UCODE_INPROGRESS;
  1790. found = true;
  1791. }
  1792. }
  1793. for (i = 0; i < il->hw_params.max_stations; i++) {
  1794. if ((il->stations[i].used & IL_STA_UCODE_INPROGRESS)) {
  1795. memcpy(&sta_cmd, &il->stations[i].sta,
  1796. sizeof(struct il_addsta_cmd));
  1797. send_lq = false;
  1798. if (il->stations[i].lq) {
  1799. memcpy(&lq, il->stations[i].lq,
  1800. sizeof(struct il_link_quality_cmd));
  1801. send_lq = true;
  1802. }
  1803. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1804. ret = il_send_add_sta(il, &sta_cmd, CMD_SYNC);
  1805. if (ret) {
  1806. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1807. IL_ERR("Adding station %pM failed.\n",
  1808. il->stations[i].sta.sta.addr);
  1809. il->stations[i].used &=
  1810. ~IL_STA_DRIVER_ACTIVE;
  1811. il->stations[i].used &=
  1812. ~IL_STA_UCODE_INPROGRESS;
  1813. spin_unlock_irqrestore(&il->sta_lock,
  1814. flags_spin);
  1815. }
  1816. /*
  1817. * Rate scaling has already been initialized, send
  1818. * current LQ command
  1819. */
  1820. if (send_lq)
  1821. il_send_lq_cmd(il, ctx, &lq,
  1822. CMD_SYNC, true);
  1823. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1824. il->stations[i].used &= ~IL_STA_UCODE_INPROGRESS;
  1825. }
  1826. }
  1827. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1828. if (!found)
  1829. D_INFO("Restoring all known stations"
  1830. " .... no stations to be restored.\n");
  1831. else
  1832. D_INFO("Restoring all known stations"
  1833. " .... complete.\n");
  1834. }
  1835. EXPORT_SYMBOL(il_restore_stations);
  1836. int il_get_free_ucode_key_idx(struct il_priv *il)
  1837. {
  1838. int i;
  1839. for (i = 0; i < il->sta_key_max_num; i++)
  1840. if (!test_and_set_bit(i, &il->ucode_key_table))
  1841. return i;
  1842. return WEP_INVALID_OFFSET;
  1843. }
  1844. EXPORT_SYMBOL(il_get_free_ucode_key_idx);
  1845. void il_dealloc_bcast_stations(struct il_priv *il)
  1846. {
  1847. unsigned long flags;
  1848. int i;
  1849. spin_lock_irqsave(&il->sta_lock, flags);
  1850. for (i = 0; i < il->hw_params.max_stations; i++) {
  1851. if (!(il->stations[i].used & IL_STA_BCAST))
  1852. continue;
  1853. il->stations[i].used &= ~IL_STA_UCODE_ACTIVE;
  1854. il->num_stations--;
  1855. BUG_ON(il->num_stations < 0);
  1856. kfree(il->stations[i].lq);
  1857. il->stations[i].lq = NULL;
  1858. }
  1859. spin_unlock_irqrestore(&il->sta_lock, flags);
  1860. }
  1861. EXPORT_SYMBOL_GPL(il_dealloc_bcast_stations);
  1862. #ifdef CONFIG_IWLEGACY_DEBUG
  1863. static void il_dump_lq_cmd(struct il_priv *il,
  1864. struct il_link_quality_cmd *lq)
  1865. {
  1866. int i;
  1867. D_RATE("lq station id 0x%x\n", lq->sta_id);
  1868. D_RATE("lq ant 0x%X 0x%X\n",
  1869. lq->general_params.single_stream_ant_msk,
  1870. lq->general_params.dual_stream_ant_msk);
  1871. for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++)
  1872. D_RATE("lq idx %d 0x%X\n",
  1873. i, lq->rs_table[i].rate_n_flags);
  1874. }
  1875. #else
  1876. static inline void il_dump_lq_cmd(struct il_priv *il,
  1877. struct il_link_quality_cmd *lq)
  1878. {
  1879. }
  1880. #endif
  1881. /**
  1882. * il_is_lq_table_valid() - Test one aspect of LQ cmd for validity
  1883. *
  1884. * It sometimes happens when a HT rate has been in use and we
  1885. * loose connectivity with AP then mac80211 will first tell us that the
  1886. * current channel is not HT anymore before removing the station. In such a
  1887. * scenario the RXON flags will be updated to indicate we are not
  1888. * communicating HT anymore, but the LQ command may still contain HT rates.
  1889. * Test for this to prevent driver from sending LQ command between the time
  1890. * RXON flags are updated and when LQ command is updated.
  1891. */
  1892. static bool il_is_lq_table_valid(struct il_priv *il,
  1893. struct il_rxon_context *ctx,
  1894. struct il_link_quality_cmd *lq)
  1895. {
  1896. int i;
  1897. if (ctx->ht.enabled)
  1898. return true;
  1899. D_INFO("Channel %u is not an HT channel\n",
  1900. ctx->active.channel);
  1901. for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++) {
  1902. if (le32_to_cpu(lq->rs_table[i].rate_n_flags) &
  1903. RATE_MCS_HT_MSK) {
  1904. D_INFO(
  1905. "idx %d of LQ expects HT channel\n",
  1906. i);
  1907. return false;
  1908. }
  1909. }
  1910. return true;
  1911. }
  1912. /**
  1913. * il_send_lq_cmd() - Send link quality command
  1914. * @init: This command is sent as part of station initialization right
  1915. * after station has been added.
  1916. *
  1917. * The link quality command is sent as the last step of station creation.
  1918. * This is the special case in which init is set and we call a callback in
  1919. * this case to clear the state indicating that station creation is in
  1920. * progress.
  1921. */
  1922. int il_send_lq_cmd(struct il_priv *il, struct il_rxon_context *ctx,
  1923. struct il_link_quality_cmd *lq, u8 flags, bool init)
  1924. {
  1925. int ret = 0;
  1926. unsigned long flags_spin;
  1927. struct il_host_cmd cmd = {
  1928. .id = C_TX_LINK_QUALITY_CMD,
  1929. .len = sizeof(struct il_link_quality_cmd),
  1930. .flags = flags,
  1931. .data = lq,
  1932. };
  1933. if (WARN_ON(lq->sta_id == IL_INVALID_STATION))
  1934. return -EINVAL;
  1935. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1936. if (!(il->stations[lq->sta_id].used & IL_STA_DRIVER_ACTIVE)) {
  1937. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1938. return -EINVAL;
  1939. }
  1940. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1941. il_dump_lq_cmd(il, lq);
  1942. BUG_ON(init && (cmd.flags & CMD_ASYNC));
  1943. if (il_is_lq_table_valid(il, ctx, lq))
  1944. ret = il_send_cmd(il, &cmd);
  1945. else
  1946. ret = -EINVAL;
  1947. if (cmd.flags & CMD_ASYNC)
  1948. return ret;
  1949. if (init) {
  1950. D_INFO("init LQ command complete,"
  1951. " clearing sta addition status for sta %d\n",
  1952. lq->sta_id);
  1953. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1954. il->stations[lq->sta_id].used &= ~IL_STA_UCODE_INPROGRESS;
  1955. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1956. }
  1957. return ret;
  1958. }
  1959. EXPORT_SYMBOL(il_send_lq_cmd);
  1960. int il_mac_sta_remove(struct ieee80211_hw *hw,
  1961. struct ieee80211_vif *vif,
  1962. struct ieee80211_sta *sta)
  1963. {
  1964. struct il_priv *il = hw->priv;
  1965. struct il_station_priv_common *sta_common = (void *)sta->drv_priv;
  1966. int ret;
  1967. D_INFO("received request to remove station %pM\n",
  1968. sta->addr);
  1969. mutex_lock(&il->mutex);
  1970. D_INFO("proceeding to remove station %pM\n",
  1971. sta->addr);
  1972. ret = il_remove_station(il, sta_common->sta_id, sta->addr);
  1973. if (ret)
  1974. IL_ERR("Error removing station %pM\n",
  1975. sta->addr);
  1976. mutex_unlock(&il->mutex);
  1977. return ret;
  1978. }
  1979. EXPORT_SYMBOL(il_mac_sta_remove);
  1980. /************************** RX-FUNCTIONS ****************************/
  1981. /*
  1982. * Rx theory of operation
  1983. *
  1984. * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
  1985. * each of which point to Receive Buffers to be filled by the NIC. These get
  1986. * used not only for Rx frames, but for any command response or notification
  1987. * from the NIC. The driver and NIC manage the Rx buffers by means
  1988. * of idxes into the circular buffer.
  1989. *
  1990. * Rx Queue Indexes
  1991. * The host/firmware share two idx registers for managing the Rx buffers.
  1992. *
  1993. * The READ idx maps to the first position that the firmware may be writing
  1994. * to -- the driver can read up to (but not including) this position and get
  1995. * good data.
  1996. * The READ idx is managed by the firmware once the card is enabled.
  1997. *
  1998. * The WRITE idx maps to the last position the driver has read from -- the
  1999. * position preceding WRITE is the last slot the firmware can place a packet.
  2000. *
  2001. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  2002. * WRITE = READ.
  2003. *
  2004. * During initialization, the host sets up the READ queue position to the first
  2005. * IDX position, and WRITE to the last (READ - 1 wrapped)
  2006. *
  2007. * When the firmware places a packet in a buffer, it will advance the READ idx
  2008. * and fire the RX interrupt. The driver can then query the READ idx and
  2009. * process as many packets as possible, moving the WRITE idx forward as it
  2010. * resets the Rx queue buffers with new memory.
  2011. *
  2012. * The management in the driver is as follows:
  2013. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  2014. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  2015. * to replenish the iwl->rxq->rx_free.
  2016. * + In il_rx_replenish (scheduled) if 'processed' != 'read' then the
  2017. * iwl->rxq is replenished and the READ IDX is updated (updating the
  2018. * 'processed' and 'read' driver idxes as well)
  2019. * + A received packet is processed and handed to the kernel network stack,
  2020. * detached from the iwl->rxq. The driver 'processed' idx is updated.
  2021. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  2022. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  2023. * IDX is not incremented and iwl->status(RX_STALLED) is set. If there
  2024. * were enough free buffers and RX_STALLED is set it is cleared.
  2025. *
  2026. *
  2027. * Driver sequence:
  2028. *
  2029. * il_rx_queue_alloc() Allocates rx_free
  2030. * il_rx_replenish() Replenishes rx_free list from rx_used, and calls
  2031. * il_rx_queue_restock
  2032. * il_rx_queue_restock() Moves available buffers from rx_free into Rx
  2033. * queue, updates firmware pointers, and updates
  2034. * the WRITE idx. If insufficient rx_free buffers
  2035. * are available, schedules il_rx_replenish
  2036. *
  2037. * -- enable interrupts --
  2038. * ISR - il_rx() Detach il_rx_bufs from pool up to the
  2039. * READ IDX, detaching the SKB from the pool.
  2040. * Moves the packet buffer from queue to rx_used.
  2041. * Calls il_rx_queue_restock to refill any empty
  2042. * slots.
  2043. * ...
  2044. *
  2045. */
  2046. /**
  2047. * il_rx_queue_space - Return number of free slots available in queue.
  2048. */
  2049. int il_rx_queue_space(const struct il_rx_queue *q)
  2050. {
  2051. int s = q->read - q->write;
  2052. if (s <= 0)
  2053. s += RX_QUEUE_SIZE;
  2054. /* keep some buffer to not confuse full and empty queue */
  2055. s -= 2;
  2056. if (s < 0)
  2057. s = 0;
  2058. return s;
  2059. }
  2060. EXPORT_SYMBOL(il_rx_queue_space);
  2061. /**
  2062. * il_rx_queue_update_write_ptr - Update the write pointer for the RX queue
  2063. */
  2064. void
  2065. il_rx_queue_update_write_ptr(struct il_priv *il,
  2066. struct il_rx_queue *q)
  2067. {
  2068. unsigned long flags;
  2069. u32 rx_wrt_ptr_reg = il->hw_params.rx_wrt_ptr_reg;
  2070. u32 reg;
  2071. spin_lock_irqsave(&q->lock, flags);
  2072. if (q->need_update == 0)
  2073. goto exit_unlock;
  2074. /* If power-saving is in use, make sure device is awake */
  2075. if (test_bit(S_POWER_PMI, &il->status)) {
  2076. reg = _il_rd(il, CSR_UCODE_DRV_GP1);
  2077. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  2078. D_INFO(
  2079. "Rx queue requesting wakeup,"
  2080. " GP1 = 0x%x\n", reg);
  2081. il_set_bit(il, CSR_GP_CNTRL,
  2082. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  2083. goto exit_unlock;
  2084. }
  2085. q->write_actual = (q->write & ~0x7);
  2086. il_wr(il, rx_wrt_ptr_reg,
  2087. q->write_actual);
  2088. /* Else device is assumed to be awake */
  2089. } else {
  2090. /* Device expects a multiple of 8 */
  2091. q->write_actual = (q->write & ~0x7);
  2092. il_wr(il, rx_wrt_ptr_reg,
  2093. q->write_actual);
  2094. }
  2095. q->need_update = 0;
  2096. exit_unlock:
  2097. spin_unlock_irqrestore(&q->lock, flags);
  2098. }
  2099. EXPORT_SYMBOL(il_rx_queue_update_write_ptr);
  2100. int il_rx_queue_alloc(struct il_priv *il)
  2101. {
  2102. struct il_rx_queue *rxq = &il->rxq;
  2103. struct device *dev = &il->pci_dev->dev;
  2104. int i;
  2105. spin_lock_init(&rxq->lock);
  2106. INIT_LIST_HEAD(&rxq->rx_free);
  2107. INIT_LIST_HEAD(&rxq->rx_used);
  2108. /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
  2109. rxq->bd = dma_alloc_coherent(dev, 4 * RX_QUEUE_SIZE, &rxq->bd_dma,
  2110. GFP_KERNEL);
  2111. if (!rxq->bd)
  2112. goto err_bd;
  2113. rxq->rb_stts = dma_alloc_coherent(dev, sizeof(struct il_rb_status),
  2114. &rxq->rb_stts_dma, GFP_KERNEL);
  2115. if (!rxq->rb_stts)
  2116. goto err_rb;
  2117. /* Fill the rx_used queue with _all_ of the Rx buffers */
  2118. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
  2119. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  2120. /* Set us so that we have processed and used all buffers, but have
  2121. * not restocked the Rx queue with fresh buffers */
  2122. rxq->read = rxq->write = 0;
  2123. rxq->write_actual = 0;
  2124. rxq->free_count = 0;
  2125. rxq->need_update = 0;
  2126. return 0;
  2127. err_rb:
  2128. dma_free_coherent(&il->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  2129. rxq->bd_dma);
  2130. err_bd:
  2131. return -ENOMEM;
  2132. }
  2133. EXPORT_SYMBOL(il_rx_queue_alloc);
  2134. void il_hdl_spectrum_measurement(struct il_priv *il,
  2135. struct il_rx_buf *rxb)
  2136. {
  2137. struct il_rx_pkt *pkt = rxb_addr(rxb);
  2138. struct il_spectrum_notification *report = &(pkt->u.spectrum_notif);
  2139. if (!report->state) {
  2140. D_11H(
  2141. "Spectrum Measure Notification: Start\n");
  2142. return;
  2143. }
  2144. memcpy(&il->measure_report, report, sizeof(*report));
  2145. il->measurement_status |= MEASUREMENT_READY;
  2146. }
  2147. EXPORT_SYMBOL(il_hdl_spectrum_measurement);
  2148. /*
  2149. * returns non-zero if packet should be dropped
  2150. */
  2151. int il_set_decrypted_flag(struct il_priv *il,
  2152. struct ieee80211_hdr *hdr,
  2153. u32 decrypt_res,
  2154. struct ieee80211_rx_status *stats)
  2155. {
  2156. u16 fc = le16_to_cpu(hdr->frame_control);
  2157. /*
  2158. * All contexts have the same setting here due to it being
  2159. * a module parameter, so OK to check any context.
  2160. */
  2161. if (il->ctx.active.filter_flags &
  2162. RXON_FILTER_DIS_DECRYPT_MSK)
  2163. return 0;
  2164. if (!(fc & IEEE80211_FCTL_PROTECTED))
  2165. return 0;
  2166. D_RX("decrypt_res:0x%x\n", decrypt_res);
  2167. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  2168. case RX_RES_STATUS_SEC_TYPE_TKIP:
  2169. /* The uCode has got a bad phase 1 Key, pushes the packet.
  2170. * Decryption will be done in SW. */
  2171. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2172. RX_RES_STATUS_BAD_KEY_TTAK)
  2173. break;
  2174. case RX_RES_STATUS_SEC_TYPE_WEP:
  2175. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2176. RX_RES_STATUS_BAD_ICV_MIC) {
  2177. /* bad ICV, the packet is destroyed since the
  2178. * decryption is inplace, drop it */
  2179. D_RX("Packet destroyed\n");
  2180. return -1;
  2181. }
  2182. case RX_RES_STATUS_SEC_TYPE_CCMP:
  2183. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2184. RX_RES_STATUS_DECRYPT_OK) {
  2185. D_RX("hw decrypt successfully!!!\n");
  2186. stats->flag |= RX_FLAG_DECRYPTED;
  2187. }
  2188. break;
  2189. default:
  2190. break;
  2191. }
  2192. return 0;
  2193. }
  2194. EXPORT_SYMBOL(il_set_decrypted_flag);
  2195. /**
  2196. * il_txq_update_write_ptr - Send new write idx to hardware
  2197. */
  2198. void
  2199. il_txq_update_write_ptr(struct il_priv *il, struct il_tx_queue *txq)
  2200. {
  2201. u32 reg = 0;
  2202. int txq_id = txq->q.id;
  2203. if (txq->need_update == 0)
  2204. return;
  2205. /* if we're trying to save power */
  2206. if (test_bit(S_POWER_PMI, &il->status)) {
  2207. /* wake up nic if it's powered down ...
  2208. * uCode will wake up, and interrupt us again, so next
  2209. * time we'll skip this part. */
  2210. reg = _il_rd(il, CSR_UCODE_DRV_GP1);
  2211. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  2212. D_INFO(
  2213. "Tx queue %d requesting wakeup,"
  2214. " GP1 = 0x%x\n", txq_id, reg);
  2215. il_set_bit(il, CSR_GP_CNTRL,
  2216. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  2217. return;
  2218. }
  2219. il_wr(il, HBUS_TARG_WRPTR,
  2220. txq->q.write_ptr | (txq_id << 8));
  2221. /*
  2222. * else not in power-save mode,
  2223. * uCode will never sleep when we're
  2224. * trying to tx (during RFKILL, we're not trying to tx).
  2225. */
  2226. } else
  2227. _il_wr(il, HBUS_TARG_WRPTR,
  2228. txq->q.write_ptr | (txq_id << 8));
  2229. txq->need_update = 0;
  2230. }
  2231. EXPORT_SYMBOL(il_txq_update_write_ptr);
  2232. /**
  2233. * il_tx_queue_unmap - Unmap any remaining DMA mappings and free skb's
  2234. */
  2235. void il_tx_queue_unmap(struct il_priv *il, int txq_id)
  2236. {
  2237. struct il_tx_queue *txq = &il->txq[txq_id];
  2238. struct il_queue *q = &txq->q;
  2239. if (q->n_bd == 0)
  2240. return;
  2241. while (q->write_ptr != q->read_ptr) {
  2242. il->cfg->ops->lib->txq_free_tfd(il, txq);
  2243. q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd);
  2244. }
  2245. }
  2246. EXPORT_SYMBOL(il_tx_queue_unmap);
  2247. /**
  2248. * il_tx_queue_free - Deallocate DMA queue.
  2249. * @txq: Transmit queue to deallocate.
  2250. *
  2251. * Empty queue by removing and destroying all BD's.
  2252. * Free all buffers.
  2253. * 0-fill, but do not free "txq" descriptor structure.
  2254. */
  2255. void il_tx_queue_free(struct il_priv *il, int txq_id)
  2256. {
  2257. struct il_tx_queue *txq = &il->txq[txq_id];
  2258. struct device *dev = &il->pci_dev->dev;
  2259. int i;
  2260. il_tx_queue_unmap(il, txq_id);
  2261. /* De-alloc array of command/tx buffers */
  2262. for (i = 0; i < TFD_TX_CMD_SLOTS; i++)
  2263. kfree(txq->cmd[i]);
  2264. /* De-alloc circular buffer of TFDs */
  2265. if (txq->q.n_bd)
  2266. dma_free_coherent(dev, il->hw_params.tfd_size *
  2267. txq->q.n_bd, txq->tfds, txq->q.dma_addr);
  2268. /* De-alloc array of per-TFD driver data */
  2269. kfree(txq->txb);
  2270. txq->txb = NULL;
  2271. /* deallocate arrays */
  2272. kfree(txq->cmd);
  2273. kfree(txq->meta);
  2274. txq->cmd = NULL;
  2275. txq->meta = NULL;
  2276. /* 0-fill queue descriptor structure */
  2277. memset(txq, 0, sizeof(*txq));
  2278. }
  2279. EXPORT_SYMBOL(il_tx_queue_free);
  2280. /**
  2281. * il_cmd_queue_unmap - Unmap any remaining DMA mappings from command queue
  2282. */
  2283. void il_cmd_queue_unmap(struct il_priv *il)
  2284. {
  2285. struct il_tx_queue *txq = &il->txq[il->cmd_queue];
  2286. struct il_queue *q = &txq->q;
  2287. int i;
  2288. if (q->n_bd == 0)
  2289. return;
  2290. while (q->read_ptr != q->write_ptr) {
  2291. i = il_get_cmd_idx(q, q->read_ptr, 0);
  2292. if (txq->meta[i].flags & CMD_MAPPED) {
  2293. pci_unmap_single(il->pci_dev,
  2294. dma_unmap_addr(&txq->meta[i], mapping),
  2295. dma_unmap_len(&txq->meta[i], len),
  2296. PCI_DMA_BIDIRECTIONAL);
  2297. txq->meta[i].flags = 0;
  2298. }
  2299. q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd);
  2300. }
  2301. i = q->n_win;
  2302. if (txq->meta[i].flags & CMD_MAPPED) {
  2303. pci_unmap_single(il->pci_dev,
  2304. dma_unmap_addr(&txq->meta[i], mapping),
  2305. dma_unmap_len(&txq->meta[i], len),
  2306. PCI_DMA_BIDIRECTIONAL);
  2307. txq->meta[i].flags = 0;
  2308. }
  2309. }
  2310. EXPORT_SYMBOL(il_cmd_queue_unmap);
  2311. /**
  2312. * il_cmd_queue_free - Deallocate DMA queue.
  2313. * @txq: Transmit queue to deallocate.
  2314. *
  2315. * Empty queue by removing and destroying all BD's.
  2316. * Free all buffers.
  2317. * 0-fill, but do not free "txq" descriptor structure.
  2318. */
  2319. void il_cmd_queue_free(struct il_priv *il)
  2320. {
  2321. struct il_tx_queue *txq = &il->txq[il->cmd_queue];
  2322. struct device *dev = &il->pci_dev->dev;
  2323. int i;
  2324. il_cmd_queue_unmap(il);
  2325. /* De-alloc array of command/tx buffers */
  2326. for (i = 0; i <= TFD_CMD_SLOTS; i++)
  2327. kfree(txq->cmd[i]);
  2328. /* De-alloc circular buffer of TFDs */
  2329. if (txq->q.n_bd)
  2330. dma_free_coherent(dev, il->hw_params.tfd_size * txq->q.n_bd,
  2331. txq->tfds, txq->q.dma_addr);
  2332. /* deallocate arrays */
  2333. kfree(txq->cmd);
  2334. kfree(txq->meta);
  2335. txq->cmd = NULL;
  2336. txq->meta = NULL;
  2337. /* 0-fill queue descriptor structure */
  2338. memset(txq, 0, sizeof(*txq));
  2339. }
  2340. EXPORT_SYMBOL(il_cmd_queue_free);
  2341. /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
  2342. * DMA services
  2343. *
  2344. * Theory of operation
  2345. *
  2346. * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
  2347. * of buffer descriptors, each of which points to one or more data buffers for
  2348. * the device to read from or fill. Driver and device exchange status of each
  2349. * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
  2350. * entries in each circular buffer, to protect against confusing empty and full
  2351. * queue states.
  2352. *
  2353. * The device reads or writes the data in the queues via the device's several
  2354. * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
  2355. *
  2356. * For Tx queue, there are low mark and high mark limits. If, after queuing
  2357. * the packet for Tx, free space become < low mark, Tx queue stopped. When
  2358. * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
  2359. * Tx queue resumed.
  2360. *
  2361. * See more detailed info in 4965.h.
  2362. ***************************************************/
  2363. int il_queue_space(const struct il_queue *q)
  2364. {
  2365. int s = q->read_ptr - q->write_ptr;
  2366. if (q->read_ptr > q->write_ptr)
  2367. s -= q->n_bd;
  2368. if (s <= 0)
  2369. s += q->n_win;
  2370. /* keep some reserve to not confuse empty and full situations */
  2371. s -= 2;
  2372. if (s < 0)
  2373. s = 0;
  2374. return s;
  2375. }
  2376. EXPORT_SYMBOL(il_queue_space);
  2377. /**
  2378. * il_queue_init - Initialize queue's high/low-water and read/write idxes
  2379. */
  2380. static int il_queue_init(struct il_priv *il, struct il_queue *q,
  2381. int count, int slots_num, u32 id)
  2382. {
  2383. q->n_bd = count;
  2384. q->n_win = slots_num;
  2385. q->id = id;
  2386. /* count must be power-of-two size, otherwise il_queue_inc_wrap
  2387. * and il_queue_dec_wrap are broken. */
  2388. BUG_ON(!is_power_of_2(count));
  2389. /* slots_num must be power-of-two size, otherwise
  2390. * il_get_cmd_idx is broken. */
  2391. BUG_ON(!is_power_of_2(slots_num));
  2392. q->low_mark = q->n_win / 4;
  2393. if (q->low_mark < 4)
  2394. q->low_mark = 4;
  2395. q->high_mark = q->n_win / 8;
  2396. if (q->high_mark < 2)
  2397. q->high_mark = 2;
  2398. q->write_ptr = q->read_ptr = 0;
  2399. return 0;
  2400. }
  2401. /**
  2402. * il_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
  2403. */
  2404. static int il_tx_queue_alloc(struct il_priv *il,
  2405. struct il_tx_queue *txq, u32 id)
  2406. {
  2407. struct device *dev = &il->pci_dev->dev;
  2408. size_t tfd_sz = il->hw_params.tfd_size * TFD_QUEUE_SIZE_MAX;
  2409. /* Driver ilate data, only for Tx (not command) queues,
  2410. * not shared with device. */
  2411. if (id != il->cmd_queue) {
  2412. txq->txb = kzalloc(sizeof(txq->txb[0]) *
  2413. TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
  2414. if (!txq->txb) {
  2415. IL_ERR("kmalloc for auxiliary BD "
  2416. "structures failed\n");
  2417. goto error;
  2418. }
  2419. } else {
  2420. txq->txb = NULL;
  2421. }
  2422. /* Circular buffer of transmit frame descriptors (TFDs),
  2423. * shared with device */
  2424. txq->tfds = dma_alloc_coherent(dev, tfd_sz, &txq->q.dma_addr,
  2425. GFP_KERNEL);
  2426. if (!txq->tfds) {
  2427. IL_ERR("pci_alloc_consistent(%zd) failed\n", tfd_sz);
  2428. goto error;
  2429. }
  2430. txq->q.id = id;
  2431. return 0;
  2432. error:
  2433. kfree(txq->txb);
  2434. txq->txb = NULL;
  2435. return -ENOMEM;
  2436. }
  2437. /**
  2438. * il_tx_queue_init - Allocate and initialize one tx/cmd queue
  2439. */
  2440. int il_tx_queue_init(struct il_priv *il, struct il_tx_queue *txq,
  2441. int slots_num, u32 txq_id)
  2442. {
  2443. int i, len;
  2444. int ret;
  2445. int actual_slots = slots_num;
  2446. /*
  2447. * Alloc buffer array for commands (Tx or other types of commands).
  2448. * For the command queue (#4/#9), allocate command space + one big
  2449. * command for scan, since scan command is very huge; the system will
  2450. * not have two scans at the same time, so only one is needed.
  2451. * For normal Tx queues (all other queues), no super-size command
  2452. * space is needed.
  2453. */
  2454. if (txq_id == il->cmd_queue)
  2455. actual_slots++;
  2456. txq->meta = kzalloc(sizeof(struct il_cmd_meta) * actual_slots,
  2457. GFP_KERNEL);
  2458. txq->cmd = kzalloc(sizeof(struct il_device_cmd *) * actual_slots,
  2459. GFP_KERNEL);
  2460. if (!txq->meta || !txq->cmd)
  2461. goto out_free_arrays;
  2462. len = sizeof(struct il_device_cmd);
  2463. for (i = 0; i < actual_slots; i++) {
  2464. /* only happens for cmd queue */
  2465. if (i == slots_num)
  2466. len = IL_MAX_CMD_SIZE;
  2467. txq->cmd[i] = kmalloc(len, GFP_KERNEL);
  2468. if (!txq->cmd[i])
  2469. goto err;
  2470. }
  2471. /* Alloc driver data array and TFD circular buffer */
  2472. ret = il_tx_queue_alloc(il, txq, txq_id);
  2473. if (ret)
  2474. goto err;
  2475. txq->need_update = 0;
  2476. /*
  2477. * For the default queues 0-3, set up the swq_id
  2478. * already -- all others need to get one later
  2479. * (if they need one at all).
  2480. */
  2481. if (txq_id < 4)
  2482. il_set_swq_id(txq, txq_id, txq_id);
  2483. /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
  2484. * il_queue_inc_wrap and il_queue_dec_wrap are broken. */
  2485. BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
  2486. /* Initialize queue's high/low-water marks, and head/tail idxes */
  2487. il_queue_init(il, &txq->q,
  2488. TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  2489. /* Tell device where to find queue */
  2490. il->cfg->ops->lib->txq_init(il, txq);
  2491. return 0;
  2492. err:
  2493. for (i = 0; i < actual_slots; i++)
  2494. kfree(txq->cmd[i]);
  2495. out_free_arrays:
  2496. kfree(txq->meta);
  2497. kfree(txq->cmd);
  2498. return -ENOMEM;
  2499. }
  2500. EXPORT_SYMBOL(il_tx_queue_init);
  2501. void il_tx_queue_reset(struct il_priv *il, struct il_tx_queue *txq,
  2502. int slots_num, u32 txq_id)
  2503. {
  2504. int actual_slots = slots_num;
  2505. if (txq_id == il->cmd_queue)
  2506. actual_slots++;
  2507. memset(txq->meta, 0, sizeof(struct il_cmd_meta) * actual_slots);
  2508. txq->need_update = 0;
  2509. /* Initialize queue's high/low-water marks, and head/tail idxes */
  2510. il_queue_init(il, &txq->q,
  2511. TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  2512. /* Tell device where to find queue */
  2513. il->cfg->ops->lib->txq_init(il, txq);
  2514. }
  2515. EXPORT_SYMBOL(il_tx_queue_reset);
  2516. /*************** HOST COMMAND QUEUE FUNCTIONS *****/
  2517. /**
  2518. * il_enqueue_hcmd - enqueue a uCode command
  2519. * @il: device ilate data point
  2520. * @cmd: a point to the ucode command structure
  2521. *
  2522. * The function returns < 0 values to indicate the operation is
  2523. * failed. On success, it turns the idx (> 0) of command in the
  2524. * command queue.
  2525. */
  2526. int il_enqueue_hcmd(struct il_priv *il, struct il_host_cmd *cmd)
  2527. {
  2528. struct il_tx_queue *txq = &il->txq[il->cmd_queue];
  2529. struct il_queue *q = &txq->q;
  2530. struct il_device_cmd *out_cmd;
  2531. struct il_cmd_meta *out_meta;
  2532. dma_addr_t phys_addr;
  2533. unsigned long flags;
  2534. int len;
  2535. u32 idx;
  2536. u16 fix_size;
  2537. cmd->len = il->cfg->ops->utils->get_hcmd_size(cmd->id, cmd->len);
  2538. fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
  2539. /* If any of the command structures end up being larger than
  2540. * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
  2541. * we will need to increase the size of the TFD entries
  2542. * Also, check to see if command buffer should not exceed the size
  2543. * of device_cmd and max_cmd_size. */
  2544. BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
  2545. !(cmd->flags & CMD_SIZE_HUGE));
  2546. BUG_ON(fix_size > IL_MAX_CMD_SIZE);
  2547. if (il_is_rfkill(il) || il_is_ctkill(il)) {
  2548. IL_WARN("Not sending command - %s KILL\n",
  2549. il_is_rfkill(il) ? "RF" : "CT");
  2550. return -EIO;
  2551. }
  2552. spin_lock_irqsave(&il->hcmd_lock, flags);
  2553. if (il_queue_space(q) < ((cmd->flags & CMD_ASYNC) ? 2 : 1)) {
  2554. spin_unlock_irqrestore(&il->hcmd_lock, flags);
  2555. IL_ERR("Restarting adapter due to command queue full\n");
  2556. queue_work(il->workqueue, &il->restart);
  2557. return -ENOSPC;
  2558. }
  2559. idx = il_get_cmd_idx(q, q->write_ptr, cmd->flags & CMD_SIZE_HUGE);
  2560. out_cmd = txq->cmd[idx];
  2561. out_meta = &txq->meta[idx];
  2562. if (WARN_ON(out_meta->flags & CMD_MAPPED)) {
  2563. spin_unlock_irqrestore(&il->hcmd_lock, flags);
  2564. return -ENOSPC;
  2565. }
  2566. memset(out_meta, 0, sizeof(*out_meta)); /* re-initialize to NULL */
  2567. out_meta->flags = cmd->flags | CMD_MAPPED;
  2568. if (cmd->flags & CMD_WANT_SKB)
  2569. out_meta->source = cmd;
  2570. if (cmd->flags & CMD_ASYNC)
  2571. out_meta->callback = cmd->callback;
  2572. out_cmd->hdr.cmd = cmd->id;
  2573. memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
  2574. /* At this point, the out_cmd now has all of the incoming cmd
  2575. * information */
  2576. out_cmd->hdr.flags = 0;
  2577. out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(il->cmd_queue) |
  2578. IDX_TO_SEQ(q->write_ptr));
  2579. if (cmd->flags & CMD_SIZE_HUGE)
  2580. out_cmd->hdr.sequence |= SEQ_HUGE_FRAME;
  2581. len = sizeof(struct il_device_cmd);
  2582. if (idx == TFD_CMD_SLOTS)
  2583. len = IL_MAX_CMD_SIZE;
  2584. #ifdef CONFIG_IWLEGACY_DEBUG
  2585. switch (out_cmd->hdr.cmd) {
  2586. case C_TX_LINK_QUALITY_CMD:
  2587. case C_SENSITIVITY:
  2588. D_HC_DUMP(
  2589. "Sending command %s (#%x), seq: 0x%04X, "
  2590. "%d bytes at %d[%d]:%d\n",
  2591. il_get_cmd_string(out_cmd->hdr.cmd),
  2592. out_cmd->hdr.cmd,
  2593. le16_to_cpu(out_cmd->hdr.sequence), fix_size,
  2594. q->write_ptr, idx, il->cmd_queue);
  2595. break;
  2596. default:
  2597. D_HC("Sending command %s (#%x), seq: 0x%04X, "
  2598. "%d bytes at %d[%d]:%d\n",
  2599. il_get_cmd_string(out_cmd->hdr.cmd),
  2600. out_cmd->hdr.cmd,
  2601. le16_to_cpu(out_cmd->hdr.sequence), fix_size,
  2602. q->write_ptr, idx, il->cmd_queue);
  2603. }
  2604. #endif
  2605. txq->need_update = 1;
  2606. if (il->cfg->ops->lib->txq_update_byte_cnt_tbl)
  2607. /* Set up entry in queue's byte count circular buffer */
  2608. il->cfg->ops->lib->txq_update_byte_cnt_tbl(il, txq, 0);
  2609. phys_addr = pci_map_single(il->pci_dev, &out_cmd->hdr,
  2610. fix_size, PCI_DMA_BIDIRECTIONAL);
  2611. dma_unmap_addr_set(out_meta, mapping, phys_addr);
  2612. dma_unmap_len_set(out_meta, len, fix_size);
  2613. il->cfg->ops->lib->txq_attach_buf_to_tfd(il, txq,
  2614. phys_addr, fix_size, 1,
  2615. U32_PAD(cmd->len));
  2616. /* Increment and update queue's write idx */
  2617. q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd);
  2618. il_txq_update_write_ptr(il, txq);
  2619. spin_unlock_irqrestore(&il->hcmd_lock, flags);
  2620. return idx;
  2621. }
  2622. /**
  2623. * il_hcmd_queue_reclaim - Reclaim TX command queue entries already Tx'd
  2624. *
  2625. * When FW advances 'R' idx, all entries between old and new 'R' idx
  2626. * need to be reclaimed. As result, some free space forms. If there is
  2627. * enough free space (> low mark), wake the stack that feeds us.
  2628. */
  2629. static void il_hcmd_queue_reclaim(struct il_priv *il, int txq_id,
  2630. int idx, int cmd_idx)
  2631. {
  2632. struct il_tx_queue *txq = &il->txq[txq_id];
  2633. struct il_queue *q = &txq->q;
  2634. int nfreed = 0;
  2635. if (idx >= q->n_bd || il_queue_used(q, idx) == 0) {
  2636. IL_ERR("Read idx for DMA queue txq id (%d), idx %d, "
  2637. "is out of range [0-%d] %d %d.\n", txq_id,
  2638. idx, q->n_bd, q->write_ptr, q->read_ptr);
  2639. return;
  2640. }
  2641. for (idx = il_queue_inc_wrap(idx, q->n_bd); q->read_ptr != idx;
  2642. q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd)) {
  2643. if (nfreed++ > 0) {
  2644. IL_ERR("HCMD skipped: idx (%d) %d %d\n", idx,
  2645. q->write_ptr, q->read_ptr);
  2646. queue_work(il->workqueue, &il->restart);
  2647. }
  2648. }
  2649. }
  2650. /**
  2651. * il_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
  2652. * @rxb: Rx buffer to reclaim
  2653. *
  2654. * If an Rx buffer has an async callback associated with it the callback
  2655. * will be executed. The attached skb (if present) will only be freed
  2656. * if the callback returns 1
  2657. */
  2658. void
  2659. il_tx_cmd_complete(struct il_priv *il, struct il_rx_buf *rxb)
  2660. {
  2661. struct il_rx_pkt *pkt = rxb_addr(rxb);
  2662. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  2663. int txq_id = SEQ_TO_QUEUE(sequence);
  2664. int idx = SEQ_TO_IDX(sequence);
  2665. int cmd_idx;
  2666. bool huge = !!(pkt->hdr.sequence & SEQ_HUGE_FRAME);
  2667. struct il_device_cmd *cmd;
  2668. struct il_cmd_meta *meta;
  2669. struct il_tx_queue *txq = &il->txq[il->cmd_queue];
  2670. unsigned long flags;
  2671. /* If a Tx command is being handled and it isn't in the actual
  2672. * command queue then there a command routing bug has been introduced
  2673. * in the queue management code. */
  2674. if (WARN(txq_id != il->cmd_queue,
  2675. "wrong command queue %d (should be %d), sequence 0x%X readp=%d writep=%d\n",
  2676. txq_id, il->cmd_queue, sequence,
  2677. il->txq[il->cmd_queue].q.read_ptr,
  2678. il->txq[il->cmd_queue].q.write_ptr)) {
  2679. il_print_hex_error(il, pkt, 32);
  2680. return;
  2681. }
  2682. cmd_idx = il_get_cmd_idx(&txq->q, idx, huge);
  2683. cmd = txq->cmd[cmd_idx];
  2684. meta = &txq->meta[cmd_idx];
  2685. txq->time_stamp = jiffies;
  2686. pci_unmap_single(il->pci_dev,
  2687. dma_unmap_addr(meta, mapping),
  2688. dma_unmap_len(meta, len),
  2689. PCI_DMA_BIDIRECTIONAL);
  2690. /* Input error checking is done when commands are added to queue. */
  2691. if (meta->flags & CMD_WANT_SKB) {
  2692. meta->source->reply_page = (unsigned long)rxb_addr(rxb);
  2693. rxb->page = NULL;
  2694. } else if (meta->callback)
  2695. meta->callback(il, cmd, pkt);
  2696. spin_lock_irqsave(&il->hcmd_lock, flags);
  2697. il_hcmd_queue_reclaim(il, txq_id, idx, cmd_idx);
  2698. if (!(meta->flags & CMD_ASYNC)) {
  2699. clear_bit(S_HCMD_ACTIVE, &il->status);
  2700. D_INFO("Clearing HCMD_ACTIVE for command %s\n",
  2701. il_get_cmd_string(cmd->hdr.cmd));
  2702. wake_up(&il->wait_command_queue);
  2703. }
  2704. /* Mark as unmapped */
  2705. meta->flags = 0;
  2706. spin_unlock_irqrestore(&il->hcmd_lock, flags);
  2707. }
  2708. EXPORT_SYMBOL(il_tx_cmd_complete);
  2709. MODULE_DESCRIPTION("iwl-legacy: common functions for 3945 and 4965");
  2710. MODULE_VERSION(IWLWIFI_VERSION);
  2711. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  2712. MODULE_LICENSE("GPL");
  2713. /*
  2714. * set bt_coex_active to true, uCode will do kill/defer
  2715. * every time the priority line is asserted (BT is sending signals on the
  2716. * priority line in the PCIx).
  2717. * set bt_coex_active to false, uCode will ignore the BT activity and
  2718. * perform the normal operation
  2719. *
  2720. * User might experience transmit issue on some platform due to WiFi/BT
  2721. * co-exist problem. The possible behaviors are:
  2722. * Able to scan and finding all the available AP
  2723. * Not able to associate with any AP
  2724. * On those platforms, WiFi communication can be restored by set
  2725. * "bt_coex_active" module parameter to "false"
  2726. *
  2727. * default: bt_coex_active = true (BT_COEX_ENABLE)
  2728. */
  2729. static bool bt_coex_active = true;
  2730. module_param(bt_coex_active, bool, S_IRUGO);
  2731. MODULE_PARM_DESC(bt_coex_active, "enable wifi/bluetooth co-exist");
  2732. u32 il_debug_level;
  2733. EXPORT_SYMBOL(il_debug_level);
  2734. const u8 il_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  2735. EXPORT_SYMBOL(il_bcast_addr);
  2736. /* This function both allocates and initializes hw and il. */
  2737. struct ieee80211_hw *il_alloc_all(struct il_cfg *cfg)
  2738. {
  2739. struct il_priv *il;
  2740. /* mac80211 allocates memory for this device instance, including
  2741. * space for this driver's ilate structure */
  2742. struct ieee80211_hw *hw;
  2743. hw = ieee80211_alloc_hw(sizeof(struct il_priv),
  2744. cfg->ops->ieee80211_ops);
  2745. if (hw == NULL) {
  2746. pr_err("%s: Can not allocate network device\n",
  2747. cfg->name);
  2748. goto out;
  2749. }
  2750. il = hw->priv;
  2751. il->hw = hw;
  2752. out:
  2753. return hw;
  2754. }
  2755. EXPORT_SYMBOL(il_alloc_all);
  2756. #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
  2757. #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
  2758. static void il_init_ht_hw_capab(const struct il_priv *il,
  2759. struct ieee80211_sta_ht_cap *ht_info,
  2760. enum ieee80211_band band)
  2761. {
  2762. u16 max_bit_rate = 0;
  2763. u8 rx_chains_num = il->hw_params.rx_chains_num;
  2764. u8 tx_chains_num = il->hw_params.tx_chains_num;
  2765. ht_info->cap = 0;
  2766. memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
  2767. ht_info->ht_supported = true;
  2768. ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
  2769. max_bit_rate = MAX_BIT_RATE_20_MHZ;
  2770. if (il->hw_params.ht40_channel & BIT(band)) {
  2771. ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
  2772. ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
  2773. ht_info->mcs.rx_mask[4] = 0x01;
  2774. max_bit_rate = MAX_BIT_RATE_40_MHZ;
  2775. }
  2776. if (il->cfg->mod_params->amsdu_size_8K)
  2777. ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
  2778. ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
  2779. ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
  2780. ht_info->mcs.rx_mask[0] = 0xFF;
  2781. if (rx_chains_num >= 2)
  2782. ht_info->mcs.rx_mask[1] = 0xFF;
  2783. if (rx_chains_num >= 3)
  2784. ht_info->mcs.rx_mask[2] = 0xFF;
  2785. /* Highest supported Rx data rate */
  2786. max_bit_rate *= rx_chains_num;
  2787. WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
  2788. ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
  2789. /* Tx MCS capabilities */
  2790. ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
  2791. if (tx_chains_num != rx_chains_num) {
  2792. ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
  2793. ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
  2794. IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
  2795. }
  2796. }
  2797. /**
  2798. * il_init_geos - Initialize mac80211's geo/channel info based from eeprom
  2799. */
  2800. int il_init_geos(struct il_priv *il)
  2801. {
  2802. struct il_channel_info *ch;
  2803. struct ieee80211_supported_band *sband;
  2804. struct ieee80211_channel *channels;
  2805. struct ieee80211_channel *geo_ch;
  2806. struct ieee80211_rate *rates;
  2807. int i = 0;
  2808. s8 max_tx_power = 0;
  2809. if (il->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
  2810. il->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
  2811. D_INFO("Geography modes already initialized.\n");
  2812. set_bit(S_GEO_CONFIGURED, &il->status);
  2813. return 0;
  2814. }
  2815. channels = kzalloc(sizeof(struct ieee80211_channel) *
  2816. il->channel_count, GFP_KERNEL);
  2817. if (!channels)
  2818. return -ENOMEM;
  2819. rates = kzalloc((sizeof(struct ieee80211_rate) * RATE_COUNT_LEGACY),
  2820. GFP_KERNEL);
  2821. if (!rates) {
  2822. kfree(channels);
  2823. return -ENOMEM;
  2824. }
  2825. /* 5.2GHz channels start after the 2.4GHz channels */
  2826. sband = &il->bands[IEEE80211_BAND_5GHZ];
  2827. sband->channels = &channels[ARRAY_SIZE(il_eeprom_band_1)];
  2828. /* just OFDM */
  2829. sband->bitrates = &rates[IL_FIRST_OFDM_RATE];
  2830. sband->n_bitrates = RATE_COUNT_LEGACY - IL_FIRST_OFDM_RATE;
  2831. if (il->cfg->sku & IL_SKU_N)
  2832. il_init_ht_hw_capab(il, &sband->ht_cap,
  2833. IEEE80211_BAND_5GHZ);
  2834. sband = &il->bands[IEEE80211_BAND_2GHZ];
  2835. sband->channels = channels;
  2836. /* OFDM & CCK */
  2837. sband->bitrates = rates;
  2838. sband->n_bitrates = RATE_COUNT_LEGACY;
  2839. if (il->cfg->sku & IL_SKU_N)
  2840. il_init_ht_hw_capab(il, &sband->ht_cap,
  2841. IEEE80211_BAND_2GHZ);
  2842. il->ieee_channels = channels;
  2843. il->ieee_rates = rates;
  2844. for (i = 0; i < il->channel_count; i++) {
  2845. ch = &il->channel_info[i];
  2846. if (!il_is_channel_valid(ch))
  2847. continue;
  2848. sband = &il->bands[ch->band];
  2849. geo_ch = &sband->channels[sband->n_channels++];
  2850. geo_ch->center_freq =
  2851. ieee80211_channel_to_frequency(ch->channel, ch->band);
  2852. geo_ch->max_power = ch->max_power_avg;
  2853. geo_ch->max_antenna_gain = 0xff;
  2854. geo_ch->hw_value = ch->channel;
  2855. if (il_is_channel_valid(ch)) {
  2856. if (!(ch->flags & EEPROM_CHANNEL_IBSS))
  2857. geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
  2858. if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
  2859. geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
  2860. if (ch->flags & EEPROM_CHANNEL_RADAR)
  2861. geo_ch->flags |= IEEE80211_CHAN_RADAR;
  2862. geo_ch->flags |= ch->ht40_extension_channel;
  2863. if (ch->max_power_avg > max_tx_power)
  2864. max_tx_power = ch->max_power_avg;
  2865. } else {
  2866. geo_ch->flags |= IEEE80211_CHAN_DISABLED;
  2867. }
  2868. D_INFO("Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
  2869. ch->channel, geo_ch->center_freq,
  2870. il_is_channel_a_band(ch) ? "5.2" : "2.4",
  2871. geo_ch->flags & IEEE80211_CHAN_DISABLED ?
  2872. "restricted" : "valid",
  2873. geo_ch->flags);
  2874. }
  2875. il->tx_power_device_lmt = max_tx_power;
  2876. il->tx_power_user_lmt = max_tx_power;
  2877. il->tx_power_next = max_tx_power;
  2878. if (il->bands[IEEE80211_BAND_5GHZ].n_channels == 0 &&
  2879. (il->cfg->sku & IL_SKU_A)) {
  2880. IL_INFO("Incorrectly detected BG card as ABG. "
  2881. "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
  2882. il->pci_dev->device,
  2883. il->pci_dev->subsystem_device);
  2884. il->cfg->sku &= ~IL_SKU_A;
  2885. }
  2886. IL_INFO("Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  2887. il->bands[IEEE80211_BAND_2GHZ].n_channels,
  2888. il->bands[IEEE80211_BAND_5GHZ].n_channels);
  2889. set_bit(S_GEO_CONFIGURED, &il->status);
  2890. return 0;
  2891. }
  2892. EXPORT_SYMBOL(il_init_geos);
  2893. /*
  2894. * il_free_geos - undo allocations in il_init_geos
  2895. */
  2896. void il_free_geos(struct il_priv *il)
  2897. {
  2898. kfree(il->ieee_channels);
  2899. kfree(il->ieee_rates);
  2900. clear_bit(S_GEO_CONFIGURED, &il->status);
  2901. }
  2902. EXPORT_SYMBOL(il_free_geos);
  2903. static bool il_is_channel_extension(struct il_priv *il,
  2904. enum ieee80211_band band,
  2905. u16 channel, u8 extension_chan_offset)
  2906. {
  2907. const struct il_channel_info *ch_info;
  2908. ch_info = il_get_channel_info(il, band, channel);
  2909. if (!il_is_channel_valid(ch_info))
  2910. return false;
  2911. if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
  2912. return !(ch_info->ht40_extension_channel &
  2913. IEEE80211_CHAN_NO_HT40PLUS);
  2914. else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
  2915. return !(ch_info->ht40_extension_channel &
  2916. IEEE80211_CHAN_NO_HT40MINUS);
  2917. return false;
  2918. }
  2919. bool il_is_ht40_tx_allowed(struct il_priv *il,
  2920. struct il_rxon_context *ctx,
  2921. struct ieee80211_sta_ht_cap *ht_cap)
  2922. {
  2923. if (!ctx->ht.enabled || !ctx->ht.is_40mhz)
  2924. return false;
  2925. /*
  2926. * We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
  2927. * the bit will not set if it is pure 40MHz case
  2928. */
  2929. if (ht_cap && !ht_cap->ht_supported)
  2930. return false;
  2931. #ifdef CONFIG_IWLEGACY_DEBUGFS
  2932. if (il->disable_ht40)
  2933. return false;
  2934. #endif
  2935. return il_is_channel_extension(il, il->band,
  2936. le16_to_cpu(ctx->staging.channel),
  2937. ctx->ht.extension_chan_offset);
  2938. }
  2939. EXPORT_SYMBOL(il_is_ht40_tx_allowed);
  2940. static u16 il_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
  2941. {
  2942. u16 new_val;
  2943. u16 beacon_factor;
  2944. /*
  2945. * If mac80211 hasn't given us a beacon interval, program
  2946. * the default into the device.
  2947. */
  2948. if (!beacon_val)
  2949. return DEFAULT_BEACON_INTERVAL;
  2950. /*
  2951. * If the beacon interval we obtained from the peer
  2952. * is too large, we'll have to wake up more often
  2953. * (and in IBSS case, we'll beacon too much)
  2954. *
  2955. * For example, if max_beacon_val is 4096, and the
  2956. * requested beacon interval is 7000, we'll have to
  2957. * use 3500 to be able to wake up on the beacons.
  2958. *
  2959. * This could badly influence beacon detection stats.
  2960. */
  2961. beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
  2962. new_val = beacon_val / beacon_factor;
  2963. if (!new_val)
  2964. new_val = max_beacon_val;
  2965. return new_val;
  2966. }
  2967. int
  2968. il_send_rxon_timing(struct il_priv *il, struct il_rxon_context *ctx)
  2969. {
  2970. u64 tsf;
  2971. s32 interval_tm, rem;
  2972. struct ieee80211_conf *conf = NULL;
  2973. u16 beacon_int;
  2974. struct ieee80211_vif *vif = ctx->vif;
  2975. conf = &il->hw->conf;
  2976. lockdep_assert_held(&il->mutex);
  2977. memset(&ctx->timing, 0, sizeof(struct il_rxon_time_cmd));
  2978. ctx->timing.timestamp = cpu_to_le64(il->timestamp);
  2979. ctx->timing.listen_interval = cpu_to_le16(conf->listen_interval);
  2980. beacon_int = vif ? vif->bss_conf.beacon_int : 0;
  2981. /*
  2982. * TODO: For IBSS we need to get atim_win from mac80211,
  2983. * for now just always use 0
  2984. */
  2985. ctx->timing.atim_win = 0;
  2986. beacon_int = il_adjust_beacon_interval(beacon_int,
  2987. il->hw_params.max_beacon_itrvl * TIME_UNIT);
  2988. ctx->timing.beacon_interval = cpu_to_le16(beacon_int);
  2989. tsf = il->timestamp; /* tsf is modifed by do_div: copy it */
  2990. interval_tm = beacon_int * TIME_UNIT;
  2991. rem = do_div(tsf, interval_tm);
  2992. ctx->timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
  2993. ctx->timing.dtim_period = vif ? (vif->bss_conf.dtim_period ?: 1) : 1;
  2994. D_ASSOC(
  2995. "beacon interval %d beacon timer %d beacon tim %d\n",
  2996. le16_to_cpu(ctx->timing.beacon_interval),
  2997. le32_to_cpu(ctx->timing.beacon_init_val),
  2998. le16_to_cpu(ctx->timing.atim_win));
  2999. return il_send_cmd_pdu(il, ctx->rxon_timing_cmd,
  3000. sizeof(ctx->timing), &ctx->timing);
  3001. }
  3002. EXPORT_SYMBOL(il_send_rxon_timing);
  3003. void
  3004. il_set_rxon_hwcrypto(struct il_priv *il,
  3005. struct il_rxon_context *ctx,
  3006. int hw_decrypt)
  3007. {
  3008. struct il_rxon_cmd *rxon = &ctx->staging;
  3009. if (hw_decrypt)
  3010. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  3011. else
  3012. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  3013. }
  3014. EXPORT_SYMBOL(il_set_rxon_hwcrypto);
  3015. /* validate RXON structure is valid */
  3016. int
  3017. il_check_rxon_cmd(struct il_priv *il, struct il_rxon_context *ctx)
  3018. {
  3019. struct il_rxon_cmd *rxon = &ctx->staging;
  3020. bool error = false;
  3021. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  3022. if (rxon->flags & RXON_FLG_TGJ_NARROW_BAND_MSK) {
  3023. IL_WARN("check 2.4G: wrong narrow\n");
  3024. error = true;
  3025. }
  3026. if (rxon->flags & RXON_FLG_RADAR_DETECT_MSK) {
  3027. IL_WARN("check 2.4G: wrong radar\n");
  3028. error = true;
  3029. }
  3030. } else {
  3031. if (!(rxon->flags & RXON_FLG_SHORT_SLOT_MSK)) {
  3032. IL_WARN("check 5.2G: not short slot!\n");
  3033. error = true;
  3034. }
  3035. if (rxon->flags & RXON_FLG_CCK_MSK) {
  3036. IL_WARN("check 5.2G: CCK!\n");
  3037. error = true;
  3038. }
  3039. }
  3040. if ((rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1) {
  3041. IL_WARN("mac/bssid mcast!\n");
  3042. error = true;
  3043. }
  3044. /* make sure basic rates 6Mbps and 1Mbps are supported */
  3045. if ((rxon->ofdm_basic_rates & RATE_6M_MASK) == 0 &&
  3046. (rxon->cck_basic_rates & RATE_1M_MASK) == 0) {
  3047. IL_WARN("neither 1 nor 6 are basic\n");
  3048. error = true;
  3049. }
  3050. if (le16_to_cpu(rxon->assoc_id) > 2007) {
  3051. IL_WARN("aid > 2007\n");
  3052. error = true;
  3053. }
  3054. if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  3055. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) {
  3056. IL_WARN("CCK and short slot\n");
  3057. error = true;
  3058. }
  3059. if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  3060. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) {
  3061. IL_WARN("CCK and auto detect");
  3062. error = true;
  3063. }
  3064. if ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  3065. RXON_FLG_TGG_PROTECT_MSK)) ==
  3066. RXON_FLG_TGG_PROTECT_MSK) {
  3067. IL_WARN("TGg but no auto-detect\n");
  3068. error = true;
  3069. }
  3070. if (error)
  3071. IL_WARN("Tuning to channel %d\n",
  3072. le16_to_cpu(rxon->channel));
  3073. if (error) {
  3074. IL_ERR("Invalid RXON\n");
  3075. return -EINVAL;
  3076. }
  3077. return 0;
  3078. }
  3079. EXPORT_SYMBOL(il_check_rxon_cmd);
  3080. /**
  3081. * il_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  3082. * @il: staging_rxon is compared to active_rxon
  3083. *
  3084. * If the RXON structure is changing enough to require a new tune,
  3085. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  3086. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  3087. */
  3088. int il_full_rxon_required(struct il_priv *il,
  3089. struct il_rxon_context *ctx)
  3090. {
  3091. const struct il_rxon_cmd *staging = &ctx->staging;
  3092. const struct il_rxon_cmd *active = &ctx->active;
  3093. #define CHK(cond) \
  3094. if ((cond)) { \
  3095. D_INFO("need full RXON - " #cond "\n"); \
  3096. return 1; \
  3097. }
  3098. #define CHK_NEQ(c1, c2) \
  3099. if ((c1) != (c2)) { \
  3100. D_INFO("need full RXON - " \
  3101. #c1 " != " #c2 " - %d != %d\n", \
  3102. (c1), (c2)); \
  3103. return 1; \
  3104. }
  3105. /* These items are only settable from the full RXON command */
  3106. CHK(!il_is_associated_ctx(ctx));
  3107. CHK(compare_ether_addr(staging->bssid_addr, active->bssid_addr));
  3108. CHK(compare_ether_addr(staging->node_addr, active->node_addr));
  3109. CHK(compare_ether_addr(staging->wlap_bssid_addr,
  3110. active->wlap_bssid_addr));
  3111. CHK_NEQ(staging->dev_type, active->dev_type);
  3112. CHK_NEQ(staging->channel, active->channel);
  3113. CHK_NEQ(staging->air_propagation, active->air_propagation);
  3114. CHK_NEQ(staging->ofdm_ht_single_stream_basic_rates,
  3115. active->ofdm_ht_single_stream_basic_rates);
  3116. CHK_NEQ(staging->ofdm_ht_dual_stream_basic_rates,
  3117. active->ofdm_ht_dual_stream_basic_rates);
  3118. CHK_NEQ(staging->assoc_id, active->assoc_id);
  3119. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  3120. * be updated with the RXON_ASSOC command -- however only some
  3121. * flag transitions are allowed using RXON_ASSOC */
  3122. /* Check if we are not switching bands */
  3123. CHK_NEQ(staging->flags & RXON_FLG_BAND_24G_MSK,
  3124. active->flags & RXON_FLG_BAND_24G_MSK);
  3125. /* Check if we are switching association toggle */
  3126. CHK_NEQ(staging->filter_flags & RXON_FILTER_ASSOC_MSK,
  3127. active->filter_flags & RXON_FILTER_ASSOC_MSK);
  3128. #undef CHK
  3129. #undef CHK_NEQ
  3130. return 0;
  3131. }
  3132. EXPORT_SYMBOL(il_full_rxon_required);
  3133. u8 il_get_lowest_plcp(struct il_priv *il,
  3134. struct il_rxon_context *ctx)
  3135. {
  3136. /*
  3137. * Assign the lowest rate -- should really get this from
  3138. * the beacon skb from mac80211.
  3139. */
  3140. if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK)
  3141. return RATE_1M_PLCP;
  3142. else
  3143. return RATE_6M_PLCP;
  3144. }
  3145. EXPORT_SYMBOL(il_get_lowest_plcp);
  3146. static void _il_set_rxon_ht(struct il_priv *il,
  3147. struct il_ht_config *ht_conf,
  3148. struct il_rxon_context *ctx)
  3149. {
  3150. struct il_rxon_cmd *rxon = &ctx->staging;
  3151. if (!ctx->ht.enabled) {
  3152. rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
  3153. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
  3154. RXON_FLG_HT40_PROT_MSK |
  3155. RXON_FLG_HT_PROT_MSK);
  3156. return;
  3157. }
  3158. rxon->flags |= cpu_to_le32(ctx->ht.protection <<
  3159. RXON_FLG_HT_OPERATING_MODE_POS);
  3160. /* Set up channel bandwidth:
  3161. * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
  3162. /* clear the HT channel mode before set the mode */
  3163. rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
  3164. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  3165. if (il_is_ht40_tx_allowed(il, ctx, NULL)) {
  3166. /* pure ht40 */
  3167. if (ctx->ht.protection ==
  3168. IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
  3169. rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
  3170. /* Note: control channel is opposite of extension channel */
  3171. switch (ctx->ht.extension_chan_offset) {
  3172. case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
  3173. rxon->flags &=
  3174. ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  3175. break;
  3176. case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
  3177. rxon->flags |=
  3178. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  3179. break;
  3180. }
  3181. } else {
  3182. /* Note: control channel is opposite of extension channel */
  3183. switch (ctx->ht.extension_chan_offset) {
  3184. case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
  3185. rxon->flags &=
  3186. ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  3187. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
  3188. break;
  3189. case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
  3190. rxon->flags |=
  3191. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  3192. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
  3193. break;
  3194. case IEEE80211_HT_PARAM_CHA_SEC_NONE:
  3195. default:
  3196. /* channel location only valid if in Mixed mode */
  3197. IL_ERR(
  3198. "invalid extension channel offset\n");
  3199. break;
  3200. }
  3201. }
  3202. } else {
  3203. rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
  3204. }
  3205. if (il->cfg->ops->hcmd->set_rxon_chain)
  3206. il->cfg->ops->hcmd->set_rxon_chain(il, ctx);
  3207. D_ASSOC("rxon flags 0x%X operation mode :0x%X "
  3208. "extension channel offset 0x%x\n",
  3209. le32_to_cpu(rxon->flags), ctx->ht.protection,
  3210. ctx->ht.extension_chan_offset);
  3211. }
  3212. void il_set_rxon_ht(struct il_priv *il, struct il_ht_config *ht_conf)
  3213. {
  3214. _il_set_rxon_ht(il, ht_conf, &il->ctx);
  3215. }
  3216. EXPORT_SYMBOL(il_set_rxon_ht);
  3217. /* Return valid, unused, channel for a passive scan to reset the RF */
  3218. u8 il_get_single_channel_number(struct il_priv *il,
  3219. enum ieee80211_band band)
  3220. {
  3221. const struct il_channel_info *ch_info;
  3222. int i;
  3223. u8 channel = 0;
  3224. u8 min, max;
  3225. if (band == IEEE80211_BAND_5GHZ) {
  3226. min = 14;
  3227. max = il->channel_count;
  3228. } else {
  3229. min = 0;
  3230. max = 14;
  3231. }
  3232. for (i = min; i < max; i++) {
  3233. channel = il->channel_info[i].channel;
  3234. if (channel == le16_to_cpu(il->ctx.staging.channel))
  3235. continue;
  3236. ch_info = il_get_channel_info(il, band, channel);
  3237. if (il_is_channel_valid(ch_info))
  3238. break;
  3239. }
  3240. return channel;
  3241. }
  3242. EXPORT_SYMBOL(il_get_single_channel_number);
  3243. /**
  3244. * il_set_rxon_channel - Set the band and channel values in staging RXON
  3245. * @ch: requested channel as a pointer to struct ieee80211_channel
  3246. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  3247. * in the staging RXON flag structure based on the ch->band
  3248. */
  3249. int
  3250. il_set_rxon_channel(struct il_priv *il, struct ieee80211_channel *ch,
  3251. struct il_rxon_context *ctx)
  3252. {
  3253. enum ieee80211_band band = ch->band;
  3254. u16 channel = ch->hw_value;
  3255. if (le16_to_cpu(ctx->staging.channel) == channel && il->band == band)
  3256. return 0;
  3257. ctx->staging.channel = cpu_to_le16(channel);
  3258. if (band == IEEE80211_BAND_5GHZ)
  3259. ctx->staging.flags &= ~RXON_FLG_BAND_24G_MSK;
  3260. else
  3261. ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
  3262. il->band = band;
  3263. D_INFO("Staging channel set to %d [%d]\n", channel, band);
  3264. return 0;
  3265. }
  3266. EXPORT_SYMBOL(il_set_rxon_channel);
  3267. void il_set_flags_for_band(struct il_priv *il,
  3268. struct il_rxon_context *ctx,
  3269. enum ieee80211_band band,
  3270. struct ieee80211_vif *vif)
  3271. {
  3272. if (band == IEEE80211_BAND_5GHZ) {
  3273. ctx->staging.flags &=
  3274. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  3275. | RXON_FLG_CCK_MSK);
  3276. ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  3277. } else {
  3278. /* Copied from il_post_associate() */
  3279. if (vif && vif->bss_conf.use_short_slot)
  3280. ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  3281. else
  3282. ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  3283. ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
  3284. ctx->staging.flags |= RXON_FLG_AUTO_DETECT_MSK;
  3285. ctx->staging.flags &= ~RXON_FLG_CCK_MSK;
  3286. }
  3287. }
  3288. EXPORT_SYMBOL(il_set_flags_for_band);
  3289. /*
  3290. * initialize rxon structure with default values from eeprom
  3291. */
  3292. void il_connection_init_rx_config(struct il_priv *il,
  3293. struct il_rxon_context *ctx)
  3294. {
  3295. const struct il_channel_info *ch_info;
  3296. memset(&ctx->staging, 0, sizeof(ctx->staging));
  3297. if (!ctx->vif) {
  3298. ctx->staging.dev_type = ctx->unused_devtype;
  3299. } else
  3300. switch (ctx->vif->type) {
  3301. case NL80211_IFTYPE_STATION:
  3302. ctx->staging.dev_type = ctx->station_devtype;
  3303. ctx->staging.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  3304. break;
  3305. case NL80211_IFTYPE_ADHOC:
  3306. ctx->staging.dev_type = ctx->ibss_devtype;
  3307. ctx->staging.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  3308. ctx->staging.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  3309. RXON_FILTER_ACCEPT_GRP_MSK;
  3310. break;
  3311. default:
  3312. IL_ERR("Unsupported interface type %d\n",
  3313. ctx->vif->type);
  3314. break;
  3315. }
  3316. #if 0
  3317. /* TODO: Figure out when short_preamble would be set and cache from
  3318. * that */
  3319. if (!hw_to_local(il->hw)->short_preamble)
  3320. ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  3321. else
  3322. ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  3323. #endif
  3324. ch_info = il_get_channel_info(il, il->band,
  3325. le16_to_cpu(ctx->active.channel));
  3326. if (!ch_info)
  3327. ch_info = &il->channel_info[0];
  3328. ctx->staging.channel = cpu_to_le16(ch_info->channel);
  3329. il->band = ch_info->band;
  3330. il_set_flags_for_band(il, ctx, il->band, ctx->vif);
  3331. ctx->staging.ofdm_basic_rates =
  3332. (IL_OFDM_RATES_MASK >> IL_FIRST_OFDM_RATE) & 0xFF;
  3333. ctx->staging.cck_basic_rates =
  3334. (IL_CCK_RATES_MASK >> IL_FIRST_CCK_RATE) & 0xF;
  3335. /* clear both MIX and PURE40 mode flag */
  3336. ctx->staging.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
  3337. RXON_FLG_CHANNEL_MODE_PURE_40);
  3338. if (ctx->vif)
  3339. memcpy(ctx->staging.node_addr, ctx->vif->addr, ETH_ALEN);
  3340. ctx->staging.ofdm_ht_single_stream_basic_rates = 0xff;
  3341. ctx->staging.ofdm_ht_dual_stream_basic_rates = 0xff;
  3342. }
  3343. EXPORT_SYMBOL(il_connection_init_rx_config);
  3344. void il_set_rate(struct il_priv *il)
  3345. {
  3346. const struct ieee80211_supported_band *hw = NULL;
  3347. struct ieee80211_rate *rate;
  3348. int i;
  3349. hw = il_get_hw_mode(il, il->band);
  3350. if (!hw) {
  3351. IL_ERR("Failed to set rate: unable to get hw mode\n");
  3352. return;
  3353. }
  3354. il->active_rate = 0;
  3355. for (i = 0; i < hw->n_bitrates; i++) {
  3356. rate = &(hw->bitrates[i]);
  3357. if (rate->hw_value < RATE_COUNT_LEGACY)
  3358. il->active_rate |= (1 << rate->hw_value);
  3359. }
  3360. D_RATE("Set active_rate = %0x\n", il->active_rate);
  3361. il->ctx.staging.cck_basic_rates =
  3362. (IL_CCK_BASIC_RATES_MASK >> IL_FIRST_CCK_RATE) & 0xF;
  3363. il->ctx.staging.ofdm_basic_rates =
  3364. (IL_OFDM_BASIC_RATES_MASK >> IL_FIRST_OFDM_RATE) & 0xFF;
  3365. }
  3366. EXPORT_SYMBOL(il_set_rate);
  3367. void il_chswitch_done(struct il_priv *il, bool is_success)
  3368. {
  3369. struct il_rxon_context *ctx = &il->ctx;
  3370. if (test_bit(S_EXIT_PENDING, &il->status))
  3371. return;
  3372. if (test_and_clear_bit(S_CHANNEL_SWITCH_PENDING, &il->status))
  3373. ieee80211_chswitch_done(ctx->vif, is_success);
  3374. }
  3375. EXPORT_SYMBOL(il_chswitch_done);
  3376. void il_hdl_csa(struct il_priv *il, struct il_rx_buf *rxb)
  3377. {
  3378. struct il_rx_pkt *pkt = rxb_addr(rxb);
  3379. struct il_csa_notification *csa = &(pkt->u.csa_notif);
  3380. struct il_rxon_context *ctx = &il->ctx;
  3381. struct il_rxon_cmd *rxon = (void *)&ctx->active;
  3382. if (!test_bit(S_CHANNEL_SWITCH_PENDING, &il->status))
  3383. return;
  3384. if (!le32_to_cpu(csa->status) && csa->channel == il->switch_channel) {
  3385. rxon->channel = csa->channel;
  3386. ctx->staging.channel = csa->channel;
  3387. D_11H("CSA notif: channel %d\n",
  3388. le16_to_cpu(csa->channel));
  3389. il_chswitch_done(il, true);
  3390. } else {
  3391. IL_ERR("CSA notif (fail) : channel %d\n",
  3392. le16_to_cpu(csa->channel));
  3393. il_chswitch_done(il, false);
  3394. }
  3395. }
  3396. EXPORT_SYMBOL(il_hdl_csa);
  3397. #ifdef CONFIG_IWLEGACY_DEBUG
  3398. void il_print_rx_config_cmd(struct il_priv *il,
  3399. struct il_rxon_context *ctx)
  3400. {
  3401. struct il_rxon_cmd *rxon = &ctx->staging;
  3402. D_RADIO("RX CONFIG:\n");
  3403. il_print_hex_dump(il, IL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  3404. D_RADIO("u16 channel: 0x%x\n",
  3405. le16_to_cpu(rxon->channel));
  3406. D_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  3407. D_RADIO("u32 filter_flags: 0x%08x\n",
  3408. le32_to_cpu(rxon->filter_flags));
  3409. D_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  3410. D_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
  3411. rxon->ofdm_basic_rates);
  3412. D_RADIO("u8 cck_basic_rates: 0x%02x\n",
  3413. rxon->cck_basic_rates);
  3414. D_RADIO("u8[6] node_addr: %pM\n", rxon->node_addr);
  3415. D_RADIO("u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
  3416. D_RADIO("u16 assoc_id: 0x%x\n",
  3417. le16_to_cpu(rxon->assoc_id));
  3418. }
  3419. EXPORT_SYMBOL(il_print_rx_config_cmd);
  3420. #endif
  3421. /**
  3422. * il_irq_handle_error - called for HW or SW error interrupt from card
  3423. */
  3424. void il_irq_handle_error(struct il_priv *il)
  3425. {
  3426. /* Set the FW error flag -- cleared on il_down */
  3427. set_bit(S_FW_ERROR, &il->status);
  3428. /* Cancel currently queued command. */
  3429. clear_bit(S_HCMD_ACTIVE, &il->status);
  3430. IL_ERR("Loaded firmware version: %s\n",
  3431. il->hw->wiphy->fw_version);
  3432. il->cfg->ops->lib->dump_nic_error_log(il);
  3433. if (il->cfg->ops->lib->dump_fh)
  3434. il->cfg->ops->lib->dump_fh(il, NULL, false);
  3435. #ifdef CONFIG_IWLEGACY_DEBUG
  3436. if (il_get_debug_level(il) & IL_DL_FW_ERRORS)
  3437. il_print_rx_config_cmd(il,
  3438. &il->ctx);
  3439. #endif
  3440. wake_up(&il->wait_command_queue);
  3441. /* Keep the restart process from trying to send host
  3442. * commands by clearing the INIT status bit */
  3443. clear_bit(S_READY, &il->status);
  3444. if (!test_bit(S_EXIT_PENDING, &il->status)) {
  3445. IL_DBG(IL_DL_FW_ERRORS,
  3446. "Restarting adapter due to uCode error.\n");
  3447. if (il->cfg->mod_params->restart_fw)
  3448. queue_work(il->workqueue, &il->restart);
  3449. }
  3450. }
  3451. EXPORT_SYMBOL(il_irq_handle_error);
  3452. static int il_apm_stop_master(struct il_priv *il)
  3453. {
  3454. int ret = 0;
  3455. /* stop device's busmaster DMA activity */
  3456. il_set_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
  3457. ret = _il_poll_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
  3458. CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
  3459. if (ret)
  3460. IL_WARN("Master Disable Timed Out, 100 usec\n");
  3461. D_INFO("stop master\n");
  3462. return ret;
  3463. }
  3464. void il_apm_stop(struct il_priv *il)
  3465. {
  3466. D_INFO("Stop card, put in low power state\n");
  3467. /* Stop device's DMA activity */
  3468. il_apm_stop_master(il);
  3469. /* Reset the entire device */
  3470. il_set_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  3471. udelay(10);
  3472. /*
  3473. * Clear "initialization complete" bit to move adapter from
  3474. * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
  3475. */
  3476. il_clear_bit(il, CSR_GP_CNTRL,
  3477. CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  3478. }
  3479. EXPORT_SYMBOL(il_apm_stop);
  3480. /*
  3481. * Start up NIC's basic functionality after it has been reset
  3482. * (e.g. after platform boot, or shutdown via il_apm_stop())
  3483. * NOTE: This does not load uCode nor start the embedded processor
  3484. */
  3485. int il_apm_init(struct il_priv *il)
  3486. {
  3487. int ret = 0;
  3488. u16 lctl;
  3489. D_INFO("Init card's basic functions\n");
  3490. /*
  3491. * Use "set_bit" below rather than "write", to preserve any hardware
  3492. * bits already set by default after reset.
  3493. */
  3494. /* Disable L0S exit timer (platform NMI Work/Around) */
  3495. il_set_bit(il, CSR_GIO_CHICKEN_BITS,
  3496. CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
  3497. /*
  3498. * Disable L0s without affecting L1;
  3499. * don't wait for ICH L0s (ICH bug W/A)
  3500. */
  3501. il_set_bit(il, CSR_GIO_CHICKEN_BITS,
  3502. CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
  3503. /* Set FH wait threshold to maximum (HW error during stress W/A) */
  3504. il_set_bit(il, CSR_DBG_HPET_MEM_REG,
  3505. CSR_DBG_HPET_MEM_REG_VAL);
  3506. /*
  3507. * Enable HAP INTA (interrupt from management bus) to
  3508. * wake device's PCI Express link L1a -> L0s
  3509. * NOTE: This is no-op for 3945 (non-existent bit)
  3510. */
  3511. il_set_bit(il, CSR_HW_IF_CONFIG_REG,
  3512. CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
  3513. /*
  3514. * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
  3515. * Check if BIOS (or OS) enabled L1-ASPM on this device.
  3516. * If so (likely), disable L0S, so device moves directly L0->L1;
  3517. * costs negligible amount of power savings.
  3518. * If not (unlikely), enable L0S, so there is at least some
  3519. * power savings, even without L1.
  3520. */
  3521. if (il->cfg->base_params->set_l0s) {
  3522. lctl = il_pcie_link_ctl(il);
  3523. if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
  3524. PCI_CFG_LINK_CTRL_VAL_L1_EN) {
  3525. /* L1-ASPM enabled; disable(!) L0S */
  3526. il_set_bit(il, CSR_GIO_REG,
  3527. CSR_GIO_REG_VAL_L0S_ENABLED);
  3528. D_POWER("L1 Enabled; Disabling L0S\n");
  3529. } else {
  3530. /* L1-ASPM disabled; enable(!) L0S */
  3531. il_clear_bit(il, CSR_GIO_REG,
  3532. CSR_GIO_REG_VAL_L0S_ENABLED);
  3533. D_POWER("L1 Disabled; Enabling L0S\n");
  3534. }
  3535. }
  3536. /* Configure analog phase-lock-loop before activating to D0A */
  3537. if (il->cfg->base_params->pll_cfg_val)
  3538. il_set_bit(il, CSR_ANA_PLL_CFG,
  3539. il->cfg->base_params->pll_cfg_val);
  3540. /*
  3541. * Set "initialization complete" bit to move adapter from
  3542. * D0U* --> D0A* (powered-up active) state.
  3543. */
  3544. il_set_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  3545. /*
  3546. * Wait for clock stabilization; once stabilized, access to
  3547. * device-internal resources is supported, e.g. il_wr_prph()
  3548. * and accesses to uCode SRAM.
  3549. */
  3550. ret = _il_poll_bit(il, CSR_GP_CNTRL,
  3551. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  3552. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
  3553. if (ret < 0) {
  3554. D_INFO("Failed to init the card\n");
  3555. goto out;
  3556. }
  3557. /*
  3558. * Enable DMA and BSM (if used) clocks, wait for them to stabilize.
  3559. * BSM (Boostrap State Machine) is only in 3945 and 4965.
  3560. *
  3561. * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
  3562. * do not disable clocks. This preserves any hardware bits already
  3563. * set by default in "CLK_CTRL_REG" after reset.
  3564. */
  3565. if (il->cfg->base_params->use_bsm)
  3566. il_wr_prph(il, APMG_CLK_EN_REG,
  3567. APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
  3568. else
  3569. il_wr_prph(il, APMG_CLK_EN_REG,
  3570. APMG_CLK_VAL_DMA_CLK_RQT);
  3571. udelay(20);
  3572. /* Disable L1-Active */
  3573. il_set_bits_prph(il, APMG_PCIDEV_STT_REG,
  3574. APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
  3575. out:
  3576. return ret;
  3577. }
  3578. EXPORT_SYMBOL(il_apm_init);
  3579. int il_set_tx_power(struct il_priv *il, s8 tx_power, bool force)
  3580. {
  3581. int ret;
  3582. s8 prev_tx_power;
  3583. bool defer;
  3584. struct il_rxon_context *ctx = &il->ctx;
  3585. lockdep_assert_held(&il->mutex);
  3586. if (il->tx_power_user_lmt == tx_power && !force)
  3587. return 0;
  3588. if (!il->cfg->ops->lib->send_tx_power)
  3589. return -EOPNOTSUPP;
  3590. /* 0 dBm mean 1 milliwatt */
  3591. if (tx_power < 0) {
  3592. IL_WARN(
  3593. "Requested user TXPOWER %d below 1 mW.\n",
  3594. tx_power);
  3595. return -EINVAL;
  3596. }
  3597. if (tx_power > il->tx_power_device_lmt) {
  3598. IL_WARN(
  3599. "Requested user TXPOWER %d above upper limit %d.\n",
  3600. tx_power, il->tx_power_device_lmt);
  3601. return -EINVAL;
  3602. }
  3603. if (!il_is_ready_rf(il))
  3604. return -EIO;
  3605. /* scan complete and commit_rxon use tx_power_next value,
  3606. * it always need to be updated for newest request */
  3607. il->tx_power_next = tx_power;
  3608. /* do not set tx power when scanning or channel changing */
  3609. defer = test_bit(S_SCANNING, &il->status) ||
  3610. memcmp(&ctx->active, &ctx->staging, sizeof(ctx->staging));
  3611. if (defer && !force) {
  3612. D_INFO("Deferring tx power set\n");
  3613. return 0;
  3614. }
  3615. prev_tx_power = il->tx_power_user_lmt;
  3616. il->tx_power_user_lmt = tx_power;
  3617. ret = il->cfg->ops->lib->send_tx_power(il);
  3618. /* if fail to set tx_power, restore the orig. tx power */
  3619. if (ret) {
  3620. il->tx_power_user_lmt = prev_tx_power;
  3621. il->tx_power_next = prev_tx_power;
  3622. }
  3623. return ret;
  3624. }
  3625. EXPORT_SYMBOL(il_set_tx_power);
  3626. void il_send_bt_config(struct il_priv *il)
  3627. {
  3628. struct il_bt_cmd bt_cmd = {
  3629. .lead_time = BT_LEAD_TIME_DEF,
  3630. .max_kill = BT_MAX_KILL_DEF,
  3631. .kill_ack_mask = 0,
  3632. .kill_cts_mask = 0,
  3633. };
  3634. if (!bt_coex_active)
  3635. bt_cmd.flags = BT_COEX_DISABLE;
  3636. else
  3637. bt_cmd.flags = BT_COEX_ENABLE;
  3638. D_INFO("BT coex %s\n",
  3639. (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
  3640. if (il_send_cmd_pdu(il, C_BT_CONFIG,
  3641. sizeof(struct il_bt_cmd), &bt_cmd))
  3642. IL_ERR("failed to send BT Coex Config\n");
  3643. }
  3644. EXPORT_SYMBOL(il_send_bt_config);
  3645. int il_send_stats_request(struct il_priv *il, u8 flags, bool clear)
  3646. {
  3647. struct il_stats_cmd stats_cmd = {
  3648. .configuration_flags =
  3649. clear ? IL_STATS_CONF_CLEAR_STATS : 0,
  3650. };
  3651. if (flags & CMD_ASYNC)
  3652. return il_send_cmd_pdu_async(il, C_STATS,
  3653. sizeof(struct il_stats_cmd),
  3654. &stats_cmd, NULL);
  3655. else
  3656. return il_send_cmd_pdu(il, C_STATS,
  3657. sizeof(struct il_stats_cmd),
  3658. &stats_cmd);
  3659. }
  3660. EXPORT_SYMBOL(il_send_stats_request);
  3661. void il_hdl_pm_sleep(struct il_priv *il,
  3662. struct il_rx_buf *rxb)
  3663. {
  3664. #ifdef CONFIG_IWLEGACY_DEBUG
  3665. struct il_rx_pkt *pkt = rxb_addr(rxb);
  3666. struct il_sleep_notification *sleep = &(pkt->u.sleep_notif);
  3667. D_RX("sleep mode: %d, src: %d\n",
  3668. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  3669. #endif
  3670. }
  3671. EXPORT_SYMBOL(il_hdl_pm_sleep);
  3672. void il_hdl_pm_debug_stats(struct il_priv *il,
  3673. struct il_rx_buf *rxb)
  3674. {
  3675. struct il_rx_pkt *pkt = rxb_addr(rxb);
  3676. u32 len = le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK;
  3677. D_RADIO("Dumping %d bytes of unhandled "
  3678. "notification for %s:\n", len,
  3679. il_get_cmd_string(pkt->hdr.cmd));
  3680. il_print_hex_dump(il, IL_DL_RADIO, pkt->u.raw, len);
  3681. }
  3682. EXPORT_SYMBOL(il_hdl_pm_debug_stats);
  3683. void il_hdl_error(struct il_priv *il,
  3684. struct il_rx_buf *rxb)
  3685. {
  3686. struct il_rx_pkt *pkt = rxb_addr(rxb);
  3687. IL_ERR("Error Reply type 0x%08X cmd %s (0x%02X) "
  3688. "seq 0x%04X ser 0x%08X\n",
  3689. le32_to_cpu(pkt->u.err_resp.error_type),
  3690. il_get_cmd_string(pkt->u.err_resp.cmd_id),
  3691. pkt->u.err_resp.cmd_id,
  3692. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  3693. le32_to_cpu(pkt->u.err_resp.error_info));
  3694. }
  3695. EXPORT_SYMBOL(il_hdl_error);
  3696. void il_clear_isr_stats(struct il_priv *il)
  3697. {
  3698. memset(&il->isr_stats, 0, sizeof(il->isr_stats));
  3699. }
  3700. int il_mac_conf_tx(struct ieee80211_hw *hw,
  3701. struct ieee80211_vif *vif, u16 queue,
  3702. const struct ieee80211_tx_queue_params *params)
  3703. {
  3704. struct il_priv *il = hw->priv;
  3705. unsigned long flags;
  3706. int q;
  3707. D_MAC80211("enter\n");
  3708. if (!il_is_ready_rf(il)) {
  3709. D_MAC80211("leave - RF not ready\n");
  3710. return -EIO;
  3711. }
  3712. if (queue >= AC_NUM) {
  3713. D_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  3714. return 0;
  3715. }
  3716. q = AC_NUM - 1 - queue;
  3717. spin_lock_irqsave(&il->lock, flags);
  3718. il->ctx.qos_data.def_qos_parm.ac[q].cw_min =
  3719. cpu_to_le16(params->cw_min);
  3720. il->ctx.qos_data.def_qos_parm.ac[q].cw_max =
  3721. cpu_to_le16(params->cw_max);
  3722. il->ctx.qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  3723. il->ctx.qos_data.def_qos_parm.ac[q].edca_txop =
  3724. cpu_to_le16((params->txop * 32));
  3725. il->ctx.qos_data.def_qos_parm.ac[q].reserved1 = 0;
  3726. spin_unlock_irqrestore(&il->lock, flags);
  3727. D_MAC80211("leave\n");
  3728. return 0;
  3729. }
  3730. EXPORT_SYMBOL(il_mac_conf_tx);
  3731. int il_mac_tx_last_beacon(struct ieee80211_hw *hw)
  3732. {
  3733. struct il_priv *il = hw->priv;
  3734. return il->ibss_manager == IL_IBSS_MANAGER;
  3735. }
  3736. EXPORT_SYMBOL_GPL(il_mac_tx_last_beacon);
  3737. static int
  3738. il_set_mode(struct il_priv *il, struct il_rxon_context *ctx)
  3739. {
  3740. il_connection_init_rx_config(il, ctx);
  3741. if (il->cfg->ops->hcmd->set_rxon_chain)
  3742. il->cfg->ops->hcmd->set_rxon_chain(il, ctx);
  3743. return il_commit_rxon(il, ctx);
  3744. }
  3745. static int il_setup_interface(struct il_priv *il,
  3746. struct il_rxon_context *ctx)
  3747. {
  3748. struct ieee80211_vif *vif = ctx->vif;
  3749. int err;
  3750. lockdep_assert_held(&il->mutex);
  3751. /*
  3752. * This variable will be correct only when there's just
  3753. * a single context, but all code using it is for hardware
  3754. * that supports only one context.
  3755. */
  3756. il->iw_mode = vif->type;
  3757. ctx->is_active = true;
  3758. err = il_set_mode(il, ctx);
  3759. if (err) {
  3760. if (!ctx->always_active)
  3761. ctx->is_active = false;
  3762. return err;
  3763. }
  3764. return 0;
  3765. }
  3766. int
  3767. il_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
  3768. {
  3769. struct il_priv *il = hw->priv;
  3770. struct il_vif_priv *vif_priv = (void *)vif->drv_priv;
  3771. int err;
  3772. u32 modes;
  3773. D_MAC80211("enter: type %d, addr %pM\n",
  3774. vif->type, vif->addr);
  3775. mutex_lock(&il->mutex);
  3776. if (!il_is_ready_rf(il)) {
  3777. IL_WARN("Try to add interface when device not ready\n");
  3778. err = -EINVAL;
  3779. goto out;
  3780. }
  3781. /* check if busy context is exclusive */
  3782. if (il->ctx.vif &&
  3783. (il->ctx.exclusive_interface_modes & BIT(il->ctx.vif->type))) {
  3784. err = -EINVAL;
  3785. goto out;
  3786. }
  3787. modes = il->ctx.interface_modes | il->ctx.exclusive_interface_modes;
  3788. if (!(modes & BIT(vif->type))) {
  3789. err = -EOPNOTSUPP;
  3790. goto out;
  3791. }
  3792. vif_priv->ctx = &il->ctx;
  3793. il->ctx.vif = vif;
  3794. err = il_setup_interface(il, &il->ctx);
  3795. if (err) {
  3796. il->ctx.vif = NULL;
  3797. il->iw_mode = NL80211_IFTYPE_STATION;
  3798. }
  3799. out:
  3800. mutex_unlock(&il->mutex);
  3801. D_MAC80211("leave\n");
  3802. return err;
  3803. }
  3804. EXPORT_SYMBOL(il_mac_add_interface);
  3805. static void il_teardown_interface(struct il_priv *il,
  3806. struct ieee80211_vif *vif,
  3807. bool mode_change)
  3808. {
  3809. struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif);
  3810. lockdep_assert_held(&il->mutex);
  3811. if (il->scan_vif == vif) {
  3812. il_scan_cancel_timeout(il, 200);
  3813. il_force_scan_end(il);
  3814. }
  3815. if (!mode_change) {
  3816. il_set_mode(il, ctx);
  3817. if (!ctx->always_active)
  3818. ctx->is_active = false;
  3819. }
  3820. }
  3821. void il_mac_remove_interface(struct ieee80211_hw *hw,
  3822. struct ieee80211_vif *vif)
  3823. {
  3824. struct il_priv *il = hw->priv;
  3825. struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif);
  3826. D_MAC80211("enter\n");
  3827. mutex_lock(&il->mutex);
  3828. WARN_ON(ctx->vif != vif);
  3829. ctx->vif = NULL;
  3830. il_teardown_interface(il, vif, false);
  3831. memset(il->bssid, 0, ETH_ALEN);
  3832. mutex_unlock(&il->mutex);
  3833. D_MAC80211("leave\n");
  3834. }
  3835. EXPORT_SYMBOL(il_mac_remove_interface);
  3836. int il_alloc_txq_mem(struct il_priv *il)
  3837. {
  3838. if (!il->txq)
  3839. il->txq = kzalloc(
  3840. sizeof(struct il_tx_queue) *
  3841. il->cfg->base_params->num_of_queues,
  3842. GFP_KERNEL);
  3843. if (!il->txq) {
  3844. IL_ERR("Not enough memory for txq\n");
  3845. return -ENOMEM;
  3846. }
  3847. return 0;
  3848. }
  3849. EXPORT_SYMBOL(il_alloc_txq_mem);
  3850. void il_txq_mem(struct il_priv *il)
  3851. {
  3852. kfree(il->txq);
  3853. il->txq = NULL;
  3854. }
  3855. EXPORT_SYMBOL(il_txq_mem);
  3856. #ifdef CONFIG_IWLEGACY_DEBUGFS
  3857. #define IL_TRAFFIC_DUMP_SIZE (IL_TRAFFIC_ENTRY_SIZE * IL_TRAFFIC_ENTRIES)
  3858. void il_reset_traffic_log(struct il_priv *il)
  3859. {
  3860. il->tx_traffic_idx = 0;
  3861. il->rx_traffic_idx = 0;
  3862. if (il->tx_traffic)
  3863. memset(il->tx_traffic, 0, IL_TRAFFIC_DUMP_SIZE);
  3864. if (il->rx_traffic)
  3865. memset(il->rx_traffic, 0, IL_TRAFFIC_DUMP_SIZE);
  3866. }
  3867. int il_alloc_traffic_mem(struct il_priv *il)
  3868. {
  3869. u32 traffic_size = IL_TRAFFIC_DUMP_SIZE;
  3870. if (il_debug_level & IL_DL_TX) {
  3871. if (!il->tx_traffic) {
  3872. il->tx_traffic =
  3873. kzalloc(traffic_size, GFP_KERNEL);
  3874. if (!il->tx_traffic)
  3875. return -ENOMEM;
  3876. }
  3877. }
  3878. if (il_debug_level & IL_DL_RX) {
  3879. if (!il->rx_traffic) {
  3880. il->rx_traffic =
  3881. kzalloc(traffic_size, GFP_KERNEL);
  3882. if (!il->rx_traffic)
  3883. return -ENOMEM;
  3884. }
  3885. }
  3886. il_reset_traffic_log(il);
  3887. return 0;
  3888. }
  3889. EXPORT_SYMBOL(il_alloc_traffic_mem);
  3890. void il_free_traffic_mem(struct il_priv *il)
  3891. {
  3892. kfree(il->tx_traffic);
  3893. il->tx_traffic = NULL;
  3894. kfree(il->rx_traffic);
  3895. il->rx_traffic = NULL;
  3896. }
  3897. EXPORT_SYMBOL(il_free_traffic_mem);
  3898. void il_dbg_log_tx_data_frame(struct il_priv *il,
  3899. u16 length, struct ieee80211_hdr *header)
  3900. {
  3901. __le16 fc;
  3902. u16 len;
  3903. if (likely(!(il_debug_level & IL_DL_TX)))
  3904. return;
  3905. if (!il->tx_traffic)
  3906. return;
  3907. fc = header->frame_control;
  3908. if (ieee80211_is_data(fc)) {
  3909. len = (length > IL_TRAFFIC_ENTRY_SIZE)
  3910. ? IL_TRAFFIC_ENTRY_SIZE : length;
  3911. memcpy((il->tx_traffic +
  3912. (il->tx_traffic_idx * IL_TRAFFIC_ENTRY_SIZE)),
  3913. header, len);
  3914. il->tx_traffic_idx =
  3915. (il->tx_traffic_idx + 1) % IL_TRAFFIC_ENTRIES;
  3916. }
  3917. }
  3918. EXPORT_SYMBOL(il_dbg_log_tx_data_frame);
  3919. void il_dbg_log_rx_data_frame(struct il_priv *il,
  3920. u16 length, struct ieee80211_hdr *header)
  3921. {
  3922. __le16 fc;
  3923. u16 len;
  3924. if (likely(!(il_debug_level & IL_DL_RX)))
  3925. return;
  3926. if (!il->rx_traffic)
  3927. return;
  3928. fc = header->frame_control;
  3929. if (ieee80211_is_data(fc)) {
  3930. len = (length > IL_TRAFFIC_ENTRY_SIZE)
  3931. ? IL_TRAFFIC_ENTRY_SIZE : length;
  3932. memcpy((il->rx_traffic +
  3933. (il->rx_traffic_idx * IL_TRAFFIC_ENTRY_SIZE)),
  3934. header, len);
  3935. il->rx_traffic_idx =
  3936. (il->rx_traffic_idx + 1) % IL_TRAFFIC_ENTRIES;
  3937. }
  3938. }
  3939. EXPORT_SYMBOL(il_dbg_log_rx_data_frame);
  3940. const char *il_get_mgmt_string(int cmd)
  3941. {
  3942. switch (cmd) {
  3943. IL_CMD(MANAGEMENT_ASSOC_REQ);
  3944. IL_CMD(MANAGEMENT_ASSOC_RESP);
  3945. IL_CMD(MANAGEMENT_REASSOC_REQ);
  3946. IL_CMD(MANAGEMENT_REASSOC_RESP);
  3947. IL_CMD(MANAGEMENT_PROBE_REQ);
  3948. IL_CMD(MANAGEMENT_PROBE_RESP);
  3949. IL_CMD(MANAGEMENT_BEACON);
  3950. IL_CMD(MANAGEMENT_ATIM);
  3951. IL_CMD(MANAGEMENT_DISASSOC);
  3952. IL_CMD(MANAGEMENT_AUTH);
  3953. IL_CMD(MANAGEMENT_DEAUTH);
  3954. IL_CMD(MANAGEMENT_ACTION);
  3955. default:
  3956. return "UNKNOWN";
  3957. }
  3958. }
  3959. const char *il_get_ctrl_string(int cmd)
  3960. {
  3961. switch (cmd) {
  3962. IL_CMD(CONTROL_BACK_REQ);
  3963. IL_CMD(CONTROL_BACK);
  3964. IL_CMD(CONTROL_PSPOLL);
  3965. IL_CMD(CONTROL_RTS);
  3966. IL_CMD(CONTROL_CTS);
  3967. IL_CMD(CONTROL_ACK);
  3968. IL_CMD(CONTROL_CFEND);
  3969. IL_CMD(CONTROL_CFENDACK);
  3970. default:
  3971. return "UNKNOWN";
  3972. }
  3973. }
  3974. void il_clear_traffic_stats(struct il_priv *il)
  3975. {
  3976. memset(&il->tx_stats, 0, sizeof(struct traffic_stats));
  3977. memset(&il->rx_stats, 0, sizeof(struct traffic_stats));
  3978. }
  3979. /*
  3980. * if CONFIG_IWLEGACY_DEBUGFS defined,
  3981. * il_update_stats function will
  3982. * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass
  3983. * Use debugFs to display the rx/rx_stats
  3984. * if CONFIG_IWLEGACY_DEBUGFS not being defined, then no MGMT and CTRL
  3985. * information will be recorded, but DATA pkt still will be recorded
  3986. * for the reason of il_led.c need to control the led blinking based on
  3987. * number of tx and rx data.
  3988. *
  3989. */
  3990. void
  3991. il_update_stats(struct il_priv *il, bool is_tx, __le16 fc, u16 len)
  3992. {
  3993. struct traffic_stats *stats;
  3994. if (is_tx)
  3995. stats = &il->tx_stats;
  3996. else
  3997. stats = &il->rx_stats;
  3998. if (ieee80211_is_mgmt(fc)) {
  3999. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  4000. case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
  4001. stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
  4002. break;
  4003. case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
  4004. stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
  4005. break;
  4006. case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
  4007. stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
  4008. break;
  4009. case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
  4010. stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
  4011. break;
  4012. case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
  4013. stats->mgmt[MANAGEMENT_PROBE_REQ]++;
  4014. break;
  4015. case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
  4016. stats->mgmt[MANAGEMENT_PROBE_RESP]++;
  4017. break;
  4018. case cpu_to_le16(IEEE80211_STYPE_BEACON):
  4019. stats->mgmt[MANAGEMENT_BEACON]++;
  4020. break;
  4021. case cpu_to_le16(IEEE80211_STYPE_ATIM):
  4022. stats->mgmt[MANAGEMENT_ATIM]++;
  4023. break;
  4024. case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
  4025. stats->mgmt[MANAGEMENT_DISASSOC]++;
  4026. break;
  4027. case cpu_to_le16(IEEE80211_STYPE_AUTH):
  4028. stats->mgmt[MANAGEMENT_AUTH]++;
  4029. break;
  4030. case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
  4031. stats->mgmt[MANAGEMENT_DEAUTH]++;
  4032. break;
  4033. case cpu_to_le16(IEEE80211_STYPE_ACTION):
  4034. stats->mgmt[MANAGEMENT_ACTION]++;
  4035. break;
  4036. }
  4037. } else if (ieee80211_is_ctl(fc)) {
  4038. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  4039. case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
  4040. stats->ctrl[CONTROL_BACK_REQ]++;
  4041. break;
  4042. case cpu_to_le16(IEEE80211_STYPE_BACK):
  4043. stats->ctrl[CONTROL_BACK]++;
  4044. break;
  4045. case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
  4046. stats->ctrl[CONTROL_PSPOLL]++;
  4047. break;
  4048. case cpu_to_le16(IEEE80211_STYPE_RTS):
  4049. stats->ctrl[CONTROL_RTS]++;
  4050. break;
  4051. case cpu_to_le16(IEEE80211_STYPE_CTS):
  4052. stats->ctrl[CONTROL_CTS]++;
  4053. break;
  4054. case cpu_to_le16(IEEE80211_STYPE_ACK):
  4055. stats->ctrl[CONTROL_ACK]++;
  4056. break;
  4057. case cpu_to_le16(IEEE80211_STYPE_CFEND):
  4058. stats->ctrl[CONTROL_CFEND]++;
  4059. break;
  4060. case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
  4061. stats->ctrl[CONTROL_CFENDACK]++;
  4062. break;
  4063. }
  4064. } else {
  4065. /* data */
  4066. stats->data_cnt++;
  4067. stats->data_bytes += len;
  4068. }
  4069. }
  4070. EXPORT_SYMBOL(il_update_stats);
  4071. #endif
  4072. int il_force_reset(struct il_priv *il, bool external)
  4073. {
  4074. struct il_force_reset *force_reset;
  4075. if (test_bit(S_EXIT_PENDING, &il->status))
  4076. return -EINVAL;
  4077. force_reset = &il->force_reset;
  4078. force_reset->reset_request_count++;
  4079. if (!external) {
  4080. if (force_reset->last_force_reset_jiffies &&
  4081. time_after(force_reset->last_force_reset_jiffies +
  4082. force_reset->reset_duration, jiffies)) {
  4083. D_INFO("force reset rejected\n");
  4084. force_reset->reset_reject_count++;
  4085. return -EAGAIN;
  4086. }
  4087. }
  4088. force_reset->reset_success_count++;
  4089. force_reset->last_force_reset_jiffies = jiffies;
  4090. /*
  4091. * if the request is from external(ex: debugfs),
  4092. * then always perform the request in regardless the module
  4093. * parameter setting
  4094. * if the request is from internal (uCode error or driver
  4095. * detect failure), then fw_restart module parameter
  4096. * need to be check before performing firmware reload
  4097. */
  4098. if (!external && !il->cfg->mod_params->restart_fw) {
  4099. D_INFO("Cancel firmware reload based on "
  4100. "module parameter setting\n");
  4101. return 0;
  4102. }
  4103. IL_ERR("On demand firmware reload\n");
  4104. /* Set the FW error flag -- cleared on il_down */
  4105. set_bit(S_FW_ERROR, &il->status);
  4106. wake_up(&il->wait_command_queue);
  4107. /*
  4108. * Keep the restart process from trying to send host
  4109. * commands by clearing the INIT status bit
  4110. */
  4111. clear_bit(S_READY, &il->status);
  4112. queue_work(il->workqueue, &il->restart);
  4113. return 0;
  4114. }
  4115. int
  4116. il_mac_change_interface(struct ieee80211_hw *hw,
  4117. struct ieee80211_vif *vif,
  4118. enum nl80211_iftype newtype, bool newp2p)
  4119. {
  4120. struct il_priv *il = hw->priv;
  4121. struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif);
  4122. u32 modes;
  4123. int err;
  4124. newtype = ieee80211_iftype_p2p(newtype, newp2p);
  4125. mutex_lock(&il->mutex);
  4126. if (!ctx->vif || !il_is_ready_rf(il)) {
  4127. /*
  4128. * Huh? But wait ... this can maybe happen when
  4129. * we're in the middle of a firmware restart!
  4130. */
  4131. err = -EBUSY;
  4132. goto out;
  4133. }
  4134. modes = ctx->interface_modes | ctx->exclusive_interface_modes;
  4135. if (!(modes & BIT(newtype))) {
  4136. err = -EOPNOTSUPP;
  4137. goto out;
  4138. }
  4139. if ((il->ctx.exclusive_interface_modes & BIT(il->ctx.vif->type)) ||
  4140. (il->ctx.exclusive_interface_modes & BIT(newtype))) {
  4141. err = -EINVAL;
  4142. goto out;
  4143. }
  4144. /* success */
  4145. il_teardown_interface(il, vif, true);
  4146. vif->type = newtype;
  4147. vif->p2p = newp2p;
  4148. err = il_setup_interface(il, ctx);
  4149. WARN_ON(err);
  4150. /*
  4151. * We've switched internally, but submitting to the
  4152. * device may have failed for some reason. Mask this
  4153. * error, because otherwise mac80211 will not switch
  4154. * (and set the interface type back) and we'll be
  4155. * out of sync with it.
  4156. */
  4157. err = 0;
  4158. out:
  4159. mutex_unlock(&il->mutex);
  4160. return err;
  4161. }
  4162. EXPORT_SYMBOL(il_mac_change_interface);
  4163. /*
  4164. * On every watchdog tick we check (latest) time stamp. If it does not
  4165. * change during timeout period and queue is not empty we reset firmware.
  4166. */
  4167. static int il_check_stuck_queue(struct il_priv *il, int cnt)
  4168. {
  4169. struct il_tx_queue *txq = &il->txq[cnt];
  4170. struct il_queue *q = &txq->q;
  4171. unsigned long timeout;
  4172. int ret;
  4173. if (q->read_ptr == q->write_ptr) {
  4174. txq->time_stamp = jiffies;
  4175. return 0;
  4176. }
  4177. timeout = txq->time_stamp +
  4178. msecs_to_jiffies(il->cfg->base_params->wd_timeout);
  4179. if (time_after(jiffies, timeout)) {
  4180. IL_ERR("Queue %d stuck for %u ms.\n",
  4181. q->id, il->cfg->base_params->wd_timeout);
  4182. ret = il_force_reset(il, false);
  4183. return (ret == -EAGAIN) ? 0 : 1;
  4184. }
  4185. return 0;
  4186. }
  4187. /*
  4188. * Making watchdog tick be a quarter of timeout assure we will
  4189. * discover the queue hung between timeout and 1.25*timeout
  4190. */
  4191. #define IL_WD_TICK(timeout) ((timeout) / 4)
  4192. /*
  4193. * Watchdog timer callback, we check each tx queue for stuck, if if hung
  4194. * we reset the firmware. If everything is fine just rearm the timer.
  4195. */
  4196. void il_bg_watchdog(unsigned long data)
  4197. {
  4198. struct il_priv *il = (struct il_priv *)data;
  4199. int cnt;
  4200. unsigned long timeout;
  4201. if (test_bit(S_EXIT_PENDING, &il->status))
  4202. return;
  4203. timeout = il->cfg->base_params->wd_timeout;
  4204. if (timeout == 0)
  4205. return;
  4206. /* monitor and check for stuck cmd queue */
  4207. if (il_check_stuck_queue(il, il->cmd_queue))
  4208. return;
  4209. /* monitor and check for other stuck queues */
  4210. if (il_is_any_associated(il)) {
  4211. for (cnt = 0; cnt < il->hw_params.max_txq_num; cnt++) {
  4212. /* skip as we already checked the command queue */
  4213. if (cnt == il->cmd_queue)
  4214. continue;
  4215. if (il_check_stuck_queue(il, cnt))
  4216. return;
  4217. }
  4218. }
  4219. mod_timer(&il->watchdog, jiffies +
  4220. msecs_to_jiffies(IL_WD_TICK(timeout)));
  4221. }
  4222. EXPORT_SYMBOL(il_bg_watchdog);
  4223. void il_setup_watchdog(struct il_priv *il)
  4224. {
  4225. unsigned int timeout = il->cfg->base_params->wd_timeout;
  4226. if (timeout)
  4227. mod_timer(&il->watchdog,
  4228. jiffies + msecs_to_jiffies(IL_WD_TICK(timeout)));
  4229. else
  4230. del_timer(&il->watchdog);
  4231. }
  4232. EXPORT_SYMBOL(il_setup_watchdog);
  4233. /*
  4234. * extended beacon time format
  4235. * time in usec will be changed into a 32-bit value in extended:internal format
  4236. * the extended part is the beacon counts
  4237. * the internal part is the time in usec within one beacon interval
  4238. */
  4239. u32
  4240. il_usecs_to_beacons(struct il_priv *il,
  4241. u32 usec, u32 beacon_interval)
  4242. {
  4243. u32 quot;
  4244. u32 rem;
  4245. u32 interval = beacon_interval * TIME_UNIT;
  4246. if (!interval || !usec)
  4247. return 0;
  4248. quot = (usec / interval) &
  4249. (il_beacon_time_mask_high(il,
  4250. il->hw_params.beacon_time_tsf_bits) >>
  4251. il->hw_params.beacon_time_tsf_bits);
  4252. rem = (usec % interval) & il_beacon_time_mask_low(il,
  4253. il->hw_params.beacon_time_tsf_bits);
  4254. return (quot << il->hw_params.beacon_time_tsf_bits) + rem;
  4255. }
  4256. EXPORT_SYMBOL(il_usecs_to_beacons);
  4257. /* base is usually what we get from ucode with each received frame,
  4258. * the same as HW timer counter counting down
  4259. */
  4260. __le32 il_add_beacon_time(struct il_priv *il, u32 base,
  4261. u32 addon, u32 beacon_interval)
  4262. {
  4263. u32 base_low = base & il_beacon_time_mask_low(il,
  4264. il->hw_params.beacon_time_tsf_bits);
  4265. u32 addon_low = addon & il_beacon_time_mask_low(il,
  4266. il->hw_params.beacon_time_tsf_bits);
  4267. u32 interval = beacon_interval * TIME_UNIT;
  4268. u32 res = (base & il_beacon_time_mask_high(il,
  4269. il->hw_params.beacon_time_tsf_bits)) +
  4270. (addon & il_beacon_time_mask_high(il,
  4271. il->hw_params.beacon_time_tsf_bits));
  4272. if (base_low > addon_low)
  4273. res += base_low - addon_low;
  4274. else if (base_low < addon_low) {
  4275. res += interval + base_low - addon_low;
  4276. res += (1 << il->hw_params.beacon_time_tsf_bits);
  4277. } else
  4278. res += (1 << il->hw_params.beacon_time_tsf_bits);
  4279. return cpu_to_le32(res);
  4280. }
  4281. EXPORT_SYMBOL(il_add_beacon_time);
  4282. #ifdef CONFIG_PM
  4283. int il_pci_suspend(struct device *device)
  4284. {
  4285. struct pci_dev *pdev = to_pci_dev(device);
  4286. struct il_priv *il = pci_get_drvdata(pdev);
  4287. /*
  4288. * This function is called when system goes into suspend state
  4289. * mac80211 will call il_mac_stop() from the mac80211 suspend function
  4290. * first but since il_mac_stop() has no knowledge of who the caller is,
  4291. * it will not call apm_ops.stop() to stop the DMA operation.
  4292. * Calling apm_ops.stop here to make sure we stop the DMA.
  4293. */
  4294. il_apm_stop(il);
  4295. return 0;
  4296. }
  4297. EXPORT_SYMBOL(il_pci_suspend);
  4298. int il_pci_resume(struct device *device)
  4299. {
  4300. struct pci_dev *pdev = to_pci_dev(device);
  4301. struct il_priv *il = pci_get_drvdata(pdev);
  4302. bool hw_rfkill = false;
  4303. /*
  4304. * We disable the RETRY_TIMEOUT register (0x41) to keep
  4305. * PCI Tx retries from interfering with C3 CPU state.
  4306. */
  4307. pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
  4308. il_enable_interrupts(il);
  4309. if (!(_il_rd(il, CSR_GP_CNTRL) &
  4310. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  4311. hw_rfkill = true;
  4312. if (hw_rfkill)
  4313. set_bit(S_RF_KILL_HW, &il->status);
  4314. else
  4315. clear_bit(S_RF_KILL_HW, &il->status);
  4316. wiphy_rfkill_set_hw_state(il->hw->wiphy, hw_rfkill);
  4317. return 0;
  4318. }
  4319. EXPORT_SYMBOL(il_pci_resume);
  4320. const struct dev_pm_ops il_pm_ops = {
  4321. .suspend = il_pci_suspend,
  4322. .resume = il_pci_resume,
  4323. .freeze = il_pci_suspend,
  4324. .thaw = il_pci_resume,
  4325. .poweroff = il_pci_suspend,
  4326. .restore = il_pci_resume,
  4327. };
  4328. EXPORT_SYMBOL(il_pm_ops);
  4329. #endif /* CONFIG_PM */
  4330. static void
  4331. il_update_qos(struct il_priv *il, struct il_rxon_context *ctx)
  4332. {
  4333. if (test_bit(S_EXIT_PENDING, &il->status))
  4334. return;
  4335. if (!ctx->is_active)
  4336. return;
  4337. ctx->qos_data.def_qos_parm.qos_flags = 0;
  4338. if (ctx->qos_data.qos_active)
  4339. ctx->qos_data.def_qos_parm.qos_flags |=
  4340. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  4341. if (ctx->ht.enabled)
  4342. ctx->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
  4343. D_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
  4344. ctx->qos_data.qos_active,
  4345. ctx->qos_data.def_qos_parm.qos_flags);
  4346. il_send_cmd_pdu_async(il, ctx->qos_cmd,
  4347. sizeof(struct il_qosparam_cmd),
  4348. &ctx->qos_data.def_qos_parm, NULL);
  4349. }
  4350. /**
  4351. * il_mac_config - mac80211 config callback
  4352. */
  4353. int il_mac_config(struct ieee80211_hw *hw, u32 changed)
  4354. {
  4355. struct il_priv *il = hw->priv;
  4356. const struct il_channel_info *ch_info;
  4357. struct ieee80211_conf *conf = &hw->conf;
  4358. struct ieee80211_channel *channel = conf->channel;
  4359. struct il_ht_config *ht_conf = &il->current_ht_config;
  4360. struct il_rxon_context *ctx = &il->ctx;
  4361. unsigned long flags = 0;
  4362. int ret = 0;
  4363. u16 ch;
  4364. int scan_active = 0;
  4365. bool ht_changed = false;
  4366. if (WARN_ON(!il->cfg->ops->legacy))
  4367. return -EOPNOTSUPP;
  4368. mutex_lock(&il->mutex);
  4369. D_MAC80211("enter to channel %d changed 0x%X\n",
  4370. channel->hw_value, changed);
  4371. if (unlikely(test_bit(S_SCANNING, &il->status))) {
  4372. scan_active = 1;
  4373. D_MAC80211("scan active\n");
  4374. }
  4375. if (changed & (IEEE80211_CONF_CHANGE_SMPS |
  4376. IEEE80211_CONF_CHANGE_CHANNEL)) {
  4377. /* mac80211 uses static for non-HT which is what we want */
  4378. il->current_ht_config.smps = conf->smps_mode;
  4379. /*
  4380. * Recalculate chain counts.
  4381. *
  4382. * If monitor mode is enabled then mac80211 will
  4383. * set up the SM PS mode to OFF if an HT channel is
  4384. * configured.
  4385. */
  4386. if (il->cfg->ops->hcmd->set_rxon_chain)
  4387. il->cfg->ops->hcmd->set_rxon_chain(il, &il->ctx);
  4388. }
  4389. /* during scanning mac80211 will delay channel setting until
  4390. * scan finish with changed = 0
  4391. */
  4392. if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
  4393. if (scan_active)
  4394. goto set_ch_out;
  4395. ch = channel->hw_value;
  4396. ch_info = il_get_channel_info(il, channel->band, ch);
  4397. if (!il_is_channel_valid(ch_info)) {
  4398. D_MAC80211("leave - invalid channel\n");
  4399. ret = -EINVAL;
  4400. goto set_ch_out;
  4401. }
  4402. if (il->iw_mode == NL80211_IFTYPE_ADHOC &&
  4403. !il_is_channel_ibss(ch_info)) {
  4404. D_MAC80211("leave - not IBSS channel\n");
  4405. ret = -EINVAL;
  4406. goto set_ch_out;
  4407. }
  4408. spin_lock_irqsave(&il->lock, flags);
  4409. /* Configure HT40 channels */
  4410. if (ctx->ht.enabled != conf_is_ht(conf)) {
  4411. ctx->ht.enabled = conf_is_ht(conf);
  4412. ht_changed = true;
  4413. }
  4414. if (ctx->ht.enabled) {
  4415. if (conf_is_ht40_minus(conf)) {
  4416. ctx->ht.extension_chan_offset =
  4417. IEEE80211_HT_PARAM_CHA_SEC_BELOW;
  4418. ctx->ht.is_40mhz = true;
  4419. } else if (conf_is_ht40_plus(conf)) {
  4420. ctx->ht.extension_chan_offset =
  4421. IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
  4422. ctx->ht.is_40mhz = true;
  4423. } else {
  4424. ctx->ht.extension_chan_offset =
  4425. IEEE80211_HT_PARAM_CHA_SEC_NONE;
  4426. ctx->ht.is_40mhz = false;
  4427. }
  4428. } else
  4429. ctx->ht.is_40mhz = false;
  4430. /*
  4431. * Default to no protection. Protection mode will
  4432. * later be set from BSS config in il_ht_conf
  4433. */
  4434. ctx->ht.protection =
  4435. IEEE80211_HT_OP_MODE_PROTECTION_NONE;
  4436. /* if we are switching from ht to 2.4 clear flags
  4437. * from any ht related info since 2.4 does not
  4438. * support ht */
  4439. if ((le16_to_cpu(ctx->staging.channel) != ch))
  4440. ctx->staging.flags = 0;
  4441. il_set_rxon_channel(il, channel, ctx);
  4442. il_set_rxon_ht(il, ht_conf);
  4443. il_set_flags_for_band(il, ctx, channel->band,
  4444. ctx->vif);
  4445. spin_unlock_irqrestore(&il->lock, flags);
  4446. if (il->cfg->ops->legacy->update_bcast_stations)
  4447. ret =
  4448. il->cfg->ops->legacy->update_bcast_stations(il);
  4449. set_ch_out:
  4450. /* The list of supported rates and rate mask can be different
  4451. * for each band; since the band may have changed, reset
  4452. * the rate mask to what mac80211 lists */
  4453. il_set_rate(il);
  4454. }
  4455. if (changed & (IEEE80211_CONF_CHANGE_PS |
  4456. IEEE80211_CONF_CHANGE_IDLE)) {
  4457. ret = il_power_update_mode(il, false);
  4458. if (ret)
  4459. D_MAC80211("Error setting sleep level\n");
  4460. }
  4461. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  4462. D_MAC80211("TX Power old=%d new=%d\n",
  4463. il->tx_power_user_lmt, conf->power_level);
  4464. il_set_tx_power(il, conf->power_level, false);
  4465. }
  4466. if (!il_is_ready(il)) {
  4467. D_MAC80211("leave - not ready\n");
  4468. goto out;
  4469. }
  4470. if (scan_active)
  4471. goto out;
  4472. if (memcmp(&ctx->active, &ctx->staging, sizeof(ctx->staging)))
  4473. il_commit_rxon(il, ctx);
  4474. else
  4475. D_INFO("Not re-sending same RXON configuration.\n");
  4476. if (ht_changed)
  4477. il_update_qos(il, ctx);
  4478. out:
  4479. D_MAC80211("leave\n");
  4480. mutex_unlock(&il->mutex);
  4481. return ret;
  4482. }
  4483. EXPORT_SYMBOL(il_mac_config);
  4484. void il_mac_reset_tsf(struct ieee80211_hw *hw,
  4485. struct ieee80211_vif *vif)
  4486. {
  4487. struct il_priv *il = hw->priv;
  4488. unsigned long flags;
  4489. struct il_rxon_context *ctx = &il->ctx;
  4490. if (WARN_ON(!il->cfg->ops->legacy))
  4491. return;
  4492. mutex_lock(&il->mutex);
  4493. D_MAC80211("enter\n");
  4494. spin_lock_irqsave(&il->lock, flags);
  4495. memset(&il->current_ht_config, 0, sizeof(struct il_ht_config));
  4496. spin_unlock_irqrestore(&il->lock, flags);
  4497. spin_lock_irqsave(&il->lock, flags);
  4498. /* new association get rid of ibss beacon skb */
  4499. if (il->beacon_skb)
  4500. dev_kfree_skb(il->beacon_skb);
  4501. il->beacon_skb = NULL;
  4502. il->timestamp = 0;
  4503. spin_unlock_irqrestore(&il->lock, flags);
  4504. il_scan_cancel_timeout(il, 100);
  4505. if (!il_is_ready_rf(il)) {
  4506. D_MAC80211("leave - not ready\n");
  4507. mutex_unlock(&il->mutex);
  4508. return;
  4509. }
  4510. /* we are restarting association process
  4511. * clear RXON_FILTER_ASSOC_MSK bit
  4512. */
  4513. ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4514. il_commit_rxon(il, ctx);
  4515. il_set_rate(il);
  4516. mutex_unlock(&il->mutex);
  4517. D_MAC80211("leave\n");
  4518. }
  4519. EXPORT_SYMBOL(il_mac_reset_tsf);
  4520. static void il_ht_conf(struct il_priv *il,
  4521. struct ieee80211_vif *vif)
  4522. {
  4523. struct il_ht_config *ht_conf = &il->current_ht_config;
  4524. struct ieee80211_sta *sta;
  4525. struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
  4526. struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif);
  4527. D_ASSOC("enter:\n");
  4528. if (!ctx->ht.enabled)
  4529. return;
  4530. ctx->ht.protection =
  4531. bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
  4532. ctx->ht.non_gf_sta_present =
  4533. !!(bss_conf->ht_operation_mode &
  4534. IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
  4535. ht_conf->single_chain_sufficient = false;
  4536. switch (vif->type) {
  4537. case NL80211_IFTYPE_STATION:
  4538. rcu_read_lock();
  4539. sta = ieee80211_find_sta(vif, bss_conf->bssid);
  4540. if (sta) {
  4541. struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap;
  4542. int maxstreams;
  4543. maxstreams = (ht_cap->mcs.tx_params &
  4544. IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK)
  4545. >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
  4546. maxstreams += 1;
  4547. if (ht_cap->mcs.rx_mask[1] == 0 &&
  4548. ht_cap->mcs.rx_mask[2] == 0)
  4549. ht_conf->single_chain_sufficient = true;
  4550. if (maxstreams <= 1)
  4551. ht_conf->single_chain_sufficient = true;
  4552. } else {
  4553. /*
  4554. * If at all, this can only happen through a race
  4555. * when the AP disconnects us while we're still
  4556. * setting up the connection, in that case mac80211
  4557. * will soon tell us about that.
  4558. */
  4559. ht_conf->single_chain_sufficient = true;
  4560. }
  4561. rcu_read_unlock();
  4562. break;
  4563. case NL80211_IFTYPE_ADHOC:
  4564. ht_conf->single_chain_sufficient = true;
  4565. break;
  4566. default:
  4567. break;
  4568. }
  4569. D_ASSOC("leave\n");
  4570. }
  4571. static inline void il_set_no_assoc(struct il_priv *il,
  4572. struct ieee80211_vif *vif)
  4573. {
  4574. struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif);
  4575. /*
  4576. * inform the ucode that there is no longer an
  4577. * association and that no more packets should be
  4578. * sent
  4579. */
  4580. ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4581. ctx->staging.assoc_id = 0;
  4582. il_commit_rxon(il, ctx);
  4583. }
  4584. static void il_beacon_update(struct ieee80211_hw *hw,
  4585. struct ieee80211_vif *vif)
  4586. {
  4587. struct il_priv *il = hw->priv;
  4588. unsigned long flags;
  4589. __le64 timestamp;
  4590. struct sk_buff *skb = ieee80211_beacon_get(hw, vif);
  4591. if (!skb)
  4592. return;
  4593. D_MAC80211("enter\n");
  4594. lockdep_assert_held(&il->mutex);
  4595. if (!il->beacon_ctx) {
  4596. IL_ERR("update beacon but no beacon context!\n");
  4597. dev_kfree_skb(skb);
  4598. return;
  4599. }
  4600. spin_lock_irqsave(&il->lock, flags);
  4601. if (il->beacon_skb)
  4602. dev_kfree_skb(il->beacon_skb);
  4603. il->beacon_skb = skb;
  4604. timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
  4605. il->timestamp = le64_to_cpu(timestamp);
  4606. D_MAC80211("leave\n");
  4607. spin_unlock_irqrestore(&il->lock, flags);
  4608. if (!il_is_ready_rf(il)) {
  4609. D_MAC80211("leave - RF not ready\n");
  4610. return;
  4611. }
  4612. il->cfg->ops->legacy->post_associate(il);
  4613. }
  4614. void il_mac_bss_info_changed(struct ieee80211_hw *hw,
  4615. struct ieee80211_vif *vif,
  4616. struct ieee80211_bss_conf *bss_conf,
  4617. u32 changes)
  4618. {
  4619. struct il_priv *il = hw->priv;
  4620. struct il_rxon_context *ctx = il_rxon_ctx_from_vif(vif);
  4621. int ret;
  4622. if (WARN_ON(!il->cfg->ops->legacy))
  4623. return;
  4624. D_MAC80211("changes = 0x%X\n", changes);
  4625. mutex_lock(&il->mutex);
  4626. if (!il_is_alive(il)) {
  4627. mutex_unlock(&il->mutex);
  4628. return;
  4629. }
  4630. if (changes & BSS_CHANGED_QOS) {
  4631. unsigned long flags;
  4632. spin_lock_irqsave(&il->lock, flags);
  4633. ctx->qos_data.qos_active = bss_conf->qos;
  4634. il_update_qos(il, ctx);
  4635. spin_unlock_irqrestore(&il->lock, flags);
  4636. }
  4637. if (changes & BSS_CHANGED_BEACON_ENABLED) {
  4638. /*
  4639. * the add_interface code must make sure we only ever
  4640. * have a single interface that could be beaconing at
  4641. * any time.
  4642. */
  4643. if (vif->bss_conf.enable_beacon)
  4644. il->beacon_ctx = ctx;
  4645. else
  4646. il->beacon_ctx = NULL;
  4647. }
  4648. if (changes & BSS_CHANGED_BSSID) {
  4649. D_MAC80211("BSSID %pM\n", bss_conf->bssid);
  4650. /*
  4651. * If there is currently a HW scan going on in the
  4652. * background then we need to cancel it else the RXON
  4653. * below/in post_associate will fail.
  4654. */
  4655. if (il_scan_cancel_timeout(il, 100)) {
  4656. IL_WARN(
  4657. "Aborted scan still in progress after 100ms\n");
  4658. D_MAC80211(
  4659. "leaving - scan abort failed.\n");
  4660. mutex_unlock(&il->mutex);
  4661. return;
  4662. }
  4663. /* mac80211 only sets assoc when in STATION mode */
  4664. if (vif->type == NL80211_IFTYPE_ADHOC || bss_conf->assoc) {
  4665. memcpy(ctx->staging.bssid_addr,
  4666. bss_conf->bssid, ETH_ALEN);
  4667. /* currently needed in a few places */
  4668. memcpy(il->bssid, bss_conf->bssid, ETH_ALEN);
  4669. } else {
  4670. ctx->staging.filter_flags &=
  4671. ~RXON_FILTER_ASSOC_MSK;
  4672. }
  4673. }
  4674. /*
  4675. * This needs to be after setting the BSSID in case
  4676. * mac80211 decides to do both changes at once because
  4677. * it will invoke post_associate.
  4678. */
  4679. if (vif->type == NL80211_IFTYPE_ADHOC && (changes & BSS_CHANGED_BEACON))
  4680. il_beacon_update(hw, vif);
  4681. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  4682. D_MAC80211("ERP_PREAMBLE %d\n",
  4683. bss_conf->use_short_preamble);
  4684. if (bss_conf->use_short_preamble)
  4685. ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  4686. else
  4687. ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  4688. }
  4689. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  4690. D_MAC80211(
  4691. "ERP_CTS %d\n", bss_conf->use_cts_prot);
  4692. if (bss_conf->use_cts_prot && il->band != IEEE80211_BAND_5GHZ)
  4693. ctx->staging.flags |= RXON_FLG_TGG_PROTECT_MSK;
  4694. else
  4695. ctx->staging.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  4696. if (bss_conf->use_cts_prot)
  4697. ctx->staging.flags |= RXON_FLG_SELF_CTS_EN;
  4698. else
  4699. ctx->staging.flags &= ~RXON_FLG_SELF_CTS_EN;
  4700. }
  4701. if (changes & BSS_CHANGED_BASIC_RATES) {
  4702. /* XXX use this information
  4703. *
  4704. * To do that, remove code from il_set_rate() and put something
  4705. * like this here:
  4706. *
  4707. if (A-band)
  4708. ctx->staging.ofdm_basic_rates =
  4709. bss_conf->basic_rates;
  4710. else
  4711. ctx->staging.ofdm_basic_rates =
  4712. bss_conf->basic_rates >> 4;
  4713. ctx->staging.cck_basic_rates =
  4714. bss_conf->basic_rates & 0xF;
  4715. */
  4716. }
  4717. if (changes & BSS_CHANGED_HT) {
  4718. il_ht_conf(il, vif);
  4719. if (il->cfg->ops->hcmd->set_rxon_chain)
  4720. il->cfg->ops->hcmd->set_rxon_chain(il, ctx);
  4721. }
  4722. if (changes & BSS_CHANGED_ASSOC) {
  4723. D_MAC80211("ASSOC %d\n", bss_conf->assoc);
  4724. if (bss_conf->assoc) {
  4725. il->timestamp = bss_conf->timestamp;
  4726. if (!il_is_rfkill(il))
  4727. il->cfg->ops->legacy->post_associate(il);
  4728. } else
  4729. il_set_no_assoc(il, vif);
  4730. }
  4731. if (changes && il_is_associated_ctx(ctx) && bss_conf->aid) {
  4732. D_MAC80211("Changes (%#x) while associated\n",
  4733. changes);
  4734. ret = il_send_rxon_assoc(il, ctx);
  4735. if (!ret) {
  4736. /* Sync active_rxon with latest change. */
  4737. memcpy((void *)&ctx->active,
  4738. &ctx->staging,
  4739. sizeof(struct il_rxon_cmd));
  4740. }
  4741. }
  4742. if (changes & BSS_CHANGED_BEACON_ENABLED) {
  4743. if (vif->bss_conf.enable_beacon) {
  4744. memcpy(ctx->staging.bssid_addr,
  4745. bss_conf->bssid, ETH_ALEN);
  4746. memcpy(il->bssid, bss_conf->bssid, ETH_ALEN);
  4747. il->cfg->ops->legacy->config_ap(il);
  4748. } else
  4749. il_set_no_assoc(il, vif);
  4750. }
  4751. if (changes & BSS_CHANGED_IBSS) {
  4752. ret = il->cfg->ops->legacy->manage_ibss_station(il, vif,
  4753. bss_conf->ibss_joined);
  4754. if (ret)
  4755. IL_ERR("failed to %s IBSS station %pM\n",
  4756. bss_conf->ibss_joined ? "add" : "remove",
  4757. bss_conf->bssid);
  4758. }
  4759. mutex_unlock(&il->mutex);
  4760. D_MAC80211("leave\n");
  4761. }
  4762. EXPORT_SYMBOL(il_mac_bss_info_changed);
  4763. irqreturn_t il_isr(int irq, void *data)
  4764. {
  4765. struct il_priv *il = data;
  4766. u32 inta, inta_mask;
  4767. u32 inta_fh;
  4768. unsigned long flags;
  4769. if (!il)
  4770. return IRQ_NONE;
  4771. spin_lock_irqsave(&il->lock, flags);
  4772. /* Disable (but don't clear!) interrupts here to avoid
  4773. * back-to-back ISRs and sporadic interrupts from our NIC.
  4774. * If we have something to service, the tasklet will re-enable ints.
  4775. * If we *don't* have something, we'll re-enable before leaving here. */
  4776. inta_mask = _il_rd(il, CSR_INT_MASK); /* just for debug */
  4777. _il_wr(il, CSR_INT_MASK, 0x00000000);
  4778. /* Discover which interrupts are active/pending */
  4779. inta = _il_rd(il, CSR_INT);
  4780. inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
  4781. /* Ignore interrupt if there's nothing in NIC to service.
  4782. * This may be due to IRQ shared with another device,
  4783. * or due to sporadic interrupts thrown from our NIC. */
  4784. if (!inta && !inta_fh) {
  4785. D_ISR(
  4786. "Ignore interrupt, inta == 0, inta_fh == 0\n");
  4787. goto none;
  4788. }
  4789. if (inta == 0xFFFFFFFF || (inta & 0xFFFFFFF0) == 0xa5a5a5a0) {
  4790. /* Hardware disappeared. It might have already raised
  4791. * an interrupt */
  4792. IL_WARN("HARDWARE GONE?? INTA == 0x%08x\n", inta);
  4793. goto unplugged;
  4794. }
  4795. D_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4796. inta, inta_mask, inta_fh);
  4797. inta &= ~CSR_INT_BIT_SCD;
  4798. /* il_irq_tasklet() will service interrupts and re-enable them */
  4799. if (likely(inta || inta_fh))
  4800. tasklet_schedule(&il->irq_tasklet);
  4801. unplugged:
  4802. spin_unlock_irqrestore(&il->lock, flags);
  4803. return IRQ_HANDLED;
  4804. none:
  4805. /* re-enable interrupts here since we don't have anything to service. */
  4806. /* only Re-enable if disabled by irq */
  4807. if (test_bit(S_INT_ENABLED, &il->status))
  4808. il_enable_interrupts(il);
  4809. spin_unlock_irqrestore(&il->lock, flags);
  4810. return IRQ_NONE;
  4811. }
  4812. EXPORT_SYMBOL(il_isr);
  4813. /*
  4814. * il_tx_cmd_protection: Set rts/cts. 3945 and 4965 only share this
  4815. * function.
  4816. */
  4817. void il_tx_cmd_protection(struct il_priv *il,
  4818. struct ieee80211_tx_info *info,
  4819. __le16 fc, __le32 *tx_flags)
  4820. {
  4821. if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
  4822. *tx_flags |= TX_CMD_FLG_RTS_MSK;
  4823. *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  4824. *tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  4825. if (!ieee80211_is_mgmt(fc))
  4826. return;
  4827. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  4828. case cpu_to_le16(IEEE80211_STYPE_AUTH):
  4829. case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
  4830. case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
  4831. case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
  4832. *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  4833. *tx_flags |= TX_CMD_FLG_CTS_MSK;
  4834. break;
  4835. }
  4836. } else if (info->control.rates[0].flags &
  4837. IEEE80211_TX_RC_USE_CTS_PROTECT) {
  4838. *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  4839. *tx_flags |= TX_CMD_FLG_CTS_MSK;
  4840. *tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  4841. }
  4842. }
  4843. EXPORT_SYMBOL(il_tx_cmd_protection);