tegra30-beaver.dts 10 KB

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  1. /dts-v1/;
  2. #include "tegra30.dtsi"
  3. / {
  4. model = "NVIDIA Tegra30 Beaver evaluation board";
  5. compatible = "nvidia,beaver", "nvidia,tegra30";
  6. memory {
  7. reg = <0x80000000 0x7ff00000>;
  8. };
  9. host1x {
  10. hdmi {
  11. status = "okay";
  12. vdd-supply = <&sys_3v3_reg>;
  13. pll-supply = <&vio_reg>;
  14. nvidia,hpd-gpio =
  15. <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
  16. nvidia,ddc-i2c-bus = <&hdmiddc>;
  17. };
  18. };
  19. pinmux {
  20. pinctrl-names = "default";
  21. pinctrl-0 = <&state_default>;
  22. state_default: pinmux {
  23. sdmmc1_clk_pz0 {
  24. nvidia,pins = "sdmmc1_clk_pz0";
  25. nvidia,function = "sdmmc1";
  26. nvidia,pull = <0>;
  27. nvidia,tristate = <0>;
  28. };
  29. sdmmc1_cmd_pz1 {
  30. nvidia,pins = "sdmmc1_cmd_pz1",
  31. "sdmmc1_dat0_py7",
  32. "sdmmc1_dat1_py6",
  33. "sdmmc1_dat2_py5",
  34. "sdmmc1_dat3_py4";
  35. nvidia,function = "sdmmc1";
  36. nvidia,pull = <2>;
  37. nvidia,tristate = <0>;
  38. };
  39. sdmmc3_clk_pa6 {
  40. nvidia,pins = "sdmmc3_clk_pa6";
  41. nvidia,function = "sdmmc3";
  42. nvidia,pull = <0>;
  43. nvidia,tristate = <0>;
  44. };
  45. sdmmc3_cmd_pa7 {
  46. nvidia,pins = "sdmmc3_cmd_pa7",
  47. "sdmmc3_dat0_pb7",
  48. "sdmmc3_dat1_pb6",
  49. "sdmmc3_dat2_pb5",
  50. "sdmmc3_dat3_pb4";
  51. nvidia,function = "sdmmc3";
  52. nvidia,pull = <2>;
  53. nvidia,tristate = <0>;
  54. };
  55. sdmmc4_clk_pcc4 {
  56. nvidia,pins = "sdmmc4_clk_pcc4",
  57. "sdmmc4_rst_n_pcc3";
  58. nvidia,function = "sdmmc4";
  59. nvidia,pull = <0>;
  60. nvidia,tristate = <0>;
  61. };
  62. sdmmc4_dat0_paa0 {
  63. nvidia,pins = "sdmmc4_dat0_paa0",
  64. "sdmmc4_dat1_paa1",
  65. "sdmmc4_dat2_paa2",
  66. "sdmmc4_dat3_paa3",
  67. "sdmmc4_dat4_paa4",
  68. "sdmmc4_dat5_paa5",
  69. "sdmmc4_dat6_paa6",
  70. "sdmmc4_dat7_paa7";
  71. nvidia,function = "sdmmc4";
  72. nvidia,pull = <2>;
  73. nvidia,tristate = <0>;
  74. };
  75. dap2_fs_pa2 {
  76. nvidia,pins = "dap2_fs_pa2",
  77. "dap2_sclk_pa3",
  78. "dap2_din_pa4",
  79. "dap2_dout_pa5";
  80. nvidia,function = "i2s1";
  81. nvidia,pull = <0>;
  82. nvidia,tristate = <0>;
  83. };
  84. sdio3 {
  85. nvidia,pins = "drive_sdio3";
  86. nvidia,high-speed-mode = <0>;
  87. nvidia,schmitt = <0>;
  88. nvidia,pull-down-strength = <46>;
  89. nvidia,pull-up-strength = <42>;
  90. nvidia,slew-rate-rising = <1>;
  91. nvidia,slew-rate-falling = <1>;
  92. };
  93. };
  94. };
  95. serial@70006000 {
  96. status = "okay";
  97. };
  98. i2c@7000c000 {
  99. status = "okay";
  100. clock-frequency = <100000>;
  101. };
  102. i2c@7000c400 {
  103. status = "okay";
  104. clock-frequency = <100000>;
  105. };
  106. i2c@7000c500 {
  107. status = "okay";
  108. clock-frequency = <100000>;
  109. };
  110. hdmiddc: i2c@7000c700 {
  111. status = "okay";
  112. clock-frequency = <100000>;
  113. };
  114. i2c@7000d000 {
  115. status = "okay";
  116. clock-frequency = <100000>;
  117. rt5640: rt5640 {
  118. compatible = "realtek,rt5640";
  119. reg = <0x1c>;
  120. interrupt-parent = <&gpio>;
  121. interrupts = <TEGRA_GPIO(X, 3) GPIO_ACTIVE_HIGH>;
  122. realtek,ldo1-en-gpios =
  123. <&gpio TEGRA_GPIO(X, 2) GPIO_ACTIVE_HIGH>;
  124. };
  125. tps62361 {
  126. compatible = "ti,tps62361";
  127. reg = <0x60>;
  128. regulator-name = "tps62361-vout";
  129. regulator-min-microvolt = <500000>;
  130. regulator-max-microvolt = <1500000>;
  131. regulator-boot-on;
  132. regulator-always-on;
  133. ti,vsel0-state-high;
  134. ti,vsel1-state-high;
  135. };
  136. pmic: tps65911@2d {
  137. compatible = "ti,tps65911";
  138. reg = <0x2d>;
  139. interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
  140. #interrupt-cells = <2>;
  141. interrupt-controller;
  142. ti,system-power-controller;
  143. #gpio-cells = <2>;
  144. gpio-controller;
  145. vcc1-supply = <&vdd_5v_in_reg>;
  146. vcc2-supply = <&vdd_5v_in_reg>;
  147. vcc3-supply = <&vio_reg>;
  148. vcc4-supply = <&vdd_5v_in_reg>;
  149. vcc5-supply = <&vdd_5v_in_reg>;
  150. vcc6-supply = <&vdd2_reg>;
  151. vcc7-supply = <&vdd_5v_in_reg>;
  152. vccio-supply = <&vdd_5v_in_reg>;
  153. regulators {
  154. #address-cells = <1>;
  155. #size-cells = <0>;
  156. vdd1_reg: vdd1 {
  157. regulator-name = "vddio_ddr_1v2";
  158. regulator-min-microvolt = <1200000>;
  159. regulator-max-microvolt = <1200000>;
  160. regulator-always-on;
  161. };
  162. vdd2_reg: vdd2 {
  163. regulator-name = "vdd_1v5_gen";
  164. regulator-min-microvolt = <1500000>;
  165. regulator-max-microvolt = <1500000>;
  166. regulator-always-on;
  167. };
  168. vddctrl_reg: vddctrl {
  169. regulator-name = "vdd_cpu,vdd_sys";
  170. regulator-min-microvolt = <1000000>;
  171. regulator-max-microvolt = <1000000>;
  172. regulator-always-on;
  173. };
  174. vio_reg: vio {
  175. regulator-name = "vdd_1v8_gen";
  176. regulator-min-microvolt = <1800000>;
  177. regulator-max-microvolt = <1800000>;
  178. regulator-always-on;
  179. };
  180. ldo1_reg: ldo1 {
  181. regulator-name = "vdd_pexa,vdd_pexb";
  182. regulator-min-microvolt = <1050000>;
  183. regulator-max-microvolt = <1050000>;
  184. };
  185. ldo2_reg: ldo2 {
  186. regulator-name = "vdd_sata,avdd_plle";
  187. regulator-min-microvolt = <1050000>;
  188. regulator-max-microvolt = <1050000>;
  189. };
  190. /* LDO3 is not connected to anything */
  191. ldo4_reg: ldo4 {
  192. regulator-name = "vdd_rtc";
  193. regulator-min-microvolt = <1200000>;
  194. regulator-max-microvolt = <1200000>;
  195. regulator-always-on;
  196. };
  197. ldo5_reg: ldo5 {
  198. regulator-name = "vddio_sdmmc,avdd_vdac";
  199. regulator-min-microvolt = <3300000>;
  200. regulator-max-microvolt = <3300000>;
  201. regulator-always-on;
  202. };
  203. ldo6_reg: ldo6 {
  204. regulator-name = "avdd_dsi_csi,pwrdet_mipi";
  205. regulator-min-microvolt = <1200000>;
  206. regulator-max-microvolt = <1200000>;
  207. };
  208. ldo7_reg: ldo7 {
  209. regulator-name = "vdd_pllm,x,u,a_p_c_s";
  210. regulator-min-microvolt = <1200000>;
  211. regulator-max-microvolt = <1200000>;
  212. regulator-always-on;
  213. };
  214. ldo8_reg: ldo8 {
  215. regulator-name = "vdd_ddr_hs";
  216. regulator-min-microvolt = <1000000>;
  217. regulator-max-microvolt = <1000000>;
  218. regulator-always-on;
  219. };
  220. };
  221. };
  222. };
  223. spi@7000da00 {
  224. status = "okay";
  225. spi-max-frequency = <25000000>;
  226. spi-flash@1 {
  227. compatible = "winbond,w25q32";
  228. reg = <1>;
  229. spi-max-frequency = <20000000>;
  230. };
  231. };
  232. ahub {
  233. i2s@70080400 {
  234. status = "okay";
  235. };
  236. };
  237. pmc {
  238. status = "okay";
  239. nvidia,invert-interrupt;
  240. nvidia,suspend-mode = <1>;
  241. nvidia,cpu-pwr-good-time = <2000>;
  242. nvidia,cpu-pwr-off-time = <200>;
  243. nvidia,core-pwr-good-time = <3845 3845>;
  244. nvidia,core-pwr-off-time = <0>;
  245. nvidia,core-power-req-active-high;
  246. nvidia,sys-clock-req-active-high;
  247. };
  248. sdhci@78000000 {
  249. status = "okay";
  250. cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
  251. wp-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>;
  252. power-gpios = <&gpio TEGRA_GPIO(D, 7) GPIO_ACTIVE_HIGH>;
  253. bus-width = <4>;
  254. };
  255. sdhci@78000600 {
  256. status = "okay";
  257. bus-width = <8>;
  258. non-removable;
  259. };
  260. clocks {
  261. compatible = "simple-bus";
  262. #address-cells = <1>;
  263. #size-cells = <0>;
  264. clk32k_in: clock {
  265. compatible = "fixed-clock";
  266. reg=<0>;
  267. #clock-cells = <0>;
  268. clock-frequency = <32768>;
  269. };
  270. };
  271. regulators {
  272. compatible = "simple-bus";
  273. #address-cells = <1>;
  274. #size-cells = <0>;
  275. vdd_5v_in_reg: regulator@0 {
  276. compatible = "regulator-fixed";
  277. reg = <0>;
  278. regulator-name = "vdd_5v_in";
  279. regulator-min-microvolt = <5000000>;
  280. regulator-max-microvolt = <5000000>;
  281. regulator-always-on;
  282. };
  283. chargepump_5v_reg: regulator@1 {
  284. compatible = "regulator-fixed";
  285. reg = <1>;
  286. regulator-name = "chargepump_5v";
  287. regulator-min-microvolt = <5000000>;
  288. regulator-max-microvolt = <5000000>;
  289. regulator-boot-on;
  290. regulator-always-on;
  291. enable-active-high;
  292. gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
  293. };
  294. ddr_reg: regulator@2 {
  295. compatible = "regulator-fixed";
  296. reg = <2>;
  297. regulator-name = "vdd_ddr";
  298. regulator-min-microvolt = <1500000>;
  299. regulator-max-microvolt = <1500000>;
  300. regulator-always-on;
  301. regulator-boot-on;
  302. enable-active-high;
  303. gpio = <&pmic 7 GPIO_ACTIVE_HIGH>;
  304. vin-supply = <&vdd_5v_in_reg>;
  305. };
  306. vdd_5v_sata_reg: regulator@3 {
  307. compatible = "regulator-fixed";
  308. reg = <3>;
  309. regulator-name = "vdd_5v_sata";
  310. regulator-min-microvolt = <5000000>;
  311. regulator-max-microvolt = <5000000>;
  312. regulator-always-on;
  313. regulator-boot-on;
  314. enable-active-high;
  315. gpio = <&gpio TEGRA_GPIO(D, 6) GPIO_ACTIVE_HIGH>;
  316. vin-supply = <&vdd_5v_in_reg>;
  317. };
  318. usb1_vbus_reg: regulator@4 {
  319. compatible = "regulator-fixed";
  320. reg = <4>;
  321. regulator-name = "usb1_vbus";
  322. regulator-min-microvolt = <5000000>;
  323. regulator-max-microvolt = <5000000>;
  324. enable-active-high;
  325. gpio = <&gpio TEGRA_GPIO(I, 4) GPIO_ACTIVE_HIGH>;
  326. gpio-open-drain;
  327. vin-supply = <&vdd_5v_in_reg>;
  328. };
  329. usb3_vbus_reg: regulator@5 {
  330. compatible = "regulator-fixed";
  331. reg = <5>;
  332. regulator-name = "usb3_vbus";
  333. regulator-min-microvolt = <5000000>;
  334. regulator-max-microvolt = <5000000>;
  335. enable-active-high;
  336. gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_HIGH>;
  337. gpio-open-drain;
  338. vin-supply = <&vdd_5v_in_reg>;
  339. };
  340. sys_3v3_reg: regulator@6 {
  341. compatible = "regulator-fixed";
  342. reg = <6>;
  343. regulator-name = "sys_3v3,vdd_3v3_alw";
  344. regulator-min-microvolt = <3300000>;
  345. regulator-max-microvolt = <3300000>;
  346. regulator-always-on;
  347. regulator-boot-on;
  348. enable-active-high;
  349. gpio = <&pmic 6 GPIO_ACTIVE_HIGH>;
  350. vin-supply = <&vdd_5v_in_reg>;
  351. };
  352. sys_3v3_pexs_reg: regulator@7 {
  353. compatible = "regulator-fixed";
  354. reg = <7>;
  355. regulator-name = "sys_3v3_pexs";
  356. regulator-min-microvolt = <3300000>;
  357. regulator-max-microvolt = <3300000>;
  358. regulator-always-on;
  359. regulator-boot-on;
  360. enable-active-high;
  361. gpio = <&gpio TEGRA_GPIO(L, 7) GPIO_ACTIVE_HIGH>;
  362. vin-supply = <&sys_3v3_reg>;
  363. };
  364. };
  365. gpio-leds {
  366. compatible = "gpio-leds";
  367. gpled1 {
  368. label = "LED1"; /* CR5A1 (blue) */
  369. gpios = <&gpio TEGRA_GPIO(L, 1) GPIO_ACTIVE_HIGH>;
  370. };
  371. gpled2 {
  372. label = "LED2"; /* CR4A2 (green) */
  373. gpios = <&gpio TEGRA_GPIO(L, 0) GPIO_ACTIVE_HIGH>;
  374. };
  375. };
  376. sound {
  377. compatible = "nvidia,tegra-audio-rt5640-beaver",
  378. "nvidia,tegra-audio-rt5640";
  379. nvidia,model = "NVIDIA Tegra Beaver";
  380. nvidia,audio-routing =
  381. "Headphones", "HPOR",
  382. "Headphones", "HPOL";
  383. nvidia,i2s-controller = <&tegra_i2s1>;
  384. nvidia,audio-codec = <&rt5640>;
  385. nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>;
  386. clocks = <&tegra_car TEGRA30_CLK_PLL_A>,
  387. <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
  388. <&tegra_car TEGRA30_CLK_EXTERN1>;
  389. clock-names = "pll_a", "pll_a_out0", "mclk";
  390. };
  391. };