kvm.h 17 KB

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  1. #ifndef __KVM_H
  2. #define __KVM_H
  3. /*
  4. * This work is licensed under the terms of the GNU GPL, version 2. See
  5. * the COPYING file in the top-level directory.
  6. */
  7. #include <linux/types.h>
  8. #include <linux/list.h>
  9. #include <linux/mutex.h>
  10. #include <linux/spinlock.h>
  11. #include <linux/mm.h>
  12. #include <asm/signal.h>
  13. #include "vmx.h"
  14. #include <linux/kvm.h>
  15. #include <linux/kvm_para.h>
  16. #define CR0_PE_MASK (1ULL << 0)
  17. #define CR0_MP_MASK (1ULL << 1)
  18. #define CR0_TS_MASK (1ULL << 3)
  19. #define CR0_NE_MASK (1ULL << 5)
  20. #define CR0_WP_MASK (1ULL << 16)
  21. #define CR0_NW_MASK (1ULL << 29)
  22. #define CR0_CD_MASK (1ULL << 30)
  23. #define CR0_PG_MASK (1ULL << 31)
  24. #define CR3_WPT_MASK (1ULL << 3)
  25. #define CR3_PCD_MASK (1ULL << 4)
  26. #define CR3_RESEVED_BITS 0x07ULL
  27. #define CR3_L_MODE_RESEVED_BITS (~((1ULL << 40) - 1) | 0x0fe7ULL)
  28. #define CR3_FLAGS_MASK ((1ULL << 5) - 1)
  29. #define CR4_VME_MASK (1ULL << 0)
  30. #define CR4_PSE_MASK (1ULL << 4)
  31. #define CR4_PAE_MASK (1ULL << 5)
  32. #define CR4_PGE_MASK (1ULL << 7)
  33. #define CR4_VMXE_MASK (1ULL << 13)
  34. #define KVM_GUEST_CR0_MASK \
  35. (CR0_PG_MASK | CR0_PE_MASK | CR0_WP_MASK | CR0_NE_MASK \
  36. | CR0_NW_MASK | CR0_CD_MASK)
  37. #define KVM_VM_CR0_ALWAYS_ON \
  38. (CR0_PG_MASK | CR0_PE_MASK | CR0_WP_MASK | CR0_NE_MASK | CR0_TS_MASK \
  39. | CR0_MP_MASK)
  40. #define KVM_GUEST_CR4_MASK \
  41. (CR4_PSE_MASK | CR4_PAE_MASK | CR4_PGE_MASK | CR4_VMXE_MASK | CR4_VME_MASK)
  42. #define KVM_PMODE_VM_CR4_ALWAYS_ON (CR4_VMXE_MASK | CR4_PAE_MASK)
  43. #define KVM_RMODE_VM_CR4_ALWAYS_ON (CR4_VMXE_MASK | CR4_PAE_MASK | CR4_VME_MASK)
  44. #define INVALID_PAGE (~(hpa_t)0)
  45. #define UNMAPPED_GVA (~(gpa_t)0)
  46. #define KVM_MAX_VCPUS 1
  47. #define KVM_ALIAS_SLOTS 4
  48. #define KVM_MEMORY_SLOTS 4
  49. #define KVM_NUM_MMU_PAGES 1024
  50. #define KVM_MIN_FREE_MMU_PAGES 5
  51. #define KVM_REFILL_PAGES 25
  52. #define KVM_MAX_CPUID_ENTRIES 40
  53. #define FX_IMAGE_SIZE 512
  54. #define FX_IMAGE_ALIGN 16
  55. #define FX_BUF_SIZE (2 * FX_IMAGE_SIZE + FX_IMAGE_ALIGN)
  56. #define DE_VECTOR 0
  57. #define NM_VECTOR 7
  58. #define DF_VECTOR 8
  59. #define TS_VECTOR 10
  60. #define NP_VECTOR 11
  61. #define SS_VECTOR 12
  62. #define GP_VECTOR 13
  63. #define PF_VECTOR 14
  64. #define SELECTOR_TI_MASK (1 << 2)
  65. #define SELECTOR_RPL_MASK 0x03
  66. #define IOPL_SHIFT 12
  67. #define KVM_PIO_PAGE_OFFSET 1
  68. /*
  69. * Address types:
  70. *
  71. * gva - guest virtual address
  72. * gpa - guest physical address
  73. * gfn - guest frame number
  74. * hva - host virtual address
  75. * hpa - host physical address
  76. * hfn - host frame number
  77. */
  78. typedef unsigned long gva_t;
  79. typedef u64 gpa_t;
  80. typedef unsigned long gfn_t;
  81. typedef unsigned long hva_t;
  82. typedef u64 hpa_t;
  83. typedef unsigned long hfn_t;
  84. #define NR_PTE_CHAIN_ENTRIES 5
  85. struct kvm_pte_chain {
  86. u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES];
  87. struct hlist_node link;
  88. };
  89. /*
  90. * kvm_mmu_page_role, below, is defined as:
  91. *
  92. * bits 0:3 - total guest paging levels (2-4, or zero for real mode)
  93. * bits 4:7 - page table level for this shadow (1-4)
  94. * bits 8:9 - page table quadrant for 2-level guests
  95. * bit 16 - "metaphysical" - gfn is not a real page (huge page/real mode)
  96. * bits 17:18 - "access" - the user and writable bits of a huge page pde
  97. */
  98. union kvm_mmu_page_role {
  99. unsigned word;
  100. struct {
  101. unsigned glevels : 4;
  102. unsigned level : 4;
  103. unsigned quadrant : 2;
  104. unsigned pad_for_nice_hex_output : 6;
  105. unsigned metaphysical : 1;
  106. unsigned hugepage_access : 2;
  107. };
  108. };
  109. struct kvm_mmu_page {
  110. struct list_head link;
  111. struct hlist_node hash_link;
  112. /*
  113. * The following two entries are used to key the shadow page in the
  114. * hash table.
  115. */
  116. gfn_t gfn;
  117. union kvm_mmu_page_role role;
  118. u64 *spt;
  119. unsigned long slot_bitmap; /* One bit set per slot which has memory
  120. * in this shadow page.
  121. */
  122. int multimapped; /* More than one parent_pte? */
  123. int root_count; /* Currently serving as active root */
  124. union {
  125. u64 *parent_pte; /* !multimapped */
  126. struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */
  127. };
  128. };
  129. struct vmcs {
  130. u32 revision_id;
  131. u32 abort;
  132. char data[0];
  133. };
  134. #define vmx_msr_entry kvm_msr_entry
  135. struct kvm_vcpu;
  136. /*
  137. * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
  138. * 32-bit). The kvm_mmu structure abstracts the details of the current mmu
  139. * mode.
  140. */
  141. struct kvm_mmu {
  142. void (*new_cr3)(struct kvm_vcpu *vcpu);
  143. int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err);
  144. void (*free)(struct kvm_vcpu *vcpu);
  145. gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva);
  146. hpa_t root_hpa;
  147. int root_level;
  148. int shadow_root_level;
  149. u64 *pae_root;
  150. };
  151. #define KVM_NR_MEM_OBJS 20
  152. struct kvm_mmu_memory_cache {
  153. int nobjs;
  154. void *objects[KVM_NR_MEM_OBJS];
  155. };
  156. /*
  157. * We don't want allocation failures within the mmu code, so we preallocate
  158. * enough memory for a single page fault in a cache.
  159. */
  160. struct kvm_guest_debug {
  161. int enabled;
  162. unsigned long bp[4];
  163. int singlestep;
  164. };
  165. enum {
  166. VCPU_REGS_RAX = 0,
  167. VCPU_REGS_RCX = 1,
  168. VCPU_REGS_RDX = 2,
  169. VCPU_REGS_RBX = 3,
  170. VCPU_REGS_RSP = 4,
  171. VCPU_REGS_RBP = 5,
  172. VCPU_REGS_RSI = 6,
  173. VCPU_REGS_RDI = 7,
  174. #ifdef CONFIG_X86_64
  175. VCPU_REGS_R8 = 8,
  176. VCPU_REGS_R9 = 9,
  177. VCPU_REGS_R10 = 10,
  178. VCPU_REGS_R11 = 11,
  179. VCPU_REGS_R12 = 12,
  180. VCPU_REGS_R13 = 13,
  181. VCPU_REGS_R14 = 14,
  182. VCPU_REGS_R15 = 15,
  183. #endif
  184. NR_VCPU_REGS
  185. };
  186. enum {
  187. VCPU_SREG_CS,
  188. VCPU_SREG_DS,
  189. VCPU_SREG_ES,
  190. VCPU_SREG_FS,
  191. VCPU_SREG_GS,
  192. VCPU_SREG_SS,
  193. VCPU_SREG_TR,
  194. VCPU_SREG_LDTR,
  195. };
  196. struct kvm_pio_request {
  197. unsigned long count;
  198. int cur_count;
  199. struct page *guest_pages[2];
  200. unsigned guest_page_offset;
  201. int in;
  202. int size;
  203. int string;
  204. int down;
  205. int rep;
  206. };
  207. struct kvm_stat {
  208. u32 pf_fixed;
  209. u32 pf_guest;
  210. u32 tlb_flush;
  211. u32 invlpg;
  212. u32 exits;
  213. u32 io_exits;
  214. u32 mmio_exits;
  215. u32 signal_exits;
  216. u32 irq_window_exits;
  217. u32 halt_exits;
  218. u32 request_irq_exits;
  219. u32 irq_exits;
  220. u32 light_exits;
  221. };
  222. struct kvm_vcpu {
  223. struct kvm *kvm;
  224. union {
  225. struct vmcs *vmcs;
  226. struct vcpu_svm *svm;
  227. };
  228. struct mutex mutex;
  229. int cpu;
  230. int launched;
  231. u64 host_tsc;
  232. struct kvm_run *run;
  233. int interrupt_window_open;
  234. unsigned long irq_summary; /* bit vector: 1 per word in irq_pending */
  235. #define NR_IRQ_WORDS KVM_IRQ_BITMAP_SIZE(unsigned long)
  236. unsigned long irq_pending[NR_IRQ_WORDS];
  237. unsigned long regs[NR_VCPU_REGS]; /* for rsp: vcpu_load_rsp_rip() */
  238. unsigned long rip; /* needs vcpu_load_rsp_rip() */
  239. unsigned long cr0;
  240. unsigned long cr2;
  241. unsigned long cr3;
  242. gpa_t para_state_gpa;
  243. struct page *para_state_page;
  244. gpa_t hypercall_gpa;
  245. unsigned long cr4;
  246. unsigned long cr8;
  247. u64 pdptrs[4]; /* pae */
  248. u64 shadow_efer;
  249. u64 apic_base;
  250. u64 ia32_misc_enable_msr;
  251. int nmsrs;
  252. struct vmx_msr_entry *guest_msrs;
  253. struct vmx_msr_entry *host_msrs;
  254. struct list_head free_pages;
  255. struct kvm_mmu_page page_header_buf[KVM_NUM_MMU_PAGES];
  256. struct kvm_mmu mmu;
  257. struct kvm_mmu_memory_cache mmu_pte_chain_cache;
  258. struct kvm_mmu_memory_cache mmu_rmap_desc_cache;
  259. gfn_t last_pt_write_gfn;
  260. int last_pt_write_count;
  261. struct kvm_guest_debug guest_debug;
  262. char fx_buf[FX_BUF_SIZE];
  263. char *host_fx_image;
  264. char *guest_fx_image;
  265. int fpu_active;
  266. int guest_fpu_loaded;
  267. struct vmx_host_state {
  268. int loaded;
  269. u16 fs_sel, gs_sel, ldt_sel;
  270. int fs_gs_ldt_reload_needed;
  271. } vmx_host_state;
  272. int mmio_needed;
  273. int mmio_read_completed;
  274. int mmio_is_write;
  275. int mmio_size;
  276. unsigned char mmio_data[8];
  277. gpa_t mmio_phys_addr;
  278. gva_t mmio_fault_cr2;
  279. struct kvm_pio_request pio;
  280. void *pio_data;
  281. int sigset_active;
  282. sigset_t sigset;
  283. struct kvm_stat stat;
  284. struct {
  285. int active;
  286. u8 save_iopl;
  287. struct kvm_save_segment {
  288. u16 selector;
  289. unsigned long base;
  290. u32 limit;
  291. u32 ar;
  292. } tr, es, ds, fs, gs;
  293. } rmode;
  294. int cpuid_nent;
  295. struct kvm_cpuid_entry cpuid_entries[KVM_MAX_CPUID_ENTRIES];
  296. };
  297. struct kvm_mem_alias {
  298. gfn_t base_gfn;
  299. unsigned long npages;
  300. gfn_t target_gfn;
  301. };
  302. struct kvm_memory_slot {
  303. gfn_t base_gfn;
  304. unsigned long npages;
  305. unsigned long flags;
  306. struct page **phys_mem;
  307. unsigned long *dirty_bitmap;
  308. };
  309. struct kvm {
  310. spinlock_t lock; /* protects everything except vcpus */
  311. int naliases;
  312. struct kvm_mem_alias aliases[KVM_ALIAS_SLOTS];
  313. int nmemslots;
  314. struct kvm_memory_slot memslots[KVM_MEMORY_SLOTS];
  315. /*
  316. * Hash table of struct kvm_mmu_page.
  317. */
  318. struct list_head active_mmu_pages;
  319. int n_free_mmu_pages;
  320. struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
  321. struct kvm_vcpu vcpus[KVM_MAX_VCPUS];
  322. int memory_config_version;
  323. int busy;
  324. unsigned long rmap_overflow;
  325. struct list_head vm_list;
  326. struct file *filp;
  327. };
  328. struct descriptor_table {
  329. u16 limit;
  330. unsigned long base;
  331. } __attribute__((packed));
  332. struct kvm_arch_ops {
  333. int (*cpu_has_kvm_support)(void); /* __init */
  334. int (*disabled_by_bios)(void); /* __init */
  335. void (*hardware_enable)(void *dummy); /* __init */
  336. void (*hardware_disable)(void *dummy);
  337. int (*hardware_setup)(void); /* __init */
  338. void (*hardware_unsetup)(void); /* __exit */
  339. int (*vcpu_create)(struct kvm_vcpu *vcpu);
  340. void (*vcpu_free)(struct kvm_vcpu *vcpu);
  341. void (*vcpu_load)(struct kvm_vcpu *vcpu);
  342. void (*vcpu_put)(struct kvm_vcpu *vcpu);
  343. void (*vcpu_decache)(struct kvm_vcpu *vcpu);
  344. int (*set_guest_debug)(struct kvm_vcpu *vcpu,
  345. struct kvm_debug_guest *dbg);
  346. int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata);
  347. int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
  348. u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
  349. void (*get_segment)(struct kvm_vcpu *vcpu,
  350. struct kvm_segment *var, int seg);
  351. void (*set_segment)(struct kvm_vcpu *vcpu,
  352. struct kvm_segment *var, int seg);
  353. void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
  354. void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
  355. void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
  356. void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
  357. void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
  358. void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
  359. void (*get_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
  360. void (*set_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
  361. void (*get_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
  362. void (*set_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
  363. unsigned long (*get_dr)(struct kvm_vcpu *vcpu, int dr);
  364. void (*set_dr)(struct kvm_vcpu *vcpu, int dr, unsigned long value,
  365. int *exception);
  366. void (*cache_regs)(struct kvm_vcpu *vcpu);
  367. void (*decache_regs)(struct kvm_vcpu *vcpu);
  368. unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
  369. void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
  370. void (*invlpg)(struct kvm_vcpu *vcpu, gva_t addr);
  371. void (*tlb_flush)(struct kvm_vcpu *vcpu);
  372. void (*inject_page_fault)(struct kvm_vcpu *vcpu,
  373. unsigned long addr, u32 err_code);
  374. void (*inject_gp)(struct kvm_vcpu *vcpu, unsigned err_code);
  375. int (*run)(struct kvm_vcpu *vcpu, struct kvm_run *run);
  376. int (*vcpu_setup)(struct kvm_vcpu *vcpu);
  377. void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
  378. void (*patch_hypercall)(struct kvm_vcpu *vcpu,
  379. unsigned char *hypercall_addr);
  380. };
  381. extern struct kvm_arch_ops *kvm_arch_ops;
  382. #define kvm_printf(kvm, fmt ...) printk(KERN_DEBUG fmt)
  383. #define vcpu_printf(vcpu, fmt...) kvm_printf(vcpu->kvm, fmt)
  384. int kvm_init_arch(struct kvm_arch_ops *ops, struct module *module);
  385. void kvm_exit_arch(void);
  386. int kvm_mmu_module_init(void);
  387. void kvm_mmu_module_exit(void);
  388. void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
  389. int kvm_mmu_create(struct kvm_vcpu *vcpu);
  390. int kvm_mmu_setup(struct kvm_vcpu *vcpu);
  391. int kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
  392. void kvm_mmu_slot_remove_write_access(struct kvm_vcpu *vcpu, int slot);
  393. void kvm_mmu_zap_all(struct kvm_vcpu *vcpu);
  394. hpa_t gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa);
  395. #define HPA_MSB ((sizeof(hpa_t) * 8) - 1)
  396. #define HPA_ERR_MASK ((hpa_t)1 << HPA_MSB)
  397. static inline int is_error_hpa(hpa_t hpa) { return hpa >> HPA_MSB; }
  398. hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva);
  399. struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva);
  400. void kvm_emulator_want_group7_invlpg(void);
  401. extern hpa_t bad_page_address;
  402. struct page *gfn_to_page(struct kvm *kvm, gfn_t gfn);
  403. struct kvm_memory_slot *gfn_to_memslot(struct kvm *kvm, gfn_t gfn);
  404. void mark_page_dirty(struct kvm *kvm, gfn_t gfn);
  405. enum emulation_result {
  406. EMULATE_DONE, /* no further processing */
  407. EMULATE_DO_MMIO, /* kvm_run filled with mmio request */
  408. EMULATE_FAIL, /* can't emulate this instruction */
  409. };
  410. int emulate_instruction(struct kvm_vcpu *vcpu, struct kvm_run *run,
  411. unsigned long cr2, u16 error_code);
  412. void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
  413. void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
  414. void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
  415. unsigned long *rflags);
  416. unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr);
  417. void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long value,
  418. unsigned long *rflags);
  419. struct x86_emulate_ctxt;
  420. int kvm_setup_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
  421. int size, unsigned long count, int string, int down,
  422. gva_t address, int rep, unsigned port);
  423. void kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
  424. int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address);
  425. int emulate_clts(struct kvm_vcpu *vcpu);
  426. int emulator_get_dr(struct x86_emulate_ctxt* ctxt, int dr,
  427. unsigned long *dest);
  428. int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
  429. unsigned long value);
  430. void set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
  431. void set_cr3(struct kvm_vcpu *vcpu, unsigned long cr0);
  432. void set_cr4(struct kvm_vcpu *vcpu, unsigned long cr0);
  433. void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr0);
  434. void lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
  435. int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
  436. int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data);
  437. void fx_init(struct kvm_vcpu *vcpu);
  438. void load_msrs(struct vmx_msr_entry *e, int n);
  439. void save_msrs(struct vmx_msr_entry *e, int n);
  440. void kvm_resched(struct kvm_vcpu *vcpu);
  441. void kvm_load_guest_fpu(struct kvm_vcpu *vcpu);
  442. void kvm_put_guest_fpu(struct kvm_vcpu *vcpu);
  443. int kvm_read_guest(struct kvm_vcpu *vcpu,
  444. gva_t addr,
  445. unsigned long size,
  446. void *dest);
  447. int kvm_write_guest(struct kvm_vcpu *vcpu,
  448. gva_t addr,
  449. unsigned long size,
  450. void *data);
  451. unsigned long segment_base(u16 selector);
  452. void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
  453. const u8 *old, const u8 *new, int bytes);
  454. int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
  455. void kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
  456. int kvm_hypercall(struct kvm_vcpu *vcpu, struct kvm_run *run);
  457. static inline int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
  458. u32 error_code)
  459. {
  460. if (unlikely(vcpu->kvm->n_free_mmu_pages < KVM_MIN_FREE_MMU_PAGES))
  461. kvm_mmu_free_some_pages(vcpu);
  462. return vcpu->mmu.page_fault(vcpu, gva, error_code);
  463. }
  464. static inline int is_long_mode(struct kvm_vcpu *vcpu)
  465. {
  466. #ifdef CONFIG_X86_64
  467. return vcpu->shadow_efer & EFER_LME;
  468. #else
  469. return 0;
  470. #endif
  471. }
  472. static inline int is_pae(struct kvm_vcpu *vcpu)
  473. {
  474. return vcpu->cr4 & CR4_PAE_MASK;
  475. }
  476. static inline int is_pse(struct kvm_vcpu *vcpu)
  477. {
  478. return vcpu->cr4 & CR4_PSE_MASK;
  479. }
  480. static inline int is_paging(struct kvm_vcpu *vcpu)
  481. {
  482. return vcpu->cr0 & CR0_PG_MASK;
  483. }
  484. static inline int memslot_id(struct kvm *kvm, struct kvm_memory_slot *slot)
  485. {
  486. return slot - kvm->memslots;
  487. }
  488. static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
  489. {
  490. struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
  491. return (struct kvm_mmu_page *)page_private(page);
  492. }
  493. static inline u16 read_fs(void)
  494. {
  495. u16 seg;
  496. asm ("mov %%fs, %0" : "=g"(seg));
  497. return seg;
  498. }
  499. static inline u16 read_gs(void)
  500. {
  501. u16 seg;
  502. asm ("mov %%gs, %0" : "=g"(seg));
  503. return seg;
  504. }
  505. static inline u16 read_ldt(void)
  506. {
  507. u16 ldt;
  508. asm ("sldt %0" : "=g"(ldt));
  509. return ldt;
  510. }
  511. static inline void load_fs(u16 sel)
  512. {
  513. asm ("mov %0, %%fs" : : "rm"(sel));
  514. }
  515. static inline void load_gs(u16 sel)
  516. {
  517. asm ("mov %0, %%gs" : : "rm"(sel));
  518. }
  519. #ifndef load_ldt
  520. static inline void load_ldt(u16 sel)
  521. {
  522. asm ("lldt %0" : : "rm"(sel));
  523. }
  524. #endif
  525. static inline void get_idt(struct descriptor_table *table)
  526. {
  527. asm ("sidt %0" : "=m"(*table));
  528. }
  529. static inline void get_gdt(struct descriptor_table *table)
  530. {
  531. asm ("sgdt %0" : "=m"(*table));
  532. }
  533. static inline unsigned long read_tr_base(void)
  534. {
  535. u16 tr;
  536. asm ("str %0" : "=g"(tr));
  537. return segment_base(tr);
  538. }
  539. #ifdef CONFIG_X86_64
  540. static inline unsigned long read_msr(unsigned long msr)
  541. {
  542. u64 value;
  543. rdmsrl(msr, value);
  544. return value;
  545. }
  546. #endif
  547. static inline void fx_save(void *image)
  548. {
  549. asm ("fxsave (%0)":: "r" (image));
  550. }
  551. static inline void fx_restore(void *image)
  552. {
  553. asm ("fxrstor (%0)":: "r" (image));
  554. }
  555. static inline void fpu_init(void)
  556. {
  557. asm ("finit");
  558. }
  559. static inline u32 get_rdx_init_val(void)
  560. {
  561. return 0x600; /* P6 family */
  562. }
  563. #define ASM_VMX_VMCLEAR_RAX ".byte 0x66, 0x0f, 0xc7, 0x30"
  564. #define ASM_VMX_VMLAUNCH ".byte 0x0f, 0x01, 0xc2"
  565. #define ASM_VMX_VMRESUME ".byte 0x0f, 0x01, 0xc3"
  566. #define ASM_VMX_VMPTRLD_RAX ".byte 0x0f, 0xc7, 0x30"
  567. #define ASM_VMX_VMREAD_RDX_RAX ".byte 0x0f, 0x78, 0xd0"
  568. #define ASM_VMX_VMWRITE_RAX_RDX ".byte 0x0f, 0x79, 0xd0"
  569. #define ASM_VMX_VMWRITE_RSP_RDX ".byte 0x0f, 0x79, 0xd4"
  570. #define ASM_VMX_VMXOFF ".byte 0x0f, 0x01, 0xc4"
  571. #define ASM_VMX_VMXON_RAX ".byte 0xf3, 0x0f, 0xc7, 0x30"
  572. #define MSR_IA32_TIME_STAMP_COUNTER 0x010
  573. #define TSS_IOPB_BASE_OFFSET 0x66
  574. #define TSS_BASE_SIZE 0x68
  575. #define TSS_IOPB_SIZE (65536 / 8)
  576. #define TSS_REDIRECTION_SIZE (256 / 8)
  577. #define RMODE_TSS_SIZE (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
  578. #endif