cx88-dvb.c 22 KB

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  1. /*
  2. *
  3. * device driver for Conexant 2388x based TV cards
  4. * MPEG Transport Stream (DVB) routines
  5. *
  6. * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
  7. * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. */
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/device.h>
  26. #include <linux/fs.h>
  27. #include <linux/kthread.h>
  28. #include <linux/file.h>
  29. #include <linux/suspend.h>
  30. #include "cx88.h"
  31. #include "dvb-pll.h"
  32. #include <media/v4l2-common.h>
  33. #include "mt352.h"
  34. #include "mt352_priv.h"
  35. #include "cx88-vp3054-i2c.h"
  36. #include "zl10353.h"
  37. #include "cx22702.h"
  38. #include "or51132.h"
  39. #include "lgdt330x.h"
  40. #include "nxt200x.h"
  41. #include "cx24123.h"
  42. #include "isl6421.h"
  43. MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
  44. MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
  45. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  46. MODULE_LICENSE("GPL");
  47. static unsigned int debug = 0;
  48. module_param(debug, int, 0644);
  49. MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
  50. #define dprintk(level,fmt, arg...) if (debug >= level) \
  51. printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg)
  52. /* ------------------------------------------------------------------ */
  53. static int dvb_buf_setup(struct videobuf_queue *q,
  54. unsigned int *count, unsigned int *size)
  55. {
  56. struct cx8802_dev *dev = q->priv_data;
  57. dev->ts_packet_size = 188 * 4;
  58. dev->ts_packet_count = 32;
  59. *size = dev->ts_packet_size * dev->ts_packet_count;
  60. *count = 32;
  61. return 0;
  62. }
  63. static int dvb_buf_prepare(struct videobuf_queue *q,
  64. struct videobuf_buffer *vb, enum v4l2_field field)
  65. {
  66. struct cx8802_dev *dev = q->priv_data;
  67. return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
  68. }
  69. static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
  70. {
  71. struct cx8802_dev *dev = q->priv_data;
  72. cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
  73. }
  74. static void dvb_buf_release(struct videobuf_queue *q,
  75. struct videobuf_buffer *vb)
  76. {
  77. cx88_free_buffer(q, (struct cx88_buffer*)vb);
  78. }
  79. static struct videobuf_queue_ops dvb_qops = {
  80. .buf_setup = dvb_buf_setup,
  81. .buf_prepare = dvb_buf_prepare,
  82. .buf_queue = dvb_buf_queue,
  83. .buf_release = dvb_buf_release,
  84. };
  85. /* ------------------------------------------------------------------ */
  86. static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe, int acquire)
  87. {
  88. struct cx8802_dev *dev= fe->dvb->priv;
  89. struct cx8802_driver *drv = NULL;
  90. int ret = 0;
  91. drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
  92. if (drv) {
  93. if (acquire)
  94. ret = drv->request_acquire(drv);
  95. else
  96. ret = drv->request_release(drv);
  97. }
  98. return ret;
  99. }
  100. /* ------------------------------------------------------------------ */
  101. static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
  102. {
  103. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
  104. static u8 reset [] = { RESET, 0x80 };
  105. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  106. static u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
  107. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  108. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  109. mt352_write(fe, clock_config, sizeof(clock_config));
  110. udelay(200);
  111. mt352_write(fe, reset, sizeof(reset));
  112. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  113. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  114. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  115. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  116. return 0;
  117. }
  118. static int dvico_dual_demod_init(struct dvb_frontend *fe)
  119. {
  120. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
  121. static u8 reset [] = { RESET, 0x80 };
  122. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  123. static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
  124. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  125. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  126. mt352_write(fe, clock_config, sizeof(clock_config));
  127. udelay(200);
  128. mt352_write(fe, reset, sizeof(reset));
  129. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  130. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  131. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  132. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  133. return 0;
  134. }
  135. static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
  136. {
  137. static u8 clock_config [] = { 0x89, 0x38, 0x39 };
  138. static u8 reset [] = { 0x50, 0x80 };
  139. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  140. static u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
  141. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  142. static u8 dntv_extra[] = { 0xB5, 0x7A };
  143. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  144. mt352_write(fe, clock_config, sizeof(clock_config));
  145. udelay(2000);
  146. mt352_write(fe, reset, sizeof(reset));
  147. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  148. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  149. udelay(2000);
  150. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  151. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  152. return 0;
  153. }
  154. static struct mt352_config dvico_fusionhdtv = {
  155. .demod_address = 0x0f,
  156. .demod_init = dvico_fusionhdtv_demod_init,
  157. };
  158. static struct mt352_config dntv_live_dvbt_config = {
  159. .demod_address = 0x0f,
  160. .demod_init = dntv_live_dvbt_demod_init,
  161. };
  162. static struct mt352_config dvico_fusionhdtv_dual = {
  163. .demod_address = 0x0f,
  164. .demod_init = dvico_dual_demod_init,
  165. };
  166. #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
  167. static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
  168. {
  169. static u8 clock_config [] = { 0x89, 0x38, 0x38 };
  170. static u8 reset [] = { 0x50, 0x80 };
  171. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  172. static u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
  173. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  174. static u8 dntv_extra[] = { 0xB5, 0x7A };
  175. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  176. mt352_write(fe, clock_config, sizeof(clock_config));
  177. udelay(2000);
  178. mt352_write(fe, reset, sizeof(reset));
  179. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  180. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  181. udelay(2000);
  182. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  183. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  184. return 0;
  185. }
  186. static struct mt352_config dntv_live_dvbt_pro_config = {
  187. .demod_address = 0x0f,
  188. .no_tuner = 1,
  189. .demod_init = dntv_live_dvbt_pro_demod_init,
  190. };
  191. #endif
  192. static struct zl10353_config dvico_fusionhdtv_hybrid = {
  193. .demod_address = 0x0f,
  194. .no_tuner = 1,
  195. };
  196. static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
  197. .demod_address = 0x0f,
  198. };
  199. static struct cx22702_config connexant_refboard_config = {
  200. .demod_address = 0x43,
  201. .output_mode = CX22702_SERIAL_OUTPUT,
  202. };
  203. static struct cx22702_config hauppauge_hvr_config = {
  204. .demod_address = 0x63,
  205. .output_mode = CX22702_SERIAL_OUTPUT,
  206. };
  207. static int or51132_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  208. {
  209. struct cx8802_dev *dev= fe->dvb->priv;
  210. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  211. return 0;
  212. }
  213. static struct or51132_config pchdtv_hd3000 = {
  214. .demod_address = 0x15,
  215. .set_ts_params = or51132_set_ts_param,
  216. };
  217. static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
  218. {
  219. struct cx8802_dev *dev= fe->dvb->priv;
  220. struct cx88_core *core = dev->core;
  221. dprintk(1, "%s: index = %d\n", __FUNCTION__, index);
  222. if (index == 0)
  223. cx_clear(MO_GP0_IO, 8);
  224. else
  225. cx_set(MO_GP0_IO, 8);
  226. return 0;
  227. }
  228. static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  229. {
  230. struct cx8802_dev *dev= fe->dvb->priv;
  231. if (is_punctured)
  232. dev->ts_gen_cntrl |= 0x04;
  233. else
  234. dev->ts_gen_cntrl &= ~0x04;
  235. return 0;
  236. }
  237. static struct lgdt330x_config fusionhdtv_3_gold = {
  238. .demod_address = 0x0e,
  239. .demod_chip = LGDT3302,
  240. .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
  241. .set_ts_params = lgdt330x_set_ts_param,
  242. };
  243. static struct lgdt330x_config fusionhdtv_5_gold = {
  244. .demod_address = 0x0e,
  245. .demod_chip = LGDT3303,
  246. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  247. .set_ts_params = lgdt330x_set_ts_param,
  248. };
  249. static struct lgdt330x_config pchdtv_hd5500 = {
  250. .demod_address = 0x59,
  251. .demod_chip = LGDT3303,
  252. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  253. .set_ts_params = lgdt330x_set_ts_param,
  254. };
  255. static int nxt200x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  256. {
  257. struct cx8802_dev *dev= fe->dvb->priv;
  258. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  259. return 0;
  260. }
  261. static struct nxt200x_config ati_hdtvwonder = {
  262. .demod_address = 0x0a,
  263. .set_ts_params = nxt200x_set_ts_param,
  264. };
  265. static int cx24123_set_ts_param(struct dvb_frontend* fe,
  266. int is_punctured)
  267. {
  268. struct cx8802_dev *dev= fe->dvb->priv;
  269. dev->ts_gen_cntrl = 0x02;
  270. return 0;
  271. }
  272. static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
  273. fe_sec_voltage_t voltage)
  274. {
  275. struct cx8802_dev *dev= fe->dvb->priv;
  276. struct cx88_core *core = dev->core;
  277. if (voltage == SEC_VOLTAGE_OFF)
  278. cx_write(MO_GP0_IO, 0x000006fb);
  279. else
  280. cx_write(MO_GP0_IO, 0x000006f9);
  281. if (core->prev_set_voltage)
  282. return core->prev_set_voltage(fe, voltage);
  283. return 0;
  284. }
  285. static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
  286. fe_sec_voltage_t voltage)
  287. {
  288. struct cx8802_dev *dev= fe->dvb->priv;
  289. struct cx88_core *core = dev->core;
  290. if (voltage == SEC_VOLTAGE_OFF) {
  291. dprintk(1,"LNB Voltage OFF\n");
  292. cx_write(MO_GP0_IO, 0x0000efff);
  293. }
  294. if (core->prev_set_voltage)
  295. return core->prev_set_voltage(fe, voltage);
  296. return 0;
  297. }
  298. static struct cx24123_config geniatech_dvbs_config = {
  299. .demod_address = 0x55,
  300. .set_ts_params = cx24123_set_ts_param,
  301. };
  302. static struct cx24123_config hauppauge_novas_config = {
  303. .demod_address = 0x55,
  304. .set_ts_params = cx24123_set_ts_param,
  305. };
  306. static struct cx24123_config kworld_dvbs_100_config = {
  307. .demod_address = 0x15,
  308. .set_ts_params = cx24123_set_ts_param,
  309. .lnb_polarity = 1,
  310. };
  311. static int dvb_register(struct cx8802_dev *dev)
  312. {
  313. /* init struct videobuf_dvb */
  314. dev->dvb.name = dev->core->name;
  315. dev->ts_gen_cntrl = 0x0c;
  316. /* init frontend */
  317. switch (dev->core->board) {
  318. case CX88_BOARD_HAUPPAUGE_DVB_T1:
  319. dev->dvb.frontend = dvb_attach(cx22702_attach,
  320. &connexant_refboard_config,
  321. &dev->core->i2c_adap);
  322. if (dev->dvb.frontend != NULL) {
  323. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  324. &dev->core->i2c_adap,
  325. DVB_PLL_THOMSON_DTT759X);
  326. }
  327. break;
  328. case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
  329. case CX88_BOARD_CONEXANT_DVB_T1:
  330. case CX88_BOARD_KWORLD_DVB_T_CX22702:
  331. case CX88_BOARD_WINFAST_DTV1000:
  332. dev->dvb.frontend = dvb_attach(cx22702_attach,
  333. &connexant_refboard_config,
  334. &dev->core->i2c_adap);
  335. if (dev->dvb.frontend != NULL) {
  336. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
  337. &dev->core->i2c_adap,
  338. DVB_PLL_THOMSON_DTT7579);
  339. }
  340. break;
  341. case CX88_BOARD_WINFAST_DTV2000H:
  342. case CX88_BOARD_HAUPPAUGE_HVR1100:
  343. case CX88_BOARD_HAUPPAUGE_HVR1100LP:
  344. case CX88_BOARD_HAUPPAUGE_HVR1300:
  345. case CX88_BOARD_HAUPPAUGE_HVR3000:
  346. dev->dvb.frontend = dvb_attach(cx22702_attach,
  347. &hauppauge_hvr_config,
  348. &dev->core->i2c_adap);
  349. if (dev->dvb.frontend != NULL) {
  350. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  351. &dev->core->i2c_adap, DVB_PLL_FMD1216ME);
  352. }
  353. break;
  354. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
  355. dev->dvb.frontend = dvb_attach(mt352_attach,
  356. &dvico_fusionhdtv,
  357. &dev->core->i2c_adap);
  358. if (dev->dvb.frontend != NULL) {
  359. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
  360. NULL, DVB_PLL_THOMSON_DTT7579);
  361. break;
  362. }
  363. /* ZL10353 replaces MT352 on later cards */
  364. dev->dvb.frontend = dvb_attach(zl10353_attach,
  365. &dvico_fusionhdtv_plus_v1_1,
  366. &dev->core->i2c_adap);
  367. if (dev->dvb.frontend != NULL) {
  368. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
  369. NULL, DVB_PLL_THOMSON_DTT7579);
  370. }
  371. break;
  372. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
  373. /* The tin box says DEE1601, but it seems to be DTT7579
  374. * compatible, with a slightly different MT352 AGC gain. */
  375. dev->dvb.frontend = dvb_attach(mt352_attach,
  376. &dvico_fusionhdtv_dual,
  377. &dev->core->i2c_adap);
  378. if (dev->dvb.frontend != NULL) {
  379. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  380. NULL, DVB_PLL_THOMSON_DTT7579);
  381. break;
  382. }
  383. /* ZL10353 replaces MT352 on later cards */
  384. dev->dvb.frontend = dvb_attach(zl10353_attach,
  385. &dvico_fusionhdtv_plus_v1_1,
  386. &dev->core->i2c_adap);
  387. if (dev->dvb.frontend != NULL) {
  388. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  389. NULL, DVB_PLL_THOMSON_DTT7579);
  390. }
  391. break;
  392. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
  393. dev->dvb.frontend = dvb_attach(mt352_attach,
  394. &dvico_fusionhdtv,
  395. &dev->core->i2c_adap);
  396. if (dev->dvb.frontend != NULL) {
  397. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  398. NULL, DVB_PLL_LG_Z201);
  399. }
  400. break;
  401. case CX88_BOARD_KWORLD_DVB_T:
  402. case CX88_BOARD_DNTV_LIVE_DVB_T:
  403. case CX88_BOARD_ADSTECH_DVB_T_PCI:
  404. dev->dvb.frontend = dvb_attach(mt352_attach,
  405. &dntv_live_dvbt_config,
  406. &dev->core->i2c_adap);
  407. if (dev->dvb.frontend != NULL) {
  408. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  409. NULL, DVB_PLL_UNKNOWN_1);
  410. }
  411. break;
  412. case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
  413. #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
  414. dev->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
  415. &((struct vp3054_i2c_state *)dev->card_priv)->adap);
  416. if (dev->dvb.frontend != NULL) {
  417. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  418. &dev->core->i2c_adap, DVB_PLL_FMD1216ME);
  419. }
  420. #else
  421. printk("%s: built without vp3054 support\n", dev->core->name);
  422. #endif
  423. break;
  424. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
  425. dev->dvb.frontend = dvb_attach(zl10353_attach,
  426. &dvico_fusionhdtv_hybrid,
  427. &dev->core->i2c_adap);
  428. if (dev->dvb.frontend != NULL) {
  429. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  430. &dev->core->i2c_adap,
  431. DVB_PLL_THOMSON_FE6600);
  432. }
  433. break;
  434. case CX88_BOARD_PCHDTV_HD3000:
  435. dev->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
  436. &dev->core->i2c_adap);
  437. if (dev->dvb.frontend != NULL) {
  438. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  439. &dev->core->i2c_adap,
  440. DVB_PLL_THOMSON_DTT761X);
  441. }
  442. break;
  443. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
  444. dev->ts_gen_cntrl = 0x08;
  445. {
  446. /* Do a hardware reset of chip before using it. */
  447. struct cx88_core *core = dev->core;
  448. cx_clear(MO_GP0_IO, 1);
  449. mdelay(100);
  450. cx_set(MO_GP0_IO, 1);
  451. mdelay(200);
  452. /* Select RF connector callback */
  453. fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
  454. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  455. &fusionhdtv_3_gold,
  456. &dev->core->i2c_adap);
  457. if (dev->dvb.frontend != NULL) {
  458. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  459. &dev->core->i2c_adap,
  460. DVB_PLL_MICROTUNE_4042);
  461. }
  462. }
  463. break;
  464. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
  465. dev->ts_gen_cntrl = 0x08;
  466. {
  467. /* Do a hardware reset of chip before using it. */
  468. struct cx88_core *core = dev->core;
  469. cx_clear(MO_GP0_IO, 1);
  470. mdelay(100);
  471. cx_set(MO_GP0_IO, 9);
  472. mdelay(200);
  473. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  474. &fusionhdtv_3_gold,
  475. &dev->core->i2c_adap);
  476. if (dev->dvb.frontend != NULL) {
  477. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  478. &dev->core->i2c_adap,
  479. DVB_PLL_THOMSON_DTT761X);
  480. }
  481. }
  482. break;
  483. case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
  484. dev->ts_gen_cntrl = 0x08;
  485. {
  486. /* Do a hardware reset of chip before using it. */
  487. struct cx88_core *core = dev->core;
  488. cx_clear(MO_GP0_IO, 1);
  489. mdelay(100);
  490. cx_set(MO_GP0_IO, 1);
  491. mdelay(200);
  492. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  493. &fusionhdtv_5_gold,
  494. &dev->core->i2c_adap);
  495. if (dev->dvb.frontend != NULL) {
  496. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  497. &dev->core->i2c_adap,
  498. DVB_PLL_LG_TDVS_H06XF);
  499. }
  500. }
  501. break;
  502. case CX88_BOARD_PCHDTV_HD5500:
  503. dev->ts_gen_cntrl = 0x08;
  504. {
  505. /* Do a hardware reset of chip before using it. */
  506. struct cx88_core *core = dev->core;
  507. cx_clear(MO_GP0_IO, 1);
  508. mdelay(100);
  509. cx_set(MO_GP0_IO, 1);
  510. mdelay(200);
  511. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  512. &pchdtv_hd5500,
  513. &dev->core->i2c_adap);
  514. if (dev->dvb.frontend != NULL) {
  515. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  516. &dev->core->i2c_adap,
  517. DVB_PLL_LG_TDVS_H06XF);
  518. }
  519. }
  520. break;
  521. case CX88_BOARD_ATI_HDTVWONDER:
  522. dev->dvb.frontend = dvb_attach(nxt200x_attach,
  523. &ati_hdtvwonder,
  524. &dev->core->i2c_adap);
  525. if (dev->dvb.frontend != NULL) {
  526. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  527. NULL, DVB_PLL_TUV1236D);
  528. }
  529. break;
  530. case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
  531. case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
  532. dev->dvb.frontend = dvb_attach(cx24123_attach,
  533. &hauppauge_novas_config,
  534. &dev->core->i2c_adap);
  535. if (dev->dvb.frontend) {
  536. dvb_attach(isl6421_attach, dev->dvb.frontend,
  537. &dev->core->i2c_adap, 0x08, 0x00, 0x00);
  538. }
  539. break;
  540. case CX88_BOARD_KWORLD_DVBS_100:
  541. dev->dvb.frontend = dvb_attach(cx24123_attach,
  542. &kworld_dvbs_100_config,
  543. &dev->core->i2c_adap);
  544. if (dev->dvb.frontend) {
  545. dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
  546. dev->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
  547. }
  548. break;
  549. case CX88_BOARD_GENIATECH_DVBS:
  550. dev->dvb.frontend = dvb_attach(cx24123_attach,
  551. &geniatech_dvbs_config,
  552. &dev->core->i2c_adap);
  553. if (dev->dvb.frontend) {
  554. dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
  555. dev->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
  556. }
  557. break;
  558. default:
  559. printk("%s: The frontend of your DVB/ATSC card isn't supported yet\n",
  560. dev->core->name);
  561. break;
  562. }
  563. if (NULL == dev->dvb.frontend) {
  564. printk("%s: frontend initialization failed\n",dev->core->name);
  565. return -1;
  566. }
  567. /* Ensure all frontends negotiate bus access */
  568. dev->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
  569. /* Put the analog decoder in standby to keep it quiet */
  570. cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
  571. /* register everything */
  572. return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev, &dev->pci->dev);
  573. }
  574. /* ----------------------------------------------------------- */
  575. /* CX8802 MPEG -> mini driver - We have been given the hardware */
  576. static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
  577. {
  578. struct cx88_core *core = drv->core;
  579. int err = 0;
  580. dprintk( 1, "%s\n", __FUNCTION__);
  581. switch (core->board) {
  582. case CX88_BOARD_HAUPPAUGE_HVR1300:
  583. /* We arrive here with either the cx23416 or the cx22702
  584. * on the bus. Take the bus from the cx23416 and enable the
  585. * cx22702 demod
  586. */
  587. cx_set(MO_GP0_IO, 0x00000080); /* cx22702 out of reset and enable */
  588. cx_clear(MO_GP0_IO, 0x00000004);
  589. udelay(1000);
  590. break;
  591. default:
  592. err = -ENODEV;
  593. }
  594. return err;
  595. }
  596. /* CX8802 MPEG -> mini driver - We no longer have the hardware */
  597. static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
  598. {
  599. struct cx88_core *core = drv->core;
  600. int err = 0;
  601. dprintk( 1, "%s\n", __FUNCTION__);
  602. switch (core->board) {
  603. case CX88_BOARD_HAUPPAUGE_HVR1300:
  604. /* Do Nothing, leave the cx22702 on the bus. */
  605. break;
  606. default:
  607. err = -ENODEV;
  608. }
  609. return err;
  610. }
  611. static int cx8802_dvb_probe(struct cx8802_driver *drv)
  612. {
  613. struct cx88_core *core = drv->core;
  614. struct cx8802_dev *dev = drv->core->dvbdev;
  615. int err;
  616. dprintk( 1, "%s\n", __FUNCTION__);
  617. dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
  618. core->board,
  619. core->name,
  620. core->pci_bus,
  621. core->pci_slot);
  622. err = -ENODEV;
  623. if (!(cx88_boards[core->board].mpeg & CX88_MPEG_DVB))
  624. goto fail_core;
  625. /* If vp3054 isn't enabled, a stub will just return 0 */
  626. err = vp3054_i2c_probe(dev);
  627. if (0 != err)
  628. goto fail_core;
  629. /* dvb stuff */
  630. printk("%s/2: cx2388x based dvb card\n", core->name);
  631. videobuf_queue_init(&dev->dvb.dvbq, &dvb_qops,
  632. dev->pci, &dev->slock,
  633. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  634. V4L2_FIELD_TOP,
  635. sizeof(struct cx88_buffer),
  636. dev);
  637. err = dvb_register(dev);
  638. if (err != 0)
  639. printk("%s dvb_register failed err = %d\n", __FUNCTION__, err);
  640. fail_core:
  641. return err;
  642. }
  643. static int cx8802_dvb_remove(struct cx8802_driver *drv)
  644. {
  645. struct cx8802_dev *dev = drv->core->dvbdev;
  646. /* dvb */
  647. videobuf_dvb_unregister(&dev->dvb);
  648. vp3054_i2c_remove(dev);
  649. return 0;
  650. }
  651. static struct cx8802_driver cx8802_dvb_driver = {
  652. .type_id = CX88_MPEG_DVB,
  653. .hw_access = CX8802_DRVCTL_SHARED,
  654. .probe = cx8802_dvb_probe,
  655. .remove = cx8802_dvb_remove,
  656. .advise_acquire = cx8802_dvb_advise_acquire,
  657. .advise_release = cx8802_dvb_advise_release,
  658. };
  659. static int dvb_init(void)
  660. {
  661. printk(KERN_INFO "cx2388x dvb driver version %d.%d.%d loaded\n",
  662. (CX88_VERSION_CODE >> 16) & 0xff,
  663. (CX88_VERSION_CODE >> 8) & 0xff,
  664. CX88_VERSION_CODE & 0xff);
  665. #ifdef SNAPSHOT
  666. printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
  667. SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
  668. #endif
  669. return cx8802_register_driver(&cx8802_dvb_driver);
  670. }
  671. static void dvb_fini(void)
  672. {
  673. cx8802_unregister_driver(&cx8802_dvb_driver);
  674. }
  675. module_init(dvb_init);
  676. module_exit(dvb_fini);
  677. /*
  678. * Local variables:
  679. * c-basic-offset: 8
  680. * compile-command: "make DVB=1"
  681. * End:
  682. */