bfin_5xx.c 28 KB

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  1. /*
  2. * File: drivers/serial/bfin_5xx.c
  3. * Based on: Based on drivers/serial/sa1100.c
  4. * Author: Aubrey Li <aubrey.li@analog.com>
  5. *
  6. * Created:
  7. * Description: Driver for blackfin 5xx serial ports
  8. *
  9. * Modified:
  10. * Copyright 2006 Analog Devices Inc.
  11. *
  12. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2 of the License, or
  17. * (at your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful,
  20. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * GNU General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; if not, see the file COPYING, or write
  26. * to the Free Software Foundation, Inc.,
  27. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  28. */
  29. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  30. #define SUPPORT_SYSRQ
  31. #endif
  32. #include <linux/module.h>
  33. #include <linux/ioport.h>
  34. #include <linux/init.h>
  35. #include <linux/console.h>
  36. #include <linux/sysrq.h>
  37. #include <linux/platform_device.h>
  38. #include <linux/tty.h>
  39. #include <linux/tty_flip.h>
  40. #include <linux/serial_core.h>
  41. #ifdef CONFIG_KGDB_UART
  42. #include <linux/kgdb.h>
  43. #include <asm/irq_regs.h>
  44. #endif
  45. #include <asm/gpio.h>
  46. #include <asm/mach/bfin_serial_5xx.h>
  47. #ifdef CONFIG_SERIAL_BFIN_DMA
  48. #include <linux/dma-mapping.h>
  49. #include <asm/io.h>
  50. #include <asm/irq.h>
  51. #include <asm/cacheflush.h>
  52. #endif
  53. /* UART name and device definitions */
  54. #define BFIN_SERIAL_NAME "ttyBF"
  55. #define BFIN_SERIAL_MAJOR 204
  56. #define BFIN_SERIAL_MINOR 64
  57. /*
  58. * Setup for console. Argument comes from the menuconfig
  59. */
  60. #define DMA_RX_XCOUNT 512
  61. #define DMA_RX_YCOUNT (PAGE_SIZE / DMA_RX_XCOUNT)
  62. #define DMA_RX_FLUSH_JIFFIES 5
  63. #ifdef CONFIG_SERIAL_BFIN_DMA
  64. static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
  65. #else
  66. static void bfin_serial_do_work(struct work_struct *work);
  67. static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
  68. static void local_put_char(struct bfin_serial_port *uart, char ch);
  69. #endif
  70. static void bfin_serial_mctrl_check(struct bfin_serial_port *uart);
  71. /*
  72. * interrupts are disabled on entry
  73. */
  74. static void bfin_serial_stop_tx(struct uart_port *port)
  75. {
  76. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  77. #ifdef CONFIG_SERIAL_BFIN_DMA
  78. disable_dma(uart->tx_dma_channel);
  79. #else
  80. unsigned short ier;
  81. ier = UART_GET_IER(uart);
  82. ier &= ~ETBEI;
  83. UART_PUT_IER(uart, ier);
  84. #endif
  85. }
  86. /*
  87. * port is locked and interrupts are disabled
  88. */
  89. static void bfin_serial_start_tx(struct uart_port *port)
  90. {
  91. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  92. #ifdef CONFIG_SERIAL_BFIN_DMA
  93. bfin_serial_dma_tx_chars(uart);
  94. #else
  95. unsigned short ier;
  96. ier = UART_GET_IER(uart);
  97. ier |= ETBEI;
  98. UART_PUT_IER(uart, ier);
  99. bfin_serial_tx_chars(uart);
  100. #endif
  101. }
  102. /*
  103. * Interrupts are enabled
  104. */
  105. static void bfin_serial_stop_rx(struct uart_port *port)
  106. {
  107. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  108. unsigned short ier;
  109. ier = UART_GET_IER(uart);
  110. #ifdef CONFIG_KGDB_UART
  111. if (uart->port.line != CONFIG_KGDB_UART_PORT)
  112. #endif
  113. ier &= ~ERBFI;
  114. UART_PUT_IER(uart, ier);
  115. }
  116. /*
  117. * Set the modem control timer to fire immediately.
  118. */
  119. static void bfin_serial_enable_ms(struct uart_port *port)
  120. {
  121. }
  122. #ifdef CONFIG_KGDB_UART
  123. static int kgdb_entry_state;
  124. void kgdb_put_debug_char(int chr)
  125. {
  126. struct bfin_serial_port *uart;
  127. if (CONFIG_KGDB_UART_PORT<0 || CONFIG_KGDB_UART_PORT>=NR_PORTS)
  128. uart = &bfin_serial_ports[0];
  129. else
  130. uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
  131. while (!(UART_GET_LSR(uart) & THRE)) {
  132. __builtin_bfin_ssync();
  133. }
  134. UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
  135. __builtin_bfin_ssync();
  136. UART_PUT_CHAR(uart, (unsigned char)chr);
  137. __builtin_bfin_ssync();
  138. }
  139. int kgdb_get_debug_char(void)
  140. {
  141. struct bfin_serial_port *uart;
  142. unsigned char chr;
  143. if (CONFIG_KGDB_UART_PORT<0 || CONFIG_KGDB_UART_PORT>=NR_PORTS)
  144. uart = &bfin_serial_ports[0];
  145. else
  146. uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
  147. while(!(UART_GET_LSR(uart) & DR)) {
  148. __builtin_bfin_ssync();
  149. }
  150. UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
  151. __builtin_bfin_ssync();
  152. chr = UART_GET_CHAR(uart);
  153. __builtin_bfin_ssync();
  154. return chr;
  155. }
  156. #endif
  157. #ifdef CONFIG_SERIAL_BFIN_PIO
  158. static void local_put_char(struct bfin_serial_port *uart, char ch)
  159. {
  160. unsigned short status;
  161. int flags = 0;
  162. spin_lock_irqsave(&uart->port.lock, flags);
  163. do {
  164. status = UART_GET_LSR(uart);
  165. } while (!(status & THRE));
  166. UART_PUT_CHAR(uart, ch);
  167. SSYNC();
  168. spin_unlock_irqrestore(&uart->port.lock, flags);
  169. }
  170. static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
  171. {
  172. struct tty_struct *tty = uart->port.info->tty;
  173. unsigned int status, ch, flg;
  174. #ifdef CONFIG_KGDB_UART
  175. struct pt_regs *regs = get_irq_regs();
  176. #endif
  177. #ifdef BF533_FAMILY
  178. static int in_break = 0;
  179. #endif
  180. status = UART_GET_LSR(uart);
  181. ch = UART_GET_CHAR(uart);
  182. uart->port.icount.rx++;
  183. #ifdef CONFIG_KGDB_UART
  184. if (uart->port.line == CONFIG_KGDB_UART_PORT) {
  185. if (uart->port.cons->index == CONFIG_KGDB_UART_PORT && ch == 0x1) { /* Ctrl + A */
  186. kgdb_breakkey_pressed(regs);
  187. return;
  188. } else if (kgdb_entry_state == 0 && ch == '$') {/* connection from KGDB */
  189. kgdb_entry_state = 1;
  190. } else if (kgdb_entry_state == 1 && ch == 'q') {
  191. kgdb_entry_state = 0;
  192. kgdb_breakkey_pressed(regs);
  193. return;
  194. } else if (ch == 0x3) {/* Ctrl + C */
  195. kgdb_entry_state = 0;
  196. kgdb_breakkey_pressed(regs);
  197. return;
  198. } else {
  199. kgdb_entry_state = 0;
  200. }
  201. }
  202. #endif
  203. #ifdef BF533_FAMILY
  204. /* The BF533 family of processors have a nice misbehavior where
  205. * they continuously generate characters for a "single" break.
  206. * We have to basically ignore this flood until the "next" valid
  207. * character comes across. All other Blackfin families operate
  208. * properly though.
  209. */
  210. if (in_break) {
  211. if (ch != 0) {
  212. in_break = 0;
  213. ch = UART_GET_CHAR(uart);
  214. if (bfin_revid() < 5)
  215. return;
  216. } else
  217. return;
  218. }
  219. #endif
  220. if (status & BI) {
  221. #ifdef BF533_FAMILY
  222. in_break = 1;
  223. #endif
  224. uart->port.icount.brk++;
  225. if (uart_handle_break(&uart->port))
  226. goto ignore_char;
  227. status &= ~(PE | FE);
  228. }
  229. if (status & PE)
  230. uart->port.icount.parity++;
  231. if (status & OE)
  232. uart->port.icount.overrun++;
  233. if (status & FE)
  234. uart->port.icount.frame++;
  235. status &= uart->port.read_status_mask;
  236. if (status & BI)
  237. flg = TTY_BREAK;
  238. else if (status & PE)
  239. flg = TTY_PARITY;
  240. else if (status & FE)
  241. flg = TTY_FRAME;
  242. else
  243. flg = TTY_NORMAL;
  244. if (uart_handle_sysrq_char(&uart->port, ch))
  245. goto ignore_char;
  246. uart_insert_char(&uart->port, status, OE, ch, flg);
  247. ignore_char:
  248. tty_flip_buffer_push(tty);
  249. }
  250. static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
  251. {
  252. struct circ_buf *xmit = &uart->port.info->xmit;
  253. if (uart->port.x_char) {
  254. UART_PUT_CHAR(uart, uart->port.x_char);
  255. uart->port.icount.tx++;
  256. uart->port.x_char = 0;
  257. return;
  258. }
  259. /*
  260. * Check the modem control lines before
  261. * transmitting anything.
  262. */
  263. bfin_serial_mctrl_check(uart);
  264. if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
  265. bfin_serial_stop_tx(&uart->port);
  266. return;
  267. }
  268. local_put_char(uart, xmit->buf[xmit->tail]);
  269. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  270. uart->port.icount.tx++;
  271. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  272. uart_write_wakeup(&uart->port);
  273. if (uart_circ_empty(xmit))
  274. bfin_serial_stop_tx(&uart->port);
  275. }
  276. static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
  277. {
  278. struct bfin_serial_port *uart = dev_id;
  279. spin_lock(&uart->port.lock);
  280. while ((UART_GET_IIR(uart) & IIR_STATUS) == IIR_RX_READY)
  281. bfin_serial_rx_chars(uart);
  282. spin_unlock(&uart->port.lock);
  283. return IRQ_HANDLED;
  284. }
  285. static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
  286. {
  287. struct bfin_serial_port *uart = dev_id;
  288. spin_lock(&uart->port.lock);
  289. while ((UART_GET_IIR(uart) & IIR_STATUS) == IIR_TX_READY)
  290. bfin_serial_tx_chars(uart);
  291. spin_unlock(&uart->port.lock);
  292. return IRQ_HANDLED;
  293. }
  294. static void bfin_serial_do_work(struct work_struct *work)
  295. {
  296. struct bfin_serial_port *uart = container_of(work, struct bfin_serial_port, cts_workqueue);
  297. bfin_serial_mctrl_check(uart);
  298. }
  299. #endif
  300. #ifdef CONFIG_SERIAL_BFIN_DMA
  301. static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
  302. {
  303. struct circ_buf *xmit = &uart->port.info->xmit;
  304. unsigned short ier;
  305. int flags = 0;
  306. if (!uart->tx_done)
  307. return;
  308. uart->tx_done = 0;
  309. if (uart->port.x_char) {
  310. UART_PUT_CHAR(uart, uart->port.x_char);
  311. uart->port.icount.tx++;
  312. uart->port.x_char = 0;
  313. uart->tx_done = 1;
  314. return;
  315. }
  316. /*
  317. * Check the modem control lines before
  318. * transmitting anything.
  319. */
  320. bfin_serial_mctrl_check(uart);
  321. if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
  322. bfin_serial_stop_tx(&uart->port);
  323. uart->tx_done = 1;
  324. return;
  325. }
  326. spin_lock_irqsave(&uart->port.lock, flags);
  327. uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
  328. if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
  329. uart->tx_count = UART_XMIT_SIZE - xmit->tail;
  330. blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
  331. (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
  332. set_dma_config(uart->tx_dma_channel,
  333. set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
  334. INTR_ON_BUF,
  335. DIMENSION_LINEAR,
  336. DATA_SIZE_8));
  337. set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
  338. set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
  339. set_dma_x_modify(uart->tx_dma_channel, 1);
  340. enable_dma(uart->tx_dma_channel);
  341. ier = UART_GET_IER(uart);
  342. ier |= ETBEI;
  343. UART_PUT_IER(uart, ier);
  344. spin_unlock_irqrestore(&uart->port.lock, flags);
  345. }
  346. static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
  347. {
  348. struct tty_struct *tty = uart->port.info->tty;
  349. int i, flg, status;
  350. status = UART_GET_LSR(uart);
  351. uart->port.icount.rx += CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail, UART_XMIT_SIZE);;
  352. if (status & BI) {
  353. uart->port.icount.brk++;
  354. if (uart_handle_break(&uart->port))
  355. goto dma_ignore_char;
  356. status &= ~(PE | FE);
  357. }
  358. if (status & PE)
  359. uart->port.icount.parity++;
  360. if (status & OE)
  361. uart->port.icount.overrun++;
  362. if (status & FE)
  363. uart->port.icount.frame++;
  364. status &= uart->port.read_status_mask;
  365. if (status & BI)
  366. flg = TTY_BREAK;
  367. else if (status & PE)
  368. flg = TTY_PARITY;
  369. else if (status & FE)
  370. flg = TTY_FRAME;
  371. else
  372. flg = TTY_NORMAL;
  373. for (i = uart->rx_dma_buf.head; i < uart->rx_dma_buf.tail; i++) {
  374. if (uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
  375. goto dma_ignore_char;
  376. uart_insert_char(&uart->port, status, OE, uart->rx_dma_buf.buf[i], flg);
  377. }
  378. dma_ignore_char:
  379. tty_flip_buffer_push(tty);
  380. }
  381. void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
  382. {
  383. int x_pos, pos;
  384. int flags = 0;
  385. bfin_serial_dma_tx_chars(uart);
  386. spin_lock_irqsave(&uart->port.lock, flags);
  387. x_pos = DMA_RX_XCOUNT - get_dma_curr_xcount(uart->rx_dma_channel);
  388. if (x_pos == DMA_RX_XCOUNT)
  389. x_pos = 0;
  390. pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
  391. if (pos>uart->rx_dma_buf.tail) {
  392. uart->rx_dma_buf.tail = pos;
  393. bfin_serial_dma_rx_chars(uart);
  394. uart->rx_dma_buf.head = uart->rx_dma_buf.tail;
  395. }
  396. spin_unlock_irqrestore(&uart->port.lock, flags);
  397. uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
  398. add_timer(&(uart->rx_dma_timer));
  399. }
  400. static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
  401. {
  402. struct bfin_serial_port *uart = dev_id;
  403. struct circ_buf *xmit = &uart->port.info->xmit;
  404. unsigned short ier;
  405. spin_lock(&uart->port.lock);
  406. if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
  407. clear_dma_irqstat(uart->tx_dma_channel);
  408. disable_dma(uart->tx_dma_channel);
  409. ier = UART_GET_IER(uart);
  410. ier &= ~ETBEI;
  411. UART_PUT_IER(uart, ier);
  412. xmit->tail = (xmit->tail+uart->tx_count) &(UART_XMIT_SIZE -1);
  413. uart->port.icount.tx+=uart->tx_count;
  414. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  415. uart_write_wakeup(&uart->port);
  416. if (uart_circ_empty(xmit))
  417. bfin_serial_stop_tx(&uart->port);
  418. uart->tx_done = 1;
  419. }
  420. spin_unlock(&uart->port.lock);
  421. return IRQ_HANDLED;
  422. }
  423. static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
  424. {
  425. struct bfin_serial_port *uart = dev_id;
  426. unsigned short irqstat;
  427. uart->rx_dma_nrows++;
  428. if (uart->rx_dma_nrows == DMA_RX_YCOUNT) {
  429. uart->rx_dma_nrows = 0;
  430. uart->rx_dma_buf.tail = DMA_RX_XCOUNT*DMA_RX_YCOUNT;
  431. bfin_serial_dma_rx_chars(uart);
  432. uart->rx_dma_buf.head = uart->rx_dma_buf.tail = 0;
  433. }
  434. spin_lock(&uart->port.lock);
  435. irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
  436. clear_dma_irqstat(uart->rx_dma_channel);
  437. spin_unlock(&uart->port.lock);
  438. return IRQ_HANDLED;
  439. }
  440. #endif
  441. /*
  442. * Return TIOCSER_TEMT when transmitter is not busy.
  443. */
  444. static unsigned int bfin_serial_tx_empty(struct uart_port *port)
  445. {
  446. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  447. unsigned short lsr;
  448. lsr = UART_GET_LSR(uart);
  449. if (lsr & TEMT)
  450. return TIOCSER_TEMT;
  451. else
  452. return 0;
  453. }
  454. static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
  455. {
  456. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  457. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  458. if (uart->cts_pin < 0)
  459. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  460. if (gpio_get_value(uart->cts_pin))
  461. return TIOCM_DSR | TIOCM_CAR;
  462. else
  463. #endif
  464. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  465. }
  466. static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
  467. {
  468. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  469. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  470. if (uart->rts_pin < 0)
  471. return;
  472. if (mctrl & TIOCM_RTS)
  473. gpio_set_value(uart->rts_pin, 0);
  474. else
  475. gpio_set_value(uart->rts_pin, 1);
  476. #endif
  477. }
  478. /*
  479. * Handle any change of modem status signal since we were last called.
  480. */
  481. static void bfin_serial_mctrl_check(struct bfin_serial_port *uart)
  482. {
  483. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  484. unsigned int status;
  485. # ifdef CONFIG_SERIAL_BFIN_DMA
  486. struct uart_info *info = uart->port.info;
  487. struct tty_struct *tty = info->tty;
  488. status = bfin_serial_get_mctrl(&uart->port);
  489. if (!(status & TIOCM_CTS)) {
  490. tty->hw_stopped = 1;
  491. } else {
  492. tty->hw_stopped = 0;
  493. }
  494. # else
  495. status = bfin_serial_get_mctrl(&uart->port);
  496. uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
  497. if (!(status & TIOCM_CTS))
  498. schedule_work(&uart->cts_workqueue);
  499. # endif
  500. #endif
  501. }
  502. /*
  503. * Interrupts are always disabled.
  504. */
  505. static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
  506. {
  507. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  508. u16 lcr = UART_GET_LCR(uart);
  509. if (break_state)
  510. lcr |= SB;
  511. else
  512. lcr &= ~SB;
  513. UART_PUT_LCR(uart, lcr);
  514. SSYNC();
  515. }
  516. static int bfin_serial_startup(struct uart_port *port)
  517. {
  518. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  519. #ifdef CONFIG_SERIAL_BFIN_DMA
  520. dma_addr_t dma_handle;
  521. if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
  522. printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
  523. return -EBUSY;
  524. }
  525. if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
  526. printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
  527. free_dma(uart->rx_dma_channel);
  528. return -EBUSY;
  529. }
  530. set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
  531. set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
  532. uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
  533. uart->rx_dma_buf.head = 0;
  534. uart->rx_dma_buf.tail = 0;
  535. uart->rx_dma_nrows = 0;
  536. set_dma_config(uart->rx_dma_channel,
  537. set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
  538. INTR_ON_ROW, DIMENSION_2D,
  539. DATA_SIZE_8));
  540. set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
  541. set_dma_x_modify(uart->rx_dma_channel, 1);
  542. set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
  543. set_dma_y_modify(uart->rx_dma_channel, 1);
  544. set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
  545. enable_dma(uart->rx_dma_channel);
  546. uart->rx_dma_timer.data = (unsigned long)(uart);
  547. uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
  548. uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
  549. add_timer(&(uart->rx_dma_timer));
  550. #else
  551. # ifdef CONFIG_KGDB_UART
  552. if (uart->port.line != CONFIG_KGDB_UART_PORT && request_irq
  553. # else
  554. if (request_irq
  555. # endif
  556. (uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
  557. "BFIN_UART_RX", uart)) {
  558. printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
  559. return -EBUSY;
  560. }
  561. if (request_irq
  562. (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
  563. "BFIN_UART_TX", uart)) {
  564. printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
  565. free_irq(uart->port.irq, uart);
  566. return -EBUSY;
  567. }
  568. #endif
  569. UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
  570. return 0;
  571. }
  572. static void bfin_serial_shutdown(struct uart_port *port)
  573. {
  574. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  575. #ifdef CONFIG_SERIAL_BFIN_DMA
  576. disable_dma(uart->tx_dma_channel);
  577. free_dma(uart->tx_dma_channel);
  578. disable_dma(uart->rx_dma_channel);
  579. free_dma(uart->rx_dma_channel);
  580. del_timer(&(uart->rx_dma_timer));
  581. #else
  582. #ifdef CONFIG_KGDB_UART
  583. if (uart->port.line != CONFIG_KGDB_UART_PORT)
  584. #endif
  585. free_irq(uart->port.irq, uart);
  586. free_irq(uart->port.irq+1, uart);
  587. #endif
  588. }
  589. static void
  590. bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
  591. struct ktermios *old)
  592. {
  593. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  594. unsigned long flags;
  595. unsigned int baud, quot;
  596. unsigned short val, ier, lsr, lcr = 0;
  597. switch (termios->c_cflag & CSIZE) {
  598. case CS8:
  599. lcr = WLS(8);
  600. break;
  601. case CS7:
  602. lcr = WLS(7);
  603. break;
  604. case CS6:
  605. lcr = WLS(6);
  606. break;
  607. case CS5:
  608. lcr = WLS(5);
  609. break;
  610. default:
  611. printk(KERN_ERR "%s: word lengh not supported\n",
  612. __FUNCTION__);
  613. }
  614. if (termios->c_cflag & CSTOPB)
  615. lcr |= STB;
  616. if (termios->c_cflag & PARENB)
  617. lcr |= PEN;
  618. if (!(termios->c_cflag & PARODD))
  619. lcr |= EPS;
  620. if (termios->c_cflag & CMSPAR)
  621. lcr |= STP;
  622. port->read_status_mask = OE;
  623. if (termios->c_iflag & INPCK)
  624. port->read_status_mask |= (FE | PE);
  625. if (termios->c_iflag & (BRKINT | PARMRK))
  626. port->read_status_mask |= BI;
  627. /*
  628. * Characters to ignore
  629. */
  630. port->ignore_status_mask = 0;
  631. if (termios->c_iflag & IGNPAR)
  632. port->ignore_status_mask |= FE | PE;
  633. if (termios->c_iflag & IGNBRK) {
  634. port->ignore_status_mask |= BI;
  635. /*
  636. * If we're ignoring parity and break indicators,
  637. * ignore overruns too (for real raw support).
  638. */
  639. if (termios->c_iflag & IGNPAR)
  640. port->ignore_status_mask |= OE;
  641. }
  642. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  643. quot = uart_get_divisor(port, baud);
  644. spin_lock_irqsave(&uart->port.lock, flags);
  645. do {
  646. lsr = UART_GET_LSR(uart);
  647. } while (!(lsr & TEMT));
  648. /* Disable UART */
  649. ier = UART_GET_IER(uart);
  650. UART_PUT_IER(uart, 0);
  651. /* Set DLAB in LCR to Access DLL and DLH */
  652. val = UART_GET_LCR(uart);
  653. val |= DLAB;
  654. UART_PUT_LCR(uart, val);
  655. SSYNC();
  656. UART_PUT_DLL(uart, quot & 0xFF);
  657. SSYNC();
  658. UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
  659. SSYNC();
  660. /* Clear DLAB in LCR to Access THR RBR IER */
  661. val = UART_GET_LCR(uart);
  662. val &= ~DLAB;
  663. UART_PUT_LCR(uart, val);
  664. SSYNC();
  665. UART_PUT_LCR(uart, lcr);
  666. /* Enable UART */
  667. UART_PUT_IER(uart, ier);
  668. val = UART_GET_GCTL(uart);
  669. val |= UCEN;
  670. UART_PUT_GCTL(uart, val);
  671. spin_unlock_irqrestore(&uart->port.lock, flags);
  672. }
  673. static const char *bfin_serial_type(struct uart_port *port)
  674. {
  675. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  676. return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
  677. }
  678. /*
  679. * Release the memory region(s) being used by 'port'.
  680. */
  681. static void bfin_serial_release_port(struct uart_port *port)
  682. {
  683. }
  684. /*
  685. * Request the memory region(s) being used by 'port'.
  686. */
  687. static int bfin_serial_request_port(struct uart_port *port)
  688. {
  689. return 0;
  690. }
  691. /*
  692. * Configure/autoconfigure the port.
  693. */
  694. static void bfin_serial_config_port(struct uart_port *port, int flags)
  695. {
  696. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  697. if (flags & UART_CONFIG_TYPE &&
  698. bfin_serial_request_port(&uart->port) == 0)
  699. uart->port.type = PORT_BFIN;
  700. }
  701. /*
  702. * Verify the new serial_struct (for TIOCSSERIAL).
  703. * The only change we allow are to the flags and type, and
  704. * even then only between PORT_BFIN and PORT_UNKNOWN
  705. */
  706. static int
  707. bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
  708. {
  709. return 0;
  710. }
  711. static struct uart_ops bfin_serial_pops = {
  712. .tx_empty = bfin_serial_tx_empty,
  713. .set_mctrl = bfin_serial_set_mctrl,
  714. .get_mctrl = bfin_serial_get_mctrl,
  715. .stop_tx = bfin_serial_stop_tx,
  716. .start_tx = bfin_serial_start_tx,
  717. .stop_rx = bfin_serial_stop_rx,
  718. .enable_ms = bfin_serial_enable_ms,
  719. .break_ctl = bfin_serial_break_ctl,
  720. .startup = bfin_serial_startup,
  721. .shutdown = bfin_serial_shutdown,
  722. .set_termios = bfin_serial_set_termios,
  723. .type = bfin_serial_type,
  724. .release_port = bfin_serial_release_port,
  725. .request_port = bfin_serial_request_port,
  726. .config_port = bfin_serial_config_port,
  727. .verify_port = bfin_serial_verify_port,
  728. };
  729. static void __init bfin_serial_init_ports(void)
  730. {
  731. static int first = 1;
  732. int i;
  733. if (!first)
  734. return;
  735. first = 0;
  736. for (i = 0; i < nr_ports; i++) {
  737. bfin_serial_ports[i].port.uartclk = get_sclk();
  738. bfin_serial_ports[i].port.ops = &bfin_serial_pops;
  739. bfin_serial_ports[i].port.line = i;
  740. bfin_serial_ports[i].port.iotype = UPIO_MEM;
  741. bfin_serial_ports[i].port.membase =
  742. (void __iomem *)bfin_serial_resource[i].uart_base_addr;
  743. bfin_serial_ports[i].port.mapbase =
  744. bfin_serial_resource[i].uart_base_addr;
  745. bfin_serial_ports[i].port.irq =
  746. bfin_serial_resource[i].uart_irq;
  747. bfin_serial_ports[i].port.flags = UPF_BOOT_AUTOCONF;
  748. #ifdef CONFIG_SERIAL_BFIN_DMA
  749. bfin_serial_ports[i].tx_done = 1;
  750. bfin_serial_ports[i].tx_count = 0;
  751. bfin_serial_ports[i].tx_dma_channel =
  752. bfin_serial_resource[i].uart_tx_dma_channel;
  753. bfin_serial_ports[i].rx_dma_channel =
  754. bfin_serial_resource[i].uart_rx_dma_channel;
  755. init_timer(&(bfin_serial_ports[i].rx_dma_timer));
  756. #else
  757. INIT_WORK(&bfin_serial_ports[i].cts_workqueue, bfin_serial_do_work);
  758. #endif
  759. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  760. bfin_serial_ports[i].cts_pin =
  761. bfin_serial_resource[i].uart_cts_pin;
  762. bfin_serial_ports[i].rts_pin =
  763. bfin_serial_resource[i].uart_rts_pin;
  764. #endif
  765. bfin_serial_hw_init(&bfin_serial_ports[i]);
  766. }
  767. }
  768. #ifdef CONFIG_SERIAL_BFIN_CONSOLE
  769. static void bfin_serial_console_putchar(struct uart_port *port, int ch)
  770. {
  771. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  772. while (!(UART_GET_LSR(uart)))
  773. barrier();
  774. UART_PUT_CHAR(uart, ch);
  775. SSYNC();
  776. }
  777. /*
  778. * Interrupts are disabled on entering
  779. */
  780. static void
  781. bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
  782. {
  783. struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
  784. int flags = 0;
  785. spin_lock_irqsave(&uart->port.lock, flags);
  786. uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
  787. spin_unlock_irqrestore(&uart->port.lock, flags);
  788. }
  789. /*
  790. * If the port was already initialised (eg, by a boot loader),
  791. * try to determine the current setup.
  792. */
  793. static void __init
  794. bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
  795. int *parity, int *bits)
  796. {
  797. unsigned short status;
  798. status = UART_GET_IER(uart) & (ERBFI | ETBEI);
  799. if (status == (ERBFI | ETBEI)) {
  800. /* ok, the port was enabled */
  801. unsigned short lcr, val;
  802. unsigned short dlh, dll;
  803. lcr = UART_GET_LCR(uart);
  804. *parity = 'n';
  805. if (lcr & PEN) {
  806. if (lcr & EPS)
  807. *parity = 'e';
  808. else
  809. *parity = 'o';
  810. }
  811. switch (lcr & 0x03) {
  812. case 0: *bits = 5; break;
  813. case 1: *bits = 6; break;
  814. case 2: *bits = 7; break;
  815. case 3: *bits = 8; break;
  816. }
  817. /* Set DLAB in LCR to Access DLL and DLH */
  818. val = UART_GET_LCR(uart);
  819. val |= DLAB;
  820. UART_PUT_LCR(uart, val);
  821. dll = UART_GET_DLL(uart);
  822. dlh = UART_GET_DLH(uart);
  823. /* Clear DLAB in LCR to Access THR RBR IER */
  824. val = UART_GET_LCR(uart);
  825. val &= ~DLAB;
  826. UART_PUT_LCR(uart, val);
  827. *baud = get_sclk() / (16*(dll | dlh << 8));
  828. }
  829. pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __FUNCTION__, *baud, *parity, *bits);
  830. }
  831. static int __init
  832. bfin_serial_console_setup(struct console *co, char *options)
  833. {
  834. struct bfin_serial_port *uart;
  835. int baud = 57600;
  836. int bits = 8;
  837. int parity = 'n';
  838. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  839. int flow = 'r';
  840. #else
  841. int flow = 'n';
  842. #endif
  843. /*
  844. * Check whether an invalid uart number has been specified, and
  845. * if so, search for the first available port that does have
  846. * console support.
  847. */
  848. if (co->index == -1 || co->index >= nr_ports)
  849. co->index = 0;
  850. uart = &bfin_serial_ports[co->index];
  851. if (options)
  852. uart_parse_options(options, &baud, &parity, &bits, &flow);
  853. else
  854. bfin_serial_console_get_options(uart, &baud, &parity, &bits);
  855. return uart_set_options(&uart->port, co, baud, parity, bits, flow);
  856. }
  857. static struct uart_driver bfin_serial_reg;
  858. static struct console bfin_serial_console = {
  859. .name = BFIN_SERIAL_NAME,
  860. .write = bfin_serial_console_write,
  861. .device = uart_console_device,
  862. .setup = bfin_serial_console_setup,
  863. .flags = CON_PRINTBUFFER,
  864. .index = -1,
  865. .data = &bfin_serial_reg,
  866. };
  867. static int __init bfin_serial_rs_console_init(void)
  868. {
  869. bfin_serial_init_ports();
  870. register_console(&bfin_serial_console);
  871. #ifdef CONFIG_KGDB_UART
  872. kgdb_entry_state = 0;
  873. init_kgdb_uart();
  874. #endif
  875. return 0;
  876. }
  877. console_initcall(bfin_serial_rs_console_init);
  878. #define BFIN_SERIAL_CONSOLE &bfin_serial_console
  879. #else
  880. #define BFIN_SERIAL_CONSOLE NULL
  881. #endif
  882. static struct uart_driver bfin_serial_reg = {
  883. .owner = THIS_MODULE,
  884. .driver_name = "bfin-uart",
  885. .dev_name = BFIN_SERIAL_NAME,
  886. .major = BFIN_SERIAL_MAJOR,
  887. .minor = BFIN_SERIAL_MINOR,
  888. .nr = NR_PORTS,
  889. .cons = BFIN_SERIAL_CONSOLE,
  890. };
  891. static int bfin_serial_suspend(struct platform_device *dev, pm_message_t state)
  892. {
  893. struct bfin_serial_port *uart = platform_get_drvdata(dev);
  894. if (uart)
  895. uart_suspend_port(&bfin_serial_reg, &uart->port);
  896. return 0;
  897. }
  898. static int bfin_serial_resume(struct platform_device *dev)
  899. {
  900. struct bfin_serial_port *uart = platform_get_drvdata(dev);
  901. if (uart)
  902. uart_resume_port(&bfin_serial_reg, &uart->port);
  903. return 0;
  904. }
  905. static int bfin_serial_probe(struct platform_device *dev)
  906. {
  907. struct resource *res = dev->resource;
  908. int i;
  909. for (i = 0; i < dev->num_resources; i++, res++)
  910. if (res->flags & IORESOURCE_MEM)
  911. break;
  912. if (i < dev->num_resources) {
  913. for (i = 0; i < nr_ports; i++, res++) {
  914. if (bfin_serial_ports[i].port.mapbase != res->start)
  915. continue;
  916. bfin_serial_ports[i].port.dev = &dev->dev;
  917. uart_add_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
  918. platform_set_drvdata(dev, &bfin_serial_ports[i]);
  919. }
  920. }
  921. return 0;
  922. }
  923. static int bfin_serial_remove(struct platform_device *pdev)
  924. {
  925. struct bfin_serial_port *uart = platform_get_drvdata(pdev);
  926. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  927. gpio_free(uart->cts_pin);
  928. gpio_free(uart->rts_pin);
  929. #endif
  930. platform_set_drvdata(pdev, NULL);
  931. if (uart)
  932. uart_remove_one_port(&bfin_serial_reg, &uart->port);
  933. return 0;
  934. }
  935. static struct platform_driver bfin_serial_driver = {
  936. .probe = bfin_serial_probe,
  937. .remove = bfin_serial_remove,
  938. .suspend = bfin_serial_suspend,
  939. .resume = bfin_serial_resume,
  940. .driver = {
  941. .name = "bfin-uart",
  942. },
  943. };
  944. static int __init bfin_serial_init(void)
  945. {
  946. int ret;
  947. #ifdef CONFIG_KGDB_UART
  948. struct bfin_serial_port *uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
  949. struct termios t;
  950. #endif
  951. pr_info("Serial: Blackfin serial driver\n");
  952. bfin_serial_init_ports();
  953. ret = uart_register_driver(&bfin_serial_reg);
  954. if (ret == 0) {
  955. ret = platform_driver_register(&bfin_serial_driver);
  956. if (ret) {
  957. pr_debug("uart register failed\n");
  958. uart_unregister_driver(&bfin_serial_reg);
  959. }
  960. }
  961. #ifdef CONFIG_KGDB_UART
  962. if (uart->port.cons->index != CONFIG_KGDB_UART_PORT) {
  963. request_irq(uart->port.irq, bfin_serial_int,
  964. IRQF_DISABLED, "BFIN_UART_RX", uart);
  965. pr_info("Request irq for kgdb uart port\n");
  966. UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
  967. __builtin_bfin_ssync();
  968. t.c_cflag = CS8|B57600;
  969. t.c_iflag = 0;
  970. t.c_oflag = 0;
  971. t.c_lflag = ICANON;
  972. t.c_line = CONFIG_KGDB_UART_PORT;
  973. bfin_serial_set_termios(&uart->port, &t, &t);
  974. }
  975. #endif
  976. return ret;
  977. }
  978. static void __exit bfin_serial_exit(void)
  979. {
  980. platform_driver_unregister(&bfin_serial_driver);
  981. uart_unregister_driver(&bfin_serial_reg);
  982. }
  983. module_init(bfin_serial_init);
  984. module_exit(bfin_serial_exit);
  985. MODULE_AUTHOR("Aubrey.Li <aubrey.li@analog.com>");
  986. MODULE_DESCRIPTION("Blackfin generic serial port driver");
  987. MODULE_LICENSE("GPL");
  988. MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);