core.c 21 KB

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  1. /*
  2. * Copyright (C) 2006, Rusty Russell <rusty@rustcorp.com.au> IBM Corporation.
  3. * Copyright (C) 2007, Jes Sorensen <jes@sgi.com> SGI.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; either version 2 of the License, or
  8. * (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  13. * NON INFRINGEMENT. See the GNU General Public License for more
  14. * details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19. */
  20. #include <linux/kernel.h>
  21. #include <linux/start_kernel.h>
  22. #include <linux/string.h>
  23. #include <linux/console.h>
  24. #include <linux/screen_info.h>
  25. #include <linux/irq.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/clocksource.h>
  28. #include <linux/clockchips.h>
  29. #include <linux/cpu.h>
  30. #include <linux/lguest.h>
  31. #include <linux/lguest_launcher.h>
  32. #include <linux/lguest_bus.h>
  33. #include <asm/paravirt.h>
  34. #include <asm/param.h>
  35. #include <asm/page.h>
  36. #include <asm/pgtable.h>
  37. #include <asm/desc.h>
  38. #include <asm/setup.h>
  39. #include <asm/lguest.h>
  40. #include <asm/uaccess.h>
  41. #include <asm/i387.h>
  42. #include "../lg.h"
  43. static int cpu_had_pge;
  44. static struct {
  45. unsigned long offset;
  46. unsigned short segment;
  47. } lguest_entry;
  48. /* Offset from where switcher.S was compiled to where we've copied it */
  49. static unsigned long switcher_offset(void)
  50. {
  51. return SWITCHER_ADDR - (unsigned long)start_switcher_text;
  52. }
  53. /* This cpu's struct lguest_pages. */
  54. static struct lguest_pages *lguest_pages(unsigned int cpu)
  55. {
  56. return &(((struct lguest_pages *)
  57. (SWITCHER_ADDR + SHARED_SWITCHER_PAGES*PAGE_SIZE))[cpu]);
  58. }
  59. static DEFINE_PER_CPU(struct lguest *, last_guest);
  60. /*S:010
  61. * We are getting close to the Switcher.
  62. *
  63. * Remember that each CPU has two pages which are visible to the Guest when it
  64. * runs on that CPU. This has to contain the state for that Guest: we copy the
  65. * state in just before we run the Guest.
  66. *
  67. * Each Guest has "changed" flags which indicate what has changed in the Guest
  68. * since it last ran. We saw this set in interrupts_and_traps.c and
  69. * segments.c.
  70. */
  71. static void copy_in_guest_info(struct lguest *lg, struct lguest_pages *pages)
  72. {
  73. /* Copying all this data can be quite expensive. We usually run the
  74. * same Guest we ran last time (and that Guest hasn't run anywhere else
  75. * meanwhile). If that's not the case, we pretend everything in the
  76. * Guest has changed. */
  77. if (__get_cpu_var(last_guest) != lg || lg->last_pages != pages) {
  78. __get_cpu_var(last_guest) = lg;
  79. lg->last_pages = pages;
  80. lg->changed = CHANGED_ALL;
  81. }
  82. /* These copies are pretty cheap, so we do them unconditionally: */
  83. /* Save the current Host top-level page directory. */
  84. pages->state.host_cr3 = __pa(current->mm->pgd);
  85. /* Set up the Guest's page tables to see this CPU's pages (and no
  86. * other CPU's pages). */
  87. map_switcher_in_guest(lg, pages);
  88. /* Set up the two "TSS" members which tell the CPU what stack to use
  89. * for traps which do directly into the Guest (ie. traps at privilege
  90. * level 1). */
  91. pages->state.guest_tss.esp1 = lg->esp1;
  92. pages->state.guest_tss.ss1 = lg->ss1;
  93. /* Copy direct-to-Guest trap entries. */
  94. if (lg->changed & CHANGED_IDT)
  95. copy_traps(lg, pages->state.guest_idt, default_idt_entries);
  96. /* Copy all GDT entries which the Guest can change. */
  97. if (lg->changed & CHANGED_GDT)
  98. copy_gdt(lg, pages->state.guest_gdt);
  99. /* If only the TLS entries have changed, copy them. */
  100. else if (lg->changed & CHANGED_GDT_TLS)
  101. copy_gdt_tls(lg, pages->state.guest_gdt);
  102. /* Mark the Guest as unchanged for next time. */
  103. lg->changed = 0;
  104. }
  105. /* Finally: the code to actually call into the Switcher to run the Guest. */
  106. static void run_guest_once(struct lguest *lg, struct lguest_pages *pages)
  107. {
  108. /* This is a dummy value we need for GCC's sake. */
  109. unsigned int clobber;
  110. /* Copy the guest-specific information into this CPU's "struct
  111. * lguest_pages". */
  112. copy_in_guest_info(lg, pages);
  113. /* Set the trap number to 256 (impossible value). If we fault while
  114. * switching to the Guest (bad segment registers or bug), this will
  115. * cause us to abort the Guest. */
  116. lg->regs->trapnum = 256;
  117. /* Now: we push the "eflags" register on the stack, then do an "lcall".
  118. * This is how we change from using the kernel code segment to using
  119. * the dedicated lguest code segment, as well as jumping into the
  120. * Switcher.
  121. *
  122. * The lcall also pushes the old code segment (KERNEL_CS) onto the
  123. * stack, then the address of this call. This stack layout happens to
  124. * exactly match the stack of an interrupt... */
  125. asm volatile("pushf; lcall *lguest_entry"
  126. /* This is how we tell GCC that %eax ("a") and %ebx ("b")
  127. * are changed by this routine. The "=" means output. */
  128. : "=a"(clobber), "=b"(clobber)
  129. /* %eax contains the pages pointer. ("0" refers to the
  130. * 0-th argument above, ie "a"). %ebx contains the
  131. * physical address of the Guest's top-level page
  132. * directory. */
  133. : "0"(pages), "1"(__pa(lg->pgdirs[lg->pgdidx].pgdir))
  134. /* We tell gcc that all these registers could change,
  135. * which means we don't have to save and restore them in
  136. * the Switcher. */
  137. : "memory", "%edx", "%ecx", "%edi", "%esi");
  138. }
  139. /*:*/
  140. /*H:040 This is the i386-specific code to setup and run the Guest. Interrupts
  141. * are disabled: we own the CPU. */
  142. void lguest_arch_run_guest(struct lguest *lg)
  143. {
  144. /* Remember the awfully-named TS bit? If the Guest has asked
  145. * to set it we set it now, so we can trap and pass that trap
  146. * to the Guest if it uses the FPU. */
  147. if (lg->ts)
  148. lguest_set_ts();
  149. /* SYSENTER is an optimized way of doing system calls. We
  150. * can't allow it because it always jumps to privilege level 0.
  151. * A normal Guest won't try it because we don't advertise it in
  152. * CPUID, but a malicious Guest (or malicious Guest userspace
  153. * program) could, so we tell the CPU to disable it before
  154. * running the Guest. */
  155. if (boot_cpu_has(X86_FEATURE_SEP))
  156. wrmsr(MSR_IA32_SYSENTER_CS, 0, 0);
  157. /* Now we actually run the Guest. It will pop back out when
  158. * something interesting happens, and we can examine its
  159. * registers to see what it was doing. */
  160. run_guest_once(lg, lguest_pages(raw_smp_processor_id()));
  161. /* The "regs" pointer contains two extra entries which are not
  162. * really registers: a trap number which says what interrupt or
  163. * trap made the switcher code come back, and an error code
  164. * which some traps set. */
  165. /* If the Guest page faulted, then the cr2 register will tell
  166. * us the bad virtual address. We have to grab this now,
  167. * because once we re-enable interrupts an interrupt could
  168. * fault and thus overwrite cr2, or we could even move off to a
  169. * different CPU. */
  170. if (lg->regs->trapnum == 14)
  171. lg->arch.last_pagefault = read_cr2();
  172. /* Similarly, if we took a trap because the Guest used the FPU,
  173. * we have to restore the FPU it expects to see. */
  174. else if (lg->regs->trapnum == 7)
  175. math_state_restore();
  176. /* Restore SYSENTER if it's supposed to be on. */
  177. if (boot_cpu_has(X86_FEATURE_SEP))
  178. wrmsr(MSR_IA32_SYSENTER_CS, __KERNEL_CS, 0);
  179. }
  180. /*H:130 Our Guest is usually so well behaved; it never tries to do things it
  181. * isn't allowed to. Unfortunately, Linux's paravirtual infrastructure isn't
  182. * quite complete, because it doesn't contain replacements for the Intel I/O
  183. * instructions. As a result, the Guest sometimes fumbles across one during
  184. * the boot process as it probes for various things which are usually attached
  185. * to a PC.
  186. *
  187. * When the Guest uses one of these instructions, we get trap #13 (General
  188. * Protection Fault) and come here. We see if it's one of those troublesome
  189. * instructions and skip over it. We return true if we did. */
  190. static int emulate_insn(struct lguest *lg)
  191. {
  192. u8 insn;
  193. unsigned int insnlen = 0, in = 0, shift = 0;
  194. /* The eip contains the *virtual* address of the Guest's instruction:
  195. * guest_pa just subtracts the Guest's page_offset. */
  196. unsigned long physaddr = guest_pa(lg, lg->regs->eip);
  197. /* This must be the Guest kernel trying to do something, not userspace!
  198. * The bottom two bits of the CS segment register are the privilege
  199. * level. */
  200. if ((lg->regs->cs & 3) != GUEST_PL)
  201. return 0;
  202. /* Decoding x86 instructions is icky. */
  203. lgread(lg, &insn, physaddr, 1);
  204. /* 0x66 is an "operand prefix". It means it's using the upper 16 bits
  205. of the eax register. */
  206. if (insn == 0x66) {
  207. shift = 16;
  208. /* The instruction is 1 byte so far, read the next byte. */
  209. insnlen = 1;
  210. lgread(lg, &insn, physaddr + insnlen, 1);
  211. }
  212. /* We can ignore the lower bit for the moment and decode the 4 opcodes
  213. * we need to emulate. */
  214. switch (insn & 0xFE) {
  215. case 0xE4: /* in <next byte>,%al */
  216. insnlen += 2;
  217. in = 1;
  218. break;
  219. case 0xEC: /* in (%dx),%al */
  220. insnlen += 1;
  221. in = 1;
  222. break;
  223. case 0xE6: /* out %al,<next byte> */
  224. insnlen += 2;
  225. break;
  226. case 0xEE: /* out %al,(%dx) */
  227. insnlen += 1;
  228. break;
  229. default:
  230. /* OK, we don't know what this is, can't emulate. */
  231. return 0;
  232. }
  233. /* If it was an "IN" instruction, they expect the result to be read
  234. * into %eax, so we change %eax. We always return all-ones, which
  235. * traditionally means "there's nothing there". */
  236. if (in) {
  237. /* Lower bit tells is whether it's a 16 or 32 bit access */
  238. if (insn & 0x1)
  239. lg->regs->eax = 0xFFFFFFFF;
  240. else
  241. lg->regs->eax |= (0xFFFF << shift);
  242. }
  243. /* Finally, we've "done" the instruction, so move past it. */
  244. lg->regs->eip += insnlen;
  245. /* Success! */
  246. return 1;
  247. }
  248. /*H:050 Once we've re-enabled interrupts, we look at why the Guest exited. */
  249. void lguest_arch_handle_trap(struct lguest *lg)
  250. {
  251. switch (lg->regs->trapnum) {
  252. case 13: /* We've intercepted a GPF. */
  253. /* Check if this was one of those annoying IN or OUT
  254. * instructions which we need to emulate. If so, we
  255. * just go back into the Guest after we've done it. */
  256. if (lg->regs->errcode == 0) {
  257. if (emulate_insn(lg))
  258. return;
  259. }
  260. break;
  261. case 14: /* We've intercepted a page fault. */
  262. /* The Guest accessed a virtual address that wasn't
  263. * mapped. This happens a lot: we don't actually set
  264. * up most of the page tables for the Guest at all when
  265. * we start: as it runs it asks for more and more, and
  266. * we set them up as required. In this case, we don't
  267. * even tell the Guest that the fault happened.
  268. *
  269. * The errcode tells whether this was a read or a
  270. * write, and whether kernel or userspace code. */
  271. if (demand_page(lg, lg->arch.last_pagefault, lg->regs->errcode))
  272. return;
  273. /* OK, it's really not there (or not OK): the Guest
  274. * needs to know. We write out the cr2 value so it
  275. * knows where the fault occurred.
  276. *
  277. * Note that if the Guest were really messed up, this
  278. * could happen before it's done the INITIALIZE
  279. * hypercall, so lg->lguest_data will be NULL */
  280. if (lg->lguest_data &&
  281. put_user(lg->arch.last_pagefault, &lg->lguest_data->cr2))
  282. kill_guest(lg, "Writing cr2");
  283. break;
  284. case 7: /* We've intercepted a Device Not Available fault. */
  285. /* If the Guest doesn't want to know, we already
  286. * restored the Floating Point Unit, so we just
  287. * continue without telling it. */
  288. if (!lg->ts)
  289. return;
  290. break;
  291. case 32 ... 255:
  292. /* These values mean a real interrupt occurred, in which case
  293. * the Host handler has already been run. We just do a
  294. * friendly check if another process should now be run, then
  295. * return to run the Guest again */
  296. cond_resched();
  297. return;
  298. case LGUEST_TRAP_ENTRY:
  299. /* Our 'struct hcall_args' maps directly over our regs: we set
  300. * up the pointer now to indicate a hypercall is pending. */
  301. lg->hcall = (struct hcall_args *)lg->regs;
  302. return;
  303. }
  304. /* We didn't handle the trap, so it needs to go to the Guest. */
  305. if (!deliver_trap(lg, lg->regs->trapnum))
  306. /* If the Guest doesn't have a handler (either it hasn't
  307. * registered any yet, or it's one of the faults we don't let
  308. * it handle), it dies with a cryptic error message. */
  309. kill_guest(lg, "unhandled trap %li at %#lx (%#lx)",
  310. lg->regs->trapnum, lg->regs->eip,
  311. lg->regs->trapnum == 14 ? lg->arch.last_pagefault
  312. : lg->regs->errcode);
  313. }
  314. /* Now we can look at each of the routines this calls, in increasing order of
  315. * complexity: do_hypercalls(), emulate_insn(), maybe_do_interrupt(),
  316. * deliver_trap() and demand_page(). After all those, we'll be ready to
  317. * examine the Switcher, and our philosophical understanding of the Host/Guest
  318. * duality will be complete. :*/
  319. static void adjust_pge(void *on)
  320. {
  321. if (on)
  322. write_cr4(read_cr4() | X86_CR4_PGE);
  323. else
  324. write_cr4(read_cr4() & ~X86_CR4_PGE);
  325. }
  326. /*H:020 Now the Switcher is mapped and every thing else is ready, we need to do
  327. * some more i386-specific initialization. */
  328. void __init lguest_arch_host_init(void)
  329. {
  330. int i;
  331. /* Most of the i386/switcher.S doesn't care that it's been moved; on
  332. * Intel, jumps are relative, and it doesn't access any references to
  333. * external code or data.
  334. *
  335. * The only exception is the interrupt handlers in switcher.S: their
  336. * addresses are placed in a table (default_idt_entries), so we need to
  337. * update the table with the new addresses. switcher_offset() is a
  338. * convenience function which returns the distance between the builtin
  339. * switcher code and the high-mapped copy we just made. */
  340. for (i = 0; i < IDT_ENTRIES; i++)
  341. default_idt_entries[i] += switcher_offset();
  342. /*
  343. * Set up the Switcher's per-cpu areas.
  344. *
  345. * Each CPU gets two pages of its own within the high-mapped region
  346. * (aka. "struct lguest_pages"). Much of this can be initialized now,
  347. * but some depends on what Guest we are running (which is set up in
  348. * copy_in_guest_info()).
  349. */
  350. for_each_possible_cpu(i) {
  351. /* lguest_pages() returns this CPU's two pages. */
  352. struct lguest_pages *pages = lguest_pages(i);
  353. /* This is a convenience pointer to make the code fit one
  354. * statement to a line. */
  355. struct lguest_ro_state *state = &pages->state;
  356. /* The Global Descriptor Table: the Host has a different one
  357. * for each CPU. We keep a descriptor for the GDT which says
  358. * where it is and how big it is (the size is actually the last
  359. * byte, not the size, hence the "-1"). */
  360. state->host_gdt_desc.size = GDT_SIZE-1;
  361. state->host_gdt_desc.address = (long)get_cpu_gdt_table(i);
  362. /* All CPUs on the Host use the same Interrupt Descriptor
  363. * Table, so we just use store_idt(), which gets this CPU's IDT
  364. * descriptor. */
  365. store_idt(&state->host_idt_desc);
  366. /* The descriptors for the Guest's GDT and IDT can be filled
  367. * out now, too. We copy the GDT & IDT into ->guest_gdt and
  368. * ->guest_idt before actually running the Guest. */
  369. state->guest_idt_desc.size = sizeof(state->guest_idt)-1;
  370. state->guest_idt_desc.address = (long)&state->guest_idt;
  371. state->guest_gdt_desc.size = sizeof(state->guest_gdt)-1;
  372. state->guest_gdt_desc.address = (long)&state->guest_gdt;
  373. /* We know where we want the stack to be when the Guest enters
  374. * the switcher: in pages->regs. The stack grows upwards, so
  375. * we start it at the end of that structure. */
  376. state->guest_tss.esp0 = (long)(&pages->regs + 1);
  377. /* And this is the GDT entry to use for the stack: we keep a
  378. * couple of special LGUEST entries. */
  379. state->guest_tss.ss0 = LGUEST_DS;
  380. /* x86 can have a finegrained bitmap which indicates what I/O
  381. * ports the process can use. We set it to the end of our
  382. * structure, meaning "none". */
  383. state->guest_tss.io_bitmap_base = sizeof(state->guest_tss);
  384. /* Some GDT entries are the same across all Guests, so we can
  385. * set them up now. */
  386. setup_default_gdt_entries(state);
  387. /* Most IDT entries are the same for all Guests, too.*/
  388. setup_default_idt_entries(state, default_idt_entries);
  389. /* The Host needs to be able to use the LGUEST segments on this
  390. * CPU, too, so put them in the Host GDT. */
  391. get_cpu_gdt_table(i)[GDT_ENTRY_LGUEST_CS] = FULL_EXEC_SEGMENT;
  392. get_cpu_gdt_table(i)[GDT_ENTRY_LGUEST_DS] = FULL_SEGMENT;
  393. }
  394. /* In the Switcher, we want the %cs segment register to use the
  395. * LGUEST_CS GDT entry: we've put that in the Host and Guest GDTs, so
  396. * it will be undisturbed when we switch. To change %cs and jump we
  397. * need this structure to feed to Intel's "lcall" instruction. */
  398. lguest_entry.offset = (long)switch_to_guest + switcher_offset();
  399. lguest_entry.segment = LGUEST_CS;
  400. /* Finally, we need to turn off "Page Global Enable". PGE is an
  401. * optimization where page table entries are specially marked to show
  402. * they never change. The Host kernel marks all the kernel pages this
  403. * way because it's always present, even when userspace is running.
  404. *
  405. * Lguest breaks this: unbeknownst to the rest of the Host kernel, we
  406. * switch to the Guest kernel. If you don't disable this on all CPUs,
  407. * you'll get really weird bugs that you'll chase for two days.
  408. *
  409. * I used to turn PGE off every time we switched to the Guest and back
  410. * on when we return, but that slowed the Switcher down noticibly. */
  411. /* We don't need the complexity of CPUs coming and going while we're
  412. * doing this. */
  413. lock_cpu_hotplug();
  414. if (cpu_has_pge) { /* We have a broader idea of "global". */
  415. /* Remember that this was originally set (for cleanup). */
  416. cpu_had_pge = 1;
  417. /* adjust_pge is a helper function which sets or unsets the PGE
  418. * bit on its CPU, depending on the argument (0 == unset). */
  419. on_each_cpu(adjust_pge, (void *)0, 0, 1);
  420. /* Turn off the feature in the global feature set. */
  421. clear_bit(X86_FEATURE_PGE, boot_cpu_data.x86_capability);
  422. }
  423. unlock_cpu_hotplug();
  424. };
  425. /*:*/
  426. void __exit lguest_arch_host_fini(void)
  427. {
  428. /* If we had PGE before we started, turn it back on now. */
  429. lock_cpu_hotplug();
  430. if (cpu_had_pge) {
  431. set_bit(X86_FEATURE_PGE, boot_cpu_data.x86_capability);
  432. /* adjust_pge's argument "1" means set PGE. */
  433. on_each_cpu(adjust_pge, (void *)1, 0, 1);
  434. }
  435. unlock_cpu_hotplug();
  436. }
  437. /*H:122 The i386-specific hypercalls simply farm out to the right functions. */
  438. int lguest_arch_do_hcall(struct lguest *lg, struct hcall_args *args)
  439. {
  440. switch (args->arg0) {
  441. case LHCALL_LOAD_GDT:
  442. load_guest_gdt(lg, args->arg1, args->arg2);
  443. break;
  444. case LHCALL_LOAD_IDT_ENTRY:
  445. load_guest_idt_entry(lg, args->arg1, args->arg2, args->arg3);
  446. break;
  447. case LHCALL_LOAD_TLS:
  448. guest_load_tls(lg, args->arg1);
  449. break;
  450. default:
  451. /* Bad Guest. Bad! */
  452. return -EIO;
  453. }
  454. return 0;
  455. }
  456. /*H:126 i386-specific hypercall initialization: */
  457. int lguest_arch_init_hypercalls(struct lguest *lg)
  458. {
  459. u32 tsc_speed;
  460. /* The pointer to the Guest's "struct lguest_data" is the only
  461. * argument. We check that address now. */
  462. if (!lguest_address_ok(lg, lg->hcall->arg1, sizeof(*lg->lguest_data)))
  463. return -EFAULT;
  464. /* Having checked it, we simply set lg->lguest_data to point straight
  465. * into the Launcher's memory at the right place and then use
  466. * copy_to_user/from_user from now on, instead of lgread/write. I put
  467. * this in to show that I'm not immune to writing stupid
  468. * optimizations. */
  469. lg->lguest_data = lg->mem_base + lg->hcall->arg1;
  470. /* We insist that the Time Stamp Counter exist and doesn't change with
  471. * cpu frequency. Some devious chip manufacturers decided that TSC
  472. * changes could be handled in software. I decided that time going
  473. * backwards might be good for benchmarks, but it's bad for users.
  474. *
  475. * We also insist that the TSC be stable: the kernel detects unreliable
  476. * TSCs for its own purposes, and we use that here. */
  477. if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC) && !check_tsc_unstable())
  478. tsc_speed = tsc_khz;
  479. else
  480. tsc_speed = 0;
  481. if (put_user(tsc_speed, &lg->lguest_data->tsc_khz))
  482. return -EFAULT;
  483. /* The interrupt code might not like the system call vector. */
  484. if (!check_syscall_vector(lg))
  485. kill_guest(lg, "bad syscall vector");
  486. return 0;
  487. }
  488. /* Now we've examined the hypercall code; our Guest can make requests. There
  489. * is one other way we can do things for the Guest, as we see in
  490. * emulate_insn(). :*/
  491. /*L:030 lguest_arch_setup_regs()
  492. *
  493. * Most of the Guest's registers are left alone: we used get_zeroed_page() to
  494. * allocate the structure, so they will be 0. */
  495. void lguest_arch_setup_regs(struct lguest *lg, unsigned long start)
  496. {
  497. struct lguest_regs *regs = lg->regs;
  498. /* There are four "segment" registers which the Guest needs to boot:
  499. * The "code segment" register (cs) refers to the kernel code segment
  500. * __KERNEL_CS, and the "data", "extra" and "stack" segment registers
  501. * refer to the kernel data segment __KERNEL_DS.
  502. *
  503. * The privilege level is packed into the lower bits. The Guest runs
  504. * at privilege level 1 (GUEST_PL).*/
  505. regs->ds = regs->es = regs->ss = __KERNEL_DS|GUEST_PL;
  506. regs->cs = __KERNEL_CS|GUEST_PL;
  507. /* The "eflags" register contains miscellaneous flags. Bit 1 (0x002)
  508. * is supposed to always be "1". Bit 9 (0x200) controls whether
  509. * interrupts are enabled. We always leave interrupts enabled while
  510. * running the Guest. */
  511. regs->eflags = 0x202;
  512. /* The "Extended Instruction Pointer" register says where the Guest is
  513. * running. */
  514. regs->eip = start;
  515. /* %esi points to our boot information, at physical address 0, so don't
  516. * touch it. */
  517. /* There are a couple of GDT entries the Guest expects when first
  518. * booting. */
  519. setup_guest_gdt(lg);
  520. }