mmu.c 66 KB

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  1. /*
  2. * Kernel-based Virtual Machine driver for Linux
  3. *
  4. * This module enables machines with Intel VT-x extensions to run virtual
  5. * machines without emulation or binary translation.
  6. *
  7. * MMU support
  8. *
  9. * Copyright (C) 2006 Qumranet, Inc.
  10. *
  11. * Authors:
  12. * Yaniv Kamay <yaniv@qumranet.com>
  13. * Avi Kivity <avi@qumranet.com>
  14. *
  15. * This work is licensed under the terms of the GNU GPL, version 2. See
  16. * the COPYING file in the top-level directory.
  17. *
  18. */
  19. #include "vmx.h"
  20. #include "mmu.h"
  21. #include <linux/kvm_host.h>
  22. #include <linux/types.h>
  23. #include <linux/string.h>
  24. #include <linux/mm.h>
  25. #include <linux/highmem.h>
  26. #include <linux/module.h>
  27. #include <linux/swap.h>
  28. #include <linux/hugetlb.h>
  29. #include <linux/compiler.h>
  30. #include <asm/page.h>
  31. #include <asm/cmpxchg.h>
  32. #include <asm/io.h>
  33. /*
  34. * When setting this variable to true it enables Two-Dimensional-Paging
  35. * where the hardware walks 2 page tables:
  36. * 1. the guest-virtual to guest-physical
  37. * 2. while doing 1. it walks guest-physical to host-physical
  38. * If the hardware supports that we don't need to do shadow paging.
  39. */
  40. bool tdp_enabled = false;
  41. #undef MMU_DEBUG
  42. #undef AUDIT
  43. #ifdef AUDIT
  44. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
  45. #else
  46. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
  47. #endif
  48. #ifdef MMU_DEBUG
  49. #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
  50. #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
  51. #else
  52. #define pgprintk(x...) do { } while (0)
  53. #define rmap_printk(x...) do { } while (0)
  54. #endif
  55. #if defined(MMU_DEBUG) || defined(AUDIT)
  56. static int dbg = 0;
  57. module_param(dbg, bool, 0644);
  58. #endif
  59. #ifndef MMU_DEBUG
  60. #define ASSERT(x) do { } while (0)
  61. #else
  62. #define ASSERT(x) \
  63. if (!(x)) { \
  64. printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
  65. __FILE__, __LINE__, #x); \
  66. }
  67. #endif
  68. #define PT_FIRST_AVAIL_BITS_SHIFT 9
  69. #define PT64_SECOND_AVAIL_BITS_SHIFT 52
  70. #define VALID_PAGE(x) ((x) != INVALID_PAGE)
  71. #define PT64_LEVEL_BITS 9
  72. #define PT64_LEVEL_SHIFT(level) \
  73. (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
  74. #define PT64_LEVEL_MASK(level) \
  75. (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
  76. #define PT64_INDEX(address, level)\
  77. (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
  78. #define PT32_LEVEL_BITS 10
  79. #define PT32_LEVEL_SHIFT(level) \
  80. (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
  81. #define PT32_LEVEL_MASK(level) \
  82. (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
  83. #define PT32_INDEX(address, level)\
  84. (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
  85. #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
  86. #define PT64_DIR_BASE_ADDR_MASK \
  87. (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
  88. #define PT32_BASE_ADDR_MASK PAGE_MASK
  89. #define PT32_DIR_BASE_ADDR_MASK \
  90. (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
  91. #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
  92. | PT64_NX_MASK)
  93. #define PFERR_PRESENT_MASK (1U << 0)
  94. #define PFERR_WRITE_MASK (1U << 1)
  95. #define PFERR_USER_MASK (1U << 2)
  96. #define PFERR_FETCH_MASK (1U << 4)
  97. #define PT_DIRECTORY_LEVEL 2
  98. #define PT_PAGE_TABLE_LEVEL 1
  99. #define RMAP_EXT 4
  100. #define ACC_EXEC_MASK 1
  101. #define ACC_WRITE_MASK PT_WRITABLE_MASK
  102. #define ACC_USER_MASK PT_USER_MASK
  103. #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
  104. #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
  105. struct kvm_rmap_desc {
  106. u64 *shadow_ptes[RMAP_EXT];
  107. struct kvm_rmap_desc *more;
  108. };
  109. struct kvm_shadow_walk {
  110. int (*entry)(struct kvm_shadow_walk *walk, struct kvm_vcpu *vcpu,
  111. u64 addr, u64 *spte, int level);
  112. };
  113. struct kvm_unsync_walk {
  114. int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
  115. };
  116. typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
  117. static struct kmem_cache *pte_chain_cache;
  118. static struct kmem_cache *rmap_desc_cache;
  119. static struct kmem_cache *mmu_page_header_cache;
  120. static u64 __read_mostly shadow_trap_nonpresent_pte;
  121. static u64 __read_mostly shadow_notrap_nonpresent_pte;
  122. static u64 __read_mostly shadow_base_present_pte;
  123. static u64 __read_mostly shadow_nx_mask;
  124. static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
  125. static u64 __read_mostly shadow_user_mask;
  126. static u64 __read_mostly shadow_accessed_mask;
  127. static u64 __read_mostly shadow_dirty_mask;
  128. void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
  129. {
  130. shadow_trap_nonpresent_pte = trap_pte;
  131. shadow_notrap_nonpresent_pte = notrap_pte;
  132. }
  133. EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
  134. void kvm_mmu_set_base_ptes(u64 base_pte)
  135. {
  136. shadow_base_present_pte = base_pte;
  137. }
  138. EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
  139. void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
  140. u64 dirty_mask, u64 nx_mask, u64 x_mask)
  141. {
  142. shadow_user_mask = user_mask;
  143. shadow_accessed_mask = accessed_mask;
  144. shadow_dirty_mask = dirty_mask;
  145. shadow_nx_mask = nx_mask;
  146. shadow_x_mask = x_mask;
  147. }
  148. EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
  149. static int is_write_protection(struct kvm_vcpu *vcpu)
  150. {
  151. return vcpu->arch.cr0 & X86_CR0_WP;
  152. }
  153. static int is_cpuid_PSE36(void)
  154. {
  155. return 1;
  156. }
  157. static int is_nx(struct kvm_vcpu *vcpu)
  158. {
  159. return vcpu->arch.shadow_efer & EFER_NX;
  160. }
  161. static int is_present_pte(unsigned long pte)
  162. {
  163. return pte & PT_PRESENT_MASK;
  164. }
  165. static int is_shadow_present_pte(u64 pte)
  166. {
  167. return pte != shadow_trap_nonpresent_pte
  168. && pte != shadow_notrap_nonpresent_pte;
  169. }
  170. static int is_large_pte(u64 pte)
  171. {
  172. return pte & PT_PAGE_SIZE_MASK;
  173. }
  174. static int is_writeble_pte(unsigned long pte)
  175. {
  176. return pte & PT_WRITABLE_MASK;
  177. }
  178. static int is_dirty_pte(unsigned long pte)
  179. {
  180. return pte & shadow_dirty_mask;
  181. }
  182. static int is_rmap_pte(u64 pte)
  183. {
  184. return is_shadow_present_pte(pte);
  185. }
  186. static pfn_t spte_to_pfn(u64 pte)
  187. {
  188. return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
  189. }
  190. static gfn_t pse36_gfn_delta(u32 gpte)
  191. {
  192. int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
  193. return (gpte & PT32_DIR_PSE36_MASK) << shift;
  194. }
  195. static void set_shadow_pte(u64 *sptep, u64 spte)
  196. {
  197. #ifdef CONFIG_X86_64
  198. set_64bit((unsigned long *)sptep, spte);
  199. #else
  200. set_64bit((unsigned long long *)sptep, spte);
  201. #endif
  202. }
  203. static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
  204. struct kmem_cache *base_cache, int min)
  205. {
  206. void *obj;
  207. if (cache->nobjs >= min)
  208. return 0;
  209. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  210. obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
  211. if (!obj)
  212. return -ENOMEM;
  213. cache->objects[cache->nobjs++] = obj;
  214. }
  215. return 0;
  216. }
  217. static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
  218. {
  219. while (mc->nobjs)
  220. kfree(mc->objects[--mc->nobjs]);
  221. }
  222. static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
  223. int min)
  224. {
  225. struct page *page;
  226. if (cache->nobjs >= min)
  227. return 0;
  228. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  229. page = alloc_page(GFP_KERNEL);
  230. if (!page)
  231. return -ENOMEM;
  232. set_page_private(page, 0);
  233. cache->objects[cache->nobjs++] = page_address(page);
  234. }
  235. return 0;
  236. }
  237. static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
  238. {
  239. while (mc->nobjs)
  240. free_page((unsigned long)mc->objects[--mc->nobjs]);
  241. }
  242. static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
  243. {
  244. int r;
  245. r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
  246. pte_chain_cache, 4);
  247. if (r)
  248. goto out;
  249. r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
  250. rmap_desc_cache, 1);
  251. if (r)
  252. goto out;
  253. r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
  254. if (r)
  255. goto out;
  256. r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
  257. mmu_page_header_cache, 4);
  258. out:
  259. return r;
  260. }
  261. static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
  262. {
  263. mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
  264. mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
  265. mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
  266. mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
  267. }
  268. static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
  269. size_t size)
  270. {
  271. void *p;
  272. BUG_ON(!mc->nobjs);
  273. p = mc->objects[--mc->nobjs];
  274. memset(p, 0, size);
  275. return p;
  276. }
  277. static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
  278. {
  279. return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
  280. sizeof(struct kvm_pte_chain));
  281. }
  282. static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
  283. {
  284. kfree(pc);
  285. }
  286. static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
  287. {
  288. return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
  289. sizeof(struct kvm_rmap_desc));
  290. }
  291. static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
  292. {
  293. kfree(rd);
  294. }
  295. /*
  296. * Return the pointer to the largepage write count for a given
  297. * gfn, handling slots that are not large page aligned.
  298. */
  299. static int *slot_largepage_idx(gfn_t gfn, struct kvm_memory_slot *slot)
  300. {
  301. unsigned long idx;
  302. idx = (gfn / KVM_PAGES_PER_HPAGE) -
  303. (slot->base_gfn / KVM_PAGES_PER_HPAGE);
  304. return &slot->lpage_info[idx].write_count;
  305. }
  306. static void account_shadowed(struct kvm *kvm, gfn_t gfn)
  307. {
  308. int *write_count;
  309. write_count = slot_largepage_idx(gfn, gfn_to_memslot(kvm, gfn));
  310. *write_count += 1;
  311. }
  312. static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
  313. {
  314. int *write_count;
  315. write_count = slot_largepage_idx(gfn, gfn_to_memslot(kvm, gfn));
  316. *write_count -= 1;
  317. WARN_ON(*write_count < 0);
  318. }
  319. static int has_wrprotected_page(struct kvm *kvm, gfn_t gfn)
  320. {
  321. struct kvm_memory_slot *slot = gfn_to_memslot(kvm, gfn);
  322. int *largepage_idx;
  323. if (slot) {
  324. largepage_idx = slot_largepage_idx(gfn, slot);
  325. return *largepage_idx;
  326. }
  327. return 1;
  328. }
  329. static int host_largepage_backed(struct kvm *kvm, gfn_t gfn)
  330. {
  331. struct vm_area_struct *vma;
  332. unsigned long addr;
  333. int ret = 0;
  334. addr = gfn_to_hva(kvm, gfn);
  335. if (kvm_is_error_hva(addr))
  336. return ret;
  337. down_read(&current->mm->mmap_sem);
  338. vma = find_vma(current->mm, addr);
  339. if (vma && is_vm_hugetlb_page(vma))
  340. ret = 1;
  341. up_read(&current->mm->mmap_sem);
  342. return ret;
  343. }
  344. static int is_largepage_backed(struct kvm_vcpu *vcpu, gfn_t large_gfn)
  345. {
  346. struct kvm_memory_slot *slot;
  347. if (has_wrprotected_page(vcpu->kvm, large_gfn))
  348. return 0;
  349. if (!host_largepage_backed(vcpu->kvm, large_gfn))
  350. return 0;
  351. slot = gfn_to_memslot(vcpu->kvm, large_gfn);
  352. if (slot && slot->dirty_bitmap)
  353. return 0;
  354. return 1;
  355. }
  356. /*
  357. * Take gfn and return the reverse mapping to it.
  358. * Note: gfn must be unaliased before this function get called
  359. */
  360. static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int lpage)
  361. {
  362. struct kvm_memory_slot *slot;
  363. unsigned long idx;
  364. slot = gfn_to_memslot(kvm, gfn);
  365. if (!lpage)
  366. return &slot->rmap[gfn - slot->base_gfn];
  367. idx = (gfn / KVM_PAGES_PER_HPAGE) -
  368. (slot->base_gfn / KVM_PAGES_PER_HPAGE);
  369. return &slot->lpage_info[idx].rmap_pde;
  370. }
  371. /*
  372. * Reverse mapping data structures:
  373. *
  374. * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
  375. * that points to page_address(page).
  376. *
  377. * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
  378. * containing more mappings.
  379. */
  380. static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn, int lpage)
  381. {
  382. struct kvm_mmu_page *sp;
  383. struct kvm_rmap_desc *desc;
  384. unsigned long *rmapp;
  385. int i;
  386. if (!is_rmap_pte(*spte))
  387. return;
  388. gfn = unalias_gfn(vcpu->kvm, gfn);
  389. sp = page_header(__pa(spte));
  390. sp->gfns[spte - sp->spt] = gfn;
  391. rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage);
  392. if (!*rmapp) {
  393. rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
  394. *rmapp = (unsigned long)spte;
  395. } else if (!(*rmapp & 1)) {
  396. rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
  397. desc = mmu_alloc_rmap_desc(vcpu);
  398. desc->shadow_ptes[0] = (u64 *)*rmapp;
  399. desc->shadow_ptes[1] = spte;
  400. *rmapp = (unsigned long)desc | 1;
  401. } else {
  402. rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
  403. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  404. while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
  405. desc = desc->more;
  406. if (desc->shadow_ptes[RMAP_EXT-1]) {
  407. desc->more = mmu_alloc_rmap_desc(vcpu);
  408. desc = desc->more;
  409. }
  410. for (i = 0; desc->shadow_ptes[i]; ++i)
  411. ;
  412. desc->shadow_ptes[i] = spte;
  413. }
  414. }
  415. static void rmap_desc_remove_entry(unsigned long *rmapp,
  416. struct kvm_rmap_desc *desc,
  417. int i,
  418. struct kvm_rmap_desc *prev_desc)
  419. {
  420. int j;
  421. for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
  422. ;
  423. desc->shadow_ptes[i] = desc->shadow_ptes[j];
  424. desc->shadow_ptes[j] = NULL;
  425. if (j != 0)
  426. return;
  427. if (!prev_desc && !desc->more)
  428. *rmapp = (unsigned long)desc->shadow_ptes[0];
  429. else
  430. if (prev_desc)
  431. prev_desc->more = desc->more;
  432. else
  433. *rmapp = (unsigned long)desc->more | 1;
  434. mmu_free_rmap_desc(desc);
  435. }
  436. static void rmap_remove(struct kvm *kvm, u64 *spte)
  437. {
  438. struct kvm_rmap_desc *desc;
  439. struct kvm_rmap_desc *prev_desc;
  440. struct kvm_mmu_page *sp;
  441. pfn_t pfn;
  442. unsigned long *rmapp;
  443. int i;
  444. if (!is_rmap_pte(*spte))
  445. return;
  446. sp = page_header(__pa(spte));
  447. pfn = spte_to_pfn(*spte);
  448. if (*spte & shadow_accessed_mask)
  449. kvm_set_pfn_accessed(pfn);
  450. if (is_writeble_pte(*spte))
  451. kvm_release_pfn_dirty(pfn);
  452. else
  453. kvm_release_pfn_clean(pfn);
  454. rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], is_large_pte(*spte));
  455. if (!*rmapp) {
  456. printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
  457. BUG();
  458. } else if (!(*rmapp & 1)) {
  459. rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
  460. if ((u64 *)*rmapp != spte) {
  461. printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
  462. spte, *spte);
  463. BUG();
  464. }
  465. *rmapp = 0;
  466. } else {
  467. rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
  468. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  469. prev_desc = NULL;
  470. while (desc) {
  471. for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
  472. if (desc->shadow_ptes[i] == spte) {
  473. rmap_desc_remove_entry(rmapp,
  474. desc, i,
  475. prev_desc);
  476. return;
  477. }
  478. prev_desc = desc;
  479. desc = desc->more;
  480. }
  481. BUG();
  482. }
  483. }
  484. static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
  485. {
  486. struct kvm_rmap_desc *desc;
  487. struct kvm_rmap_desc *prev_desc;
  488. u64 *prev_spte;
  489. int i;
  490. if (!*rmapp)
  491. return NULL;
  492. else if (!(*rmapp & 1)) {
  493. if (!spte)
  494. return (u64 *)*rmapp;
  495. return NULL;
  496. }
  497. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  498. prev_desc = NULL;
  499. prev_spte = NULL;
  500. while (desc) {
  501. for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
  502. if (prev_spte == spte)
  503. return desc->shadow_ptes[i];
  504. prev_spte = desc->shadow_ptes[i];
  505. }
  506. desc = desc->more;
  507. }
  508. return NULL;
  509. }
  510. static void rmap_write_protect(struct kvm *kvm, u64 gfn)
  511. {
  512. unsigned long *rmapp;
  513. u64 *spte;
  514. int write_protected = 0;
  515. gfn = unalias_gfn(kvm, gfn);
  516. rmapp = gfn_to_rmap(kvm, gfn, 0);
  517. spte = rmap_next(kvm, rmapp, NULL);
  518. while (spte) {
  519. BUG_ON(!spte);
  520. BUG_ON(!(*spte & PT_PRESENT_MASK));
  521. rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
  522. if (is_writeble_pte(*spte)) {
  523. set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
  524. write_protected = 1;
  525. }
  526. spte = rmap_next(kvm, rmapp, spte);
  527. }
  528. if (write_protected) {
  529. pfn_t pfn;
  530. spte = rmap_next(kvm, rmapp, NULL);
  531. pfn = spte_to_pfn(*spte);
  532. kvm_set_pfn_dirty(pfn);
  533. }
  534. /* check for huge page mappings */
  535. rmapp = gfn_to_rmap(kvm, gfn, 1);
  536. spte = rmap_next(kvm, rmapp, NULL);
  537. while (spte) {
  538. BUG_ON(!spte);
  539. BUG_ON(!(*spte & PT_PRESENT_MASK));
  540. BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
  541. pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
  542. if (is_writeble_pte(*spte)) {
  543. rmap_remove(kvm, spte);
  544. --kvm->stat.lpages;
  545. set_shadow_pte(spte, shadow_trap_nonpresent_pte);
  546. spte = NULL;
  547. write_protected = 1;
  548. }
  549. spte = rmap_next(kvm, rmapp, spte);
  550. }
  551. if (write_protected)
  552. kvm_flush_remote_tlbs(kvm);
  553. }
  554. static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp)
  555. {
  556. u64 *spte;
  557. int need_tlb_flush = 0;
  558. while ((spte = rmap_next(kvm, rmapp, NULL))) {
  559. BUG_ON(!(*spte & PT_PRESENT_MASK));
  560. rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
  561. rmap_remove(kvm, spte);
  562. set_shadow_pte(spte, shadow_trap_nonpresent_pte);
  563. need_tlb_flush = 1;
  564. }
  565. return need_tlb_flush;
  566. }
  567. static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
  568. int (*handler)(struct kvm *kvm, unsigned long *rmapp))
  569. {
  570. int i;
  571. int retval = 0;
  572. /*
  573. * If mmap_sem isn't taken, we can look the memslots with only
  574. * the mmu_lock by skipping over the slots with userspace_addr == 0.
  575. */
  576. for (i = 0; i < kvm->nmemslots; i++) {
  577. struct kvm_memory_slot *memslot = &kvm->memslots[i];
  578. unsigned long start = memslot->userspace_addr;
  579. unsigned long end;
  580. /* mmu_lock protects userspace_addr */
  581. if (!start)
  582. continue;
  583. end = start + (memslot->npages << PAGE_SHIFT);
  584. if (hva >= start && hva < end) {
  585. gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
  586. retval |= handler(kvm, &memslot->rmap[gfn_offset]);
  587. retval |= handler(kvm,
  588. &memslot->lpage_info[
  589. gfn_offset /
  590. KVM_PAGES_PER_HPAGE].rmap_pde);
  591. }
  592. }
  593. return retval;
  594. }
  595. int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
  596. {
  597. return kvm_handle_hva(kvm, hva, kvm_unmap_rmapp);
  598. }
  599. static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp)
  600. {
  601. u64 *spte;
  602. int young = 0;
  603. /* always return old for EPT */
  604. if (!shadow_accessed_mask)
  605. return 0;
  606. spte = rmap_next(kvm, rmapp, NULL);
  607. while (spte) {
  608. int _young;
  609. u64 _spte = *spte;
  610. BUG_ON(!(_spte & PT_PRESENT_MASK));
  611. _young = _spte & PT_ACCESSED_MASK;
  612. if (_young) {
  613. young = 1;
  614. clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
  615. }
  616. spte = rmap_next(kvm, rmapp, spte);
  617. }
  618. return young;
  619. }
  620. int kvm_age_hva(struct kvm *kvm, unsigned long hva)
  621. {
  622. return kvm_handle_hva(kvm, hva, kvm_age_rmapp);
  623. }
  624. #ifdef MMU_DEBUG
  625. static int is_empty_shadow_page(u64 *spt)
  626. {
  627. u64 *pos;
  628. u64 *end;
  629. for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
  630. if (is_shadow_present_pte(*pos)) {
  631. printk(KERN_ERR "%s: %p %llx\n", __func__,
  632. pos, *pos);
  633. return 0;
  634. }
  635. return 1;
  636. }
  637. #endif
  638. static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  639. {
  640. ASSERT(is_empty_shadow_page(sp->spt));
  641. list_del(&sp->link);
  642. __free_page(virt_to_page(sp->spt));
  643. __free_page(virt_to_page(sp->gfns));
  644. kfree(sp);
  645. ++kvm->arch.n_free_mmu_pages;
  646. }
  647. static unsigned kvm_page_table_hashfn(gfn_t gfn)
  648. {
  649. return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
  650. }
  651. static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
  652. u64 *parent_pte)
  653. {
  654. struct kvm_mmu_page *sp;
  655. sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
  656. sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
  657. sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
  658. set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
  659. list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
  660. ASSERT(is_empty_shadow_page(sp->spt));
  661. sp->slot_bitmap = 0;
  662. sp->multimapped = 0;
  663. sp->parent_pte = parent_pte;
  664. --vcpu->kvm->arch.n_free_mmu_pages;
  665. return sp;
  666. }
  667. static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
  668. struct kvm_mmu_page *sp, u64 *parent_pte)
  669. {
  670. struct kvm_pte_chain *pte_chain;
  671. struct hlist_node *node;
  672. int i;
  673. if (!parent_pte)
  674. return;
  675. if (!sp->multimapped) {
  676. u64 *old = sp->parent_pte;
  677. if (!old) {
  678. sp->parent_pte = parent_pte;
  679. return;
  680. }
  681. sp->multimapped = 1;
  682. pte_chain = mmu_alloc_pte_chain(vcpu);
  683. INIT_HLIST_HEAD(&sp->parent_ptes);
  684. hlist_add_head(&pte_chain->link, &sp->parent_ptes);
  685. pte_chain->parent_ptes[0] = old;
  686. }
  687. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
  688. if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
  689. continue;
  690. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
  691. if (!pte_chain->parent_ptes[i]) {
  692. pte_chain->parent_ptes[i] = parent_pte;
  693. return;
  694. }
  695. }
  696. pte_chain = mmu_alloc_pte_chain(vcpu);
  697. BUG_ON(!pte_chain);
  698. hlist_add_head(&pte_chain->link, &sp->parent_ptes);
  699. pte_chain->parent_ptes[0] = parent_pte;
  700. }
  701. static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
  702. u64 *parent_pte)
  703. {
  704. struct kvm_pte_chain *pte_chain;
  705. struct hlist_node *node;
  706. int i;
  707. if (!sp->multimapped) {
  708. BUG_ON(sp->parent_pte != parent_pte);
  709. sp->parent_pte = NULL;
  710. return;
  711. }
  712. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
  713. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  714. if (!pte_chain->parent_ptes[i])
  715. break;
  716. if (pte_chain->parent_ptes[i] != parent_pte)
  717. continue;
  718. while (i + 1 < NR_PTE_CHAIN_ENTRIES
  719. && pte_chain->parent_ptes[i + 1]) {
  720. pte_chain->parent_ptes[i]
  721. = pte_chain->parent_ptes[i + 1];
  722. ++i;
  723. }
  724. pte_chain->parent_ptes[i] = NULL;
  725. if (i == 0) {
  726. hlist_del(&pte_chain->link);
  727. mmu_free_pte_chain(pte_chain);
  728. if (hlist_empty(&sp->parent_ptes)) {
  729. sp->multimapped = 0;
  730. sp->parent_pte = NULL;
  731. }
  732. }
  733. return;
  734. }
  735. BUG();
  736. }
  737. static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
  738. mmu_parent_walk_fn fn)
  739. {
  740. struct kvm_pte_chain *pte_chain;
  741. struct hlist_node *node;
  742. struct kvm_mmu_page *parent_sp;
  743. int i;
  744. if (!sp->multimapped && sp->parent_pte) {
  745. parent_sp = page_header(__pa(sp->parent_pte));
  746. fn(vcpu, parent_sp);
  747. mmu_parent_walk(vcpu, parent_sp, fn);
  748. return;
  749. }
  750. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
  751. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  752. if (!pte_chain->parent_ptes[i])
  753. break;
  754. parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
  755. fn(vcpu, parent_sp);
  756. mmu_parent_walk(vcpu, parent_sp, fn);
  757. }
  758. }
  759. static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
  760. struct kvm_mmu_page *sp)
  761. {
  762. int i;
  763. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  764. sp->spt[i] = shadow_trap_nonpresent_pte;
  765. }
  766. static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
  767. struct kvm_mmu_page *sp)
  768. {
  769. return 1;
  770. }
  771. static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
  772. {
  773. }
  774. static int mmu_unsync_walk(struct kvm_mmu_page *sp,
  775. struct kvm_unsync_walk *walker)
  776. {
  777. int i, ret;
  778. if (!sp->unsync_children)
  779. return 0;
  780. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  781. u64 ent = sp->spt[i];
  782. if (is_shadow_present_pte(ent)) {
  783. struct kvm_mmu_page *child;
  784. child = page_header(ent & PT64_BASE_ADDR_MASK);
  785. if (child->unsync_children) {
  786. ret = mmu_unsync_walk(child, walker);
  787. if (ret)
  788. return ret;
  789. }
  790. if (child->unsync) {
  791. ret = walker->entry(child, walker);
  792. if (ret)
  793. return ret;
  794. }
  795. }
  796. }
  797. if (i == PT64_ENT_PER_PAGE)
  798. sp->unsync_children = 0;
  799. return 0;
  800. }
  801. static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
  802. {
  803. unsigned index;
  804. struct hlist_head *bucket;
  805. struct kvm_mmu_page *sp;
  806. struct hlist_node *node;
  807. pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
  808. index = kvm_page_table_hashfn(gfn);
  809. bucket = &kvm->arch.mmu_page_hash[index];
  810. hlist_for_each_entry(sp, node, bucket, hash_link)
  811. if (sp->gfn == gfn && !sp->role.metaphysical
  812. && !sp->role.invalid) {
  813. pgprintk("%s: found role %x\n",
  814. __func__, sp->role.word);
  815. return sp;
  816. }
  817. return NULL;
  818. }
  819. static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  820. {
  821. WARN_ON(!sp->unsync);
  822. sp->unsync = 0;
  823. --kvm->stat.mmu_unsync;
  824. }
  825. static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
  826. static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
  827. {
  828. if (sp->role.glevels != vcpu->arch.mmu.root_level) {
  829. kvm_mmu_zap_page(vcpu->kvm, sp);
  830. return 1;
  831. }
  832. rmap_write_protect(vcpu->kvm, sp->gfn);
  833. if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
  834. kvm_mmu_zap_page(vcpu->kvm, sp);
  835. return 1;
  836. }
  837. kvm_mmu_flush_tlb(vcpu);
  838. kvm_unlink_unsync_page(vcpu->kvm, sp);
  839. return 0;
  840. }
  841. struct sync_walker {
  842. struct kvm_vcpu *vcpu;
  843. struct kvm_unsync_walk walker;
  844. };
  845. static int mmu_sync_fn(struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk)
  846. {
  847. struct sync_walker *sync_walk = container_of(walk, struct sync_walker,
  848. walker);
  849. struct kvm_vcpu *vcpu = sync_walk->vcpu;
  850. kvm_sync_page(vcpu, sp);
  851. return (need_resched() || spin_needbreak(&vcpu->kvm->mmu_lock));
  852. }
  853. static void mmu_sync_children(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
  854. {
  855. struct sync_walker walker = {
  856. .walker = { .entry = mmu_sync_fn, },
  857. .vcpu = vcpu,
  858. };
  859. while (mmu_unsync_walk(sp, &walker.walker))
  860. cond_resched_lock(&vcpu->kvm->mmu_lock);
  861. }
  862. static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
  863. gfn_t gfn,
  864. gva_t gaddr,
  865. unsigned level,
  866. int metaphysical,
  867. unsigned access,
  868. u64 *parent_pte)
  869. {
  870. union kvm_mmu_page_role role;
  871. unsigned index;
  872. unsigned quadrant;
  873. struct hlist_head *bucket;
  874. struct kvm_mmu_page *sp;
  875. struct hlist_node *node, *tmp;
  876. role.word = 0;
  877. role.glevels = vcpu->arch.mmu.root_level;
  878. role.level = level;
  879. role.metaphysical = metaphysical;
  880. role.access = access;
  881. if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
  882. quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
  883. quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
  884. role.quadrant = quadrant;
  885. }
  886. pgprintk("%s: looking gfn %lx role %x\n", __func__,
  887. gfn, role.word);
  888. index = kvm_page_table_hashfn(gfn);
  889. bucket = &vcpu->kvm->arch.mmu_page_hash[index];
  890. hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
  891. if (sp->gfn == gfn) {
  892. if (sp->unsync)
  893. if (kvm_sync_page(vcpu, sp))
  894. continue;
  895. if (sp->role.word != role.word)
  896. continue;
  897. if (sp->unsync_children)
  898. set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
  899. mmu_page_add_parent_pte(vcpu, sp, parent_pte);
  900. pgprintk("%s: found\n", __func__);
  901. return sp;
  902. }
  903. ++vcpu->kvm->stat.mmu_cache_miss;
  904. sp = kvm_mmu_alloc_page(vcpu, parent_pte);
  905. if (!sp)
  906. return sp;
  907. pgprintk("%s: adding gfn %lx role %x\n", __func__, gfn, role.word);
  908. sp->gfn = gfn;
  909. sp->role = role;
  910. hlist_add_head(&sp->hash_link, bucket);
  911. if (!metaphysical) {
  912. rmap_write_protect(vcpu->kvm, gfn);
  913. account_shadowed(vcpu->kvm, gfn);
  914. }
  915. if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
  916. vcpu->arch.mmu.prefetch_page(vcpu, sp);
  917. else
  918. nonpaging_prefetch_page(vcpu, sp);
  919. return sp;
  920. }
  921. static int walk_shadow(struct kvm_shadow_walk *walker,
  922. struct kvm_vcpu *vcpu, u64 addr)
  923. {
  924. hpa_t shadow_addr;
  925. int level;
  926. int r;
  927. u64 *sptep;
  928. unsigned index;
  929. shadow_addr = vcpu->arch.mmu.root_hpa;
  930. level = vcpu->arch.mmu.shadow_root_level;
  931. if (level == PT32E_ROOT_LEVEL) {
  932. shadow_addr = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
  933. shadow_addr &= PT64_BASE_ADDR_MASK;
  934. --level;
  935. }
  936. while (level >= PT_PAGE_TABLE_LEVEL) {
  937. index = SHADOW_PT_INDEX(addr, level);
  938. sptep = ((u64 *)__va(shadow_addr)) + index;
  939. r = walker->entry(walker, vcpu, addr, sptep, level);
  940. if (r)
  941. return r;
  942. shadow_addr = *sptep & PT64_BASE_ADDR_MASK;
  943. --level;
  944. }
  945. return 0;
  946. }
  947. static void kvm_mmu_page_unlink_children(struct kvm *kvm,
  948. struct kvm_mmu_page *sp)
  949. {
  950. unsigned i;
  951. u64 *pt;
  952. u64 ent;
  953. pt = sp->spt;
  954. if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
  955. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  956. if (is_shadow_present_pte(pt[i]))
  957. rmap_remove(kvm, &pt[i]);
  958. pt[i] = shadow_trap_nonpresent_pte;
  959. }
  960. return;
  961. }
  962. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  963. ent = pt[i];
  964. if (is_shadow_present_pte(ent)) {
  965. if (!is_large_pte(ent)) {
  966. ent &= PT64_BASE_ADDR_MASK;
  967. mmu_page_remove_parent_pte(page_header(ent),
  968. &pt[i]);
  969. } else {
  970. --kvm->stat.lpages;
  971. rmap_remove(kvm, &pt[i]);
  972. }
  973. }
  974. pt[i] = shadow_trap_nonpresent_pte;
  975. }
  976. }
  977. static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
  978. {
  979. mmu_page_remove_parent_pte(sp, parent_pte);
  980. }
  981. static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
  982. {
  983. int i;
  984. for (i = 0; i < KVM_MAX_VCPUS; ++i)
  985. if (kvm->vcpus[i])
  986. kvm->vcpus[i]->arch.last_pte_updated = NULL;
  987. }
  988. static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
  989. {
  990. u64 *parent_pte;
  991. while (sp->multimapped || sp->parent_pte) {
  992. if (!sp->multimapped)
  993. parent_pte = sp->parent_pte;
  994. else {
  995. struct kvm_pte_chain *chain;
  996. chain = container_of(sp->parent_ptes.first,
  997. struct kvm_pte_chain, link);
  998. parent_pte = chain->parent_ptes[0];
  999. }
  1000. BUG_ON(!parent_pte);
  1001. kvm_mmu_put_page(sp, parent_pte);
  1002. set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
  1003. }
  1004. }
  1005. struct zap_walker {
  1006. struct kvm_unsync_walk walker;
  1007. struct kvm *kvm;
  1008. int zapped;
  1009. };
  1010. static int mmu_zap_fn(struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk)
  1011. {
  1012. struct zap_walker *zap_walk = container_of(walk, struct zap_walker,
  1013. walker);
  1014. kvm_mmu_zap_page(zap_walk->kvm, sp);
  1015. zap_walk->zapped = 1;
  1016. return 0;
  1017. }
  1018. static int mmu_zap_unsync_children(struct kvm *kvm, struct kvm_mmu_page *sp)
  1019. {
  1020. struct zap_walker walker = {
  1021. .walker = { .entry = mmu_zap_fn, },
  1022. .kvm = kvm,
  1023. .zapped = 0,
  1024. };
  1025. if (sp->role.level == PT_PAGE_TABLE_LEVEL)
  1026. return 0;
  1027. mmu_unsync_walk(sp, &walker.walker);
  1028. return walker.zapped;
  1029. }
  1030. static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  1031. {
  1032. int ret;
  1033. ++kvm->stat.mmu_shadow_zapped;
  1034. ret = mmu_zap_unsync_children(kvm, sp);
  1035. kvm_mmu_page_unlink_children(kvm, sp);
  1036. kvm_mmu_unlink_parents(kvm, sp);
  1037. kvm_flush_remote_tlbs(kvm);
  1038. if (!sp->role.invalid && !sp->role.metaphysical)
  1039. unaccount_shadowed(kvm, sp->gfn);
  1040. if (sp->unsync)
  1041. kvm_unlink_unsync_page(kvm, sp);
  1042. if (!sp->root_count) {
  1043. hlist_del(&sp->hash_link);
  1044. kvm_mmu_free_page(kvm, sp);
  1045. } else {
  1046. sp->role.invalid = 1;
  1047. list_move(&sp->link, &kvm->arch.active_mmu_pages);
  1048. kvm_reload_remote_mmus(kvm);
  1049. }
  1050. kvm_mmu_reset_last_pte_updated(kvm);
  1051. return ret;
  1052. }
  1053. /*
  1054. * Changing the number of mmu pages allocated to the vm
  1055. * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
  1056. */
  1057. void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
  1058. {
  1059. /*
  1060. * If we set the number of mmu pages to be smaller be than the
  1061. * number of actived pages , we must to free some mmu pages before we
  1062. * change the value
  1063. */
  1064. if ((kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages) >
  1065. kvm_nr_mmu_pages) {
  1066. int n_used_mmu_pages = kvm->arch.n_alloc_mmu_pages
  1067. - kvm->arch.n_free_mmu_pages;
  1068. while (n_used_mmu_pages > kvm_nr_mmu_pages) {
  1069. struct kvm_mmu_page *page;
  1070. page = container_of(kvm->arch.active_mmu_pages.prev,
  1071. struct kvm_mmu_page, link);
  1072. kvm_mmu_zap_page(kvm, page);
  1073. n_used_mmu_pages--;
  1074. }
  1075. kvm->arch.n_free_mmu_pages = 0;
  1076. }
  1077. else
  1078. kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
  1079. - kvm->arch.n_alloc_mmu_pages;
  1080. kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
  1081. }
  1082. static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
  1083. {
  1084. unsigned index;
  1085. struct hlist_head *bucket;
  1086. struct kvm_mmu_page *sp;
  1087. struct hlist_node *node, *n;
  1088. int r;
  1089. pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
  1090. r = 0;
  1091. index = kvm_page_table_hashfn(gfn);
  1092. bucket = &kvm->arch.mmu_page_hash[index];
  1093. hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
  1094. if (sp->gfn == gfn && !sp->role.metaphysical) {
  1095. pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
  1096. sp->role.word);
  1097. r = 1;
  1098. if (kvm_mmu_zap_page(kvm, sp))
  1099. n = bucket->first;
  1100. }
  1101. return r;
  1102. }
  1103. static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
  1104. {
  1105. struct kvm_mmu_page *sp;
  1106. while ((sp = kvm_mmu_lookup_page(kvm, gfn)) != NULL) {
  1107. pgprintk("%s: zap %lx %x\n", __func__, gfn, sp->role.word);
  1108. kvm_mmu_zap_page(kvm, sp);
  1109. }
  1110. }
  1111. static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
  1112. {
  1113. int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
  1114. struct kvm_mmu_page *sp = page_header(__pa(pte));
  1115. __set_bit(slot, &sp->slot_bitmap);
  1116. }
  1117. static void mmu_convert_notrap(struct kvm_mmu_page *sp)
  1118. {
  1119. int i;
  1120. u64 *pt = sp->spt;
  1121. if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
  1122. return;
  1123. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  1124. if (pt[i] == shadow_notrap_nonpresent_pte)
  1125. set_shadow_pte(&pt[i], shadow_trap_nonpresent_pte);
  1126. }
  1127. }
  1128. struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
  1129. {
  1130. struct page *page;
  1131. gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
  1132. if (gpa == UNMAPPED_GVA)
  1133. return NULL;
  1134. page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  1135. return page;
  1136. }
  1137. static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
  1138. {
  1139. sp->unsync_children = 1;
  1140. return 1;
  1141. }
  1142. static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
  1143. {
  1144. unsigned index;
  1145. struct hlist_head *bucket;
  1146. struct kvm_mmu_page *s;
  1147. struct hlist_node *node, *n;
  1148. index = kvm_page_table_hashfn(sp->gfn);
  1149. bucket = &vcpu->kvm->arch.mmu_page_hash[index];
  1150. /* don't unsync if pagetable is shadowed with multiple roles */
  1151. hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
  1152. if (s->gfn != sp->gfn || s->role.metaphysical)
  1153. continue;
  1154. if (s->role.word != sp->role.word)
  1155. return 1;
  1156. }
  1157. mmu_parent_walk(vcpu, sp, unsync_walk_fn);
  1158. ++vcpu->kvm->stat.mmu_unsync;
  1159. sp->unsync = 1;
  1160. mmu_convert_notrap(sp);
  1161. return 0;
  1162. }
  1163. static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
  1164. bool can_unsync)
  1165. {
  1166. struct kvm_mmu_page *shadow;
  1167. shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
  1168. if (shadow) {
  1169. if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
  1170. return 1;
  1171. if (shadow->unsync)
  1172. return 0;
  1173. if (can_unsync)
  1174. return kvm_unsync_page(vcpu, shadow);
  1175. return 1;
  1176. }
  1177. return 0;
  1178. }
  1179. static int set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
  1180. unsigned pte_access, int user_fault,
  1181. int write_fault, int dirty, int largepage,
  1182. gfn_t gfn, pfn_t pfn, bool speculative,
  1183. bool can_unsync)
  1184. {
  1185. u64 spte;
  1186. int ret = 0;
  1187. /*
  1188. * We don't set the accessed bit, since we sometimes want to see
  1189. * whether the guest actually used the pte (in order to detect
  1190. * demand paging).
  1191. */
  1192. spte = shadow_base_present_pte | shadow_dirty_mask;
  1193. if (!speculative)
  1194. spte |= shadow_accessed_mask;
  1195. if (!dirty)
  1196. pte_access &= ~ACC_WRITE_MASK;
  1197. if (pte_access & ACC_EXEC_MASK)
  1198. spte |= shadow_x_mask;
  1199. else
  1200. spte |= shadow_nx_mask;
  1201. if (pte_access & ACC_USER_MASK)
  1202. spte |= shadow_user_mask;
  1203. if (largepage)
  1204. spte |= PT_PAGE_SIZE_MASK;
  1205. spte |= (u64)pfn << PAGE_SHIFT;
  1206. if ((pte_access & ACC_WRITE_MASK)
  1207. || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
  1208. if (largepage && has_wrprotected_page(vcpu->kvm, gfn)) {
  1209. ret = 1;
  1210. spte = shadow_trap_nonpresent_pte;
  1211. goto set_pte;
  1212. }
  1213. spte |= PT_WRITABLE_MASK;
  1214. if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
  1215. pgprintk("%s: found shadow page for %lx, marking ro\n",
  1216. __func__, gfn);
  1217. ret = 1;
  1218. pte_access &= ~ACC_WRITE_MASK;
  1219. if (is_writeble_pte(spte))
  1220. spte &= ~PT_WRITABLE_MASK;
  1221. }
  1222. }
  1223. if (pte_access & ACC_WRITE_MASK)
  1224. mark_page_dirty(vcpu->kvm, gfn);
  1225. set_pte:
  1226. set_shadow_pte(shadow_pte, spte);
  1227. return ret;
  1228. }
  1229. static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
  1230. unsigned pt_access, unsigned pte_access,
  1231. int user_fault, int write_fault, int dirty,
  1232. int *ptwrite, int largepage, gfn_t gfn,
  1233. pfn_t pfn, bool speculative)
  1234. {
  1235. int was_rmapped = 0;
  1236. int was_writeble = is_writeble_pte(*shadow_pte);
  1237. pgprintk("%s: spte %llx access %x write_fault %d"
  1238. " user_fault %d gfn %lx\n",
  1239. __func__, *shadow_pte, pt_access,
  1240. write_fault, user_fault, gfn);
  1241. if (is_rmap_pte(*shadow_pte)) {
  1242. /*
  1243. * If we overwrite a PTE page pointer with a 2MB PMD, unlink
  1244. * the parent of the now unreachable PTE.
  1245. */
  1246. if (largepage && !is_large_pte(*shadow_pte)) {
  1247. struct kvm_mmu_page *child;
  1248. u64 pte = *shadow_pte;
  1249. child = page_header(pte & PT64_BASE_ADDR_MASK);
  1250. mmu_page_remove_parent_pte(child, shadow_pte);
  1251. } else if (pfn != spte_to_pfn(*shadow_pte)) {
  1252. pgprintk("hfn old %lx new %lx\n",
  1253. spte_to_pfn(*shadow_pte), pfn);
  1254. rmap_remove(vcpu->kvm, shadow_pte);
  1255. } else {
  1256. if (largepage)
  1257. was_rmapped = is_large_pte(*shadow_pte);
  1258. else
  1259. was_rmapped = 1;
  1260. }
  1261. }
  1262. if (set_spte(vcpu, shadow_pte, pte_access, user_fault, write_fault,
  1263. dirty, largepage, gfn, pfn, speculative, true)) {
  1264. if (write_fault)
  1265. *ptwrite = 1;
  1266. kvm_x86_ops->tlb_flush(vcpu);
  1267. }
  1268. pgprintk("%s: setting spte %llx\n", __func__, *shadow_pte);
  1269. pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
  1270. is_large_pte(*shadow_pte)? "2MB" : "4kB",
  1271. is_present_pte(*shadow_pte)?"RW":"R", gfn,
  1272. *shadow_pte, shadow_pte);
  1273. if (!was_rmapped && is_large_pte(*shadow_pte))
  1274. ++vcpu->kvm->stat.lpages;
  1275. page_header_update_slot(vcpu->kvm, shadow_pte, gfn);
  1276. if (!was_rmapped) {
  1277. rmap_add(vcpu, shadow_pte, gfn, largepage);
  1278. if (!is_rmap_pte(*shadow_pte))
  1279. kvm_release_pfn_clean(pfn);
  1280. } else {
  1281. if (was_writeble)
  1282. kvm_release_pfn_dirty(pfn);
  1283. else
  1284. kvm_release_pfn_clean(pfn);
  1285. }
  1286. if (speculative) {
  1287. vcpu->arch.last_pte_updated = shadow_pte;
  1288. vcpu->arch.last_pte_gfn = gfn;
  1289. }
  1290. }
  1291. static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
  1292. {
  1293. }
  1294. struct direct_shadow_walk {
  1295. struct kvm_shadow_walk walker;
  1296. pfn_t pfn;
  1297. int write;
  1298. int largepage;
  1299. int pt_write;
  1300. };
  1301. static int direct_map_entry(struct kvm_shadow_walk *_walk,
  1302. struct kvm_vcpu *vcpu,
  1303. u64 addr, u64 *sptep, int level)
  1304. {
  1305. struct direct_shadow_walk *walk =
  1306. container_of(_walk, struct direct_shadow_walk, walker);
  1307. struct kvm_mmu_page *sp;
  1308. gfn_t pseudo_gfn;
  1309. gfn_t gfn = addr >> PAGE_SHIFT;
  1310. if (level == PT_PAGE_TABLE_LEVEL
  1311. || (walk->largepage && level == PT_DIRECTORY_LEVEL)) {
  1312. mmu_set_spte(vcpu, sptep, ACC_ALL, ACC_ALL,
  1313. 0, walk->write, 1, &walk->pt_write,
  1314. walk->largepage, gfn, walk->pfn, false);
  1315. ++vcpu->stat.pf_fixed;
  1316. return 1;
  1317. }
  1318. if (*sptep == shadow_trap_nonpresent_pte) {
  1319. pseudo_gfn = (addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
  1320. sp = kvm_mmu_get_page(vcpu, pseudo_gfn, (gva_t)addr, level - 1,
  1321. 1, ACC_ALL, sptep);
  1322. if (!sp) {
  1323. pgprintk("nonpaging_map: ENOMEM\n");
  1324. kvm_release_pfn_clean(walk->pfn);
  1325. return -ENOMEM;
  1326. }
  1327. set_shadow_pte(sptep,
  1328. __pa(sp->spt)
  1329. | PT_PRESENT_MASK | PT_WRITABLE_MASK
  1330. | shadow_user_mask | shadow_x_mask);
  1331. }
  1332. return 0;
  1333. }
  1334. static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
  1335. int largepage, gfn_t gfn, pfn_t pfn)
  1336. {
  1337. int r;
  1338. struct direct_shadow_walk walker = {
  1339. .walker = { .entry = direct_map_entry, },
  1340. .pfn = pfn,
  1341. .largepage = largepage,
  1342. .write = write,
  1343. .pt_write = 0,
  1344. };
  1345. r = walk_shadow(&walker.walker, vcpu, gfn << PAGE_SHIFT);
  1346. if (r < 0)
  1347. return r;
  1348. return walker.pt_write;
  1349. }
  1350. static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
  1351. {
  1352. int r;
  1353. int largepage = 0;
  1354. pfn_t pfn;
  1355. unsigned long mmu_seq;
  1356. if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
  1357. gfn &= ~(KVM_PAGES_PER_HPAGE-1);
  1358. largepage = 1;
  1359. }
  1360. mmu_seq = vcpu->kvm->mmu_notifier_seq;
  1361. smp_rmb();
  1362. pfn = gfn_to_pfn(vcpu->kvm, gfn);
  1363. /* mmio */
  1364. if (is_error_pfn(pfn)) {
  1365. kvm_release_pfn_clean(pfn);
  1366. return 1;
  1367. }
  1368. spin_lock(&vcpu->kvm->mmu_lock);
  1369. if (mmu_notifier_retry(vcpu, mmu_seq))
  1370. goto out_unlock;
  1371. kvm_mmu_free_some_pages(vcpu);
  1372. r = __direct_map(vcpu, v, write, largepage, gfn, pfn);
  1373. spin_unlock(&vcpu->kvm->mmu_lock);
  1374. return r;
  1375. out_unlock:
  1376. spin_unlock(&vcpu->kvm->mmu_lock);
  1377. kvm_release_pfn_clean(pfn);
  1378. return 0;
  1379. }
  1380. static void mmu_free_roots(struct kvm_vcpu *vcpu)
  1381. {
  1382. int i;
  1383. struct kvm_mmu_page *sp;
  1384. if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
  1385. return;
  1386. spin_lock(&vcpu->kvm->mmu_lock);
  1387. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  1388. hpa_t root = vcpu->arch.mmu.root_hpa;
  1389. sp = page_header(root);
  1390. --sp->root_count;
  1391. if (!sp->root_count && sp->role.invalid)
  1392. kvm_mmu_zap_page(vcpu->kvm, sp);
  1393. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  1394. spin_unlock(&vcpu->kvm->mmu_lock);
  1395. return;
  1396. }
  1397. for (i = 0; i < 4; ++i) {
  1398. hpa_t root = vcpu->arch.mmu.pae_root[i];
  1399. if (root) {
  1400. root &= PT64_BASE_ADDR_MASK;
  1401. sp = page_header(root);
  1402. --sp->root_count;
  1403. if (!sp->root_count && sp->role.invalid)
  1404. kvm_mmu_zap_page(vcpu->kvm, sp);
  1405. }
  1406. vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
  1407. }
  1408. spin_unlock(&vcpu->kvm->mmu_lock);
  1409. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  1410. }
  1411. static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
  1412. {
  1413. int i;
  1414. gfn_t root_gfn;
  1415. struct kvm_mmu_page *sp;
  1416. int metaphysical = 0;
  1417. root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
  1418. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  1419. hpa_t root = vcpu->arch.mmu.root_hpa;
  1420. ASSERT(!VALID_PAGE(root));
  1421. if (tdp_enabled)
  1422. metaphysical = 1;
  1423. sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
  1424. PT64_ROOT_LEVEL, metaphysical,
  1425. ACC_ALL, NULL);
  1426. root = __pa(sp->spt);
  1427. ++sp->root_count;
  1428. vcpu->arch.mmu.root_hpa = root;
  1429. return;
  1430. }
  1431. metaphysical = !is_paging(vcpu);
  1432. if (tdp_enabled)
  1433. metaphysical = 1;
  1434. for (i = 0; i < 4; ++i) {
  1435. hpa_t root = vcpu->arch.mmu.pae_root[i];
  1436. ASSERT(!VALID_PAGE(root));
  1437. if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
  1438. if (!is_present_pte(vcpu->arch.pdptrs[i])) {
  1439. vcpu->arch.mmu.pae_root[i] = 0;
  1440. continue;
  1441. }
  1442. root_gfn = vcpu->arch.pdptrs[i] >> PAGE_SHIFT;
  1443. } else if (vcpu->arch.mmu.root_level == 0)
  1444. root_gfn = 0;
  1445. sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
  1446. PT32_ROOT_LEVEL, metaphysical,
  1447. ACC_ALL, NULL);
  1448. root = __pa(sp->spt);
  1449. ++sp->root_count;
  1450. vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
  1451. }
  1452. vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
  1453. }
  1454. static void mmu_sync_roots(struct kvm_vcpu *vcpu)
  1455. {
  1456. int i;
  1457. struct kvm_mmu_page *sp;
  1458. if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
  1459. return;
  1460. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  1461. hpa_t root = vcpu->arch.mmu.root_hpa;
  1462. sp = page_header(root);
  1463. mmu_sync_children(vcpu, sp);
  1464. return;
  1465. }
  1466. for (i = 0; i < 4; ++i) {
  1467. hpa_t root = vcpu->arch.mmu.pae_root[i];
  1468. if (root) {
  1469. root &= PT64_BASE_ADDR_MASK;
  1470. sp = page_header(root);
  1471. mmu_sync_children(vcpu, sp);
  1472. }
  1473. }
  1474. }
  1475. void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
  1476. {
  1477. spin_lock(&vcpu->kvm->mmu_lock);
  1478. mmu_sync_roots(vcpu);
  1479. spin_unlock(&vcpu->kvm->mmu_lock);
  1480. }
  1481. static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
  1482. {
  1483. return vaddr;
  1484. }
  1485. static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
  1486. u32 error_code)
  1487. {
  1488. gfn_t gfn;
  1489. int r;
  1490. pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
  1491. r = mmu_topup_memory_caches(vcpu);
  1492. if (r)
  1493. return r;
  1494. ASSERT(vcpu);
  1495. ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1496. gfn = gva >> PAGE_SHIFT;
  1497. return nonpaging_map(vcpu, gva & PAGE_MASK,
  1498. error_code & PFERR_WRITE_MASK, gfn);
  1499. }
  1500. static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
  1501. u32 error_code)
  1502. {
  1503. pfn_t pfn;
  1504. int r;
  1505. int largepage = 0;
  1506. gfn_t gfn = gpa >> PAGE_SHIFT;
  1507. unsigned long mmu_seq;
  1508. ASSERT(vcpu);
  1509. ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1510. r = mmu_topup_memory_caches(vcpu);
  1511. if (r)
  1512. return r;
  1513. if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
  1514. gfn &= ~(KVM_PAGES_PER_HPAGE-1);
  1515. largepage = 1;
  1516. }
  1517. mmu_seq = vcpu->kvm->mmu_notifier_seq;
  1518. smp_rmb();
  1519. pfn = gfn_to_pfn(vcpu->kvm, gfn);
  1520. if (is_error_pfn(pfn)) {
  1521. kvm_release_pfn_clean(pfn);
  1522. return 1;
  1523. }
  1524. spin_lock(&vcpu->kvm->mmu_lock);
  1525. if (mmu_notifier_retry(vcpu, mmu_seq))
  1526. goto out_unlock;
  1527. kvm_mmu_free_some_pages(vcpu);
  1528. r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
  1529. largepage, gfn, pfn);
  1530. spin_unlock(&vcpu->kvm->mmu_lock);
  1531. return r;
  1532. out_unlock:
  1533. spin_unlock(&vcpu->kvm->mmu_lock);
  1534. kvm_release_pfn_clean(pfn);
  1535. return 0;
  1536. }
  1537. static void nonpaging_free(struct kvm_vcpu *vcpu)
  1538. {
  1539. mmu_free_roots(vcpu);
  1540. }
  1541. static int nonpaging_init_context(struct kvm_vcpu *vcpu)
  1542. {
  1543. struct kvm_mmu *context = &vcpu->arch.mmu;
  1544. context->new_cr3 = nonpaging_new_cr3;
  1545. context->page_fault = nonpaging_page_fault;
  1546. context->gva_to_gpa = nonpaging_gva_to_gpa;
  1547. context->free = nonpaging_free;
  1548. context->prefetch_page = nonpaging_prefetch_page;
  1549. context->sync_page = nonpaging_sync_page;
  1550. context->invlpg = nonpaging_invlpg;
  1551. context->root_level = 0;
  1552. context->shadow_root_level = PT32E_ROOT_LEVEL;
  1553. context->root_hpa = INVALID_PAGE;
  1554. return 0;
  1555. }
  1556. void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
  1557. {
  1558. ++vcpu->stat.tlb_flush;
  1559. kvm_x86_ops->tlb_flush(vcpu);
  1560. }
  1561. static void paging_new_cr3(struct kvm_vcpu *vcpu)
  1562. {
  1563. pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
  1564. mmu_free_roots(vcpu);
  1565. }
  1566. static void inject_page_fault(struct kvm_vcpu *vcpu,
  1567. u64 addr,
  1568. u32 err_code)
  1569. {
  1570. kvm_inject_page_fault(vcpu, addr, err_code);
  1571. }
  1572. static void paging_free(struct kvm_vcpu *vcpu)
  1573. {
  1574. nonpaging_free(vcpu);
  1575. }
  1576. #define PTTYPE 64
  1577. #include "paging_tmpl.h"
  1578. #undef PTTYPE
  1579. #define PTTYPE 32
  1580. #include "paging_tmpl.h"
  1581. #undef PTTYPE
  1582. static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
  1583. {
  1584. struct kvm_mmu *context = &vcpu->arch.mmu;
  1585. ASSERT(is_pae(vcpu));
  1586. context->new_cr3 = paging_new_cr3;
  1587. context->page_fault = paging64_page_fault;
  1588. context->gva_to_gpa = paging64_gva_to_gpa;
  1589. context->prefetch_page = paging64_prefetch_page;
  1590. context->sync_page = paging64_sync_page;
  1591. context->invlpg = paging64_invlpg;
  1592. context->free = paging_free;
  1593. context->root_level = level;
  1594. context->shadow_root_level = level;
  1595. context->root_hpa = INVALID_PAGE;
  1596. return 0;
  1597. }
  1598. static int paging64_init_context(struct kvm_vcpu *vcpu)
  1599. {
  1600. return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
  1601. }
  1602. static int paging32_init_context(struct kvm_vcpu *vcpu)
  1603. {
  1604. struct kvm_mmu *context = &vcpu->arch.mmu;
  1605. context->new_cr3 = paging_new_cr3;
  1606. context->page_fault = paging32_page_fault;
  1607. context->gva_to_gpa = paging32_gva_to_gpa;
  1608. context->free = paging_free;
  1609. context->prefetch_page = paging32_prefetch_page;
  1610. context->sync_page = paging32_sync_page;
  1611. context->invlpg = paging32_invlpg;
  1612. context->root_level = PT32_ROOT_LEVEL;
  1613. context->shadow_root_level = PT32E_ROOT_LEVEL;
  1614. context->root_hpa = INVALID_PAGE;
  1615. return 0;
  1616. }
  1617. static int paging32E_init_context(struct kvm_vcpu *vcpu)
  1618. {
  1619. return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
  1620. }
  1621. static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
  1622. {
  1623. struct kvm_mmu *context = &vcpu->arch.mmu;
  1624. context->new_cr3 = nonpaging_new_cr3;
  1625. context->page_fault = tdp_page_fault;
  1626. context->free = nonpaging_free;
  1627. context->prefetch_page = nonpaging_prefetch_page;
  1628. context->sync_page = nonpaging_sync_page;
  1629. context->invlpg = nonpaging_invlpg;
  1630. context->shadow_root_level = kvm_x86_ops->get_tdp_level();
  1631. context->root_hpa = INVALID_PAGE;
  1632. if (!is_paging(vcpu)) {
  1633. context->gva_to_gpa = nonpaging_gva_to_gpa;
  1634. context->root_level = 0;
  1635. } else if (is_long_mode(vcpu)) {
  1636. context->gva_to_gpa = paging64_gva_to_gpa;
  1637. context->root_level = PT64_ROOT_LEVEL;
  1638. } else if (is_pae(vcpu)) {
  1639. context->gva_to_gpa = paging64_gva_to_gpa;
  1640. context->root_level = PT32E_ROOT_LEVEL;
  1641. } else {
  1642. context->gva_to_gpa = paging32_gva_to_gpa;
  1643. context->root_level = PT32_ROOT_LEVEL;
  1644. }
  1645. return 0;
  1646. }
  1647. static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
  1648. {
  1649. ASSERT(vcpu);
  1650. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1651. if (!is_paging(vcpu))
  1652. return nonpaging_init_context(vcpu);
  1653. else if (is_long_mode(vcpu))
  1654. return paging64_init_context(vcpu);
  1655. else if (is_pae(vcpu))
  1656. return paging32E_init_context(vcpu);
  1657. else
  1658. return paging32_init_context(vcpu);
  1659. }
  1660. static int init_kvm_mmu(struct kvm_vcpu *vcpu)
  1661. {
  1662. vcpu->arch.update_pte.pfn = bad_pfn;
  1663. if (tdp_enabled)
  1664. return init_kvm_tdp_mmu(vcpu);
  1665. else
  1666. return init_kvm_softmmu(vcpu);
  1667. }
  1668. static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
  1669. {
  1670. ASSERT(vcpu);
  1671. if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
  1672. vcpu->arch.mmu.free(vcpu);
  1673. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  1674. }
  1675. }
  1676. int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
  1677. {
  1678. destroy_kvm_mmu(vcpu);
  1679. return init_kvm_mmu(vcpu);
  1680. }
  1681. EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
  1682. int kvm_mmu_load(struct kvm_vcpu *vcpu)
  1683. {
  1684. int r;
  1685. r = mmu_topup_memory_caches(vcpu);
  1686. if (r)
  1687. goto out;
  1688. spin_lock(&vcpu->kvm->mmu_lock);
  1689. kvm_mmu_free_some_pages(vcpu);
  1690. mmu_alloc_roots(vcpu);
  1691. mmu_sync_roots(vcpu);
  1692. spin_unlock(&vcpu->kvm->mmu_lock);
  1693. kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
  1694. kvm_mmu_flush_tlb(vcpu);
  1695. out:
  1696. return r;
  1697. }
  1698. EXPORT_SYMBOL_GPL(kvm_mmu_load);
  1699. void kvm_mmu_unload(struct kvm_vcpu *vcpu)
  1700. {
  1701. mmu_free_roots(vcpu);
  1702. }
  1703. static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
  1704. struct kvm_mmu_page *sp,
  1705. u64 *spte)
  1706. {
  1707. u64 pte;
  1708. struct kvm_mmu_page *child;
  1709. pte = *spte;
  1710. if (is_shadow_present_pte(pte)) {
  1711. if (sp->role.level == PT_PAGE_TABLE_LEVEL ||
  1712. is_large_pte(pte))
  1713. rmap_remove(vcpu->kvm, spte);
  1714. else {
  1715. child = page_header(pte & PT64_BASE_ADDR_MASK);
  1716. mmu_page_remove_parent_pte(child, spte);
  1717. }
  1718. }
  1719. set_shadow_pte(spte, shadow_trap_nonpresent_pte);
  1720. if (is_large_pte(pte))
  1721. --vcpu->kvm->stat.lpages;
  1722. }
  1723. static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
  1724. struct kvm_mmu_page *sp,
  1725. u64 *spte,
  1726. const void *new)
  1727. {
  1728. if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
  1729. if (!vcpu->arch.update_pte.largepage ||
  1730. sp->role.glevels == PT32_ROOT_LEVEL) {
  1731. ++vcpu->kvm->stat.mmu_pde_zapped;
  1732. return;
  1733. }
  1734. }
  1735. ++vcpu->kvm->stat.mmu_pte_updated;
  1736. if (sp->role.glevels == PT32_ROOT_LEVEL)
  1737. paging32_update_pte(vcpu, sp, spte, new);
  1738. else
  1739. paging64_update_pte(vcpu, sp, spte, new);
  1740. }
  1741. static bool need_remote_flush(u64 old, u64 new)
  1742. {
  1743. if (!is_shadow_present_pte(old))
  1744. return false;
  1745. if (!is_shadow_present_pte(new))
  1746. return true;
  1747. if ((old ^ new) & PT64_BASE_ADDR_MASK)
  1748. return true;
  1749. old ^= PT64_NX_MASK;
  1750. new ^= PT64_NX_MASK;
  1751. return (old & ~new & PT64_PERM_MASK) != 0;
  1752. }
  1753. static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
  1754. {
  1755. if (need_remote_flush(old, new))
  1756. kvm_flush_remote_tlbs(vcpu->kvm);
  1757. else
  1758. kvm_mmu_flush_tlb(vcpu);
  1759. }
  1760. static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
  1761. {
  1762. u64 *spte = vcpu->arch.last_pte_updated;
  1763. return !!(spte && (*spte & shadow_accessed_mask));
  1764. }
  1765. static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
  1766. const u8 *new, int bytes)
  1767. {
  1768. gfn_t gfn;
  1769. int r;
  1770. u64 gpte = 0;
  1771. pfn_t pfn;
  1772. vcpu->arch.update_pte.largepage = 0;
  1773. if (bytes != 4 && bytes != 8)
  1774. return;
  1775. /*
  1776. * Assume that the pte write on a page table of the same type
  1777. * as the current vcpu paging mode. This is nearly always true
  1778. * (might be false while changing modes). Note it is verified later
  1779. * by update_pte().
  1780. */
  1781. if (is_pae(vcpu)) {
  1782. /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
  1783. if ((bytes == 4) && (gpa % 4 == 0)) {
  1784. r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
  1785. if (r)
  1786. return;
  1787. memcpy((void *)&gpte + (gpa % 8), new, 4);
  1788. } else if ((bytes == 8) && (gpa % 8 == 0)) {
  1789. memcpy((void *)&gpte, new, 8);
  1790. }
  1791. } else {
  1792. if ((bytes == 4) && (gpa % 4 == 0))
  1793. memcpy((void *)&gpte, new, 4);
  1794. }
  1795. if (!is_present_pte(gpte))
  1796. return;
  1797. gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
  1798. if (is_large_pte(gpte) && is_largepage_backed(vcpu, gfn)) {
  1799. gfn &= ~(KVM_PAGES_PER_HPAGE-1);
  1800. vcpu->arch.update_pte.largepage = 1;
  1801. }
  1802. vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
  1803. smp_rmb();
  1804. pfn = gfn_to_pfn(vcpu->kvm, gfn);
  1805. if (is_error_pfn(pfn)) {
  1806. kvm_release_pfn_clean(pfn);
  1807. return;
  1808. }
  1809. vcpu->arch.update_pte.gfn = gfn;
  1810. vcpu->arch.update_pte.pfn = pfn;
  1811. }
  1812. static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
  1813. {
  1814. u64 *spte = vcpu->arch.last_pte_updated;
  1815. if (spte
  1816. && vcpu->arch.last_pte_gfn == gfn
  1817. && shadow_accessed_mask
  1818. && !(*spte & shadow_accessed_mask)
  1819. && is_shadow_present_pte(*spte))
  1820. set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
  1821. }
  1822. void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
  1823. const u8 *new, int bytes)
  1824. {
  1825. gfn_t gfn = gpa >> PAGE_SHIFT;
  1826. struct kvm_mmu_page *sp;
  1827. struct hlist_node *node, *n;
  1828. struct hlist_head *bucket;
  1829. unsigned index;
  1830. u64 entry, gentry;
  1831. u64 *spte;
  1832. unsigned offset = offset_in_page(gpa);
  1833. unsigned pte_size;
  1834. unsigned page_offset;
  1835. unsigned misaligned;
  1836. unsigned quadrant;
  1837. int level;
  1838. int flooded = 0;
  1839. int npte;
  1840. int r;
  1841. pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
  1842. mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
  1843. spin_lock(&vcpu->kvm->mmu_lock);
  1844. kvm_mmu_access_page(vcpu, gfn);
  1845. kvm_mmu_free_some_pages(vcpu);
  1846. ++vcpu->kvm->stat.mmu_pte_write;
  1847. kvm_mmu_audit(vcpu, "pre pte write");
  1848. if (gfn == vcpu->arch.last_pt_write_gfn
  1849. && !last_updated_pte_accessed(vcpu)) {
  1850. ++vcpu->arch.last_pt_write_count;
  1851. if (vcpu->arch.last_pt_write_count >= 3)
  1852. flooded = 1;
  1853. } else {
  1854. vcpu->arch.last_pt_write_gfn = gfn;
  1855. vcpu->arch.last_pt_write_count = 1;
  1856. vcpu->arch.last_pte_updated = NULL;
  1857. }
  1858. index = kvm_page_table_hashfn(gfn);
  1859. bucket = &vcpu->kvm->arch.mmu_page_hash[index];
  1860. hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
  1861. if (sp->gfn != gfn || sp->role.metaphysical || sp->role.invalid)
  1862. continue;
  1863. pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
  1864. misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
  1865. misaligned |= bytes < 4;
  1866. if (misaligned || flooded) {
  1867. /*
  1868. * Misaligned accesses are too much trouble to fix
  1869. * up; also, they usually indicate a page is not used
  1870. * as a page table.
  1871. *
  1872. * If we're seeing too many writes to a page,
  1873. * it may no longer be a page table, or we may be
  1874. * forking, in which case it is better to unmap the
  1875. * page.
  1876. */
  1877. pgprintk("misaligned: gpa %llx bytes %d role %x\n",
  1878. gpa, bytes, sp->role.word);
  1879. if (kvm_mmu_zap_page(vcpu->kvm, sp))
  1880. n = bucket->first;
  1881. ++vcpu->kvm->stat.mmu_flooded;
  1882. continue;
  1883. }
  1884. page_offset = offset;
  1885. level = sp->role.level;
  1886. npte = 1;
  1887. if (sp->role.glevels == PT32_ROOT_LEVEL) {
  1888. page_offset <<= 1; /* 32->64 */
  1889. /*
  1890. * A 32-bit pde maps 4MB while the shadow pdes map
  1891. * only 2MB. So we need to double the offset again
  1892. * and zap two pdes instead of one.
  1893. */
  1894. if (level == PT32_ROOT_LEVEL) {
  1895. page_offset &= ~7; /* kill rounding error */
  1896. page_offset <<= 1;
  1897. npte = 2;
  1898. }
  1899. quadrant = page_offset >> PAGE_SHIFT;
  1900. page_offset &= ~PAGE_MASK;
  1901. if (quadrant != sp->role.quadrant)
  1902. continue;
  1903. }
  1904. spte = &sp->spt[page_offset / sizeof(*spte)];
  1905. if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
  1906. gentry = 0;
  1907. r = kvm_read_guest_atomic(vcpu->kvm,
  1908. gpa & ~(u64)(pte_size - 1),
  1909. &gentry, pte_size);
  1910. new = (const void *)&gentry;
  1911. if (r < 0)
  1912. new = NULL;
  1913. }
  1914. while (npte--) {
  1915. entry = *spte;
  1916. mmu_pte_write_zap_pte(vcpu, sp, spte);
  1917. if (new)
  1918. mmu_pte_write_new_pte(vcpu, sp, spte, new);
  1919. mmu_pte_write_flush_tlb(vcpu, entry, *spte);
  1920. ++spte;
  1921. }
  1922. }
  1923. kvm_mmu_audit(vcpu, "post pte write");
  1924. spin_unlock(&vcpu->kvm->mmu_lock);
  1925. if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
  1926. kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
  1927. vcpu->arch.update_pte.pfn = bad_pfn;
  1928. }
  1929. }
  1930. int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
  1931. {
  1932. gpa_t gpa;
  1933. int r;
  1934. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
  1935. spin_lock(&vcpu->kvm->mmu_lock);
  1936. r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  1937. spin_unlock(&vcpu->kvm->mmu_lock);
  1938. return r;
  1939. }
  1940. EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
  1941. void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
  1942. {
  1943. while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) {
  1944. struct kvm_mmu_page *sp;
  1945. sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
  1946. struct kvm_mmu_page, link);
  1947. kvm_mmu_zap_page(vcpu->kvm, sp);
  1948. ++vcpu->kvm->stat.mmu_recycled;
  1949. }
  1950. }
  1951. int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
  1952. {
  1953. int r;
  1954. enum emulation_result er;
  1955. r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
  1956. if (r < 0)
  1957. goto out;
  1958. if (!r) {
  1959. r = 1;
  1960. goto out;
  1961. }
  1962. r = mmu_topup_memory_caches(vcpu);
  1963. if (r)
  1964. goto out;
  1965. er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
  1966. switch (er) {
  1967. case EMULATE_DONE:
  1968. return 1;
  1969. case EMULATE_DO_MMIO:
  1970. ++vcpu->stat.mmio_exits;
  1971. return 0;
  1972. case EMULATE_FAIL:
  1973. kvm_report_emulation_failure(vcpu, "pagetable");
  1974. return 1;
  1975. default:
  1976. BUG();
  1977. }
  1978. out:
  1979. return r;
  1980. }
  1981. EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
  1982. void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
  1983. {
  1984. spin_lock(&vcpu->kvm->mmu_lock);
  1985. vcpu->arch.mmu.invlpg(vcpu, gva);
  1986. spin_unlock(&vcpu->kvm->mmu_lock);
  1987. kvm_mmu_flush_tlb(vcpu);
  1988. ++vcpu->stat.invlpg;
  1989. }
  1990. EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
  1991. void kvm_enable_tdp(void)
  1992. {
  1993. tdp_enabled = true;
  1994. }
  1995. EXPORT_SYMBOL_GPL(kvm_enable_tdp);
  1996. void kvm_disable_tdp(void)
  1997. {
  1998. tdp_enabled = false;
  1999. }
  2000. EXPORT_SYMBOL_GPL(kvm_disable_tdp);
  2001. static void free_mmu_pages(struct kvm_vcpu *vcpu)
  2002. {
  2003. struct kvm_mmu_page *sp;
  2004. while (!list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
  2005. sp = container_of(vcpu->kvm->arch.active_mmu_pages.next,
  2006. struct kvm_mmu_page, link);
  2007. kvm_mmu_zap_page(vcpu->kvm, sp);
  2008. cond_resched();
  2009. }
  2010. free_page((unsigned long)vcpu->arch.mmu.pae_root);
  2011. }
  2012. static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
  2013. {
  2014. struct page *page;
  2015. int i;
  2016. ASSERT(vcpu);
  2017. if (vcpu->kvm->arch.n_requested_mmu_pages)
  2018. vcpu->kvm->arch.n_free_mmu_pages =
  2019. vcpu->kvm->arch.n_requested_mmu_pages;
  2020. else
  2021. vcpu->kvm->arch.n_free_mmu_pages =
  2022. vcpu->kvm->arch.n_alloc_mmu_pages;
  2023. /*
  2024. * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
  2025. * Therefore we need to allocate shadow page tables in the first
  2026. * 4GB of memory, which happens to fit the DMA32 zone.
  2027. */
  2028. page = alloc_page(GFP_KERNEL | __GFP_DMA32);
  2029. if (!page)
  2030. goto error_1;
  2031. vcpu->arch.mmu.pae_root = page_address(page);
  2032. for (i = 0; i < 4; ++i)
  2033. vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
  2034. return 0;
  2035. error_1:
  2036. free_mmu_pages(vcpu);
  2037. return -ENOMEM;
  2038. }
  2039. int kvm_mmu_create(struct kvm_vcpu *vcpu)
  2040. {
  2041. ASSERT(vcpu);
  2042. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  2043. return alloc_mmu_pages(vcpu);
  2044. }
  2045. int kvm_mmu_setup(struct kvm_vcpu *vcpu)
  2046. {
  2047. ASSERT(vcpu);
  2048. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  2049. return init_kvm_mmu(vcpu);
  2050. }
  2051. void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
  2052. {
  2053. ASSERT(vcpu);
  2054. destroy_kvm_mmu(vcpu);
  2055. free_mmu_pages(vcpu);
  2056. mmu_free_memory_caches(vcpu);
  2057. }
  2058. void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
  2059. {
  2060. struct kvm_mmu_page *sp;
  2061. spin_lock(&kvm->mmu_lock);
  2062. list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
  2063. int i;
  2064. u64 *pt;
  2065. if (!test_bit(slot, &sp->slot_bitmap))
  2066. continue;
  2067. pt = sp->spt;
  2068. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  2069. /* avoid RMW */
  2070. if (pt[i] & PT_WRITABLE_MASK)
  2071. pt[i] &= ~PT_WRITABLE_MASK;
  2072. }
  2073. kvm_flush_remote_tlbs(kvm);
  2074. spin_unlock(&kvm->mmu_lock);
  2075. }
  2076. void kvm_mmu_zap_all(struct kvm *kvm)
  2077. {
  2078. struct kvm_mmu_page *sp, *node;
  2079. spin_lock(&kvm->mmu_lock);
  2080. list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
  2081. if (kvm_mmu_zap_page(kvm, sp))
  2082. node = container_of(kvm->arch.active_mmu_pages.next,
  2083. struct kvm_mmu_page, link);
  2084. spin_unlock(&kvm->mmu_lock);
  2085. kvm_flush_remote_tlbs(kvm);
  2086. }
  2087. static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
  2088. {
  2089. struct kvm_mmu_page *page;
  2090. page = container_of(kvm->arch.active_mmu_pages.prev,
  2091. struct kvm_mmu_page, link);
  2092. kvm_mmu_zap_page(kvm, page);
  2093. }
  2094. static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
  2095. {
  2096. struct kvm *kvm;
  2097. struct kvm *kvm_freed = NULL;
  2098. int cache_count = 0;
  2099. spin_lock(&kvm_lock);
  2100. list_for_each_entry(kvm, &vm_list, vm_list) {
  2101. int npages;
  2102. if (!down_read_trylock(&kvm->slots_lock))
  2103. continue;
  2104. spin_lock(&kvm->mmu_lock);
  2105. npages = kvm->arch.n_alloc_mmu_pages -
  2106. kvm->arch.n_free_mmu_pages;
  2107. cache_count += npages;
  2108. if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
  2109. kvm_mmu_remove_one_alloc_mmu_page(kvm);
  2110. cache_count--;
  2111. kvm_freed = kvm;
  2112. }
  2113. nr_to_scan--;
  2114. spin_unlock(&kvm->mmu_lock);
  2115. up_read(&kvm->slots_lock);
  2116. }
  2117. if (kvm_freed)
  2118. list_move_tail(&kvm_freed->vm_list, &vm_list);
  2119. spin_unlock(&kvm_lock);
  2120. return cache_count;
  2121. }
  2122. static struct shrinker mmu_shrinker = {
  2123. .shrink = mmu_shrink,
  2124. .seeks = DEFAULT_SEEKS * 10,
  2125. };
  2126. static void mmu_destroy_caches(void)
  2127. {
  2128. if (pte_chain_cache)
  2129. kmem_cache_destroy(pte_chain_cache);
  2130. if (rmap_desc_cache)
  2131. kmem_cache_destroy(rmap_desc_cache);
  2132. if (mmu_page_header_cache)
  2133. kmem_cache_destroy(mmu_page_header_cache);
  2134. }
  2135. void kvm_mmu_module_exit(void)
  2136. {
  2137. mmu_destroy_caches();
  2138. unregister_shrinker(&mmu_shrinker);
  2139. }
  2140. int kvm_mmu_module_init(void)
  2141. {
  2142. pte_chain_cache = kmem_cache_create("kvm_pte_chain",
  2143. sizeof(struct kvm_pte_chain),
  2144. 0, 0, NULL);
  2145. if (!pte_chain_cache)
  2146. goto nomem;
  2147. rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
  2148. sizeof(struct kvm_rmap_desc),
  2149. 0, 0, NULL);
  2150. if (!rmap_desc_cache)
  2151. goto nomem;
  2152. mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
  2153. sizeof(struct kvm_mmu_page),
  2154. 0, 0, NULL);
  2155. if (!mmu_page_header_cache)
  2156. goto nomem;
  2157. register_shrinker(&mmu_shrinker);
  2158. return 0;
  2159. nomem:
  2160. mmu_destroy_caches();
  2161. return -ENOMEM;
  2162. }
  2163. /*
  2164. * Caculate mmu pages needed for kvm.
  2165. */
  2166. unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
  2167. {
  2168. int i;
  2169. unsigned int nr_mmu_pages;
  2170. unsigned int nr_pages = 0;
  2171. for (i = 0; i < kvm->nmemslots; i++)
  2172. nr_pages += kvm->memslots[i].npages;
  2173. nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
  2174. nr_mmu_pages = max(nr_mmu_pages,
  2175. (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
  2176. return nr_mmu_pages;
  2177. }
  2178. static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
  2179. unsigned len)
  2180. {
  2181. if (len > buffer->len)
  2182. return NULL;
  2183. return buffer->ptr;
  2184. }
  2185. static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
  2186. unsigned len)
  2187. {
  2188. void *ret;
  2189. ret = pv_mmu_peek_buffer(buffer, len);
  2190. if (!ret)
  2191. return ret;
  2192. buffer->ptr += len;
  2193. buffer->len -= len;
  2194. buffer->processed += len;
  2195. return ret;
  2196. }
  2197. static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
  2198. gpa_t addr, gpa_t value)
  2199. {
  2200. int bytes = 8;
  2201. int r;
  2202. if (!is_long_mode(vcpu) && !is_pae(vcpu))
  2203. bytes = 4;
  2204. r = mmu_topup_memory_caches(vcpu);
  2205. if (r)
  2206. return r;
  2207. if (!emulator_write_phys(vcpu, addr, &value, bytes))
  2208. return -EFAULT;
  2209. return 1;
  2210. }
  2211. static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
  2212. {
  2213. kvm_x86_ops->tlb_flush(vcpu);
  2214. return 1;
  2215. }
  2216. static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
  2217. {
  2218. spin_lock(&vcpu->kvm->mmu_lock);
  2219. mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
  2220. spin_unlock(&vcpu->kvm->mmu_lock);
  2221. return 1;
  2222. }
  2223. static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
  2224. struct kvm_pv_mmu_op_buffer *buffer)
  2225. {
  2226. struct kvm_mmu_op_header *header;
  2227. header = pv_mmu_peek_buffer(buffer, sizeof *header);
  2228. if (!header)
  2229. return 0;
  2230. switch (header->op) {
  2231. case KVM_MMU_OP_WRITE_PTE: {
  2232. struct kvm_mmu_op_write_pte *wpte;
  2233. wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
  2234. if (!wpte)
  2235. return 0;
  2236. return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
  2237. wpte->pte_val);
  2238. }
  2239. case KVM_MMU_OP_FLUSH_TLB: {
  2240. struct kvm_mmu_op_flush_tlb *ftlb;
  2241. ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
  2242. if (!ftlb)
  2243. return 0;
  2244. return kvm_pv_mmu_flush_tlb(vcpu);
  2245. }
  2246. case KVM_MMU_OP_RELEASE_PT: {
  2247. struct kvm_mmu_op_release_pt *rpt;
  2248. rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
  2249. if (!rpt)
  2250. return 0;
  2251. return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
  2252. }
  2253. default: return 0;
  2254. }
  2255. }
  2256. int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
  2257. gpa_t addr, unsigned long *ret)
  2258. {
  2259. int r;
  2260. struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
  2261. buffer->ptr = buffer->buf;
  2262. buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
  2263. buffer->processed = 0;
  2264. r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
  2265. if (r)
  2266. goto out;
  2267. while (buffer->len) {
  2268. r = kvm_pv_mmu_op_one(vcpu, buffer);
  2269. if (r < 0)
  2270. goto out;
  2271. if (r == 0)
  2272. break;
  2273. }
  2274. r = 1;
  2275. out:
  2276. *ret = buffer->processed;
  2277. return r;
  2278. }
  2279. #ifdef AUDIT
  2280. static const char *audit_msg;
  2281. static gva_t canonicalize(gva_t gva)
  2282. {
  2283. #ifdef CONFIG_X86_64
  2284. gva = (long long)(gva << 16) >> 16;
  2285. #endif
  2286. return gva;
  2287. }
  2288. static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
  2289. gva_t va, int level)
  2290. {
  2291. u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
  2292. int i;
  2293. gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
  2294. for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
  2295. u64 ent = pt[i];
  2296. if (ent == shadow_trap_nonpresent_pte)
  2297. continue;
  2298. va = canonicalize(va);
  2299. if (level > 1) {
  2300. if (ent == shadow_notrap_nonpresent_pte)
  2301. printk(KERN_ERR "audit: (%s) nontrapping pte"
  2302. " in nonleaf level: levels %d gva %lx"
  2303. " level %d pte %llx\n", audit_msg,
  2304. vcpu->arch.mmu.root_level, va, level, ent);
  2305. audit_mappings_page(vcpu, ent, va, level - 1);
  2306. } else {
  2307. gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
  2308. hpa_t hpa = (hpa_t)gpa_to_pfn(vcpu, gpa) << PAGE_SHIFT;
  2309. if (is_shadow_present_pte(ent)
  2310. && (ent & PT64_BASE_ADDR_MASK) != hpa)
  2311. printk(KERN_ERR "xx audit error: (%s) levels %d"
  2312. " gva %lx gpa %llx hpa %llx ent %llx %d\n",
  2313. audit_msg, vcpu->arch.mmu.root_level,
  2314. va, gpa, hpa, ent,
  2315. is_shadow_present_pte(ent));
  2316. else if (ent == shadow_notrap_nonpresent_pte
  2317. && !is_error_hpa(hpa))
  2318. printk(KERN_ERR "audit: (%s) notrap shadow,"
  2319. " valid guest gva %lx\n", audit_msg, va);
  2320. kvm_release_pfn_clean(pfn);
  2321. }
  2322. }
  2323. }
  2324. static void audit_mappings(struct kvm_vcpu *vcpu)
  2325. {
  2326. unsigned i;
  2327. if (vcpu->arch.mmu.root_level == 4)
  2328. audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
  2329. else
  2330. for (i = 0; i < 4; ++i)
  2331. if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
  2332. audit_mappings_page(vcpu,
  2333. vcpu->arch.mmu.pae_root[i],
  2334. i << 30,
  2335. 2);
  2336. }
  2337. static int count_rmaps(struct kvm_vcpu *vcpu)
  2338. {
  2339. int nmaps = 0;
  2340. int i, j, k;
  2341. for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
  2342. struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
  2343. struct kvm_rmap_desc *d;
  2344. for (j = 0; j < m->npages; ++j) {
  2345. unsigned long *rmapp = &m->rmap[j];
  2346. if (!*rmapp)
  2347. continue;
  2348. if (!(*rmapp & 1)) {
  2349. ++nmaps;
  2350. continue;
  2351. }
  2352. d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  2353. while (d) {
  2354. for (k = 0; k < RMAP_EXT; ++k)
  2355. if (d->shadow_ptes[k])
  2356. ++nmaps;
  2357. else
  2358. break;
  2359. d = d->more;
  2360. }
  2361. }
  2362. }
  2363. return nmaps;
  2364. }
  2365. static int count_writable_mappings(struct kvm_vcpu *vcpu)
  2366. {
  2367. int nmaps = 0;
  2368. struct kvm_mmu_page *sp;
  2369. int i;
  2370. list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
  2371. u64 *pt = sp->spt;
  2372. if (sp->role.level != PT_PAGE_TABLE_LEVEL)
  2373. continue;
  2374. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  2375. u64 ent = pt[i];
  2376. if (!(ent & PT_PRESENT_MASK))
  2377. continue;
  2378. if (!(ent & PT_WRITABLE_MASK))
  2379. continue;
  2380. ++nmaps;
  2381. }
  2382. }
  2383. return nmaps;
  2384. }
  2385. static void audit_rmap(struct kvm_vcpu *vcpu)
  2386. {
  2387. int n_rmap = count_rmaps(vcpu);
  2388. int n_actual = count_writable_mappings(vcpu);
  2389. if (n_rmap != n_actual)
  2390. printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
  2391. __func__, audit_msg, n_rmap, n_actual);
  2392. }
  2393. static void audit_write_protection(struct kvm_vcpu *vcpu)
  2394. {
  2395. struct kvm_mmu_page *sp;
  2396. struct kvm_memory_slot *slot;
  2397. unsigned long *rmapp;
  2398. gfn_t gfn;
  2399. list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
  2400. if (sp->role.metaphysical)
  2401. continue;
  2402. slot = gfn_to_memslot(vcpu->kvm, sp->gfn);
  2403. gfn = unalias_gfn(vcpu->kvm, sp->gfn);
  2404. rmapp = &slot->rmap[gfn - slot->base_gfn];
  2405. if (*rmapp)
  2406. printk(KERN_ERR "%s: (%s) shadow page has writable"
  2407. " mappings: gfn %lx role %x\n",
  2408. __func__, audit_msg, sp->gfn,
  2409. sp->role.word);
  2410. }
  2411. }
  2412. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
  2413. {
  2414. int olddbg = dbg;
  2415. dbg = 0;
  2416. audit_msg = msg;
  2417. audit_rmap(vcpu);
  2418. audit_write_protection(vcpu);
  2419. audit_mappings(vcpu);
  2420. dbg = olddbg;
  2421. }
  2422. #endif