iwl4965-base.c 264 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/version.h>
  32. #include <linux/init.h>
  33. #include <linux/pci.h>
  34. #include <linux/dma-mapping.h>
  35. #include <linux/delay.h>
  36. #include <linux/skbuff.h>
  37. #include <linux/netdevice.h>
  38. #include <linux/wireless.h>
  39. #include <linux/firmware.h>
  40. #include <linux/etherdevice.h>
  41. #include <linux/if_arp.h>
  42. #include <net/mac80211.h>
  43. #include <asm/div64.h>
  44. #include "iwl-4965.h"
  45. #include "iwl-helpers.h"
  46. #ifdef CONFIG_IWL4965_DEBUG
  47. u32 iwl4965_debug_level;
  48. #endif
  49. static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
  50. struct iwl4965_tx_queue *txq);
  51. /******************************************************************************
  52. *
  53. * module boiler plate
  54. *
  55. ******************************************************************************/
  56. /* module parameters */
  57. static int iwl4965_param_disable_hw_scan; /* def: 0 = use 4965's h/w scan */
  58. static int iwl4965_param_debug; /* def: 0 = minimal debug log messages */
  59. static int iwl4965_param_disable; /* def: enable radio */
  60. static int iwl4965_param_antenna; /* def: 0 = both antennas (use diversity) */
  61. int iwl4965_param_hwcrypto; /* def: using software encryption */
  62. static int iwl4965_param_qos_enable = 1; /* def: 1 = use quality of service */
  63. int iwl4965_param_queues_num = IWL_MAX_NUM_QUEUES; /* def: 16 Tx queues */
  64. int iwl4965_param_amsdu_size_8K; /* def: enable 8K amsdu size */
  65. /*
  66. * module name, copyright, version, etc.
  67. * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
  68. */
  69. #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
  70. #ifdef CONFIG_IWL4965_DEBUG
  71. #define VD "d"
  72. #else
  73. #define VD
  74. #endif
  75. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  76. #define VS "s"
  77. #else
  78. #define VS
  79. #endif
  80. #define IWLWIFI_VERSION "1.2.22k" VD VS
  81. #define DRV_COPYRIGHT "Copyright(c) 2003-2007 Intel Corporation"
  82. #define DRV_VERSION IWLWIFI_VERSION
  83. /* Change firmware file name, using "-" and incrementing number,
  84. * *only* when uCode interface or architecture changes so that it
  85. * is not compatible with earlier drivers.
  86. * This number will also appear in << 8 position of 1st dword of uCode file */
  87. #define IWL4965_UCODE_API "-1"
  88. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  89. MODULE_VERSION(DRV_VERSION);
  90. MODULE_AUTHOR(DRV_COPYRIGHT);
  91. MODULE_LICENSE("GPL");
  92. __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
  93. {
  94. u16 fc = le16_to_cpu(hdr->frame_control);
  95. int hdr_len = ieee80211_get_hdrlen(fc);
  96. if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
  97. return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
  98. return NULL;
  99. }
  100. static const struct ieee80211_hw_mode *iwl4965_get_hw_mode(
  101. struct iwl4965_priv *priv, int mode)
  102. {
  103. int i;
  104. for (i = 0; i < 3; i++)
  105. if (priv->modes[i].mode == mode)
  106. return &priv->modes[i];
  107. return NULL;
  108. }
  109. static int iwl4965_is_empty_essid(const char *essid, int essid_len)
  110. {
  111. /* Single white space is for Linksys APs */
  112. if (essid_len == 1 && essid[0] == ' ')
  113. return 1;
  114. /* Otherwise, if the entire essid is 0, we assume it is hidden */
  115. while (essid_len) {
  116. essid_len--;
  117. if (essid[essid_len] != '\0')
  118. return 0;
  119. }
  120. return 1;
  121. }
  122. static const char *iwl4965_escape_essid(const char *essid, u8 essid_len)
  123. {
  124. static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
  125. const char *s = essid;
  126. char *d = escaped;
  127. if (iwl4965_is_empty_essid(essid, essid_len)) {
  128. memcpy(escaped, "<hidden>", sizeof("<hidden>"));
  129. return escaped;
  130. }
  131. essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
  132. while (essid_len--) {
  133. if (*s == '\0') {
  134. *d++ = '\\';
  135. *d++ = '0';
  136. s++;
  137. } else
  138. *d++ = *s++;
  139. }
  140. *d = '\0';
  141. return escaped;
  142. }
  143. static void iwl4965_print_hex_dump(int level, void *p, u32 len)
  144. {
  145. #ifdef CONFIG_IWL4965_DEBUG
  146. if (!(iwl4965_debug_level & level))
  147. return;
  148. print_hex_dump(KERN_DEBUG, "iwl data: ", DUMP_PREFIX_OFFSET, 16, 1,
  149. p, len, 1);
  150. #endif
  151. }
  152. /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
  153. * DMA services
  154. *
  155. * Theory of operation
  156. *
  157. * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
  158. * of buffer descriptors, each of which points to one or more data buffers for
  159. * the device to read from or fill. Driver and device exchange status of each
  160. * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
  161. * entries in each circular buffer, to protect against confusing empty and full
  162. * queue states.
  163. *
  164. * The device reads or writes the data in the queues via the device's several
  165. * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
  166. *
  167. * For Tx queue, there are low mark and high mark limits. If, after queuing
  168. * the packet for Tx, free space become < low mark, Tx queue stopped. When
  169. * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
  170. * Tx queue resumed.
  171. *
  172. * The 4965 operates with up to 17 queues: One receive queue, one transmit
  173. * queue (#4) for sending commands to the device firmware, and 15 other
  174. * Tx queues that may be mapped to prioritized Tx DMA/FIFO channels.
  175. *
  176. * See more detailed info in iwl-4965-hw.h.
  177. ***************************************************/
  178. static int iwl4965_queue_space(const struct iwl4965_queue *q)
  179. {
  180. int s = q->read_ptr - q->write_ptr;
  181. if (q->read_ptr > q->write_ptr)
  182. s -= q->n_bd;
  183. if (s <= 0)
  184. s += q->n_window;
  185. /* keep some reserve to not confuse empty and full situations */
  186. s -= 2;
  187. if (s < 0)
  188. s = 0;
  189. return s;
  190. }
  191. /**
  192. * iwl4965_queue_inc_wrap - increment queue index, wrap back to beginning
  193. * @index -- current index
  194. * @n_bd -- total number of entries in queue (must be power of 2)
  195. */
  196. static inline int iwl4965_queue_inc_wrap(int index, int n_bd)
  197. {
  198. return ++index & (n_bd - 1);
  199. }
  200. /**
  201. * iwl4965_queue_dec_wrap - decrement queue index, wrap back to end
  202. * @index -- current index
  203. * @n_bd -- total number of entries in queue (must be power of 2)
  204. */
  205. static inline int iwl4965_queue_dec_wrap(int index, int n_bd)
  206. {
  207. return --index & (n_bd - 1);
  208. }
  209. static inline int x2_queue_used(const struct iwl4965_queue *q, int i)
  210. {
  211. return q->write_ptr > q->read_ptr ?
  212. (i >= q->read_ptr && i < q->write_ptr) :
  213. !(i < q->read_ptr && i >= q->write_ptr);
  214. }
  215. static inline u8 get_cmd_index(struct iwl4965_queue *q, u32 index, int is_huge)
  216. {
  217. /* This is for scan command, the big buffer at end of command array */
  218. if (is_huge)
  219. return q->n_window; /* must be power of 2 */
  220. /* Otherwise, use normal size buffers */
  221. return index & (q->n_window - 1);
  222. }
  223. /**
  224. * iwl4965_queue_init - Initialize queue's high/low-water and read/write indexes
  225. */
  226. static int iwl4965_queue_init(struct iwl4965_priv *priv, struct iwl4965_queue *q,
  227. int count, int slots_num, u32 id)
  228. {
  229. q->n_bd = count;
  230. q->n_window = slots_num;
  231. q->id = id;
  232. /* count must be power-of-two size, otherwise iwl4965_queue_inc_wrap
  233. * and iwl4965_queue_dec_wrap are broken. */
  234. BUG_ON(!is_power_of_2(count));
  235. /* slots_num must be power-of-two size, otherwise
  236. * get_cmd_index is broken. */
  237. BUG_ON(!is_power_of_2(slots_num));
  238. q->low_mark = q->n_window / 4;
  239. if (q->low_mark < 4)
  240. q->low_mark = 4;
  241. q->high_mark = q->n_window / 8;
  242. if (q->high_mark < 2)
  243. q->high_mark = 2;
  244. q->write_ptr = q->read_ptr = 0;
  245. return 0;
  246. }
  247. /**
  248. * iwl4965_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
  249. */
  250. static int iwl4965_tx_queue_alloc(struct iwl4965_priv *priv,
  251. struct iwl4965_tx_queue *txq, u32 id)
  252. {
  253. struct pci_dev *dev = priv->pci_dev;
  254. /* Driver private data, only for Tx (not command) queues,
  255. * not shared with device. */
  256. if (id != IWL_CMD_QUEUE_NUM) {
  257. txq->txb = kmalloc(sizeof(txq->txb[0]) *
  258. TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
  259. if (!txq->txb) {
  260. IWL_ERROR("kmalloc for auxiliary BD "
  261. "structures failed\n");
  262. goto error;
  263. }
  264. } else
  265. txq->txb = NULL;
  266. /* Circular buffer of transmit frame descriptors (TFDs),
  267. * shared with device */
  268. txq->bd = pci_alloc_consistent(dev,
  269. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
  270. &txq->q.dma_addr);
  271. if (!txq->bd) {
  272. IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
  273. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
  274. goto error;
  275. }
  276. txq->q.id = id;
  277. return 0;
  278. error:
  279. if (txq->txb) {
  280. kfree(txq->txb);
  281. txq->txb = NULL;
  282. }
  283. return -ENOMEM;
  284. }
  285. /**
  286. * iwl4965_tx_queue_init - Allocate and initialize one tx/cmd queue
  287. */
  288. int iwl4965_tx_queue_init(struct iwl4965_priv *priv,
  289. struct iwl4965_tx_queue *txq, int slots_num, u32 txq_id)
  290. {
  291. struct pci_dev *dev = priv->pci_dev;
  292. int len;
  293. int rc = 0;
  294. /*
  295. * Alloc buffer array for commands (Tx or other types of commands).
  296. * For the command queue (#4), allocate command space + one big
  297. * command for scan, since scan command is very huge; the system will
  298. * not have two scans at the same time, so only one is needed.
  299. * For normal Tx queues (all other queues), no super-size command
  300. * space is needed.
  301. */
  302. len = sizeof(struct iwl4965_cmd) * slots_num;
  303. if (txq_id == IWL_CMD_QUEUE_NUM)
  304. len += IWL_MAX_SCAN_SIZE;
  305. txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
  306. if (!txq->cmd)
  307. return -ENOMEM;
  308. /* Alloc driver data array and TFD circular buffer */
  309. rc = iwl4965_tx_queue_alloc(priv, txq, txq_id);
  310. if (rc) {
  311. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  312. return -ENOMEM;
  313. }
  314. txq->need_update = 0;
  315. /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
  316. * iwl4965_queue_inc_wrap and iwl4965_queue_dec_wrap are broken. */
  317. BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
  318. /* Initialize queue's high/low-water marks, and head/tail indexes */
  319. iwl4965_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  320. /* Tell device where to find queue */
  321. iwl4965_hw_tx_queue_init(priv, txq);
  322. return 0;
  323. }
  324. /**
  325. * iwl4965_tx_queue_free - Deallocate DMA queue.
  326. * @txq: Transmit queue to deallocate.
  327. *
  328. * Empty queue by removing and destroying all BD's.
  329. * Free all buffers.
  330. * 0-fill, but do not free "txq" descriptor structure.
  331. */
  332. void iwl4965_tx_queue_free(struct iwl4965_priv *priv, struct iwl4965_tx_queue *txq)
  333. {
  334. struct iwl4965_queue *q = &txq->q;
  335. struct pci_dev *dev = priv->pci_dev;
  336. int len;
  337. if (q->n_bd == 0)
  338. return;
  339. /* first, empty all BD's */
  340. for (; q->write_ptr != q->read_ptr;
  341. q->read_ptr = iwl4965_queue_inc_wrap(q->read_ptr, q->n_bd))
  342. iwl4965_hw_txq_free_tfd(priv, txq);
  343. len = sizeof(struct iwl4965_cmd) * q->n_window;
  344. if (q->id == IWL_CMD_QUEUE_NUM)
  345. len += IWL_MAX_SCAN_SIZE;
  346. /* De-alloc array of command/tx buffers */
  347. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  348. /* De-alloc circular buffer of TFDs */
  349. if (txq->q.n_bd)
  350. pci_free_consistent(dev, sizeof(struct iwl4965_tfd_frame) *
  351. txq->q.n_bd, txq->bd, txq->q.dma_addr);
  352. /* De-alloc array of per-TFD driver data */
  353. if (txq->txb) {
  354. kfree(txq->txb);
  355. txq->txb = NULL;
  356. }
  357. /* 0-fill queue descriptor structure */
  358. memset(txq, 0, sizeof(*txq));
  359. }
  360. const u8 iwl4965_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  361. /*************** STATION TABLE MANAGEMENT ****
  362. * mac80211 should be examined to determine if sta_info is duplicating
  363. * the functionality provided here
  364. */
  365. /**************************************************************/
  366. #if 0 /* temporary disable till we add real remove station */
  367. /**
  368. * iwl4965_remove_station - Remove driver's knowledge of station.
  369. *
  370. * NOTE: This does not remove station from device's station table.
  371. */
  372. static u8 iwl4965_remove_station(struct iwl4965_priv *priv, const u8 *addr, int is_ap)
  373. {
  374. int index = IWL_INVALID_STATION;
  375. int i;
  376. unsigned long flags;
  377. spin_lock_irqsave(&priv->sta_lock, flags);
  378. if (is_ap)
  379. index = IWL_AP_ID;
  380. else if (is_broadcast_ether_addr(addr))
  381. index = priv->hw_setting.bcast_sta_id;
  382. else
  383. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
  384. if (priv->stations[i].used &&
  385. !compare_ether_addr(priv->stations[i].sta.sta.addr,
  386. addr)) {
  387. index = i;
  388. break;
  389. }
  390. if (unlikely(index == IWL_INVALID_STATION))
  391. goto out;
  392. if (priv->stations[index].used) {
  393. priv->stations[index].used = 0;
  394. priv->num_stations--;
  395. }
  396. BUG_ON(priv->num_stations < 0);
  397. out:
  398. spin_unlock_irqrestore(&priv->sta_lock, flags);
  399. return 0;
  400. }
  401. #endif
  402. /**
  403. * iwl4965_clear_stations_table - Clear the driver's station table
  404. *
  405. * NOTE: This does not clear or otherwise alter the device's station table.
  406. */
  407. static void iwl4965_clear_stations_table(struct iwl4965_priv *priv)
  408. {
  409. unsigned long flags;
  410. spin_lock_irqsave(&priv->sta_lock, flags);
  411. priv->num_stations = 0;
  412. memset(priv->stations, 0, sizeof(priv->stations));
  413. spin_unlock_irqrestore(&priv->sta_lock, flags);
  414. }
  415. /**
  416. * iwl4965_add_station_flags - Add station to tables in driver and device
  417. */
  418. u8 iwl4965_add_station_flags(struct iwl4965_priv *priv, const u8 *addr,
  419. int is_ap, u8 flags, void *ht_data)
  420. {
  421. int i;
  422. int index = IWL_INVALID_STATION;
  423. struct iwl4965_station_entry *station;
  424. unsigned long flags_spin;
  425. DECLARE_MAC_BUF(mac);
  426. spin_lock_irqsave(&priv->sta_lock, flags_spin);
  427. if (is_ap)
  428. index = IWL_AP_ID;
  429. else if (is_broadcast_ether_addr(addr))
  430. index = priv->hw_setting.bcast_sta_id;
  431. else
  432. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
  433. if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
  434. addr)) {
  435. index = i;
  436. break;
  437. }
  438. if (!priv->stations[i].used &&
  439. index == IWL_INVALID_STATION)
  440. index = i;
  441. }
  442. /* These two conditions have the same outcome, but keep them separate
  443. since they have different meanings */
  444. if (unlikely(index == IWL_INVALID_STATION)) {
  445. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  446. return index;
  447. }
  448. if (priv->stations[index].used &&
  449. !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
  450. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  451. return index;
  452. }
  453. IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
  454. station = &priv->stations[index];
  455. station->used = 1;
  456. priv->num_stations++;
  457. /* Set up the REPLY_ADD_STA command to send to device */
  458. memset(&station->sta, 0, sizeof(struct iwl4965_addsta_cmd));
  459. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  460. station->sta.mode = 0;
  461. station->sta.sta.sta_id = index;
  462. station->sta.station_flags = 0;
  463. #ifdef CONFIG_IWL4965_HT
  464. /* BCAST station and IBSS stations do not work in HT mode */
  465. if (index != priv->hw_setting.bcast_sta_id &&
  466. priv->iw_mode != IEEE80211_IF_TYPE_IBSS)
  467. iwl4965_set_ht_add_station(priv, index,
  468. (struct ieee80211_ht_info *) ht_data);
  469. #endif /*CONFIG_IWL4965_HT*/
  470. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  471. /* Add station to device's station table */
  472. iwl4965_send_add_station(priv, &station->sta, flags);
  473. return index;
  474. }
  475. /*************** DRIVER STATUS FUNCTIONS *****/
  476. static inline int iwl4965_is_ready(struct iwl4965_priv *priv)
  477. {
  478. /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
  479. * set but EXIT_PENDING is not */
  480. return test_bit(STATUS_READY, &priv->status) &&
  481. test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
  482. !test_bit(STATUS_EXIT_PENDING, &priv->status);
  483. }
  484. static inline int iwl4965_is_alive(struct iwl4965_priv *priv)
  485. {
  486. return test_bit(STATUS_ALIVE, &priv->status);
  487. }
  488. static inline int iwl4965_is_init(struct iwl4965_priv *priv)
  489. {
  490. return test_bit(STATUS_INIT, &priv->status);
  491. }
  492. static inline int iwl4965_is_rfkill(struct iwl4965_priv *priv)
  493. {
  494. return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
  495. test_bit(STATUS_RF_KILL_SW, &priv->status);
  496. }
  497. static inline int iwl4965_is_ready_rf(struct iwl4965_priv *priv)
  498. {
  499. if (iwl4965_is_rfkill(priv))
  500. return 0;
  501. return iwl4965_is_ready(priv);
  502. }
  503. /*************** HOST COMMAND QUEUE FUNCTIONS *****/
  504. #define IWL_CMD(x) case x : return #x
  505. static const char *get_cmd_string(u8 cmd)
  506. {
  507. switch (cmd) {
  508. IWL_CMD(REPLY_ALIVE);
  509. IWL_CMD(REPLY_ERROR);
  510. IWL_CMD(REPLY_RXON);
  511. IWL_CMD(REPLY_RXON_ASSOC);
  512. IWL_CMD(REPLY_QOS_PARAM);
  513. IWL_CMD(REPLY_RXON_TIMING);
  514. IWL_CMD(REPLY_ADD_STA);
  515. IWL_CMD(REPLY_REMOVE_STA);
  516. IWL_CMD(REPLY_REMOVE_ALL_STA);
  517. IWL_CMD(REPLY_TX);
  518. IWL_CMD(REPLY_RATE_SCALE);
  519. IWL_CMD(REPLY_LEDS_CMD);
  520. IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
  521. IWL_CMD(RADAR_NOTIFICATION);
  522. IWL_CMD(REPLY_QUIET_CMD);
  523. IWL_CMD(REPLY_CHANNEL_SWITCH);
  524. IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
  525. IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
  526. IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
  527. IWL_CMD(POWER_TABLE_CMD);
  528. IWL_CMD(PM_SLEEP_NOTIFICATION);
  529. IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
  530. IWL_CMD(REPLY_SCAN_CMD);
  531. IWL_CMD(REPLY_SCAN_ABORT_CMD);
  532. IWL_CMD(SCAN_START_NOTIFICATION);
  533. IWL_CMD(SCAN_RESULTS_NOTIFICATION);
  534. IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
  535. IWL_CMD(BEACON_NOTIFICATION);
  536. IWL_CMD(REPLY_TX_BEACON);
  537. IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
  538. IWL_CMD(QUIET_NOTIFICATION);
  539. IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
  540. IWL_CMD(MEASURE_ABORT_NOTIFICATION);
  541. IWL_CMD(REPLY_BT_CONFIG);
  542. IWL_CMD(REPLY_STATISTICS_CMD);
  543. IWL_CMD(STATISTICS_NOTIFICATION);
  544. IWL_CMD(REPLY_CARD_STATE_CMD);
  545. IWL_CMD(CARD_STATE_NOTIFICATION);
  546. IWL_CMD(MISSED_BEACONS_NOTIFICATION);
  547. IWL_CMD(REPLY_CT_KILL_CONFIG_CMD);
  548. IWL_CMD(SENSITIVITY_CMD);
  549. IWL_CMD(REPLY_PHY_CALIBRATION_CMD);
  550. IWL_CMD(REPLY_RX_PHY_CMD);
  551. IWL_CMD(REPLY_RX_MPDU_CMD);
  552. IWL_CMD(REPLY_4965_RX);
  553. IWL_CMD(REPLY_COMPRESSED_BA);
  554. default:
  555. return "UNKNOWN";
  556. }
  557. }
  558. #define HOST_COMPLETE_TIMEOUT (HZ / 2)
  559. /**
  560. * iwl4965_enqueue_hcmd - enqueue a uCode command
  561. * @priv: device private data point
  562. * @cmd: a point to the ucode command structure
  563. *
  564. * The function returns < 0 values to indicate the operation is
  565. * failed. On success, it turns the index (> 0) of command in the
  566. * command queue.
  567. */
  568. static int iwl4965_enqueue_hcmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  569. {
  570. struct iwl4965_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
  571. struct iwl4965_queue *q = &txq->q;
  572. struct iwl4965_tfd_frame *tfd;
  573. u32 *control_flags;
  574. struct iwl4965_cmd *out_cmd;
  575. u32 idx;
  576. u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
  577. dma_addr_t phys_addr;
  578. int ret;
  579. unsigned long flags;
  580. /* If any of the command structures end up being larger than
  581. * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
  582. * we will need to increase the size of the TFD entries */
  583. BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
  584. !(cmd->meta.flags & CMD_SIZE_HUGE));
  585. if (iwl4965_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
  586. IWL_ERROR("No space for Tx\n");
  587. return -ENOSPC;
  588. }
  589. spin_lock_irqsave(&priv->hcmd_lock, flags);
  590. tfd = &txq->bd[q->write_ptr];
  591. memset(tfd, 0, sizeof(*tfd));
  592. control_flags = (u32 *) tfd;
  593. idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
  594. out_cmd = &txq->cmd[idx];
  595. out_cmd->hdr.cmd = cmd->id;
  596. memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
  597. memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
  598. /* At this point, the out_cmd now has all of the incoming cmd
  599. * information */
  600. out_cmd->hdr.flags = 0;
  601. out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
  602. INDEX_TO_SEQ(q->write_ptr));
  603. if (out_cmd->meta.flags & CMD_SIZE_HUGE)
  604. out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
  605. phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
  606. offsetof(struct iwl4965_cmd, hdr);
  607. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
  608. IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
  609. "%d bytes at %d[%d]:%d\n",
  610. get_cmd_string(out_cmd->hdr.cmd),
  611. out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
  612. fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
  613. txq->need_update = 1;
  614. /* Set up entry in queue's byte count circular buffer */
  615. ret = iwl4965_tx_queue_update_wr_ptr(priv, txq, 0);
  616. /* Increment and update queue's write index */
  617. q->write_ptr = iwl4965_queue_inc_wrap(q->write_ptr, q->n_bd);
  618. iwl4965_tx_queue_update_write_ptr(priv, txq);
  619. spin_unlock_irqrestore(&priv->hcmd_lock, flags);
  620. return ret ? ret : idx;
  621. }
  622. static int iwl4965_send_cmd_async(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  623. {
  624. int ret;
  625. BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
  626. /* An asynchronous command can not expect an SKB to be set. */
  627. BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
  628. /* An asynchronous command MUST have a callback. */
  629. BUG_ON(!cmd->meta.u.callback);
  630. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  631. return -EBUSY;
  632. ret = iwl4965_enqueue_hcmd(priv, cmd);
  633. if (ret < 0) {
  634. IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
  635. get_cmd_string(cmd->id), ret);
  636. return ret;
  637. }
  638. return 0;
  639. }
  640. static int iwl4965_send_cmd_sync(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  641. {
  642. int cmd_idx;
  643. int ret;
  644. static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
  645. BUG_ON(cmd->meta.flags & CMD_ASYNC);
  646. /* A synchronous command can not have a callback set. */
  647. BUG_ON(cmd->meta.u.callback != NULL);
  648. if (atomic_xchg(&entry, 1)) {
  649. IWL_ERROR("Error sending %s: Already sending a host command\n",
  650. get_cmd_string(cmd->id));
  651. return -EBUSY;
  652. }
  653. set_bit(STATUS_HCMD_ACTIVE, &priv->status);
  654. if (cmd->meta.flags & CMD_WANT_SKB)
  655. cmd->meta.source = &cmd->meta;
  656. cmd_idx = iwl4965_enqueue_hcmd(priv, cmd);
  657. if (cmd_idx < 0) {
  658. ret = cmd_idx;
  659. IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
  660. get_cmd_string(cmd->id), ret);
  661. goto out;
  662. }
  663. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  664. !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
  665. HOST_COMPLETE_TIMEOUT);
  666. if (!ret) {
  667. if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
  668. IWL_ERROR("Error sending %s: time out after %dms.\n",
  669. get_cmd_string(cmd->id),
  670. jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
  671. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  672. ret = -ETIMEDOUT;
  673. goto cancel;
  674. }
  675. }
  676. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  677. IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
  678. get_cmd_string(cmd->id));
  679. ret = -ECANCELED;
  680. goto fail;
  681. }
  682. if (test_bit(STATUS_FW_ERROR, &priv->status)) {
  683. IWL_DEBUG_INFO("Command %s failed: FW Error\n",
  684. get_cmd_string(cmd->id));
  685. ret = -EIO;
  686. goto fail;
  687. }
  688. if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
  689. IWL_ERROR("Error: Response NULL in '%s'\n",
  690. get_cmd_string(cmd->id));
  691. ret = -EIO;
  692. goto out;
  693. }
  694. ret = 0;
  695. goto out;
  696. cancel:
  697. if (cmd->meta.flags & CMD_WANT_SKB) {
  698. struct iwl4965_cmd *qcmd;
  699. /* Cancel the CMD_WANT_SKB flag for the cmd in the
  700. * TX cmd queue. Otherwise in case the cmd comes
  701. * in later, it will possibly set an invalid
  702. * address (cmd->meta.source). */
  703. qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
  704. qcmd->meta.flags &= ~CMD_WANT_SKB;
  705. }
  706. fail:
  707. if (cmd->meta.u.skb) {
  708. dev_kfree_skb_any(cmd->meta.u.skb);
  709. cmd->meta.u.skb = NULL;
  710. }
  711. out:
  712. atomic_set(&entry, 0);
  713. return ret;
  714. }
  715. int iwl4965_send_cmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  716. {
  717. if (cmd->meta.flags & CMD_ASYNC)
  718. return iwl4965_send_cmd_async(priv, cmd);
  719. return iwl4965_send_cmd_sync(priv, cmd);
  720. }
  721. int iwl4965_send_cmd_pdu(struct iwl4965_priv *priv, u8 id, u16 len, const void *data)
  722. {
  723. struct iwl4965_host_cmd cmd = {
  724. .id = id,
  725. .len = len,
  726. .data = data,
  727. };
  728. return iwl4965_send_cmd_sync(priv, &cmd);
  729. }
  730. static int __must_check iwl4965_send_cmd_u32(struct iwl4965_priv *priv, u8 id, u32 val)
  731. {
  732. struct iwl4965_host_cmd cmd = {
  733. .id = id,
  734. .len = sizeof(val),
  735. .data = &val,
  736. };
  737. return iwl4965_send_cmd_sync(priv, &cmd);
  738. }
  739. int iwl4965_send_statistics_request(struct iwl4965_priv *priv)
  740. {
  741. return iwl4965_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
  742. }
  743. /**
  744. * iwl4965_rxon_add_station - add station into station table.
  745. *
  746. * there is only one AP station with id= IWL_AP_ID
  747. * NOTE: mutex must be held before calling this fnction
  748. */
  749. static int iwl4965_rxon_add_station(struct iwl4965_priv *priv,
  750. const u8 *addr, int is_ap)
  751. {
  752. u8 sta_id;
  753. /* Add station to device's station table */
  754. #ifdef CONFIG_IWL4965_HT
  755. struct ieee80211_conf *conf = &priv->hw->conf;
  756. struct ieee80211_ht_info *cur_ht_config = &conf->ht_conf;
  757. if ((is_ap) &&
  758. (conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE) &&
  759. (priv->iw_mode == IEEE80211_IF_TYPE_STA))
  760. sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
  761. 0, cur_ht_config);
  762. else
  763. #endif /* CONFIG_IWL4965_HT */
  764. sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
  765. 0, NULL);
  766. /* Set up default rate scaling table in device's station table */
  767. iwl4965_add_station(priv, addr, is_ap);
  768. return sta_id;
  769. }
  770. /**
  771. * iwl4965_set_rxon_channel - Set the phymode and channel values in staging RXON
  772. * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
  773. * @channel: Any channel valid for the requested phymode
  774. * In addition to setting the staging RXON, priv->phymode is also set.
  775. *
  776. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  777. * in the staging RXON flag structure based on the phymode
  778. */
  779. static int iwl4965_set_rxon_channel(struct iwl4965_priv *priv, u8 phymode,
  780. u16 channel)
  781. {
  782. if (!iwl4965_get_channel_info(priv, phymode, channel)) {
  783. IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
  784. channel, phymode);
  785. return -EINVAL;
  786. }
  787. if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
  788. (priv->phymode == phymode))
  789. return 0;
  790. priv->staging_rxon.channel = cpu_to_le16(channel);
  791. if (phymode == MODE_IEEE80211A)
  792. priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
  793. else
  794. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  795. priv->phymode = phymode;
  796. IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, phymode);
  797. return 0;
  798. }
  799. /**
  800. * iwl4965_check_rxon_cmd - validate RXON structure is valid
  801. *
  802. * NOTE: This is really only useful during development and can eventually
  803. * be #ifdef'd out once the driver is stable and folks aren't actively
  804. * making changes
  805. */
  806. static int iwl4965_check_rxon_cmd(struct iwl4965_rxon_cmd *rxon)
  807. {
  808. int error = 0;
  809. int counter = 1;
  810. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  811. error |= le32_to_cpu(rxon->flags &
  812. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  813. RXON_FLG_RADAR_DETECT_MSK));
  814. if (error)
  815. IWL_WARNING("check 24G fields %d | %d\n",
  816. counter++, error);
  817. } else {
  818. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  819. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  820. if (error)
  821. IWL_WARNING("check 52 fields %d | %d\n",
  822. counter++, error);
  823. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  824. if (error)
  825. IWL_WARNING("check 52 CCK %d | %d\n",
  826. counter++, error);
  827. }
  828. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  829. if (error)
  830. IWL_WARNING("check mac addr %d | %d\n", counter++, error);
  831. /* make sure basic rates 6Mbps and 1Mbps are supported */
  832. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  833. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  834. if (error)
  835. IWL_WARNING("check basic rate %d | %d\n", counter++, error);
  836. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  837. if (error)
  838. IWL_WARNING("check assoc id %d | %d\n", counter++, error);
  839. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  840. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  841. if (error)
  842. IWL_WARNING("check CCK and short slot %d | %d\n",
  843. counter++, error);
  844. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  845. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  846. if (error)
  847. IWL_WARNING("check CCK & auto detect %d | %d\n",
  848. counter++, error);
  849. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  850. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  851. if (error)
  852. IWL_WARNING("check TGG and auto detect %d | %d\n",
  853. counter++, error);
  854. if (error)
  855. IWL_WARNING("Tuning to channel %d\n",
  856. le16_to_cpu(rxon->channel));
  857. if (error) {
  858. IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
  859. return -1;
  860. }
  861. return 0;
  862. }
  863. /**
  864. * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  865. * @priv: staging_rxon is compared to active_rxon
  866. *
  867. * If the RXON structure is changing enough to require a new tune,
  868. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  869. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  870. */
  871. static int iwl4965_full_rxon_required(struct iwl4965_priv *priv)
  872. {
  873. /* These items are only settable from the full RXON command */
  874. if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
  875. compare_ether_addr(priv->staging_rxon.bssid_addr,
  876. priv->active_rxon.bssid_addr) ||
  877. compare_ether_addr(priv->staging_rxon.node_addr,
  878. priv->active_rxon.node_addr) ||
  879. compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
  880. priv->active_rxon.wlap_bssid_addr) ||
  881. (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
  882. (priv->staging_rxon.channel != priv->active_rxon.channel) ||
  883. (priv->staging_rxon.air_propagation !=
  884. priv->active_rxon.air_propagation) ||
  885. (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
  886. priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
  887. (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
  888. priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
  889. (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
  890. (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
  891. return 1;
  892. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  893. * be updated with the RXON_ASSOC command -- however only some
  894. * flag transitions are allowed using RXON_ASSOC */
  895. /* Check if we are not switching bands */
  896. if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  897. (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
  898. return 1;
  899. /* Check if we are switching association toggle */
  900. if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  901. (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  902. return 1;
  903. return 0;
  904. }
  905. static int iwl4965_send_rxon_assoc(struct iwl4965_priv *priv)
  906. {
  907. int rc = 0;
  908. struct iwl4965_rx_packet *res = NULL;
  909. struct iwl4965_rxon_assoc_cmd rxon_assoc;
  910. struct iwl4965_host_cmd cmd = {
  911. .id = REPLY_RXON_ASSOC,
  912. .len = sizeof(rxon_assoc),
  913. .meta.flags = CMD_WANT_SKB,
  914. .data = &rxon_assoc,
  915. };
  916. const struct iwl4965_rxon_cmd *rxon1 = &priv->staging_rxon;
  917. const struct iwl4965_rxon_cmd *rxon2 = &priv->active_rxon;
  918. if ((rxon1->flags == rxon2->flags) &&
  919. (rxon1->filter_flags == rxon2->filter_flags) &&
  920. (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
  921. (rxon1->ofdm_ht_single_stream_basic_rates ==
  922. rxon2->ofdm_ht_single_stream_basic_rates) &&
  923. (rxon1->ofdm_ht_dual_stream_basic_rates ==
  924. rxon2->ofdm_ht_dual_stream_basic_rates) &&
  925. (rxon1->rx_chain == rxon2->rx_chain) &&
  926. (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
  927. IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
  928. return 0;
  929. }
  930. rxon_assoc.flags = priv->staging_rxon.flags;
  931. rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
  932. rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
  933. rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
  934. rxon_assoc.reserved = 0;
  935. rxon_assoc.ofdm_ht_single_stream_basic_rates =
  936. priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
  937. rxon_assoc.ofdm_ht_dual_stream_basic_rates =
  938. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
  939. rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
  940. rc = iwl4965_send_cmd_sync(priv, &cmd);
  941. if (rc)
  942. return rc;
  943. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  944. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  945. IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
  946. rc = -EIO;
  947. }
  948. priv->alloc_rxb_skb--;
  949. dev_kfree_skb_any(cmd.meta.u.skb);
  950. return rc;
  951. }
  952. /**
  953. * iwl4965_commit_rxon - commit staging_rxon to hardware
  954. *
  955. * The RXON command in staging_rxon is committed to the hardware and
  956. * the active_rxon structure is updated with the new data. This
  957. * function correctly transitions out of the RXON_ASSOC_MSK state if
  958. * a HW tune is required based on the RXON structure changes.
  959. */
  960. static int iwl4965_commit_rxon(struct iwl4965_priv *priv)
  961. {
  962. /* cast away the const for active_rxon in this function */
  963. struct iwl4965_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
  964. DECLARE_MAC_BUF(mac);
  965. int rc = 0;
  966. if (!iwl4965_is_alive(priv))
  967. return -1;
  968. /* always get timestamp with Rx frame */
  969. priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
  970. rc = iwl4965_check_rxon_cmd(&priv->staging_rxon);
  971. if (rc) {
  972. IWL_ERROR("Invalid RXON configuration. Not committing.\n");
  973. return -EINVAL;
  974. }
  975. /* If we don't need to send a full RXON, we can use
  976. * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
  977. * and other flags for the current radio configuration. */
  978. if (!iwl4965_full_rxon_required(priv)) {
  979. rc = iwl4965_send_rxon_assoc(priv);
  980. if (rc) {
  981. IWL_ERROR("Error setting RXON_ASSOC "
  982. "configuration (%d).\n", rc);
  983. return rc;
  984. }
  985. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  986. return 0;
  987. }
  988. /* station table will be cleared */
  989. priv->assoc_station_added = 0;
  990. #ifdef CONFIG_IWL4965_SENSITIVITY
  991. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  992. if (!priv->error_recovering)
  993. priv->start_calib = 0;
  994. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  995. #endif /* CONFIG_IWL4965_SENSITIVITY */
  996. /* If we are currently associated and the new config requires
  997. * an RXON_ASSOC and the new config wants the associated mask enabled,
  998. * we must clear the associated from the active configuration
  999. * before we apply the new config */
  1000. if (iwl4965_is_associated(priv) &&
  1001. (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
  1002. IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
  1003. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1004. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
  1005. sizeof(struct iwl4965_rxon_cmd),
  1006. &priv->active_rxon);
  1007. /* If the mask clearing failed then we set
  1008. * active_rxon back to what it was previously */
  1009. if (rc) {
  1010. active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
  1011. IWL_ERROR("Error clearing ASSOC_MSK on current "
  1012. "configuration (%d).\n", rc);
  1013. return rc;
  1014. }
  1015. }
  1016. IWL_DEBUG_INFO("Sending RXON\n"
  1017. "* with%s RXON_FILTER_ASSOC_MSK\n"
  1018. "* channel = %d\n"
  1019. "* bssid = %s\n",
  1020. ((priv->staging_rxon.filter_flags &
  1021. RXON_FILTER_ASSOC_MSK) ? "" : "out"),
  1022. le16_to_cpu(priv->staging_rxon.channel),
  1023. print_mac(mac, priv->staging_rxon.bssid_addr));
  1024. /* Apply the new configuration */
  1025. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
  1026. sizeof(struct iwl4965_rxon_cmd), &priv->staging_rxon);
  1027. if (rc) {
  1028. IWL_ERROR("Error setting new configuration (%d).\n", rc);
  1029. return rc;
  1030. }
  1031. iwl4965_clear_stations_table(priv);
  1032. #ifdef CONFIG_IWL4965_SENSITIVITY
  1033. if (!priv->error_recovering)
  1034. priv->start_calib = 0;
  1035. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  1036. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  1037. #endif /* CONFIG_IWL4965_SENSITIVITY */
  1038. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  1039. /* If we issue a new RXON command which required a tune then we must
  1040. * send a new TXPOWER command or we won't be able to Tx any frames */
  1041. rc = iwl4965_hw_reg_send_txpower(priv);
  1042. if (rc) {
  1043. IWL_ERROR("Error setting Tx power (%d).\n", rc);
  1044. return rc;
  1045. }
  1046. /* Add the broadcast address so we can send broadcast frames */
  1047. if (iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0) ==
  1048. IWL_INVALID_STATION) {
  1049. IWL_ERROR("Error adding BROADCAST address for transmit.\n");
  1050. return -EIO;
  1051. }
  1052. /* If we have set the ASSOC_MSK and we are in BSS mode then
  1053. * add the IWL_AP_ID to the station rate table */
  1054. if (iwl4965_is_associated(priv) &&
  1055. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  1056. if (iwl4965_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
  1057. == IWL_INVALID_STATION) {
  1058. IWL_ERROR("Error adding AP address for transmit.\n");
  1059. return -EIO;
  1060. }
  1061. priv->assoc_station_added = 1;
  1062. }
  1063. return 0;
  1064. }
  1065. static int iwl4965_send_bt_config(struct iwl4965_priv *priv)
  1066. {
  1067. struct iwl4965_bt_cmd bt_cmd = {
  1068. .flags = 3,
  1069. .lead_time = 0xAA,
  1070. .max_kill = 1,
  1071. .kill_ack_mask = 0,
  1072. .kill_cts_mask = 0,
  1073. };
  1074. return iwl4965_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  1075. sizeof(struct iwl4965_bt_cmd), &bt_cmd);
  1076. }
  1077. static int iwl4965_send_scan_abort(struct iwl4965_priv *priv)
  1078. {
  1079. int rc = 0;
  1080. struct iwl4965_rx_packet *res;
  1081. struct iwl4965_host_cmd cmd = {
  1082. .id = REPLY_SCAN_ABORT_CMD,
  1083. .meta.flags = CMD_WANT_SKB,
  1084. };
  1085. /* If there isn't a scan actively going on in the hardware
  1086. * then we are in between scan bands and not actually
  1087. * actively scanning, so don't send the abort command */
  1088. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1089. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1090. return 0;
  1091. }
  1092. rc = iwl4965_send_cmd_sync(priv, &cmd);
  1093. if (rc) {
  1094. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1095. return rc;
  1096. }
  1097. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  1098. if (res->u.status != CAN_ABORT_STATUS) {
  1099. /* The scan abort will return 1 for success or
  1100. * 2 for "failure". A failure condition can be
  1101. * due to simply not being in an active scan which
  1102. * can occur if we send the scan abort before we
  1103. * the microcode has notified us that a scan is
  1104. * completed. */
  1105. IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
  1106. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1107. clear_bit(STATUS_SCAN_HW, &priv->status);
  1108. }
  1109. dev_kfree_skb_any(cmd.meta.u.skb);
  1110. return rc;
  1111. }
  1112. static int iwl4965_card_state_sync_callback(struct iwl4965_priv *priv,
  1113. struct iwl4965_cmd *cmd,
  1114. struct sk_buff *skb)
  1115. {
  1116. return 1;
  1117. }
  1118. /*
  1119. * CARD_STATE_CMD
  1120. *
  1121. * Use: Sets the device's internal card state to enable, disable, or halt
  1122. *
  1123. * When in the 'enable' state the card operates as normal.
  1124. * When in the 'disable' state, the card enters into a low power mode.
  1125. * When in the 'halt' state, the card is shut down and must be fully
  1126. * restarted to come back on.
  1127. */
  1128. static int iwl4965_send_card_state(struct iwl4965_priv *priv, u32 flags, u8 meta_flag)
  1129. {
  1130. struct iwl4965_host_cmd cmd = {
  1131. .id = REPLY_CARD_STATE_CMD,
  1132. .len = sizeof(u32),
  1133. .data = &flags,
  1134. .meta.flags = meta_flag,
  1135. };
  1136. if (meta_flag & CMD_ASYNC)
  1137. cmd.meta.u.callback = iwl4965_card_state_sync_callback;
  1138. return iwl4965_send_cmd(priv, &cmd);
  1139. }
  1140. static int iwl4965_add_sta_sync_callback(struct iwl4965_priv *priv,
  1141. struct iwl4965_cmd *cmd, struct sk_buff *skb)
  1142. {
  1143. struct iwl4965_rx_packet *res = NULL;
  1144. if (!skb) {
  1145. IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
  1146. return 1;
  1147. }
  1148. res = (struct iwl4965_rx_packet *)skb->data;
  1149. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1150. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1151. res->hdr.flags);
  1152. return 1;
  1153. }
  1154. switch (res->u.add_sta.status) {
  1155. case ADD_STA_SUCCESS_MSK:
  1156. break;
  1157. default:
  1158. break;
  1159. }
  1160. /* We didn't cache the SKB; let the caller free it */
  1161. return 1;
  1162. }
  1163. int iwl4965_send_add_station(struct iwl4965_priv *priv,
  1164. struct iwl4965_addsta_cmd *sta, u8 flags)
  1165. {
  1166. struct iwl4965_rx_packet *res = NULL;
  1167. int rc = 0;
  1168. struct iwl4965_host_cmd cmd = {
  1169. .id = REPLY_ADD_STA,
  1170. .len = sizeof(struct iwl4965_addsta_cmd),
  1171. .meta.flags = flags,
  1172. .data = sta,
  1173. };
  1174. if (flags & CMD_ASYNC)
  1175. cmd.meta.u.callback = iwl4965_add_sta_sync_callback;
  1176. else
  1177. cmd.meta.flags |= CMD_WANT_SKB;
  1178. rc = iwl4965_send_cmd(priv, &cmd);
  1179. if (rc || (flags & CMD_ASYNC))
  1180. return rc;
  1181. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  1182. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1183. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1184. res->hdr.flags);
  1185. rc = -EIO;
  1186. }
  1187. if (rc == 0) {
  1188. switch (res->u.add_sta.status) {
  1189. case ADD_STA_SUCCESS_MSK:
  1190. IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
  1191. break;
  1192. default:
  1193. rc = -EIO;
  1194. IWL_WARNING("REPLY_ADD_STA failed\n");
  1195. break;
  1196. }
  1197. }
  1198. priv->alloc_rxb_skb--;
  1199. dev_kfree_skb_any(cmd.meta.u.skb);
  1200. return rc;
  1201. }
  1202. static int iwl4965_update_sta_key_info(struct iwl4965_priv *priv,
  1203. struct ieee80211_key_conf *keyconf,
  1204. u8 sta_id)
  1205. {
  1206. unsigned long flags;
  1207. __le16 key_flags = 0;
  1208. switch (keyconf->alg) {
  1209. case ALG_CCMP:
  1210. key_flags |= STA_KEY_FLG_CCMP;
  1211. key_flags |= cpu_to_le16(
  1212. keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  1213. key_flags &= ~STA_KEY_FLG_INVALID;
  1214. break;
  1215. case ALG_TKIP:
  1216. case ALG_WEP:
  1217. default:
  1218. return -EINVAL;
  1219. }
  1220. spin_lock_irqsave(&priv->sta_lock, flags);
  1221. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  1222. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  1223. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  1224. keyconf->keylen);
  1225. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  1226. keyconf->keylen);
  1227. priv->stations[sta_id].sta.key.key_flags = key_flags;
  1228. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1229. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1230. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1231. IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
  1232. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1233. return 0;
  1234. }
  1235. static int iwl4965_clear_sta_key_info(struct iwl4965_priv *priv, u8 sta_id)
  1236. {
  1237. unsigned long flags;
  1238. spin_lock_irqsave(&priv->sta_lock, flags);
  1239. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl4965_hw_key));
  1240. memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl4965_keyinfo));
  1241. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  1242. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1243. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1244. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1245. IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
  1246. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1247. return 0;
  1248. }
  1249. static void iwl4965_clear_free_frames(struct iwl4965_priv *priv)
  1250. {
  1251. struct list_head *element;
  1252. IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
  1253. priv->frames_count);
  1254. while (!list_empty(&priv->free_frames)) {
  1255. element = priv->free_frames.next;
  1256. list_del(element);
  1257. kfree(list_entry(element, struct iwl4965_frame, list));
  1258. priv->frames_count--;
  1259. }
  1260. if (priv->frames_count) {
  1261. IWL_WARNING("%d frames still in use. Did we lose one?\n",
  1262. priv->frames_count);
  1263. priv->frames_count = 0;
  1264. }
  1265. }
  1266. static struct iwl4965_frame *iwl4965_get_free_frame(struct iwl4965_priv *priv)
  1267. {
  1268. struct iwl4965_frame *frame;
  1269. struct list_head *element;
  1270. if (list_empty(&priv->free_frames)) {
  1271. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  1272. if (!frame) {
  1273. IWL_ERROR("Could not allocate frame!\n");
  1274. return NULL;
  1275. }
  1276. priv->frames_count++;
  1277. return frame;
  1278. }
  1279. element = priv->free_frames.next;
  1280. list_del(element);
  1281. return list_entry(element, struct iwl4965_frame, list);
  1282. }
  1283. static void iwl4965_free_frame(struct iwl4965_priv *priv, struct iwl4965_frame *frame)
  1284. {
  1285. memset(frame, 0, sizeof(*frame));
  1286. list_add(&frame->list, &priv->free_frames);
  1287. }
  1288. unsigned int iwl4965_fill_beacon_frame(struct iwl4965_priv *priv,
  1289. struct ieee80211_hdr *hdr,
  1290. const u8 *dest, int left)
  1291. {
  1292. if (!iwl4965_is_associated(priv) || !priv->ibss_beacon ||
  1293. ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
  1294. (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
  1295. return 0;
  1296. if (priv->ibss_beacon->len > left)
  1297. return 0;
  1298. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  1299. return priv->ibss_beacon->len;
  1300. }
  1301. int iwl4965_rate_index_from_plcp(int plcp)
  1302. {
  1303. int i = 0;
  1304. /* 4965 HT rate format */
  1305. if (plcp & RATE_MCS_HT_MSK) {
  1306. i = (plcp & 0xff);
  1307. if (i >= IWL_RATE_MIMO_6M_PLCP)
  1308. i = i - IWL_RATE_MIMO_6M_PLCP;
  1309. i += IWL_FIRST_OFDM_RATE;
  1310. /* skip 9M not supported in ht*/
  1311. if (i >= IWL_RATE_9M_INDEX)
  1312. i += 1;
  1313. if ((i >= IWL_FIRST_OFDM_RATE) &&
  1314. (i <= IWL_LAST_OFDM_RATE))
  1315. return i;
  1316. /* 4965 legacy rate format, search for match in table */
  1317. } else {
  1318. for (i = 0; i < ARRAY_SIZE(iwl4965_rates); i++)
  1319. if (iwl4965_rates[i].plcp == (plcp &0xFF))
  1320. return i;
  1321. }
  1322. return -1;
  1323. }
  1324. static u8 iwl4965_rate_get_lowest_plcp(int rate_mask)
  1325. {
  1326. u8 i;
  1327. for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
  1328. i = iwl4965_rates[i].next_ieee) {
  1329. if (rate_mask & (1 << i))
  1330. return iwl4965_rates[i].plcp;
  1331. }
  1332. return IWL_RATE_INVALID;
  1333. }
  1334. static int iwl4965_send_beacon_cmd(struct iwl4965_priv *priv)
  1335. {
  1336. struct iwl4965_frame *frame;
  1337. unsigned int frame_size;
  1338. int rc;
  1339. u8 rate;
  1340. frame = iwl4965_get_free_frame(priv);
  1341. if (!frame) {
  1342. IWL_ERROR("Could not obtain free frame buffer for beacon "
  1343. "command.\n");
  1344. return -ENOMEM;
  1345. }
  1346. if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
  1347. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic &
  1348. 0xFF0);
  1349. if (rate == IWL_INVALID_RATE)
  1350. rate = IWL_RATE_6M_PLCP;
  1351. } else {
  1352. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
  1353. if (rate == IWL_INVALID_RATE)
  1354. rate = IWL_RATE_1M_PLCP;
  1355. }
  1356. frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
  1357. rc = iwl4965_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  1358. &frame->u.cmd[0]);
  1359. iwl4965_free_frame(priv, frame);
  1360. return rc;
  1361. }
  1362. /******************************************************************************
  1363. *
  1364. * EEPROM related functions
  1365. *
  1366. ******************************************************************************/
  1367. static void get_eeprom_mac(struct iwl4965_priv *priv, u8 *mac)
  1368. {
  1369. memcpy(mac, priv->eeprom.mac_address, 6);
  1370. }
  1371. /**
  1372. * iwl4965_eeprom_init - read EEPROM contents
  1373. *
  1374. * Load the EEPROM contents from adapter into priv->eeprom
  1375. *
  1376. * NOTE: This routine uses the non-debug IO access functions.
  1377. */
  1378. int iwl4965_eeprom_init(struct iwl4965_priv *priv)
  1379. {
  1380. __le16 *e = (__le16 *)&priv->eeprom;
  1381. u32 gp = iwl4965_read32(priv, CSR_EEPROM_GP);
  1382. u32 r;
  1383. int sz = sizeof(priv->eeprom);
  1384. int rc;
  1385. int i;
  1386. u16 addr;
  1387. /* The EEPROM structure has several padding buffers within it
  1388. * and when adding new EEPROM maps is subject to programmer errors
  1389. * which may be very difficult to identify without explicitly
  1390. * checking the resulting size of the eeprom map. */
  1391. BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
  1392. if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
  1393. IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
  1394. return -ENOENT;
  1395. }
  1396. /* Make sure driver (instead of uCode) is allowed to read EEPROM */
  1397. rc = iwl4965_eeprom_acquire_semaphore(priv);
  1398. if (rc < 0) {
  1399. IWL_ERROR("Failed to acquire EEPROM semaphore.\n");
  1400. return -ENOENT;
  1401. }
  1402. /* eeprom is an array of 16bit values */
  1403. for (addr = 0; addr < sz; addr += sizeof(u16)) {
  1404. _iwl4965_write32(priv, CSR_EEPROM_REG, addr << 1);
  1405. _iwl4965_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
  1406. for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
  1407. i += IWL_EEPROM_ACCESS_DELAY) {
  1408. r = _iwl4965_read_direct32(priv, CSR_EEPROM_REG);
  1409. if (r & CSR_EEPROM_REG_READ_VALID_MSK)
  1410. break;
  1411. udelay(IWL_EEPROM_ACCESS_DELAY);
  1412. }
  1413. if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
  1414. IWL_ERROR("Time out reading EEPROM[%d]", addr);
  1415. rc = -ETIMEDOUT;
  1416. goto done;
  1417. }
  1418. e[addr / 2] = cpu_to_le16(r >> 16);
  1419. }
  1420. rc = 0;
  1421. done:
  1422. iwl4965_eeprom_release_semaphore(priv);
  1423. return rc;
  1424. }
  1425. /******************************************************************************
  1426. *
  1427. * Misc. internal state and helper functions
  1428. *
  1429. ******************************************************************************/
  1430. #ifdef CONFIG_IWL4965_DEBUG
  1431. /**
  1432. * iwl4965_report_frame - dump frame to syslog during debug sessions
  1433. *
  1434. * You may hack this function to show different aspects of received frames,
  1435. * including selective frame dumps.
  1436. * group100 parameter selects whether to show 1 out of 100 good frames.
  1437. *
  1438. * TODO: This was originally written for 3945, need to audit for
  1439. * proper operation with 4965.
  1440. */
  1441. void iwl4965_report_frame(struct iwl4965_priv *priv,
  1442. struct iwl4965_rx_packet *pkt,
  1443. struct ieee80211_hdr *header, int group100)
  1444. {
  1445. u32 to_us;
  1446. u32 print_summary = 0;
  1447. u32 print_dump = 0; /* set to 1 to dump all frames' contents */
  1448. u32 hundred = 0;
  1449. u32 dataframe = 0;
  1450. u16 fc;
  1451. u16 seq_ctl;
  1452. u16 channel;
  1453. u16 phy_flags;
  1454. int rate_sym;
  1455. u16 length;
  1456. u16 status;
  1457. u16 bcn_tmr;
  1458. u32 tsf_low;
  1459. u64 tsf;
  1460. u8 rssi;
  1461. u8 agc;
  1462. u16 sig_avg;
  1463. u16 noise_diff;
  1464. struct iwl4965_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
  1465. struct iwl4965_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
  1466. struct iwl4965_rx_frame_end *rx_end = IWL_RX_END(pkt);
  1467. u8 *data = IWL_RX_DATA(pkt);
  1468. /* MAC header */
  1469. fc = le16_to_cpu(header->frame_control);
  1470. seq_ctl = le16_to_cpu(header->seq_ctrl);
  1471. /* metadata */
  1472. channel = le16_to_cpu(rx_hdr->channel);
  1473. phy_flags = le16_to_cpu(rx_hdr->phy_flags);
  1474. rate_sym = rx_hdr->rate;
  1475. length = le16_to_cpu(rx_hdr->len);
  1476. /* end-of-frame status and timestamp */
  1477. status = le32_to_cpu(rx_end->status);
  1478. bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
  1479. tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
  1480. tsf = le64_to_cpu(rx_end->timestamp);
  1481. /* signal statistics */
  1482. rssi = rx_stats->rssi;
  1483. agc = rx_stats->agc;
  1484. sig_avg = le16_to_cpu(rx_stats->sig_avg);
  1485. noise_diff = le16_to_cpu(rx_stats->noise_diff);
  1486. to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
  1487. /* if data frame is to us and all is good,
  1488. * (optionally) print summary for only 1 out of every 100 */
  1489. if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
  1490. (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
  1491. dataframe = 1;
  1492. if (!group100)
  1493. print_summary = 1; /* print each frame */
  1494. else if (priv->framecnt_to_us < 100) {
  1495. priv->framecnt_to_us++;
  1496. print_summary = 0;
  1497. } else {
  1498. priv->framecnt_to_us = 0;
  1499. print_summary = 1;
  1500. hundred = 1;
  1501. }
  1502. } else {
  1503. /* print summary for all other frames */
  1504. print_summary = 1;
  1505. }
  1506. if (print_summary) {
  1507. char *title;
  1508. u32 rate;
  1509. if (hundred)
  1510. title = "100Frames";
  1511. else if (fc & IEEE80211_FCTL_RETRY)
  1512. title = "Retry";
  1513. else if (ieee80211_is_assoc_response(fc))
  1514. title = "AscRsp";
  1515. else if (ieee80211_is_reassoc_response(fc))
  1516. title = "RasRsp";
  1517. else if (ieee80211_is_probe_response(fc)) {
  1518. title = "PrbRsp";
  1519. print_dump = 1; /* dump frame contents */
  1520. } else if (ieee80211_is_beacon(fc)) {
  1521. title = "Beacon";
  1522. print_dump = 1; /* dump frame contents */
  1523. } else if (ieee80211_is_atim(fc))
  1524. title = "ATIM";
  1525. else if (ieee80211_is_auth(fc))
  1526. title = "Auth";
  1527. else if (ieee80211_is_deauth(fc))
  1528. title = "DeAuth";
  1529. else if (ieee80211_is_disassoc(fc))
  1530. title = "DisAssoc";
  1531. else
  1532. title = "Frame";
  1533. rate = iwl4965_rate_index_from_plcp(rate_sym);
  1534. if (rate == -1)
  1535. rate = 0;
  1536. else
  1537. rate = iwl4965_rates[rate].ieee / 2;
  1538. /* print frame summary.
  1539. * MAC addresses show just the last byte (for brevity),
  1540. * but you can hack it to show more, if you'd like to. */
  1541. if (dataframe)
  1542. IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
  1543. "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
  1544. title, fc, header->addr1[5],
  1545. length, rssi, channel, rate);
  1546. else {
  1547. /* src/dst addresses assume managed mode */
  1548. IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
  1549. "src=0x%02x, rssi=%u, tim=%lu usec, "
  1550. "phy=0x%02x, chnl=%d\n",
  1551. title, fc, header->addr1[5],
  1552. header->addr3[5], rssi,
  1553. tsf_low - priv->scan_start_tsf,
  1554. phy_flags, channel);
  1555. }
  1556. }
  1557. if (print_dump)
  1558. iwl4965_print_hex_dump(IWL_DL_RX, data, length);
  1559. }
  1560. #endif
  1561. static void iwl4965_unset_hw_setting(struct iwl4965_priv *priv)
  1562. {
  1563. if (priv->hw_setting.shared_virt)
  1564. pci_free_consistent(priv->pci_dev,
  1565. sizeof(struct iwl4965_shared),
  1566. priv->hw_setting.shared_virt,
  1567. priv->hw_setting.shared_phys);
  1568. }
  1569. /**
  1570. * iwl4965_supported_rate_to_ie - fill in the supported rate in IE field
  1571. *
  1572. * return : set the bit for each supported rate insert in ie
  1573. */
  1574. static u16 iwl4965_supported_rate_to_ie(u8 *ie, u16 supported_rate,
  1575. u16 basic_rate, int *left)
  1576. {
  1577. u16 ret_rates = 0, bit;
  1578. int i;
  1579. u8 *cnt = ie;
  1580. u8 *rates = ie + 1;
  1581. for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
  1582. if (bit & supported_rate) {
  1583. ret_rates |= bit;
  1584. rates[*cnt] = iwl4965_rates[i].ieee |
  1585. ((bit & basic_rate) ? 0x80 : 0x00);
  1586. (*cnt)++;
  1587. (*left)--;
  1588. if ((*left <= 0) ||
  1589. (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
  1590. break;
  1591. }
  1592. }
  1593. return ret_rates;
  1594. }
  1595. #ifdef CONFIG_IWL4965_HT
  1596. void static iwl4965_set_ht_capab(struct ieee80211_hw *hw,
  1597. struct ieee80211_ht_cap *ht_cap,
  1598. u8 use_current_config);
  1599. #endif
  1600. /**
  1601. * iwl4965_fill_probe_req - fill in all required fields and IE for probe request
  1602. */
  1603. static u16 iwl4965_fill_probe_req(struct iwl4965_priv *priv,
  1604. struct ieee80211_mgmt *frame,
  1605. int left, int is_direct)
  1606. {
  1607. int len = 0;
  1608. u8 *pos = NULL;
  1609. u16 active_rates, ret_rates, cck_rates, active_rate_basic;
  1610. #ifdef CONFIG_IWL4965_HT
  1611. struct ieee80211_hw_mode *mode;
  1612. #endif /* CONFIG_IWL4965_HT */
  1613. /* Make sure there is enough space for the probe request,
  1614. * two mandatory IEs and the data */
  1615. left -= 24;
  1616. if (left < 0)
  1617. return 0;
  1618. len += 24;
  1619. frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
  1620. memcpy(frame->da, iwl4965_broadcast_addr, ETH_ALEN);
  1621. memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
  1622. memcpy(frame->bssid, iwl4965_broadcast_addr, ETH_ALEN);
  1623. frame->seq_ctrl = 0;
  1624. /* fill in our indirect SSID IE */
  1625. /* ...next IE... */
  1626. left -= 2;
  1627. if (left < 0)
  1628. return 0;
  1629. len += 2;
  1630. pos = &(frame->u.probe_req.variable[0]);
  1631. *pos++ = WLAN_EID_SSID;
  1632. *pos++ = 0;
  1633. /* fill in our direct SSID IE... */
  1634. if (is_direct) {
  1635. /* ...next IE... */
  1636. left -= 2 + priv->essid_len;
  1637. if (left < 0)
  1638. return 0;
  1639. /* ... fill it in... */
  1640. *pos++ = WLAN_EID_SSID;
  1641. *pos++ = priv->essid_len;
  1642. memcpy(pos, priv->essid, priv->essid_len);
  1643. pos += priv->essid_len;
  1644. len += 2 + priv->essid_len;
  1645. }
  1646. /* fill in supported rate */
  1647. /* ...next IE... */
  1648. left -= 2;
  1649. if (left < 0)
  1650. return 0;
  1651. /* ... fill it in... */
  1652. *pos++ = WLAN_EID_SUPP_RATES;
  1653. *pos = 0;
  1654. /* exclude 60M rate */
  1655. active_rates = priv->rates_mask;
  1656. active_rates &= ~IWL_RATE_60M_MASK;
  1657. active_rate_basic = active_rates & IWL_BASIC_RATES_MASK;
  1658. cck_rates = IWL_CCK_RATES_MASK & active_rates;
  1659. ret_rates = iwl4965_supported_rate_to_ie(pos, cck_rates,
  1660. active_rate_basic, &left);
  1661. active_rates &= ~ret_rates;
  1662. ret_rates = iwl4965_supported_rate_to_ie(pos, active_rates,
  1663. active_rate_basic, &left);
  1664. active_rates &= ~ret_rates;
  1665. len += 2 + *pos;
  1666. pos += (*pos) + 1;
  1667. if (active_rates == 0)
  1668. goto fill_end;
  1669. /* fill in supported extended rate */
  1670. /* ...next IE... */
  1671. left -= 2;
  1672. if (left < 0)
  1673. return 0;
  1674. /* ... fill it in... */
  1675. *pos++ = WLAN_EID_EXT_SUPP_RATES;
  1676. *pos = 0;
  1677. iwl4965_supported_rate_to_ie(pos, active_rates,
  1678. active_rate_basic, &left);
  1679. if (*pos > 0)
  1680. len += 2 + *pos;
  1681. #ifdef CONFIG_IWL4965_HT
  1682. mode = priv->hw->conf.mode;
  1683. if (mode->ht_info.ht_supported) {
  1684. pos += (*pos) + 1;
  1685. *pos++ = WLAN_EID_HT_CAPABILITY;
  1686. *pos++ = sizeof(struct ieee80211_ht_cap);
  1687. iwl4965_set_ht_capab(priv->hw,
  1688. (struct ieee80211_ht_cap *)pos, 0);
  1689. len += 2 + sizeof(struct ieee80211_ht_cap);
  1690. }
  1691. #endif /*CONFIG_IWL4965_HT */
  1692. fill_end:
  1693. return (u16)len;
  1694. }
  1695. /*
  1696. * QoS support
  1697. */
  1698. #ifdef CONFIG_IWL4965_QOS
  1699. static int iwl4965_send_qos_params_command(struct iwl4965_priv *priv,
  1700. struct iwl4965_qosparam_cmd *qos)
  1701. {
  1702. return iwl4965_send_cmd_pdu(priv, REPLY_QOS_PARAM,
  1703. sizeof(struct iwl4965_qosparam_cmd), qos);
  1704. }
  1705. static void iwl4965_reset_qos(struct iwl4965_priv *priv)
  1706. {
  1707. u16 cw_min = 15;
  1708. u16 cw_max = 1023;
  1709. u8 aifs = 2;
  1710. u8 is_legacy = 0;
  1711. unsigned long flags;
  1712. int i;
  1713. spin_lock_irqsave(&priv->lock, flags);
  1714. priv->qos_data.qos_active = 0;
  1715. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
  1716. if (priv->qos_data.qos_enable)
  1717. priv->qos_data.qos_active = 1;
  1718. if (!(priv->active_rate & 0xfff0)) {
  1719. cw_min = 31;
  1720. is_legacy = 1;
  1721. }
  1722. } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  1723. if (priv->qos_data.qos_enable)
  1724. priv->qos_data.qos_active = 1;
  1725. } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
  1726. cw_min = 31;
  1727. is_legacy = 1;
  1728. }
  1729. if (priv->qos_data.qos_active)
  1730. aifs = 3;
  1731. priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
  1732. priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
  1733. priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
  1734. priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
  1735. priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
  1736. if (priv->qos_data.qos_active) {
  1737. i = 1;
  1738. priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
  1739. priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
  1740. priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
  1741. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1742. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1743. i = 2;
  1744. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1745. cpu_to_le16((cw_min + 1) / 2 - 1);
  1746. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1747. cpu_to_le16(cw_max);
  1748. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1749. if (is_legacy)
  1750. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1751. cpu_to_le16(6016);
  1752. else
  1753. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1754. cpu_to_le16(3008);
  1755. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1756. i = 3;
  1757. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1758. cpu_to_le16((cw_min + 1) / 4 - 1);
  1759. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1760. cpu_to_le16((cw_max + 1) / 2 - 1);
  1761. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1762. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1763. if (is_legacy)
  1764. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1765. cpu_to_le16(3264);
  1766. else
  1767. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1768. cpu_to_le16(1504);
  1769. } else {
  1770. for (i = 1; i < 4; i++) {
  1771. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1772. cpu_to_le16(cw_min);
  1773. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1774. cpu_to_le16(cw_max);
  1775. priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
  1776. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1777. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1778. }
  1779. }
  1780. IWL_DEBUG_QOS("set QoS to default \n");
  1781. spin_unlock_irqrestore(&priv->lock, flags);
  1782. }
  1783. static void iwl4965_activate_qos(struct iwl4965_priv *priv, u8 force)
  1784. {
  1785. unsigned long flags;
  1786. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1787. return;
  1788. if (!priv->qos_data.qos_enable)
  1789. return;
  1790. spin_lock_irqsave(&priv->lock, flags);
  1791. priv->qos_data.def_qos_parm.qos_flags = 0;
  1792. if (priv->qos_data.qos_cap.q_AP.queue_request &&
  1793. !priv->qos_data.qos_cap.q_AP.txop_request)
  1794. priv->qos_data.def_qos_parm.qos_flags |=
  1795. QOS_PARAM_FLG_TXOP_TYPE_MSK;
  1796. if (priv->qos_data.qos_active)
  1797. priv->qos_data.def_qos_parm.qos_flags |=
  1798. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  1799. #ifdef CONFIG_IWL4965_HT
  1800. if (priv->current_ht_config.is_ht)
  1801. priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
  1802. #endif /* CONFIG_IWL4965_HT */
  1803. spin_unlock_irqrestore(&priv->lock, flags);
  1804. if (force || iwl4965_is_associated(priv)) {
  1805. IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
  1806. priv->qos_data.qos_active,
  1807. priv->qos_data.def_qos_parm.qos_flags);
  1808. iwl4965_send_qos_params_command(priv,
  1809. &(priv->qos_data.def_qos_parm));
  1810. }
  1811. }
  1812. #endif /* CONFIG_IWL4965_QOS */
  1813. /*
  1814. * Power management (not Tx power!) functions
  1815. */
  1816. #define MSEC_TO_USEC 1024
  1817. #define NOSLP __constant_cpu_to_le16(0), 0, 0
  1818. #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
  1819. #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
  1820. #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
  1821. __constant_cpu_to_le32(X1), \
  1822. __constant_cpu_to_le32(X2), \
  1823. __constant_cpu_to_le32(X3), \
  1824. __constant_cpu_to_le32(X4)}
  1825. /* default power management (not Tx power) table values */
  1826. /* for tim 0-10 */
  1827. static struct iwl4965_power_vec_entry range_0[IWL_POWER_AC] = {
  1828. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1829. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
  1830. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
  1831. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
  1832. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
  1833. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
  1834. };
  1835. /* for tim > 10 */
  1836. static struct iwl4965_power_vec_entry range_1[IWL_POWER_AC] = {
  1837. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1838. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
  1839. SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
  1840. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
  1841. SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
  1842. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
  1843. SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
  1844. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
  1845. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
  1846. SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
  1847. };
  1848. int iwl4965_power_init_handle(struct iwl4965_priv *priv)
  1849. {
  1850. int rc = 0, i;
  1851. struct iwl4965_power_mgr *pow_data;
  1852. int size = sizeof(struct iwl4965_power_vec_entry) * IWL_POWER_AC;
  1853. u16 pci_pm;
  1854. IWL_DEBUG_POWER("Initialize power \n");
  1855. pow_data = &(priv->power_data);
  1856. memset(pow_data, 0, sizeof(*pow_data));
  1857. pow_data->active_index = IWL_POWER_RANGE_0;
  1858. pow_data->dtim_val = 0xffff;
  1859. memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
  1860. memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
  1861. rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
  1862. if (rc != 0)
  1863. return 0;
  1864. else {
  1865. struct iwl4965_powertable_cmd *cmd;
  1866. IWL_DEBUG_POWER("adjust power command flags\n");
  1867. for (i = 0; i < IWL_POWER_AC; i++) {
  1868. cmd = &pow_data->pwr_range_0[i].cmd;
  1869. if (pci_pm & 0x1)
  1870. cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
  1871. else
  1872. cmd->flags |= IWL_POWER_PCI_PM_MSK;
  1873. }
  1874. }
  1875. return rc;
  1876. }
  1877. static int iwl4965_update_power_cmd(struct iwl4965_priv *priv,
  1878. struct iwl4965_powertable_cmd *cmd, u32 mode)
  1879. {
  1880. int rc = 0, i;
  1881. u8 skip;
  1882. u32 max_sleep = 0;
  1883. struct iwl4965_power_vec_entry *range;
  1884. u8 period = 0;
  1885. struct iwl4965_power_mgr *pow_data;
  1886. if (mode > IWL_POWER_INDEX_5) {
  1887. IWL_DEBUG_POWER("Error invalid power mode \n");
  1888. return -1;
  1889. }
  1890. pow_data = &(priv->power_data);
  1891. if (pow_data->active_index == IWL_POWER_RANGE_0)
  1892. range = &pow_data->pwr_range_0[0];
  1893. else
  1894. range = &pow_data->pwr_range_1[1];
  1895. memcpy(cmd, &range[mode].cmd, sizeof(struct iwl4965_powertable_cmd));
  1896. #ifdef IWL_MAC80211_DISABLE
  1897. if (priv->assoc_network != NULL) {
  1898. unsigned long flags;
  1899. period = priv->assoc_network->tim.tim_period;
  1900. }
  1901. #endif /*IWL_MAC80211_DISABLE */
  1902. skip = range[mode].no_dtim;
  1903. if (period == 0) {
  1904. period = 1;
  1905. skip = 0;
  1906. }
  1907. if (skip == 0) {
  1908. max_sleep = period;
  1909. cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1910. } else {
  1911. __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
  1912. max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
  1913. cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1914. }
  1915. for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
  1916. if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
  1917. cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
  1918. }
  1919. IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
  1920. IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
  1921. IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
  1922. IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  1923. le32_to_cpu(cmd->sleep_interval[0]),
  1924. le32_to_cpu(cmd->sleep_interval[1]),
  1925. le32_to_cpu(cmd->sleep_interval[2]),
  1926. le32_to_cpu(cmd->sleep_interval[3]),
  1927. le32_to_cpu(cmd->sleep_interval[4]));
  1928. return rc;
  1929. }
  1930. static int iwl4965_send_power_mode(struct iwl4965_priv *priv, u32 mode)
  1931. {
  1932. u32 uninitialized_var(final_mode);
  1933. int rc;
  1934. struct iwl4965_powertable_cmd cmd;
  1935. /* If on battery, set to 3,
  1936. * if plugged into AC power, set to CAM ("continuously aware mode"),
  1937. * else user level */
  1938. switch (mode) {
  1939. case IWL_POWER_BATTERY:
  1940. final_mode = IWL_POWER_INDEX_3;
  1941. break;
  1942. case IWL_POWER_AC:
  1943. final_mode = IWL_POWER_MODE_CAM;
  1944. break;
  1945. default:
  1946. final_mode = mode;
  1947. break;
  1948. }
  1949. cmd.keep_alive_beacons = 0;
  1950. iwl4965_update_power_cmd(priv, &cmd, final_mode);
  1951. rc = iwl4965_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
  1952. if (final_mode == IWL_POWER_MODE_CAM)
  1953. clear_bit(STATUS_POWER_PMI, &priv->status);
  1954. else
  1955. set_bit(STATUS_POWER_PMI, &priv->status);
  1956. return rc;
  1957. }
  1958. int iwl4965_is_network_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
  1959. {
  1960. /* Filter incoming packets to determine if they are targeted toward
  1961. * this network, discarding packets coming from ourselves */
  1962. switch (priv->iw_mode) {
  1963. case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
  1964. /* packets from our adapter are dropped (echo) */
  1965. if (!compare_ether_addr(header->addr2, priv->mac_addr))
  1966. return 0;
  1967. /* {broad,multi}cast packets to our IBSS go through */
  1968. if (is_multicast_ether_addr(header->addr1))
  1969. return !compare_ether_addr(header->addr3, priv->bssid);
  1970. /* packets to our adapter go through */
  1971. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1972. case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
  1973. /* packets from our adapter are dropped (echo) */
  1974. if (!compare_ether_addr(header->addr3, priv->mac_addr))
  1975. return 0;
  1976. /* {broad,multi}cast packets to our BSS go through */
  1977. if (is_multicast_ether_addr(header->addr1))
  1978. return !compare_ether_addr(header->addr2, priv->bssid);
  1979. /* packets to our adapter go through */
  1980. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1981. }
  1982. return 1;
  1983. }
  1984. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  1985. static const char *iwl4965_get_tx_fail_reason(u32 status)
  1986. {
  1987. switch (status & TX_STATUS_MSK) {
  1988. case TX_STATUS_SUCCESS:
  1989. return "SUCCESS";
  1990. TX_STATUS_ENTRY(SHORT_LIMIT);
  1991. TX_STATUS_ENTRY(LONG_LIMIT);
  1992. TX_STATUS_ENTRY(FIFO_UNDERRUN);
  1993. TX_STATUS_ENTRY(MGMNT_ABORT);
  1994. TX_STATUS_ENTRY(NEXT_FRAG);
  1995. TX_STATUS_ENTRY(LIFE_EXPIRE);
  1996. TX_STATUS_ENTRY(DEST_PS);
  1997. TX_STATUS_ENTRY(ABORTED);
  1998. TX_STATUS_ENTRY(BT_RETRY);
  1999. TX_STATUS_ENTRY(STA_INVALID);
  2000. TX_STATUS_ENTRY(FRAG_DROPPED);
  2001. TX_STATUS_ENTRY(TID_DISABLE);
  2002. TX_STATUS_ENTRY(FRAME_FLUSHED);
  2003. TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
  2004. TX_STATUS_ENTRY(TX_LOCKED);
  2005. TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
  2006. }
  2007. return "UNKNOWN";
  2008. }
  2009. /**
  2010. * iwl4965_scan_cancel - Cancel any currently executing HW scan
  2011. *
  2012. * NOTE: priv->mutex is not required before calling this function
  2013. */
  2014. static int iwl4965_scan_cancel(struct iwl4965_priv *priv)
  2015. {
  2016. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  2017. clear_bit(STATUS_SCANNING, &priv->status);
  2018. return 0;
  2019. }
  2020. if (test_bit(STATUS_SCANNING, &priv->status)) {
  2021. if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2022. IWL_DEBUG_SCAN("Queuing scan abort.\n");
  2023. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  2024. queue_work(priv->workqueue, &priv->abort_scan);
  2025. } else
  2026. IWL_DEBUG_SCAN("Scan abort already in progress.\n");
  2027. return test_bit(STATUS_SCANNING, &priv->status);
  2028. }
  2029. return 0;
  2030. }
  2031. /**
  2032. * iwl4965_scan_cancel_timeout - Cancel any currently executing HW scan
  2033. * @ms: amount of time to wait (in milliseconds) for scan to abort
  2034. *
  2035. * NOTE: priv->mutex must be held before calling this function
  2036. */
  2037. static int iwl4965_scan_cancel_timeout(struct iwl4965_priv *priv, unsigned long ms)
  2038. {
  2039. unsigned long now = jiffies;
  2040. int ret;
  2041. ret = iwl4965_scan_cancel(priv);
  2042. if (ret && ms) {
  2043. mutex_unlock(&priv->mutex);
  2044. while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
  2045. test_bit(STATUS_SCANNING, &priv->status))
  2046. msleep(1);
  2047. mutex_lock(&priv->mutex);
  2048. return test_bit(STATUS_SCANNING, &priv->status);
  2049. }
  2050. return ret;
  2051. }
  2052. static void iwl4965_sequence_reset(struct iwl4965_priv *priv)
  2053. {
  2054. /* Reset ieee stats */
  2055. /* We don't reset the net_device_stats (ieee->stats) on
  2056. * re-association */
  2057. priv->last_seq_num = -1;
  2058. priv->last_frag_num = -1;
  2059. priv->last_packet_time = 0;
  2060. iwl4965_scan_cancel(priv);
  2061. }
  2062. #define MAX_UCODE_BEACON_INTERVAL 4096
  2063. #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
  2064. static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
  2065. {
  2066. u16 new_val = 0;
  2067. u16 beacon_factor = 0;
  2068. beacon_factor =
  2069. (beacon_val + MAX_UCODE_BEACON_INTERVAL)
  2070. / MAX_UCODE_BEACON_INTERVAL;
  2071. new_val = beacon_val / beacon_factor;
  2072. return cpu_to_le16(new_val);
  2073. }
  2074. static void iwl4965_setup_rxon_timing(struct iwl4965_priv *priv)
  2075. {
  2076. u64 interval_tm_unit;
  2077. u64 tsf, result;
  2078. unsigned long flags;
  2079. struct ieee80211_conf *conf = NULL;
  2080. u16 beacon_int = 0;
  2081. conf = ieee80211_get_hw_conf(priv->hw);
  2082. spin_lock_irqsave(&priv->lock, flags);
  2083. priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
  2084. priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
  2085. priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
  2086. tsf = priv->timestamp1;
  2087. tsf = ((tsf << 32) | priv->timestamp0);
  2088. beacon_int = priv->beacon_int;
  2089. spin_unlock_irqrestore(&priv->lock, flags);
  2090. if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
  2091. if (beacon_int == 0) {
  2092. priv->rxon_timing.beacon_interval = cpu_to_le16(100);
  2093. priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
  2094. } else {
  2095. priv->rxon_timing.beacon_interval =
  2096. cpu_to_le16(beacon_int);
  2097. priv->rxon_timing.beacon_interval =
  2098. iwl4965_adjust_beacon_interval(
  2099. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2100. }
  2101. priv->rxon_timing.atim_window = 0;
  2102. } else {
  2103. priv->rxon_timing.beacon_interval =
  2104. iwl4965_adjust_beacon_interval(conf->beacon_int);
  2105. /* TODO: we need to get atim_window from upper stack
  2106. * for now we set to 0 */
  2107. priv->rxon_timing.atim_window = 0;
  2108. }
  2109. interval_tm_unit =
  2110. (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
  2111. result = do_div(tsf, interval_tm_unit);
  2112. priv->rxon_timing.beacon_init_val =
  2113. cpu_to_le32((u32) ((u64) interval_tm_unit - result));
  2114. IWL_DEBUG_ASSOC
  2115. ("beacon interval %d beacon timer %d beacon tim %d\n",
  2116. le16_to_cpu(priv->rxon_timing.beacon_interval),
  2117. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  2118. le16_to_cpu(priv->rxon_timing.atim_window));
  2119. }
  2120. static int iwl4965_scan_initiate(struct iwl4965_priv *priv)
  2121. {
  2122. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  2123. IWL_ERROR("APs don't scan.\n");
  2124. return 0;
  2125. }
  2126. if (!iwl4965_is_ready_rf(priv)) {
  2127. IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
  2128. return -EIO;
  2129. }
  2130. if (test_bit(STATUS_SCANNING, &priv->status)) {
  2131. IWL_DEBUG_SCAN("Scan already in progress.\n");
  2132. return -EAGAIN;
  2133. }
  2134. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2135. IWL_DEBUG_SCAN("Scan request while abort pending. "
  2136. "Queuing.\n");
  2137. return -EAGAIN;
  2138. }
  2139. IWL_DEBUG_INFO("Starting scan...\n");
  2140. priv->scan_bands = 2;
  2141. set_bit(STATUS_SCANNING, &priv->status);
  2142. priv->scan_start = jiffies;
  2143. priv->scan_pass_start = priv->scan_start;
  2144. queue_work(priv->workqueue, &priv->request_scan);
  2145. return 0;
  2146. }
  2147. static int iwl4965_set_rxon_hwcrypto(struct iwl4965_priv *priv, int hw_decrypt)
  2148. {
  2149. struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
  2150. if (hw_decrypt)
  2151. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  2152. else
  2153. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  2154. return 0;
  2155. }
  2156. static void iwl4965_set_flags_for_phymode(struct iwl4965_priv *priv, u8 phymode)
  2157. {
  2158. if (phymode == MODE_IEEE80211A) {
  2159. priv->staging_rxon.flags &=
  2160. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  2161. | RXON_FLG_CCK_MSK);
  2162. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2163. } else {
  2164. /* Copied from iwl4965_bg_post_associate() */
  2165. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2166. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2167. else
  2168. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2169. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  2170. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2171. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  2172. priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  2173. priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
  2174. }
  2175. }
  2176. /*
  2177. * initialize rxon structure with default values from eeprom
  2178. */
  2179. static void iwl4965_connection_init_rx_config(struct iwl4965_priv *priv)
  2180. {
  2181. const struct iwl4965_channel_info *ch_info;
  2182. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  2183. switch (priv->iw_mode) {
  2184. case IEEE80211_IF_TYPE_AP:
  2185. priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
  2186. break;
  2187. case IEEE80211_IF_TYPE_STA:
  2188. priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
  2189. priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  2190. break;
  2191. case IEEE80211_IF_TYPE_IBSS:
  2192. priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  2193. priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  2194. priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  2195. RXON_FILTER_ACCEPT_GRP_MSK;
  2196. break;
  2197. case IEEE80211_IF_TYPE_MNTR:
  2198. priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
  2199. priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
  2200. RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
  2201. break;
  2202. }
  2203. #if 0
  2204. /* TODO: Figure out when short_preamble would be set and cache from
  2205. * that */
  2206. if (!hw_to_local(priv->hw)->short_preamble)
  2207. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2208. else
  2209. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2210. #endif
  2211. ch_info = iwl4965_get_channel_info(priv, priv->phymode,
  2212. le16_to_cpu(priv->staging_rxon.channel));
  2213. if (!ch_info)
  2214. ch_info = &priv->channel_info[0];
  2215. /*
  2216. * in some case A channels are all non IBSS
  2217. * in this case force B/G channel
  2218. */
  2219. if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
  2220. !(is_channel_ibss(ch_info)))
  2221. ch_info = &priv->channel_info[0];
  2222. priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
  2223. if (is_channel_a_band(ch_info))
  2224. priv->phymode = MODE_IEEE80211A;
  2225. else
  2226. priv->phymode = MODE_IEEE80211G;
  2227. iwl4965_set_flags_for_phymode(priv, priv->phymode);
  2228. priv->staging_rxon.ofdm_basic_rates =
  2229. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2230. priv->staging_rxon.cck_basic_rates =
  2231. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2232. priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
  2233. RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
  2234. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  2235. memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
  2236. priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
  2237. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
  2238. iwl4965_set_rxon_chain(priv);
  2239. }
  2240. static int iwl4965_set_mode(struct iwl4965_priv *priv, int mode)
  2241. {
  2242. if (mode == IEEE80211_IF_TYPE_IBSS) {
  2243. const struct iwl4965_channel_info *ch_info;
  2244. ch_info = iwl4965_get_channel_info(priv,
  2245. priv->phymode,
  2246. le16_to_cpu(priv->staging_rxon.channel));
  2247. if (!ch_info || !is_channel_ibss(ch_info)) {
  2248. IWL_ERROR("channel %d not IBSS channel\n",
  2249. le16_to_cpu(priv->staging_rxon.channel));
  2250. return -EINVAL;
  2251. }
  2252. }
  2253. priv->iw_mode = mode;
  2254. iwl4965_connection_init_rx_config(priv);
  2255. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  2256. iwl4965_clear_stations_table(priv);
  2257. /* dont commit rxon if rf-kill is on*/
  2258. if (!iwl4965_is_ready_rf(priv))
  2259. return -EAGAIN;
  2260. cancel_delayed_work(&priv->scan_check);
  2261. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  2262. IWL_WARNING("Aborted scan still in progress after 100ms\n");
  2263. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  2264. return -EAGAIN;
  2265. }
  2266. iwl4965_commit_rxon(priv);
  2267. return 0;
  2268. }
  2269. static void iwl4965_build_tx_cmd_hwcrypto(struct iwl4965_priv *priv,
  2270. struct ieee80211_tx_control *ctl,
  2271. struct iwl4965_cmd *cmd,
  2272. struct sk_buff *skb_frag,
  2273. int last_frag)
  2274. {
  2275. struct iwl4965_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
  2276. switch (keyinfo->alg) {
  2277. case ALG_CCMP:
  2278. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
  2279. memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
  2280. IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
  2281. break;
  2282. case ALG_TKIP:
  2283. #if 0
  2284. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
  2285. if (last_frag)
  2286. memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
  2287. 8);
  2288. else
  2289. memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
  2290. #endif
  2291. break;
  2292. case ALG_WEP:
  2293. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
  2294. (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  2295. if (keyinfo->keylen == 13)
  2296. cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
  2297. memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
  2298. IWL_DEBUG_TX("Configuring packet for WEP encryption "
  2299. "with key %d\n", ctl->key_idx);
  2300. break;
  2301. default:
  2302. printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
  2303. break;
  2304. }
  2305. }
  2306. /*
  2307. * handle build REPLY_TX command notification.
  2308. */
  2309. static void iwl4965_build_tx_cmd_basic(struct iwl4965_priv *priv,
  2310. struct iwl4965_cmd *cmd,
  2311. struct ieee80211_tx_control *ctrl,
  2312. struct ieee80211_hdr *hdr,
  2313. int is_unicast, u8 std_id)
  2314. {
  2315. __le16 *qc;
  2316. u16 fc = le16_to_cpu(hdr->frame_control);
  2317. __le32 tx_flags = cmd->cmd.tx.tx_flags;
  2318. cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2319. if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
  2320. tx_flags |= TX_CMD_FLG_ACK_MSK;
  2321. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
  2322. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2323. if (ieee80211_is_probe_response(fc) &&
  2324. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  2325. tx_flags |= TX_CMD_FLG_TSF_MSK;
  2326. } else {
  2327. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  2328. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2329. }
  2330. cmd->cmd.tx.sta_id = std_id;
  2331. if (ieee80211_get_morefrag(hdr))
  2332. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  2333. qc = ieee80211_get_qos_ctrl(hdr);
  2334. if (qc) {
  2335. cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
  2336. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  2337. } else
  2338. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2339. if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
  2340. tx_flags |= TX_CMD_FLG_RTS_MSK;
  2341. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  2342. } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
  2343. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  2344. tx_flags |= TX_CMD_FLG_CTS_MSK;
  2345. }
  2346. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  2347. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  2348. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  2349. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
  2350. if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
  2351. (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
  2352. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
  2353. else
  2354. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
  2355. } else
  2356. cmd->cmd.tx.timeout.pm_frame_timeout = 0;
  2357. cmd->cmd.tx.driver_txop = 0;
  2358. cmd->cmd.tx.tx_flags = tx_flags;
  2359. cmd->cmd.tx.next_frame_len = 0;
  2360. }
  2361. /**
  2362. * iwl4965_get_sta_id - Find station's index within station table
  2363. *
  2364. * If new IBSS station, create new entry in station table
  2365. */
  2366. static int iwl4965_get_sta_id(struct iwl4965_priv *priv,
  2367. struct ieee80211_hdr *hdr)
  2368. {
  2369. int sta_id;
  2370. u16 fc = le16_to_cpu(hdr->frame_control);
  2371. DECLARE_MAC_BUF(mac);
  2372. /* If this frame is broadcast or management, use broadcast station id */
  2373. if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
  2374. is_multicast_ether_addr(hdr->addr1))
  2375. return priv->hw_setting.bcast_sta_id;
  2376. switch (priv->iw_mode) {
  2377. /* If we are a client station in a BSS network, use the special
  2378. * AP station entry (that's the only station we communicate with) */
  2379. case IEEE80211_IF_TYPE_STA:
  2380. return IWL_AP_ID;
  2381. /* If we are an AP, then find the station, or use BCAST */
  2382. case IEEE80211_IF_TYPE_AP:
  2383. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  2384. if (sta_id != IWL_INVALID_STATION)
  2385. return sta_id;
  2386. return priv->hw_setting.bcast_sta_id;
  2387. /* If this frame is going out to an IBSS network, find the station,
  2388. * or create a new station table entry */
  2389. case IEEE80211_IF_TYPE_IBSS:
  2390. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  2391. if (sta_id != IWL_INVALID_STATION)
  2392. return sta_id;
  2393. /* Create new station table entry */
  2394. sta_id = iwl4965_add_station_flags(priv, hdr->addr1,
  2395. 0, CMD_ASYNC, NULL);
  2396. if (sta_id != IWL_INVALID_STATION)
  2397. return sta_id;
  2398. IWL_DEBUG_DROP("Station %s not in station map. "
  2399. "Defaulting to broadcast...\n",
  2400. print_mac(mac, hdr->addr1));
  2401. iwl4965_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
  2402. return priv->hw_setting.bcast_sta_id;
  2403. default:
  2404. IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
  2405. return priv->hw_setting.bcast_sta_id;
  2406. }
  2407. }
  2408. /*
  2409. * start REPLY_TX command process
  2410. */
  2411. static int iwl4965_tx_skb(struct iwl4965_priv *priv,
  2412. struct sk_buff *skb, struct ieee80211_tx_control *ctl)
  2413. {
  2414. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  2415. struct iwl4965_tfd_frame *tfd;
  2416. u32 *control_flags;
  2417. int txq_id = ctl->queue;
  2418. struct iwl4965_tx_queue *txq = NULL;
  2419. struct iwl4965_queue *q = NULL;
  2420. dma_addr_t phys_addr;
  2421. dma_addr_t txcmd_phys;
  2422. struct iwl4965_cmd *out_cmd = NULL;
  2423. u16 len, idx, len_org;
  2424. u8 id, hdr_len, unicast;
  2425. u8 sta_id;
  2426. u16 seq_number = 0;
  2427. u16 fc;
  2428. __le16 *qc;
  2429. u8 wait_write_ptr = 0;
  2430. unsigned long flags;
  2431. int rc;
  2432. spin_lock_irqsave(&priv->lock, flags);
  2433. if (iwl4965_is_rfkill(priv)) {
  2434. IWL_DEBUG_DROP("Dropping - RF KILL\n");
  2435. goto drop_unlock;
  2436. }
  2437. if (!priv->vif) {
  2438. IWL_DEBUG_DROP("Dropping - !priv->vif\n");
  2439. goto drop_unlock;
  2440. }
  2441. if ((ctl->tx_rate & 0xFF) == IWL_INVALID_RATE) {
  2442. IWL_ERROR("ERROR: No TX rate available.\n");
  2443. goto drop_unlock;
  2444. }
  2445. unicast = !is_multicast_ether_addr(hdr->addr1);
  2446. id = 0;
  2447. fc = le16_to_cpu(hdr->frame_control);
  2448. #ifdef CONFIG_IWL4965_DEBUG
  2449. if (ieee80211_is_auth(fc))
  2450. IWL_DEBUG_TX("Sending AUTH frame\n");
  2451. else if (ieee80211_is_assoc_request(fc))
  2452. IWL_DEBUG_TX("Sending ASSOC frame\n");
  2453. else if (ieee80211_is_reassoc_request(fc))
  2454. IWL_DEBUG_TX("Sending REASSOC frame\n");
  2455. #endif
  2456. /* drop all data frame if we are not associated */
  2457. if (!iwl4965_is_associated(priv) && !priv->assoc_id &&
  2458. ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA)) {
  2459. IWL_DEBUG_DROP("Dropping - !iwl4965_is_associated\n");
  2460. goto drop_unlock;
  2461. }
  2462. spin_unlock_irqrestore(&priv->lock, flags);
  2463. hdr_len = ieee80211_get_hdrlen(fc);
  2464. /* Find (or create) index into station table for destination station */
  2465. sta_id = iwl4965_get_sta_id(priv, hdr);
  2466. if (sta_id == IWL_INVALID_STATION) {
  2467. DECLARE_MAC_BUF(mac);
  2468. IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
  2469. print_mac(mac, hdr->addr1));
  2470. goto drop;
  2471. }
  2472. IWL_DEBUG_RATE("station Id %d\n", sta_id);
  2473. qc = ieee80211_get_qos_ctrl(hdr);
  2474. if (qc) {
  2475. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2476. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  2477. IEEE80211_SCTL_SEQ;
  2478. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  2479. (hdr->seq_ctrl &
  2480. __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
  2481. seq_number += 0x10;
  2482. #ifdef CONFIG_IWL4965_HT
  2483. #ifdef CONFIG_IWL4965_HT_AGG
  2484. /* aggregation is on for this <sta,tid> */
  2485. if (ctl->flags & IEEE80211_TXCTL_HT_MPDU_AGG)
  2486. txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
  2487. #endif /* CONFIG_IWL4965_HT_AGG */
  2488. #endif /* CONFIG_IWL4965_HT */
  2489. }
  2490. /* Descriptor for chosen Tx queue */
  2491. txq = &priv->txq[txq_id];
  2492. q = &txq->q;
  2493. spin_lock_irqsave(&priv->lock, flags);
  2494. /* Set up first empty TFD within this queue's circular TFD buffer */
  2495. tfd = &txq->bd[q->write_ptr];
  2496. memset(tfd, 0, sizeof(*tfd));
  2497. control_flags = (u32 *) tfd;
  2498. idx = get_cmd_index(q, q->write_ptr, 0);
  2499. /* Set up driver data for this TFD */
  2500. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl4965_tx_info));
  2501. txq->txb[q->write_ptr].skb[0] = skb;
  2502. memcpy(&(txq->txb[q->write_ptr].status.control),
  2503. ctl, sizeof(struct ieee80211_tx_control));
  2504. /* Set up first empty entry in queue's array of Tx/cmd buffers */
  2505. out_cmd = &txq->cmd[idx];
  2506. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  2507. memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
  2508. /*
  2509. * Set up the Tx-command (not MAC!) header.
  2510. * Store the chosen Tx queue and TFD index within the sequence field;
  2511. * after Tx, uCode's Tx response will return this value so driver can
  2512. * locate the frame within the tx queue and do post-tx processing.
  2513. */
  2514. out_cmd->hdr.cmd = REPLY_TX;
  2515. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  2516. INDEX_TO_SEQ(q->write_ptr)));
  2517. /* Copy MAC header from skb into command buffer */
  2518. memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
  2519. /*
  2520. * Use the first empty entry in this queue's command buffer array
  2521. * to contain the Tx command and MAC header concatenated together
  2522. * (payload data will be in another buffer).
  2523. * Size of this varies, due to varying MAC header length.
  2524. * If end is not dword aligned, we'll have 2 extra bytes at the end
  2525. * of the MAC header (device reads on dword boundaries).
  2526. * We'll tell device about this padding later.
  2527. */
  2528. len = priv->hw_setting.tx_cmd_len +
  2529. sizeof(struct iwl4965_cmd_header) + hdr_len;
  2530. len_org = len;
  2531. len = (len + 3) & ~3;
  2532. if (len_org != len)
  2533. len_org = 1;
  2534. else
  2535. len_org = 0;
  2536. /* Physical address of this Tx command's header (not MAC header!),
  2537. * within command buffer array. */
  2538. txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl4965_cmd) * idx +
  2539. offsetof(struct iwl4965_cmd, hdr);
  2540. /* Add buffer containing Tx command and MAC(!) header to TFD's
  2541. * first entry */
  2542. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
  2543. if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
  2544. iwl4965_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
  2545. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  2546. * if any (802.11 null frames have no payload). */
  2547. len = skb->len - hdr_len;
  2548. if (len) {
  2549. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  2550. len, PCI_DMA_TODEVICE);
  2551. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
  2552. }
  2553. /* Tell 4965 about any 2-byte padding after MAC header */
  2554. if (len_org)
  2555. out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
  2556. /* Total # bytes to be transmitted */
  2557. len = (u16)skb->len;
  2558. out_cmd->cmd.tx.len = cpu_to_le16(len);
  2559. /* TODO need this for burst mode later on */
  2560. iwl4965_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
  2561. /* set is_hcca to 0; it probably will never be implemented */
  2562. iwl4965_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
  2563. iwl4965_tx_cmd(priv, out_cmd, sta_id, txcmd_phys,
  2564. hdr, hdr_len, ctl, NULL);
  2565. if (!ieee80211_get_morefrag(hdr)) {
  2566. txq->need_update = 1;
  2567. if (qc) {
  2568. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2569. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  2570. }
  2571. } else {
  2572. wait_write_ptr = 1;
  2573. txq->need_update = 0;
  2574. }
  2575. iwl4965_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
  2576. sizeof(out_cmd->cmd.tx));
  2577. iwl4965_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
  2578. ieee80211_get_hdrlen(fc));
  2579. /* Set up entry for this TFD in Tx byte-count array */
  2580. iwl4965_tx_queue_update_wr_ptr(priv, txq, len);
  2581. /* Tell device the write index *just past* this latest filled TFD */
  2582. q->write_ptr = iwl4965_queue_inc_wrap(q->write_ptr, q->n_bd);
  2583. rc = iwl4965_tx_queue_update_write_ptr(priv, txq);
  2584. spin_unlock_irqrestore(&priv->lock, flags);
  2585. if (rc)
  2586. return rc;
  2587. if ((iwl4965_queue_space(q) < q->high_mark)
  2588. && priv->mac80211_registered) {
  2589. if (wait_write_ptr) {
  2590. spin_lock_irqsave(&priv->lock, flags);
  2591. txq->need_update = 1;
  2592. iwl4965_tx_queue_update_write_ptr(priv, txq);
  2593. spin_unlock_irqrestore(&priv->lock, flags);
  2594. }
  2595. ieee80211_stop_queue(priv->hw, ctl->queue);
  2596. }
  2597. return 0;
  2598. drop_unlock:
  2599. spin_unlock_irqrestore(&priv->lock, flags);
  2600. drop:
  2601. return -1;
  2602. }
  2603. static void iwl4965_set_rate(struct iwl4965_priv *priv)
  2604. {
  2605. const struct ieee80211_hw_mode *hw = NULL;
  2606. struct ieee80211_rate *rate;
  2607. int i;
  2608. hw = iwl4965_get_hw_mode(priv, priv->phymode);
  2609. if (!hw) {
  2610. IWL_ERROR("Failed to set rate: unable to get hw mode\n");
  2611. return;
  2612. }
  2613. priv->active_rate = 0;
  2614. priv->active_rate_basic = 0;
  2615. IWL_DEBUG_RATE("Setting rates for 802.11%c\n",
  2616. hw->mode == MODE_IEEE80211A ?
  2617. 'a' : ((hw->mode == MODE_IEEE80211B) ? 'b' : 'g'));
  2618. for (i = 0; i < hw->num_rates; i++) {
  2619. rate = &(hw->rates[i]);
  2620. if ((rate->val < IWL_RATE_COUNT) &&
  2621. (rate->flags & IEEE80211_RATE_SUPPORTED)) {
  2622. IWL_DEBUG_RATE("Adding rate index %d (plcp %d)%s\n",
  2623. rate->val, iwl4965_rates[rate->val].plcp,
  2624. (rate->flags & IEEE80211_RATE_BASIC) ?
  2625. "*" : "");
  2626. priv->active_rate |= (1 << rate->val);
  2627. if (rate->flags & IEEE80211_RATE_BASIC)
  2628. priv->active_rate_basic |= (1 << rate->val);
  2629. } else
  2630. IWL_DEBUG_RATE("Not adding rate %d (plcp %d)\n",
  2631. rate->val, iwl4965_rates[rate->val].plcp);
  2632. }
  2633. IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
  2634. priv->active_rate, priv->active_rate_basic);
  2635. /*
  2636. * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
  2637. * otherwise set it to the default of all CCK rates and 6, 12, 24 for
  2638. * OFDM
  2639. */
  2640. if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
  2641. priv->staging_rxon.cck_basic_rates =
  2642. ((priv->active_rate_basic &
  2643. IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
  2644. else
  2645. priv->staging_rxon.cck_basic_rates =
  2646. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2647. if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
  2648. priv->staging_rxon.ofdm_basic_rates =
  2649. ((priv->active_rate_basic &
  2650. (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
  2651. IWL_FIRST_OFDM_RATE) & 0xFF;
  2652. else
  2653. priv->staging_rxon.ofdm_basic_rates =
  2654. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2655. }
  2656. static void iwl4965_radio_kill_sw(struct iwl4965_priv *priv, int disable_radio)
  2657. {
  2658. unsigned long flags;
  2659. if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
  2660. return;
  2661. IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
  2662. disable_radio ? "OFF" : "ON");
  2663. if (disable_radio) {
  2664. iwl4965_scan_cancel(priv);
  2665. /* FIXME: This is a workaround for AP */
  2666. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  2667. spin_lock_irqsave(&priv->lock, flags);
  2668. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2669. CSR_UCODE_SW_BIT_RFKILL);
  2670. spin_unlock_irqrestore(&priv->lock, flags);
  2671. iwl4965_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
  2672. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2673. }
  2674. return;
  2675. }
  2676. spin_lock_irqsave(&priv->lock, flags);
  2677. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2678. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  2679. spin_unlock_irqrestore(&priv->lock, flags);
  2680. /* wake up ucode */
  2681. msleep(10);
  2682. spin_lock_irqsave(&priv->lock, flags);
  2683. iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  2684. if (!iwl4965_grab_nic_access(priv))
  2685. iwl4965_release_nic_access(priv);
  2686. spin_unlock_irqrestore(&priv->lock, flags);
  2687. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  2688. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  2689. "disabled by HW switch\n");
  2690. return;
  2691. }
  2692. queue_work(priv->workqueue, &priv->restart);
  2693. return;
  2694. }
  2695. void iwl4965_set_decrypted_flag(struct iwl4965_priv *priv, struct sk_buff *skb,
  2696. u32 decrypt_res, struct ieee80211_rx_status *stats)
  2697. {
  2698. u16 fc =
  2699. le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
  2700. if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  2701. return;
  2702. if (!(fc & IEEE80211_FCTL_PROTECTED))
  2703. return;
  2704. IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
  2705. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  2706. case RX_RES_STATUS_SEC_TYPE_TKIP:
  2707. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2708. RX_RES_STATUS_BAD_ICV_MIC)
  2709. stats->flag |= RX_FLAG_MMIC_ERROR;
  2710. case RX_RES_STATUS_SEC_TYPE_WEP:
  2711. case RX_RES_STATUS_SEC_TYPE_CCMP:
  2712. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2713. RX_RES_STATUS_DECRYPT_OK) {
  2714. IWL_DEBUG_RX("hw decrypt successfully!!!\n");
  2715. stats->flag |= RX_FLAG_DECRYPTED;
  2716. }
  2717. break;
  2718. default:
  2719. break;
  2720. }
  2721. }
  2722. #define IWL_PACKET_RETRY_TIME HZ
  2723. int iwl4965_is_duplicate_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
  2724. {
  2725. u16 sc = le16_to_cpu(header->seq_ctrl);
  2726. u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
  2727. u16 frag = sc & IEEE80211_SCTL_FRAG;
  2728. u16 *last_seq, *last_frag;
  2729. unsigned long *last_time;
  2730. switch (priv->iw_mode) {
  2731. case IEEE80211_IF_TYPE_IBSS:{
  2732. struct list_head *p;
  2733. struct iwl4965_ibss_seq *entry = NULL;
  2734. u8 *mac = header->addr2;
  2735. int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
  2736. __list_for_each(p, &priv->ibss_mac_hash[index]) {
  2737. entry = list_entry(p, struct iwl4965_ibss_seq, list);
  2738. if (!compare_ether_addr(entry->mac, mac))
  2739. break;
  2740. }
  2741. if (p == &priv->ibss_mac_hash[index]) {
  2742. entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
  2743. if (!entry) {
  2744. IWL_ERROR("Cannot malloc new mac entry\n");
  2745. return 0;
  2746. }
  2747. memcpy(entry->mac, mac, ETH_ALEN);
  2748. entry->seq_num = seq;
  2749. entry->frag_num = frag;
  2750. entry->packet_time = jiffies;
  2751. list_add(&entry->list, &priv->ibss_mac_hash[index]);
  2752. return 0;
  2753. }
  2754. last_seq = &entry->seq_num;
  2755. last_frag = &entry->frag_num;
  2756. last_time = &entry->packet_time;
  2757. break;
  2758. }
  2759. case IEEE80211_IF_TYPE_STA:
  2760. last_seq = &priv->last_seq_num;
  2761. last_frag = &priv->last_frag_num;
  2762. last_time = &priv->last_packet_time;
  2763. break;
  2764. default:
  2765. return 0;
  2766. }
  2767. if ((*last_seq == seq) &&
  2768. time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
  2769. if (*last_frag == frag)
  2770. goto drop;
  2771. if (*last_frag + 1 != frag)
  2772. /* out-of-order fragment */
  2773. goto drop;
  2774. } else
  2775. *last_seq = seq;
  2776. *last_frag = frag;
  2777. *last_time = jiffies;
  2778. return 0;
  2779. drop:
  2780. return 1;
  2781. }
  2782. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  2783. #include "iwl-spectrum.h"
  2784. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  2785. #define BEACON_TIME_MASK_HIGH 0xFF000000
  2786. #define TIME_UNIT 1024
  2787. /*
  2788. * extended beacon time format
  2789. * time in usec will be changed into a 32-bit value in 8:24 format
  2790. * the high 1 byte is the beacon counts
  2791. * the lower 3 bytes is the time in usec within one beacon interval
  2792. */
  2793. static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
  2794. {
  2795. u32 quot;
  2796. u32 rem;
  2797. u32 interval = beacon_interval * 1024;
  2798. if (!interval || !usec)
  2799. return 0;
  2800. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  2801. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  2802. return (quot << 24) + rem;
  2803. }
  2804. /* base is usually what we get from ucode with each received frame,
  2805. * the same as HW timer counter counting down
  2806. */
  2807. static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  2808. {
  2809. u32 base_low = base & BEACON_TIME_MASK_LOW;
  2810. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  2811. u32 interval = beacon_interval * TIME_UNIT;
  2812. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  2813. (addon & BEACON_TIME_MASK_HIGH);
  2814. if (base_low > addon_low)
  2815. res += base_low - addon_low;
  2816. else if (base_low < addon_low) {
  2817. res += interval + base_low - addon_low;
  2818. res += (1 << 24);
  2819. } else
  2820. res += (1 << 24);
  2821. return cpu_to_le32(res);
  2822. }
  2823. static int iwl4965_get_measurement(struct iwl4965_priv *priv,
  2824. struct ieee80211_measurement_params *params,
  2825. u8 type)
  2826. {
  2827. struct iwl4965_spectrum_cmd spectrum;
  2828. struct iwl4965_rx_packet *res;
  2829. struct iwl4965_host_cmd cmd = {
  2830. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  2831. .data = (void *)&spectrum,
  2832. .meta.flags = CMD_WANT_SKB,
  2833. };
  2834. u32 add_time = le64_to_cpu(params->start_time);
  2835. int rc;
  2836. int spectrum_resp_status;
  2837. int duration = le16_to_cpu(params->duration);
  2838. if (iwl4965_is_associated(priv))
  2839. add_time =
  2840. iwl4965_usecs_to_beacons(
  2841. le64_to_cpu(params->start_time) - priv->last_tsf,
  2842. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2843. memset(&spectrum, 0, sizeof(spectrum));
  2844. spectrum.channel_count = cpu_to_le16(1);
  2845. spectrum.flags =
  2846. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  2847. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  2848. cmd.len = sizeof(spectrum);
  2849. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  2850. if (iwl4965_is_associated(priv))
  2851. spectrum.start_time =
  2852. iwl4965_add_beacon_time(priv->last_beacon_time,
  2853. add_time,
  2854. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2855. else
  2856. spectrum.start_time = 0;
  2857. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  2858. spectrum.channels[0].channel = params->channel;
  2859. spectrum.channels[0].type = type;
  2860. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  2861. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  2862. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  2863. rc = iwl4965_send_cmd_sync(priv, &cmd);
  2864. if (rc)
  2865. return rc;
  2866. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  2867. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  2868. IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
  2869. rc = -EIO;
  2870. }
  2871. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  2872. switch (spectrum_resp_status) {
  2873. case 0: /* Command will be handled */
  2874. if (res->u.spectrum.id != 0xff) {
  2875. IWL_DEBUG_INFO
  2876. ("Replaced existing measurement: %d\n",
  2877. res->u.spectrum.id);
  2878. priv->measurement_status &= ~MEASUREMENT_READY;
  2879. }
  2880. priv->measurement_status |= MEASUREMENT_ACTIVE;
  2881. rc = 0;
  2882. break;
  2883. case 1: /* Command will not be handled */
  2884. rc = -EAGAIN;
  2885. break;
  2886. }
  2887. dev_kfree_skb_any(cmd.meta.u.skb);
  2888. return rc;
  2889. }
  2890. #endif
  2891. static void iwl4965_txstatus_to_ieee(struct iwl4965_priv *priv,
  2892. struct iwl4965_tx_info *tx_sta)
  2893. {
  2894. tx_sta->status.ack_signal = 0;
  2895. tx_sta->status.excessive_retries = 0;
  2896. tx_sta->status.queue_length = 0;
  2897. tx_sta->status.queue_number = 0;
  2898. if (in_interrupt())
  2899. ieee80211_tx_status_irqsafe(priv->hw,
  2900. tx_sta->skb[0], &(tx_sta->status));
  2901. else
  2902. ieee80211_tx_status(priv->hw,
  2903. tx_sta->skb[0], &(tx_sta->status));
  2904. tx_sta->skb[0] = NULL;
  2905. }
  2906. /**
  2907. * iwl4965_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
  2908. *
  2909. * When FW advances 'R' index, all entries between old and new 'R' index
  2910. * need to be reclaimed. As result, some free space forms. If there is
  2911. * enough free space (> low mark), wake the stack that feeds us.
  2912. */
  2913. int iwl4965_tx_queue_reclaim(struct iwl4965_priv *priv, int txq_id, int index)
  2914. {
  2915. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  2916. struct iwl4965_queue *q = &txq->q;
  2917. int nfreed = 0;
  2918. if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
  2919. IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
  2920. "is out of range [0-%d] %d %d.\n", txq_id,
  2921. index, q->n_bd, q->write_ptr, q->read_ptr);
  2922. return 0;
  2923. }
  2924. for (index = iwl4965_queue_inc_wrap(index, q->n_bd);
  2925. q->read_ptr != index;
  2926. q->read_ptr = iwl4965_queue_inc_wrap(q->read_ptr, q->n_bd)) {
  2927. if (txq_id != IWL_CMD_QUEUE_NUM) {
  2928. iwl4965_txstatus_to_ieee(priv,
  2929. &(txq->txb[txq->q.read_ptr]));
  2930. iwl4965_hw_txq_free_tfd(priv, txq);
  2931. } else if (nfreed > 1) {
  2932. IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
  2933. q->write_ptr, q->read_ptr);
  2934. queue_work(priv->workqueue, &priv->restart);
  2935. }
  2936. nfreed++;
  2937. }
  2938. if (iwl4965_queue_space(q) > q->low_mark && (txq_id >= 0) &&
  2939. (txq_id != IWL_CMD_QUEUE_NUM) &&
  2940. priv->mac80211_registered)
  2941. ieee80211_wake_queue(priv->hw, txq_id);
  2942. return nfreed;
  2943. }
  2944. static int iwl4965_is_tx_success(u32 status)
  2945. {
  2946. status &= TX_STATUS_MSK;
  2947. return (status == TX_STATUS_SUCCESS)
  2948. || (status == TX_STATUS_DIRECT_DONE);
  2949. }
  2950. /******************************************************************************
  2951. *
  2952. * Generic RX handler implementations
  2953. *
  2954. ******************************************************************************/
  2955. #ifdef CONFIG_IWL4965_HT
  2956. #ifdef CONFIG_IWL4965_HT_AGG
  2957. static inline int iwl4965_get_ra_sta_id(struct iwl4965_priv *priv,
  2958. struct ieee80211_hdr *hdr)
  2959. {
  2960. if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
  2961. return IWL_AP_ID;
  2962. else {
  2963. u8 *da = ieee80211_get_DA(hdr);
  2964. return iwl4965_hw_find_station(priv, da);
  2965. }
  2966. }
  2967. static struct ieee80211_hdr *iwl4965_tx_queue_get_hdr(
  2968. struct iwl4965_priv *priv, int txq_id, int idx)
  2969. {
  2970. if (priv->txq[txq_id].txb[idx].skb[0])
  2971. return (struct ieee80211_hdr *)priv->txq[txq_id].
  2972. txb[idx].skb[0]->data;
  2973. return NULL;
  2974. }
  2975. static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
  2976. {
  2977. __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
  2978. tx_resp->frame_count);
  2979. return le32_to_cpu(*scd_ssn) & MAX_SN;
  2980. }
  2981. /**
  2982. * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
  2983. */
  2984. static int iwl4965_tx_status_reply_tx(struct iwl4965_priv *priv,
  2985. struct iwl4965_ht_agg *agg,
  2986. struct iwl4965_tx_resp *tx_resp,
  2987. u16 start_idx)
  2988. {
  2989. u32 status;
  2990. __le32 *frame_status = &tx_resp->status;
  2991. struct ieee80211_tx_status *tx_status = NULL;
  2992. struct ieee80211_hdr *hdr = NULL;
  2993. int i, sh;
  2994. int txq_id, idx;
  2995. u16 seq;
  2996. if (agg->wait_for_ba)
  2997. IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
  2998. agg->frame_count = tx_resp->frame_count;
  2999. agg->start_idx = start_idx;
  3000. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  3001. agg->bitmap0 = agg->bitmap1 = 0;
  3002. /* # frames attempted by Tx command */
  3003. if (agg->frame_count == 1) {
  3004. /* Only one frame was attempted; no block-ack will arrive */
  3005. struct iwl4965_tx_queue *txq ;
  3006. status = le32_to_cpu(frame_status[0]);
  3007. txq_id = agg->txq_id;
  3008. txq = &priv->txq[txq_id];
  3009. /* FIXME: code repetition */
  3010. IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d \n",
  3011. agg->frame_count, agg->start_idx);
  3012. tx_status = &(priv->txq[txq_id].txb[txq->q.read_ptr].status);
  3013. tx_status->retry_count = tx_resp->failure_frame;
  3014. tx_status->queue_number = status & 0xff;
  3015. tx_status->queue_length = tx_resp->bt_kill_count;
  3016. tx_status->queue_length |= tx_resp->failure_rts;
  3017. tx_status->flags = iwl4965_is_tx_success(status)?
  3018. IEEE80211_TX_STATUS_ACK : 0;
  3019. tx_status->control.tx_rate =
  3020. iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags);
  3021. /* FIXME: code repetition end */
  3022. IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
  3023. status & 0xff, tx_resp->failure_frame);
  3024. IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
  3025. iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags));
  3026. agg->wait_for_ba = 0;
  3027. } else {
  3028. /* Two or more frames were attempted; expect block-ack */
  3029. u64 bitmap = 0;
  3030. int start = agg->start_idx;
  3031. /* Construct bit-map of pending frames within Tx window */
  3032. for (i = 0; i < agg->frame_count; i++) {
  3033. u16 sc;
  3034. status = le32_to_cpu(frame_status[i]);
  3035. seq = status >> 16;
  3036. idx = SEQ_TO_INDEX(seq);
  3037. txq_id = SEQ_TO_QUEUE(seq);
  3038. if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
  3039. AGG_TX_STATE_ABORT_MSK))
  3040. continue;
  3041. IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
  3042. agg->frame_count, txq_id, idx);
  3043. hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, idx);
  3044. sc = le16_to_cpu(hdr->seq_ctrl);
  3045. if (idx != (SEQ_TO_SN(sc) & 0xff)) {
  3046. IWL_ERROR("BUG_ON idx doesn't match seq control"
  3047. " idx=%d, seq_idx=%d, seq=%d\n",
  3048. idx, SEQ_TO_SN(sc),
  3049. hdr->seq_ctrl);
  3050. return -1;
  3051. }
  3052. IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
  3053. i, idx, SEQ_TO_SN(sc));
  3054. sh = idx - start;
  3055. if (sh > 64) {
  3056. sh = (start - idx) + 0xff;
  3057. bitmap = bitmap << sh;
  3058. sh = 0;
  3059. start = idx;
  3060. } else if (sh < -64)
  3061. sh = 0xff - (start - idx);
  3062. else if (sh < 0) {
  3063. sh = start - idx;
  3064. start = idx;
  3065. bitmap = bitmap << sh;
  3066. sh = 0;
  3067. }
  3068. bitmap |= (1 << sh);
  3069. IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
  3070. start, (u32)(bitmap & 0xFFFFFFFF));
  3071. }
  3072. agg->bitmap0 = bitmap & 0xFFFFFFFF;
  3073. agg->bitmap1 = bitmap >> 32;
  3074. agg->start_idx = start;
  3075. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  3076. IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%x\n",
  3077. agg->frame_count, agg->start_idx,
  3078. agg->bitmap0);
  3079. if (bitmap)
  3080. agg->wait_for_ba = 1;
  3081. }
  3082. return 0;
  3083. }
  3084. #endif
  3085. #endif
  3086. /**
  3087. * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
  3088. */
  3089. static void iwl4965_rx_reply_tx(struct iwl4965_priv *priv,
  3090. struct iwl4965_rx_mem_buffer *rxb)
  3091. {
  3092. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3093. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  3094. int txq_id = SEQ_TO_QUEUE(sequence);
  3095. int index = SEQ_TO_INDEX(sequence);
  3096. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  3097. struct ieee80211_tx_status *tx_status;
  3098. struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
  3099. u32 status = le32_to_cpu(tx_resp->status);
  3100. #ifdef CONFIG_IWL4965_HT
  3101. #ifdef CONFIG_IWL4965_HT_AGG
  3102. int tid, sta_id;
  3103. #endif
  3104. #endif
  3105. if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
  3106. IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
  3107. "is out of range [0-%d] %d %d\n", txq_id,
  3108. index, txq->q.n_bd, txq->q.write_ptr,
  3109. txq->q.read_ptr);
  3110. return;
  3111. }
  3112. #ifdef CONFIG_IWL4965_HT
  3113. #ifdef CONFIG_IWL4965_HT_AGG
  3114. if (txq->sched_retry) {
  3115. const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
  3116. struct ieee80211_hdr *hdr =
  3117. iwl4965_tx_queue_get_hdr(priv, txq_id, index);
  3118. struct iwl4965_ht_agg *agg = NULL;
  3119. __le16 *qc = ieee80211_get_qos_ctrl(hdr);
  3120. if (qc == NULL) {
  3121. IWL_ERROR("BUG_ON qc is null!!!!\n");
  3122. return;
  3123. }
  3124. tid = le16_to_cpu(*qc) & 0xf;
  3125. sta_id = iwl4965_get_ra_sta_id(priv, hdr);
  3126. if (unlikely(sta_id == IWL_INVALID_STATION)) {
  3127. IWL_ERROR("Station not known for\n");
  3128. return;
  3129. }
  3130. agg = &priv->stations[sta_id].tid[tid].agg;
  3131. iwl4965_tx_status_reply_tx(priv, agg, tx_resp, index);
  3132. if ((tx_resp->frame_count == 1) &&
  3133. !iwl4965_is_tx_success(status)) {
  3134. /* TODO: send BAR */
  3135. }
  3136. if ((txq->q.read_ptr != (scd_ssn & 0xff))) {
  3137. index = iwl4965_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
  3138. IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
  3139. "%d index %d\n", scd_ssn , index);
  3140. iwl4965_tx_queue_reclaim(priv, txq_id, index);
  3141. }
  3142. } else {
  3143. #endif /* CONFIG_IWL4965_HT_AGG */
  3144. #endif /* CONFIG_IWL4965_HT */
  3145. tx_status = &(txq->txb[txq->q.read_ptr].status);
  3146. tx_status->retry_count = tx_resp->failure_frame;
  3147. tx_status->queue_number = status;
  3148. tx_status->queue_length = tx_resp->bt_kill_count;
  3149. tx_status->queue_length |= tx_resp->failure_rts;
  3150. tx_status->flags =
  3151. iwl4965_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
  3152. tx_status->control.tx_rate =
  3153. iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags);
  3154. IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x "
  3155. "retries %d\n", txq_id, iwl4965_get_tx_fail_reason(status),
  3156. status, le32_to_cpu(tx_resp->rate_n_flags),
  3157. tx_resp->failure_frame);
  3158. IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
  3159. if (index != -1)
  3160. iwl4965_tx_queue_reclaim(priv, txq_id, index);
  3161. #ifdef CONFIG_IWL4965_HT
  3162. #ifdef CONFIG_IWL4965_HT_AGG
  3163. }
  3164. #endif /* CONFIG_IWL4965_HT_AGG */
  3165. #endif /* CONFIG_IWL4965_HT */
  3166. if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
  3167. IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
  3168. }
  3169. static void iwl4965_rx_reply_alive(struct iwl4965_priv *priv,
  3170. struct iwl4965_rx_mem_buffer *rxb)
  3171. {
  3172. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3173. struct iwl4965_alive_resp *palive;
  3174. struct delayed_work *pwork;
  3175. palive = &pkt->u.alive_frame;
  3176. IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
  3177. "0x%01X 0x%01X\n",
  3178. palive->is_valid, palive->ver_type,
  3179. palive->ver_subtype);
  3180. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  3181. IWL_DEBUG_INFO("Initialization Alive received.\n");
  3182. memcpy(&priv->card_alive_init,
  3183. &pkt->u.alive_frame,
  3184. sizeof(struct iwl4965_init_alive_resp));
  3185. pwork = &priv->init_alive_start;
  3186. } else {
  3187. IWL_DEBUG_INFO("Runtime Alive received.\n");
  3188. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  3189. sizeof(struct iwl4965_alive_resp));
  3190. pwork = &priv->alive_start;
  3191. }
  3192. /* We delay the ALIVE response by 5ms to
  3193. * give the HW RF Kill time to activate... */
  3194. if (palive->is_valid == UCODE_VALID_OK)
  3195. queue_delayed_work(priv->workqueue, pwork,
  3196. msecs_to_jiffies(5));
  3197. else
  3198. IWL_WARNING("uCode did not respond OK.\n");
  3199. }
  3200. static void iwl4965_rx_reply_add_sta(struct iwl4965_priv *priv,
  3201. struct iwl4965_rx_mem_buffer *rxb)
  3202. {
  3203. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3204. IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  3205. return;
  3206. }
  3207. static void iwl4965_rx_reply_error(struct iwl4965_priv *priv,
  3208. struct iwl4965_rx_mem_buffer *rxb)
  3209. {
  3210. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3211. IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
  3212. "seq 0x%04X ser 0x%08X\n",
  3213. le32_to_cpu(pkt->u.err_resp.error_type),
  3214. get_cmd_string(pkt->u.err_resp.cmd_id),
  3215. pkt->u.err_resp.cmd_id,
  3216. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  3217. le32_to_cpu(pkt->u.err_resp.error_info));
  3218. }
  3219. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  3220. static void iwl4965_rx_csa(struct iwl4965_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
  3221. {
  3222. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3223. struct iwl4965_rxon_cmd *rxon = (void *)&priv->active_rxon;
  3224. struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
  3225. IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
  3226. le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
  3227. rxon->channel = csa->channel;
  3228. priv->staging_rxon.channel = csa->channel;
  3229. }
  3230. static void iwl4965_rx_spectrum_measure_notif(struct iwl4965_priv *priv,
  3231. struct iwl4965_rx_mem_buffer *rxb)
  3232. {
  3233. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  3234. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3235. struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
  3236. if (!report->state) {
  3237. IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
  3238. "Spectrum Measure Notification: Start\n");
  3239. return;
  3240. }
  3241. memcpy(&priv->measure_report, report, sizeof(*report));
  3242. priv->measurement_status |= MEASUREMENT_READY;
  3243. #endif
  3244. }
  3245. static void iwl4965_rx_pm_sleep_notif(struct iwl4965_priv *priv,
  3246. struct iwl4965_rx_mem_buffer *rxb)
  3247. {
  3248. #ifdef CONFIG_IWL4965_DEBUG
  3249. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3250. struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
  3251. IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
  3252. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  3253. #endif
  3254. }
  3255. static void iwl4965_rx_pm_debug_statistics_notif(struct iwl4965_priv *priv,
  3256. struct iwl4965_rx_mem_buffer *rxb)
  3257. {
  3258. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3259. IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
  3260. "notification for %s:\n",
  3261. le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
  3262. iwl4965_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
  3263. }
  3264. static void iwl4965_bg_beacon_update(struct work_struct *work)
  3265. {
  3266. struct iwl4965_priv *priv =
  3267. container_of(work, struct iwl4965_priv, beacon_update);
  3268. struct sk_buff *beacon;
  3269. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  3270. beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL);
  3271. if (!beacon) {
  3272. IWL_ERROR("update beacon failed\n");
  3273. return;
  3274. }
  3275. mutex_lock(&priv->mutex);
  3276. /* new beacon skb is allocated every time; dispose previous.*/
  3277. if (priv->ibss_beacon)
  3278. dev_kfree_skb(priv->ibss_beacon);
  3279. priv->ibss_beacon = beacon;
  3280. mutex_unlock(&priv->mutex);
  3281. iwl4965_send_beacon_cmd(priv);
  3282. }
  3283. static void iwl4965_rx_beacon_notif(struct iwl4965_priv *priv,
  3284. struct iwl4965_rx_mem_buffer *rxb)
  3285. {
  3286. #ifdef CONFIG_IWL4965_DEBUG
  3287. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3288. struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
  3289. u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
  3290. IWL_DEBUG_RX("beacon status %x retries %d iss %d "
  3291. "tsf %d %d rate %d\n",
  3292. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  3293. beacon->beacon_notify_hdr.failure_frame,
  3294. le32_to_cpu(beacon->ibss_mgr_status),
  3295. le32_to_cpu(beacon->high_tsf),
  3296. le32_to_cpu(beacon->low_tsf), rate);
  3297. #endif
  3298. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  3299. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  3300. queue_work(priv->workqueue, &priv->beacon_update);
  3301. }
  3302. /* Service response to REPLY_SCAN_CMD (0x80) */
  3303. static void iwl4965_rx_reply_scan(struct iwl4965_priv *priv,
  3304. struct iwl4965_rx_mem_buffer *rxb)
  3305. {
  3306. #ifdef CONFIG_IWL4965_DEBUG
  3307. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3308. struct iwl4965_scanreq_notification *notif =
  3309. (struct iwl4965_scanreq_notification *)pkt->u.raw;
  3310. IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
  3311. #endif
  3312. }
  3313. /* Service SCAN_START_NOTIFICATION (0x82) */
  3314. static void iwl4965_rx_scan_start_notif(struct iwl4965_priv *priv,
  3315. struct iwl4965_rx_mem_buffer *rxb)
  3316. {
  3317. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3318. struct iwl4965_scanstart_notification *notif =
  3319. (struct iwl4965_scanstart_notification *)pkt->u.raw;
  3320. priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
  3321. IWL_DEBUG_SCAN("Scan start: "
  3322. "%d [802.11%s] "
  3323. "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
  3324. notif->channel,
  3325. notif->band ? "bg" : "a",
  3326. notif->tsf_high,
  3327. notif->tsf_low, notif->status, notif->beacon_timer);
  3328. }
  3329. /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
  3330. static void iwl4965_rx_scan_results_notif(struct iwl4965_priv *priv,
  3331. struct iwl4965_rx_mem_buffer *rxb)
  3332. {
  3333. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3334. struct iwl4965_scanresults_notification *notif =
  3335. (struct iwl4965_scanresults_notification *)pkt->u.raw;
  3336. IWL_DEBUG_SCAN("Scan ch.res: "
  3337. "%d [802.11%s] "
  3338. "(TSF: 0x%08X:%08X) - %d "
  3339. "elapsed=%lu usec (%dms since last)\n",
  3340. notif->channel,
  3341. notif->band ? "bg" : "a",
  3342. le32_to_cpu(notif->tsf_high),
  3343. le32_to_cpu(notif->tsf_low),
  3344. le32_to_cpu(notif->statistics[0]),
  3345. le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
  3346. jiffies_to_msecs(elapsed_jiffies
  3347. (priv->last_scan_jiffies, jiffies)));
  3348. priv->last_scan_jiffies = jiffies;
  3349. priv->next_scan_jiffies = 0;
  3350. }
  3351. /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
  3352. static void iwl4965_rx_scan_complete_notif(struct iwl4965_priv *priv,
  3353. struct iwl4965_rx_mem_buffer *rxb)
  3354. {
  3355. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3356. struct iwl4965_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
  3357. IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
  3358. scan_notif->scanned_channels,
  3359. scan_notif->tsf_low,
  3360. scan_notif->tsf_high, scan_notif->status);
  3361. /* The HW is no longer scanning */
  3362. clear_bit(STATUS_SCAN_HW, &priv->status);
  3363. /* The scan completion notification came in, so kill that timer... */
  3364. cancel_delayed_work(&priv->scan_check);
  3365. IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
  3366. (priv->scan_bands == 2) ? "2.4" : "5.2",
  3367. jiffies_to_msecs(elapsed_jiffies
  3368. (priv->scan_pass_start, jiffies)));
  3369. /* Remove this scanned band from the list
  3370. * of pending bands to scan */
  3371. priv->scan_bands--;
  3372. /* If a request to abort was given, or the scan did not succeed
  3373. * then we reset the scan state machine and terminate,
  3374. * re-queuing another scan if one has been requested */
  3375. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  3376. IWL_DEBUG_INFO("Aborted scan completed.\n");
  3377. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  3378. } else {
  3379. /* If there are more bands on this scan pass reschedule */
  3380. if (priv->scan_bands > 0)
  3381. goto reschedule;
  3382. }
  3383. priv->last_scan_jiffies = jiffies;
  3384. priv->next_scan_jiffies = 0;
  3385. IWL_DEBUG_INFO("Setting scan to off\n");
  3386. clear_bit(STATUS_SCANNING, &priv->status);
  3387. IWL_DEBUG_INFO("Scan took %dms\n",
  3388. jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
  3389. queue_work(priv->workqueue, &priv->scan_completed);
  3390. return;
  3391. reschedule:
  3392. priv->scan_pass_start = jiffies;
  3393. queue_work(priv->workqueue, &priv->request_scan);
  3394. }
  3395. /* Handle notification from uCode that card's power state is changing
  3396. * due to software, hardware, or critical temperature RFKILL */
  3397. static void iwl4965_rx_card_state_notif(struct iwl4965_priv *priv,
  3398. struct iwl4965_rx_mem_buffer *rxb)
  3399. {
  3400. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3401. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  3402. unsigned long status = priv->status;
  3403. IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
  3404. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  3405. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  3406. if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
  3407. RF_CARD_DISABLED)) {
  3408. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  3409. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3410. if (!iwl4965_grab_nic_access(priv)) {
  3411. iwl4965_write_direct32(
  3412. priv, HBUS_TARG_MBX_C,
  3413. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  3414. iwl4965_release_nic_access(priv);
  3415. }
  3416. if (!(flags & RXON_CARD_DISABLED)) {
  3417. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  3418. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3419. if (!iwl4965_grab_nic_access(priv)) {
  3420. iwl4965_write_direct32(
  3421. priv, HBUS_TARG_MBX_C,
  3422. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  3423. iwl4965_release_nic_access(priv);
  3424. }
  3425. }
  3426. if (flags & RF_CARD_DISABLED) {
  3427. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  3428. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  3429. iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  3430. if (!iwl4965_grab_nic_access(priv))
  3431. iwl4965_release_nic_access(priv);
  3432. }
  3433. }
  3434. if (flags & HW_CARD_DISABLED)
  3435. set_bit(STATUS_RF_KILL_HW, &priv->status);
  3436. else
  3437. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  3438. if (flags & SW_CARD_DISABLED)
  3439. set_bit(STATUS_RF_KILL_SW, &priv->status);
  3440. else
  3441. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  3442. if (!(flags & RXON_CARD_DISABLED))
  3443. iwl4965_scan_cancel(priv);
  3444. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  3445. test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
  3446. (test_bit(STATUS_RF_KILL_SW, &status) !=
  3447. test_bit(STATUS_RF_KILL_SW, &priv->status)))
  3448. queue_work(priv->workqueue, &priv->rf_kill);
  3449. else
  3450. wake_up_interruptible(&priv->wait_command_queue);
  3451. }
  3452. /**
  3453. * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
  3454. *
  3455. * Setup the RX handlers for each of the reply types sent from the uCode
  3456. * to the host.
  3457. *
  3458. * This function chains into the hardware specific files for them to setup
  3459. * any hardware specific handlers as well.
  3460. */
  3461. static void iwl4965_setup_rx_handlers(struct iwl4965_priv *priv)
  3462. {
  3463. priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive;
  3464. priv->rx_handlers[REPLY_ADD_STA] = iwl4965_rx_reply_add_sta;
  3465. priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
  3466. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
  3467. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  3468. iwl4965_rx_spectrum_measure_notif;
  3469. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
  3470. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  3471. iwl4965_rx_pm_debug_statistics_notif;
  3472. priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
  3473. /*
  3474. * The same handler is used for both the REPLY to a discrete
  3475. * statistics request from the host as well as for the periodic
  3476. * statistics notifications (after received beacons) from the uCode.
  3477. */
  3478. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics;
  3479. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics;
  3480. priv->rx_handlers[REPLY_SCAN_CMD] = iwl4965_rx_reply_scan;
  3481. priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl4965_rx_scan_start_notif;
  3482. priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
  3483. iwl4965_rx_scan_results_notif;
  3484. priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
  3485. iwl4965_rx_scan_complete_notif;
  3486. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
  3487. priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
  3488. /* Set up hardware specific Rx handlers */
  3489. iwl4965_hw_rx_handler_setup(priv);
  3490. }
  3491. /**
  3492. * iwl4965_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
  3493. * @rxb: Rx buffer to reclaim
  3494. *
  3495. * If an Rx buffer has an async callback associated with it the callback
  3496. * will be executed. The attached skb (if present) will only be freed
  3497. * if the callback returns 1
  3498. */
  3499. static void iwl4965_tx_cmd_complete(struct iwl4965_priv *priv,
  3500. struct iwl4965_rx_mem_buffer *rxb)
  3501. {
  3502. struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3503. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  3504. int txq_id = SEQ_TO_QUEUE(sequence);
  3505. int index = SEQ_TO_INDEX(sequence);
  3506. int huge = sequence & SEQ_HUGE_FRAME;
  3507. int cmd_index;
  3508. struct iwl4965_cmd *cmd;
  3509. /* If a Tx command is being handled and it isn't in the actual
  3510. * command queue then there a command routing bug has been introduced
  3511. * in the queue management code. */
  3512. if (txq_id != IWL_CMD_QUEUE_NUM)
  3513. IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
  3514. txq_id, pkt->hdr.cmd);
  3515. BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
  3516. cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
  3517. cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
  3518. /* Input error checking is done when commands are added to queue. */
  3519. if (cmd->meta.flags & CMD_WANT_SKB) {
  3520. cmd->meta.source->u.skb = rxb->skb;
  3521. rxb->skb = NULL;
  3522. } else if (cmd->meta.u.callback &&
  3523. !cmd->meta.u.callback(priv, cmd, rxb->skb))
  3524. rxb->skb = NULL;
  3525. iwl4965_tx_queue_reclaim(priv, txq_id, index);
  3526. if (!(cmd->meta.flags & CMD_ASYNC)) {
  3527. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3528. wake_up_interruptible(&priv->wait_command_queue);
  3529. }
  3530. }
  3531. /************************** RX-FUNCTIONS ****************************/
  3532. /*
  3533. * Rx theory of operation
  3534. *
  3535. * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
  3536. * each of which point to Receive Buffers to be filled by 4965. These get
  3537. * used not only for Rx frames, but for any command response or notification
  3538. * from the 4965. The driver and 4965 manage the Rx buffers by means
  3539. * of indexes into the circular buffer.
  3540. *
  3541. * Rx Queue Indexes
  3542. * The host/firmware share two index registers for managing the Rx buffers.
  3543. *
  3544. * The READ index maps to the first position that the firmware may be writing
  3545. * to -- the driver can read up to (but not including) this position and get
  3546. * good data.
  3547. * The READ index is managed by the firmware once the card is enabled.
  3548. *
  3549. * The WRITE index maps to the last position the driver has read from -- the
  3550. * position preceding WRITE is the last slot the firmware can place a packet.
  3551. *
  3552. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  3553. * WRITE = READ.
  3554. *
  3555. * During initialization, the host sets up the READ queue position to the first
  3556. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  3557. *
  3558. * When the firmware places a packet in a buffer, it will advance the READ index
  3559. * and fire the RX interrupt. The driver can then query the READ index and
  3560. * process as many packets as possible, moving the WRITE index forward as it
  3561. * resets the Rx queue buffers with new memory.
  3562. *
  3563. * The management in the driver is as follows:
  3564. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  3565. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  3566. * to replenish the iwl->rxq->rx_free.
  3567. * + In iwl4965_rx_replenish (scheduled) if 'processed' != 'read' then the
  3568. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  3569. * 'processed' and 'read' driver indexes as well)
  3570. * + A received packet is processed and handed to the kernel network stack,
  3571. * detached from the iwl->rxq. The driver 'processed' index is updated.
  3572. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  3573. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  3574. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  3575. * were enough free buffers and RX_STALLED is set it is cleared.
  3576. *
  3577. *
  3578. * Driver sequence:
  3579. *
  3580. * iwl4965_rx_queue_alloc() Allocates rx_free
  3581. * iwl4965_rx_replenish() Replenishes rx_free list from rx_used, and calls
  3582. * iwl4965_rx_queue_restock
  3583. * iwl4965_rx_queue_restock() Moves available buffers from rx_free into Rx
  3584. * queue, updates firmware pointers, and updates
  3585. * the WRITE index. If insufficient rx_free buffers
  3586. * are available, schedules iwl4965_rx_replenish
  3587. *
  3588. * -- enable interrupts --
  3589. * ISR - iwl4965_rx() Detach iwl4965_rx_mem_buffers from pool up to the
  3590. * READ INDEX, detaching the SKB from the pool.
  3591. * Moves the packet buffer from queue to rx_used.
  3592. * Calls iwl4965_rx_queue_restock to refill any empty
  3593. * slots.
  3594. * ...
  3595. *
  3596. */
  3597. /**
  3598. * iwl4965_rx_queue_space - Return number of free slots available in queue.
  3599. */
  3600. static int iwl4965_rx_queue_space(const struct iwl4965_rx_queue *q)
  3601. {
  3602. int s = q->read - q->write;
  3603. if (s <= 0)
  3604. s += RX_QUEUE_SIZE;
  3605. /* keep some buffer to not confuse full and empty queue */
  3606. s -= 2;
  3607. if (s < 0)
  3608. s = 0;
  3609. return s;
  3610. }
  3611. /**
  3612. * iwl4965_rx_queue_update_write_ptr - Update the write pointer for the RX queue
  3613. */
  3614. int iwl4965_rx_queue_update_write_ptr(struct iwl4965_priv *priv, struct iwl4965_rx_queue *q)
  3615. {
  3616. u32 reg = 0;
  3617. int rc = 0;
  3618. unsigned long flags;
  3619. spin_lock_irqsave(&q->lock, flags);
  3620. if (q->need_update == 0)
  3621. goto exit_unlock;
  3622. /* If power-saving is in use, make sure device is awake */
  3623. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3624. reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  3625. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3626. iwl4965_set_bit(priv, CSR_GP_CNTRL,
  3627. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3628. goto exit_unlock;
  3629. }
  3630. rc = iwl4965_grab_nic_access(priv);
  3631. if (rc)
  3632. goto exit_unlock;
  3633. /* Device expects a multiple of 8 */
  3634. iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
  3635. q->write & ~0x7);
  3636. iwl4965_release_nic_access(priv);
  3637. /* Else device is assumed to be awake */
  3638. } else
  3639. /* Device expects a multiple of 8 */
  3640. iwl4965_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
  3641. q->need_update = 0;
  3642. exit_unlock:
  3643. spin_unlock_irqrestore(&q->lock, flags);
  3644. return rc;
  3645. }
  3646. /**
  3647. * iwl4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  3648. */
  3649. static inline __le32 iwl4965_dma_addr2rbd_ptr(struct iwl4965_priv *priv,
  3650. dma_addr_t dma_addr)
  3651. {
  3652. return cpu_to_le32((u32)(dma_addr >> 8));
  3653. }
  3654. /**
  3655. * iwl4965_rx_queue_restock - refill RX queue from pre-allocated pool
  3656. *
  3657. * If there are slots in the RX queue that need to be restocked,
  3658. * and we have free pre-allocated buffers, fill the ranks as much
  3659. * as we can, pulling from rx_free.
  3660. *
  3661. * This moves the 'write' index forward to catch up with 'processed', and
  3662. * also updates the memory address in the firmware to reference the new
  3663. * target buffer.
  3664. */
  3665. static int iwl4965_rx_queue_restock(struct iwl4965_priv *priv)
  3666. {
  3667. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3668. struct list_head *element;
  3669. struct iwl4965_rx_mem_buffer *rxb;
  3670. unsigned long flags;
  3671. int write, rc;
  3672. spin_lock_irqsave(&rxq->lock, flags);
  3673. write = rxq->write & ~0x7;
  3674. while ((iwl4965_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  3675. /* Get next free Rx buffer, remove from free list */
  3676. element = rxq->rx_free.next;
  3677. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3678. list_del(element);
  3679. /* Point to Rx buffer via next RBD in circular buffer */
  3680. rxq->bd[rxq->write] = iwl4965_dma_addr2rbd_ptr(priv, rxb->dma_addr);
  3681. rxq->queue[rxq->write] = rxb;
  3682. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  3683. rxq->free_count--;
  3684. }
  3685. spin_unlock_irqrestore(&rxq->lock, flags);
  3686. /* If the pre-allocated buffer pool is dropping low, schedule to
  3687. * refill it */
  3688. if (rxq->free_count <= RX_LOW_WATERMARK)
  3689. queue_work(priv->workqueue, &priv->rx_replenish);
  3690. /* If we've added more space for the firmware to place data, tell it.
  3691. * Increment device's write pointer in multiples of 8. */
  3692. if ((write != (rxq->write & ~0x7))
  3693. || (abs(rxq->write - rxq->read) > 7)) {
  3694. spin_lock_irqsave(&rxq->lock, flags);
  3695. rxq->need_update = 1;
  3696. spin_unlock_irqrestore(&rxq->lock, flags);
  3697. rc = iwl4965_rx_queue_update_write_ptr(priv, rxq);
  3698. if (rc)
  3699. return rc;
  3700. }
  3701. return 0;
  3702. }
  3703. /**
  3704. * iwl4965_rx_replenish - Move all used packet from rx_used to rx_free
  3705. *
  3706. * When moving to rx_free an SKB is allocated for the slot.
  3707. *
  3708. * Also restock the Rx queue via iwl4965_rx_queue_restock.
  3709. * This is called as a scheduled work item (except for during initialization)
  3710. */
  3711. static void iwl4965_rx_allocate(struct iwl4965_priv *priv)
  3712. {
  3713. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3714. struct list_head *element;
  3715. struct iwl4965_rx_mem_buffer *rxb;
  3716. unsigned long flags;
  3717. spin_lock_irqsave(&rxq->lock, flags);
  3718. while (!list_empty(&rxq->rx_used)) {
  3719. element = rxq->rx_used.next;
  3720. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3721. /* Alloc a new receive buffer */
  3722. rxb->skb =
  3723. alloc_skb(priv->hw_setting.rx_buf_size,
  3724. __GFP_NOWARN | GFP_ATOMIC);
  3725. if (!rxb->skb) {
  3726. if (net_ratelimit())
  3727. printk(KERN_CRIT DRV_NAME
  3728. ": Can not allocate SKB buffers\n");
  3729. /* We don't reschedule replenish work here -- we will
  3730. * call the restock method and if it still needs
  3731. * more buffers it will schedule replenish */
  3732. break;
  3733. }
  3734. priv->alloc_rxb_skb++;
  3735. list_del(element);
  3736. /* Get physical address of RB/SKB */
  3737. rxb->dma_addr =
  3738. pci_map_single(priv->pci_dev, rxb->skb->data,
  3739. priv->hw_setting.rx_buf_size, PCI_DMA_FROMDEVICE);
  3740. list_add_tail(&rxb->list, &rxq->rx_free);
  3741. rxq->free_count++;
  3742. }
  3743. spin_unlock_irqrestore(&rxq->lock, flags);
  3744. }
  3745. /*
  3746. * this should be called while priv->lock is locked
  3747. */
  3748. static void __iwl4965_rx_replenish(void *data)
  3749. {
  3750. struct iwl4965_priv *priv = data;
  3751. iwl4965_rx_allocate(priv);
  3752. iwl4965_rx_queue_restock(priv);
  3753. }
  3754. void iwl4965_rx_replenish(void *data)
  3755. {
  3756. struct iwl4965_priv *priv = data;
  3757. unsigned long flags;
  3758. iwl4965_rx_allocate(priv);
  3759. spin_lock_irqsave(&priv->lock, flags);
  3760. iwl4965_rx_queue_restock(priv);
  3761. spin_unlock_irqrestore(&priv->lock, flags);
  3762. }
  3763. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  3764. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  3765. * This free routine walks the list of POOL entries and if SKB is set to
  3766. * non NULL it is unmapped and freed
  3767. */
  3768. static void iwl4965_rx_queue_free(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
  3769. {
  3770. int i;
  3771. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  3772. if (rxq->pool[i].skb != NULL) {
  3773. pci_unmap_single(priv->pci_dev,
  3774. rxq->pool[i].dma_addr,
  3775. priv->hw_setting.rx_buf_size,
  3776. PCI_DMA_FROMDEVICE);
  3777. dev_kfree_skb(rxq->pool[i].skb);
  3778. }
  3779. }
  3780. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  3781. rxq->dma_addr);
  3782. rxq->bd = NULL;
  3783. }
  3784. int iwl4965_rx_queue_alloc(struct iwl4965_priv *priv)
  3785. {
  3786. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3787. struct pci_dev *dev = priv->pci_dev;
  3788. int i;
  3789. spin_lock_init(&rxq->lock);
  3790. INIT_LIST_HEAD(&rxq->rx_free);
  3791. INIT_LIST_HEAD(&rxq->rx_used);
  3792. /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
  3793. rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
  3794. if (!rxq->bd)
  3795. return -ENOMEM;
  3796. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3797. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
  3798. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3799. /* Set us so that we have processed and used all buffers, but have
  3800. * not restocked the Rx queue with fresh buffers */
  3801. rxq->read = rxq->write = 0;
  3802. rxq->free_count = 0;
  3803. rxq->need_update = 0;
  3804. return 0;
  3805. }
  3806. void iwl4965_rx_queue_reset(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
  3807. {
  3808. unsigned long flags;
  3809. int i;
  3810. spin_lock_irqsave(&rxq->lock, flags);
  3811. INIT_LIST_HEAD(&rxq->rx_free);
  3812. INIT_LIST_HEAD(&rxq->rx_used);
  3813. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3814. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  3815. /* In the reset function, these buffers may have been allocated
  3816. * to an SKB, so we need to unmap and free potential storage */
  3817. if (rxq->pool[i].skb != NULL) {
  3818. pci_unmap_single(priv->pci_dev,
  3819. rxq->pool[i].dma_addr,
  3820. priv->hw_setting.rx_buf_size,
  3821. PCI_DMA_FROMDEVICE);
  3822. priv->alloc_rxb_skb--;
  3823. dev_kfree_skb(rxq->pool[i].skb);
  3824. rxq->pool[i].skb = NULL;
  3825. }
  3826. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3827. }
  3828. /* Set us so that we have processed and used all buffers, but have
  3829. * not restocked the Rx queue with fresh buffers */
  3830. rxq->read = rxq->write = 0;
  3831. rxq->free_count = 0;
  3832. spin_unlock_irqrestore(&rxq->lock, flags);
  3833. }
  3834. /* Convert linear signal-to-noise ratio into dB */
  3835. static u8 ratio2dB[100] = {
  3836. /* 0 1 2 3 4 5 6 7 8 9 */
  3837. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  3838. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  3839. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  3840. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  3841. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  3842. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  3843. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  3844. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  3845. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  3846. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  3847. };
  3848. /* Calculates a relative dB value from a ratio of linear
  3849. * (i.e. not dB) signal levels.
  3850. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  3851. int iwl4965_calc_db_from_ratio(int sig_ratio)
  3852. {
  3853. /* 1000:1 or higher just report as 60 dB */
  3854. if (sig_ratio >= 1000)
  3855. return 60;
  3856. /* 100:1 or higher, divide by 10 and use table,
  3857. * add 20 dB to make up for divide by 10 */
  3858. if (sig_ratio >= 100)
  3859. return (20 + (int)ratio2dB[sig_ratio/10]);
  3860. /* We shouldn't see this */
  3861. if (sig_ratio < 1)
  3862. return 0;
  3863. /* Use table for ratios 1:1 - 99:1 */
  3864. return (int)ratio2dB[sig_ratio];
  3865. }
  3866. #define PERFECT_RSSI (-20) /* dBm */
  3867. #define WORST_RSSI (-95) /* dBm */
  3868. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  3869. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  3870. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  3871. * about formulas used below. */
  3872. int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm)
  3873. {
  3874. int sig_qual;
  3875. int degradation = PERFECT_RSSI - rssi_dbm;
  3876. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  3877. * as indicator; formula is (signal dbm - noise dbm).
  3878. * SNR at or above 40 is a great signal (100%).
  3879. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  3880. * Weakest usable signal is usually 10 - 15 dB SNR. */
  3881. if (noise_dbm) {
  3882. if (rssi_dbm - noise_dbm >= 40)
  3883. return 100;
  3884. else if (rssi_dbm < noise_dbm)
  3885. return 0;
  3886. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  3887. /* Else use just the signal level.
  3888. * This formula is a least squares fit of data points collected and
  3889. * compared with a reference system that had a percentage (%) display
  3890. * for signal quality. */
  3891. } else
  3892. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  3893. (15 * RSSI_RANGE + 62 * degradation)) /
  3894. (RSSI_RANGE * RSSI_RANGE);
  3895. if (sig_qual > 100)
  3896. sig_qual = 100;
  3897. else if (sig_qual < 1)
  3898. sig_qual = 0;
  3899. return sig_qual;
  3900. }
  3901. /**
  3902. * iwl4965_rx_handle - Main entry function for receiving responses from uCode
  3903. *
  3904. * Uses the priv->rx_handlers callback function array to invoke
  3905. * the appropriate handlers, including command responses,
  3906. * frame-received notifications, and other notifications.
  3907. */
  3908. static void iwl4965_rx_handle(struct iwl4965_priv *priv)
  3909. {
  3910. struct iwl4965_rx_mem_buffer *rxb;
  3911. struct iwl4965_rx_packet *pkt;
  3912. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3913. u32 r, i;
  3914. int reclaim;
  3915. unsigned long flags;
  3916. u8 fill_rx = 0;
  3917. u32 count = 0;
  3918. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  3919. * buffer that the driver may process (last buffer filled by ucode). */
  3920. r = iwl4965_hw_get_rx_read(priv);
  3921. i = rxq->read;
  3922. /* Rx interrupt, but nothing sent from uCode */
  3923. if (i == r)
  3924. IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  3925. if (iwl4965_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
  3926. fill_rx = 1;
  3927. while (i != r) {
  3928. rxb = rxq->queue[i];
  3929. /* If an RXB doesn't have a Rx queue slot associated with it,
  3930. * then a bug has been introduced in the queue refilling
  3931. * routines -- catch it here */
  3932. BUG_ON(rxb == NULL);
  3933. rxq->queue[i] = NULL;
  3934. pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
  3935. priv->hw_setting.rx_buf_size,
  3936. PCI_DMA_FROMDEVICE);
  3937. pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3938. /* Reclaim a command buffer only if this packet is a response
  3939. * to a (driver-originated) command.
  3940. * If the packet (e.g. Rx frame) originated from uCode,
  3941. * there is no command buffer to reclaim.
  3942. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  3943. * but apparently a few don't get set; catch them here. */
  3944. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  3945. (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
  3946. (pkt->hdr.cmd != REPLY_4965_RX) &&
  3947. (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
  3948. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  3949. (pkt->hdr.cmd != REPLY_TX);
  3950. /* Based on type of command response or notification,
  3951. * handle those that need handling via function in
  3952. * rx_handlers table. See iwl4965_setup_rx_handlers() */
  3953. if (priv->rx_handlers[pkt->hdr.cmd]) {
  3954. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3955. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  3956. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  3957. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  3958. } else {
  3959. /* No handling needed */
  3960. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3961. "r %d i %d No handler needed for %s, 0x%02x\n",
  3962. r, i, get_cmd_string(pkt->hdr.cmd),
  3963. pkt->hdr.cmd);
  3964. }
  3965. if (reclaim) {
  3966. /* Invoke any callbacks, transfer the skb to caller, and
  3967. * fire off the (possibly) blocking iwl4965_send_cmd()
  3968. * as we reclaim the driver command queue */
  3969. if (rxb && rxb->skb)
  3970. iwl4965_tx_cmd_complete(priv, rxb);
  3971. else
  3972. IWL_WARNING("Claim null rxb?\n");
  3973. }
  3974. /* For now we just don't re-use anything. We can tweak this
  3975. * later to try and re-use notification packets and SKBs that
  3976. * fail to Rx correctly */
  3977. if (rxb->skb != NULL) {
  3978. priv->alloc_rxb_skb--;
  3979. dev_kfree_skb_any(rxb->skb);
  3980. rxb->skb = NULL;
  3981. }
  3982. pci_unmap_single(priv->pci_dev, rxb->dma_addr,
  3983. priv->hw_setting.rx_buf_size,
  3984. PCI_DMA_FROMDEVICE);
  3985. spin_lock_irqsave(&rxq->lock, flags);
  3986. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  3987. spin_unlock_irqrestore(&rxq->lock, flags);
  3988. i = (i + 1) & RX_QUEUE_MASK;
  3989. /* If there are a lot of unused frames,
  3990. * restock the Rx queue so ucode wont assert. */
  3991. if (fill_rx) {
  3992. count++;
  3993. if (count >= 8) {
  3994. priv->rxq.read = i;
  3995. __iwl4965_rx_replenish(priv);
  3996. count = 0;
  3997. }
  3998. }
  3999. }
  4000. /* Backtrack one entry */
  4001. priv->rxq.read = i;
  4002. iwl4965_rx_queue_restock(priv);
  4003. }
  4004. /**
  4005. * iwl4965_tx_queue_update_write_ptr - Send new write index to hardware
  4006. */
  4007. static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
  4008. struct iwl4965_tx_queue *txq)
  4009. {
  4010. u32 reg = 0;
  4011. int rc = 0;
  4012. int txq_id = txq->q.id;
  4013. if (txq->need_update == 0)
  4014. return rc;
  4015. /* if we're trying to save power */
  4016. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  4017. /* wake up nic if it's powered down ...
  4018. * uCode will wake up, and interrupt us again, so next
  4019. * time we'll skip this part. */
  4020. reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  4021. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  4022. IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
  4023. iwl4965_set_bit(priv, CSR_GP_CNTRL,
  4024. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  4025. return rc;
  4026. }
  4027. /* restore this queue's parameters in nic hardware. */
  4028. rc = iwl4965_grab_nic_access(priv);
  4029. if (rc)
  4030. return rc;
  4031. iwl4965_write_direct32(priv, HBUS_TARG_WRPTR,
  4032. txq->q.write_ptr | (txq_id << 8));
  4033. iwl4965_release_nic_access(priv);
  4034. /* else not in power-save mode, uCode will never sleep when we're
  4035. * trying to tx (during RFKILL, we're not trying to tx). */
  4036. } else
  4037. iwl4965_write32(priv, HBUS_TARG_WRPTR,
  4038. txq->q.write_ptr | (txq_id << 8));
  4039. txq->need_update = 0;
  4040. return rc;
  4041. }
  4042. #ifdef CONFIG_IWL4965_DEBUG
  4043. static void iwl4965_print_rx_config_cmd(struct iwl4965_rxon_cmd *rxon)
  4044. {
  4045. DECLARE_MAC_BUF(mac);
  4046. IWL_DEBUG_RADIO("RX CONFIG:\n");
  4047. iwl4965_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  4048. IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  4049. IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  4050. IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
  4051. le32_to_cpu(rxon->filter_flags));
  4052. IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  4053. IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
  4054. rxon->ofdm_basic_rates);
  4055. IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  4056. IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
  4057. print_mac(mac, rxon->node_addr));
  4058. IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
  4059. print_mac(mac, rxon->bssid_addr));
  4060. IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  4061. }
  4062. #endif
  4063. static void iwl4965_enable_interrupts(struct iwl4965_priv *priv)
  4064. {
  4065. IWL_DEBUG_ISR("Enabling interrupts\n");
  4066. set_bit(STATUS_INT_ENABLED, &priv->status);
  4067. iwl4965_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
  4068. }
  4069. static inline void iwl4965_disable_interrupts(struct iwl4965_priv *priv)
  4070. {
  4071. clear_bit(STATUS_INT_ENABLED, &priv->status);
  4072. /* disable interrupts from uCode/NIC to host */
  4073. iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
  4074. /* acknowledge/clear/reset any interrupts still pending
  4075. * from uCode or flow handler (Rx/Tx DMA) */
  4076. iwl4965_write32(priv, CSR_INT, 0xffffffff);
  4077. iwl4965_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
  4078. IWL_DEBUG_ISR("Disabled interrupts\n");
  4079. }
  4080. static const char *desc_lookup(int i)
  4081. {
  4082. switch (i) {
  4083. case 1:
  4084. return "FAIL";
  4085. case 2:
  4086. return "BAD_PARAM";
  4087. case 3:
  4088. return "BAD_CHECKSUM";
  4089. case 4:
  4090. return "NMI_INTERRUPT";
  4091. case 5:
  4092. return "SYSASSERT";
  4093. case 6:
  4094. return "FATAL_ERROR";
  4095. }
  4096. return "UNKNOWN";
  4097. }
  4098. #define ERROR_START_OFFSET (1 * sizeof(u32))
  4099. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  4100. static void iwl4965_dump_nic_error_log(struct iwl4965_priv *priv)
  4101. {
  4102. u32 data2, line;
  4103. u32 desc, time, count, base, data1;
  4104. u32 blink1, blink2, ilink1, ilink2;
  4105. int rc;
  4106. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  4107. if (!iwl4965_hw_valid_rtc_data_addr(base)) {
  4108. IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
  4109. return;
  4110. }
  4111. rc = iwl4965_grab_nic_access(priv);
  4112. if (rc) {
  4113. IWL_WARNING("Can not read from adapter at this time.\n");
  4114. return;
  4115. }
  4116. count = iwl4965_read_targ_mem(priv, base);
  4117. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  4118. IWL_ERROR("Start IWL Error Log Dump:\n");
  4119. IWL_ERROR("Status: 0x%08lX, Config: %08X count: %d\n",
  4120. priv->status, priv->config, count);
  4121. }
  4122. desc = iwl4965_read_targ_mem(priv, base + 1 * sizeof(u32));
  4123. blink1 = iwl4965_read_targ_mem(priv, base + 3 * sizeof(u32));
  4124. blink2 = iwl4965_read_targ_mem(priv, base + 4 * sizeof(u32));
  4125. ilink1 = iwl4965_read_targ_mem(priv, base + 5 * sizeof(u32));
  4126. ilink2 = iwl4965_read_targ_mem(priv, base + 6 * sizeof(u32));
  4127. data1 = iwl4965_read_targ_mem(priv, base + 7 * sizeof(u32));
  4128. data2 = iwl4965_read_targ_mem(priv, base + 8 * sizeof(u32));
  4129. line = iwl4965_read_targ_mem(priv, base + 9 * sizeof(u32));
  4130. time = iwl4965_read_targ_mem(priv, base + 11 * sizeof(u32));
  4131. IWL_ERROR("Desc Time "
  4132. "data1 data2 line\n");
  4133. IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n",
  4134. desc_lookup(desc), desc, time, data1, data2, line);
  4135. IWL_ERROR("blink1 blink2 ilink1 ilink2\n");
  4136. IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
  4137. ilink1, ilink2);
  4138. iwl4965_release_nic_access(priv);
  4139. }
  4140. #define EVENT_START_OFFSET (4 * sizeof(u32))
  4141. /**
  4142. * iwl4965_print_event_log - Dump error event log to syslog
  4143. *
  4144. * NOTE: Must be called with iwl4965_grab_nic_access() already obtained!
  4145. */
  4146. static void iwl4965_print_event_log(struct iwl4965_priv *priv, u32 start_idx,
  4147. u32 num_events, u32 mode)
  4148. {
  4149. u32 i;
  4150. u32 base; /* SRAM byte address of event log header */
  4151. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  4152. u32 ptr; /* SRAM byte address of log data */
  4153. u32 ev, time, data; /* event log data */
  4154. if (num_events == 0)
  4155. return;
  4156. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  4157. if (mode == 0)
  4158. event_size = 2 * sizeof(u32);
  4159. else
  4160. event_size = 3 * sizeof(u32);
  4161. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  4162. /* "time" is actually "data" for mode 0 (no timestamp).
  4163. * place event id # at far right for easier visual parsing. */
  4164. for (i = 0; i < num_events; i++) {
  4165. ev = iwl4965_read_targ_mem(priv, ptr);
  4166. ptr += sizeof(u32);
  4167. time = iwl4965_read_targ_mem(priv, ptr);
  4168. ptr += sizeof(u32);
  4169. if (mode == 0)
  4170. IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
  4171. else {
  4172. data = iwl4965_read_targ_mem(priv, ptr);
  4173. ptr += sizeof(u32);
  4174. IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
  4175. }
  4176. }
  4177. }
  4178. static void iwl4965_dump_nic_event_log(struct iwl4965_priv *priv)
  4179. {
  4180. int rc;
  4181. u32 base; /* SRAM byte address of event log header */
  4182. u32 capacity; /* event log capacity in # entries */
  4183. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  4184. u32 num_wraps; /* # times uCode wrapped to top of log */
  4185. u32 next_entry; /* index of next entry to be written by uCode */
  4186. u32 size; /* # entries that we'll print */
  4187. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  4188. if (!iwl4965_hw_valid_rtc_data_addr(base)) {
  4189. IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
  4190. return;
  4191. }
  4192. rc = iwl4965_grab_nic_access(priv);
  4193. if (rc) {
  4194. IWL_WARNING("Can not read from adapter at this time.\n");
  4195. return;
  4196. }
  4197. /* event log header */
  4198. capacity = iwl4965_read_targ_mem(priv, base);
  4199. mode = iwl4965_read_targ_mem(priv, base + (1 * sizeof(u32)));
  4200. num_wraps = iwl4965_read_targ_mem(priv, base + (2 * sizeof(u32)));
  4201. next_entry = iwl4965_read_targ_mem(priv, base + (3 * sizeof(u32)));
  4202. size = num_wraps ? capacity : next_entry;
  4203. /* bail out if nothing in log */
  4204. if (size == 0) {
  4205. IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
  4206. iwl4965_release_nic_access(priv);
  4207. return;
  4208. }
  4209. IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
  4210. size, num_wraps);
  4211. /* if uCode has wrapped back to top of log, start at the oldest entry,
  4212. * i.e the next one that uCode would fill. */
  4213. if (num_wraps)
  4214. iwl4965_print_event_log(priv, next_entry,
  4215. capacity - next_entry, mode);
  4216. /* (then/else) start at top of log */
  4217. iwl4965_print_event_log(priv, 0, next_entry, mode);
  4218. iwl4965_release_nic_access(priv);
  4219. }
  4220. /**
  4221. * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
  4222. */
  4223. static void iwl4965_irq_handle_error(struct iwl4965_priv *priv)
  4224. {
  4225. /* Set the FW error flag -- cleared on iwl4965_down */
  4226. set_bit(STATUS_FW_ERROR, &priv->status);
  4227. /* Cancel currently queued command. */
  4228. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  4229. #ifdef CONFIG_IWL4965_DEBUG
  4230. if (iwl4965_debug_level & IWL_DL_FW_ERRORS) {
  4231. iwl4965_dump_nic_error_log(priv);
  4232. iwl4965_dump_nic_event_log(priv);
  4233. iwl4965_print_rx_config_cmd(&priv->staging_rxon);
  4234. }
  4235. #endif
  4236. wake_up_interruptible(&priv->wait_command_queue);
  4237. /* Keep the restart process from trying to send host
  4238. * commands by clearing the INIT status bit */
  4239. clear_bit(STATUS_READY, &priv->status);
  4240. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  4241. IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
  4242. "Restarting adapter due to uCode error.\n");
  4243. if (iwl4965_is_associated(priv)) {
  4244. memcpy(&priv->recovery_rxon, &priv->active_rxon,
  4245. sizeof(priv->recovery_rxon));
  4246. priv->error_recovering = 1;
  4247. }
  4248. queue_work(priv->workqueue, &priv->restart);
  4249. }
  4250. }
  4251. static void iwl4965_error_recovery(struct iwl4965_priv *priv)
  4252. {
  4253. unsigned long flags;
  4254. memcpy(&priv->staging_rxon, &priv->recovery_rxon,
  4255. sizeof(priv->staging_rxon));
  4256. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4257. iwl4965_commit_rxon(priv);
  4258. iwl4965_rxon_add_station(priv, priv->bssid, 1);
  4259. spin_lock_irqsave(&priv->lock, flags);
  4260. priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
  4261. priv->error_recovering = 0;
  4262. spin_unlock_irqrestore(&priv->lock, flags);
  4263. }
  4264. static void iwl4965_irq_tasklet(struct iwl4965_priv *priv)
  4265. {
  4266. u32 inta, handled = 0;
  4267. u32 inta_fh;
  4268. unsigned long flags;
  4269. #ifdef CONFIG_IWL4965_DEBUG
  4270. u32 inta_mask;
  4271. #endif
  4272. spin_lock_irqsave(&priv->lock, flags);
  4273. /* Ack/clear/reset pending uCode interrupts.
  4274. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  4275. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  4276. inta = iwl4965_read32(priv, CSR_INT);
  4277. iwl4965_write32(priv, CSR_INT, inta);
  4278. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  4279. * Any new interrupts that happen after this, either while we're
  4280. * in this tasklet, or later, will show up in next ISR/tasklet. */
  4281. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4282. iwl4965_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  4283. #ifdef CONFIG_IWL4965_DEBUG
  4284. if (iwl4965_debug_level & IWL_DL_ISR) {
  4285. /* just for debug */
  4286. inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
  4287. IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4288. inta, inta_mask, inta_fh);
  4289. }
  4290. #endif
  4291. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  4292. * atomic, make sure that inta covers all the interrupts that
  4293. * we've discovered, even if FH interrupt came in just after
  4294. * reading CSR_INT. */
  4295. if (inta_fh & CSR_FH_INT_RX_MASK)
  4296. inta |= CSR_INT_BIT_FH_RX;
  4297. if (inta_fh & CSR_FH_INT_TX_MASK)
  4298. inta |= CSR_INT_BIT_FH_TX;
  4299. /* Now service all interrupt bits discovered above. */
  4300. if (inta & CSR_INT_BIT_HW_ERR) {
  4301. IWL_ERROR("Microcode HW error detected. Restarting.\n");
  4302. /* Tell the device to stop sending interrupts */
  4303. iwl4965_disable_interrupts(priv);
  4304. iwl4965_irq_handle_error(priv);
  4305. handled |= CSR_INT_BIT_HW_ERR;
  4306. spin_unlock_irqrestore(&priv->lock, flags);
  4307. return;
  4308. }
  4309. #ifdef CONFIG_IWL4965_DEBUG
  4310. if (iwl4965_debug_level & (IWL_DL_ISR)) {
  4311. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  4312. if (inta & CSR_INT_BIT_MAC_CLK_ACTV)
  4313. IWL_DEBUG_ISR("Microcode started or stopped.\n");
  4314. /* Alive notification via Rx interrupt will do the real work */
  4315. if (inta & CSR_INT_BIT_ALIVE)
  4316. IWL_DEBUG_ISR("Alive interrupt\n");
  4317. }
  4318. #endif
  4319. /* Safely ignore these bits for debug checks below */
  4320. inta &= ~(CSR_INT_BIT_MAC_CLK_ACTV | CSR_INT_BIT_ALIVE);
  4321. /* HW RF KILL switch toggled */
  4322. if (inta & CSR_INT_BIT_RF_KILL) {
  4323. int hw_rf_kill = 0;
  4324. if (!(iwl4965_read32(priv, CSR_GP_CNTRL) &
  4325. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  4326. hw_rf_kill = 1;
  4327. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
  4328. "RF_KILL bit toggled to %s.\n",
  4329. hw_rf_kill ? "disable radio":"enable radio");
  4330. /* Queue restart only if RF_KILL switch was set to "kill"
  4331. * when we loaded driver, and is now set to "enable".
  4332. * After we're Alive, RF_KILL gets handled by
  4333. * iwl_rx_card_state_notif() */
  4334. if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
  4335. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  4336. queue_work(priv->workqueue, &priv->restart);
  4337. }
  4338. handled |= CSR_INT_BIT_RF_KILL;
  4339. }
  4340. /* Chip got too hot and stopped itself */
  4341. if (inta & CSR_INT_BIT_CT_KILL) {
  4342. IWL_ERROR("Microcode CT kill error detected.\n");
  4343. handled |= CSR_INT_BIT_CT_KILL;
  4344. }
  4345. /* Error detected by uCode */
  4346. if (inta & CSR_INT_BIT_SW_ERR) {
  4347. IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
  4348. inta);
  4349. iwl4965_irq_handle_error(priv);
  4350. handled |= CSR_INT_BIT_SW_ERR;
  4351. }
  4352. /* uCode wakes up after power-down sleep */
  4353. if (inta & CSR_INT_BIT_WAKEUP) {
  4354. IWL_DEBUG_ISR("Wakeup interrupt\n");
  4355. iwl4965_rx_queue_update_write_ptr(priv, &priv->rxq);
  4356. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[0]);
  4357. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[1]);
  4358. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[2]);
  4359. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[3]);
  4360. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[4]);
  4361. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[5]);
  4362. handled |= CSR_INT_BIT_WAKEUP;
  4363. }
  4364. /* All uCode command responses, including Tx command responses,
  4365. * Rx "responses" (frame-received notification), and other
  4366. * notifications from uCode come through here*/
  4367. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  4368. iwl4965_rx_handle(priv);
  4369. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  4370. }
  4371. if (inta & CSR_INT_BIT_FH_TX) {
  4372. IWL_DEBUG_ISR("Tx interrupt\n");
  4373. handled |= CSR_INT_BIT_FH_TX;
  4374. }
  4375. if (inta & ~handled)
  4376. IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
  4377. if (inta & ~CSR_INI_SET_MASK) {
  4378. IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
  4379. inta & ~CSR_INI_SET_MASK);
  4380. IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
  4381. }
  4382. /* Re-enable all interrupts */
  4383. iwl4965_enable_interrupts(priv);
  4384. #ifdef CONFIG_IWL4965_DEBUG
  4385. if (iwl4965_debug_level & (IWL_DL_ISR)) {
  4386. inta = iwl4965_read32(priv, CSR_INT);
  4387. inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
  4388. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4389. IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  4390. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  4391. }
  4392. #endif
  4393. spin_unlock_irqrestore(&priv->lock, flags);
  4394. }
  4395. static irqreturn_t iwl4965_isr(int irq, void *data)
  4396. {
  4397. struct iwl4965_priv *priv = data;
  4398. u32 inta, inta_mask;
  4399. u32 inta_fh;
  4400. if (!priv)
  4401. return IRQ_NONE;
  4402. spin_lock(&priv->lock);
  4403. /* Disable (but don't clear!) interrupts here to avoid
  4404. * back-to-back ISRs and sporadic interrupts from our NIC.
  4405. * If we have something to service, the tasklet will re-enable ints.
  4406. * If we *don't* have something, we'll re-enable before leaving here. */
  4407. inta_mask = iwl4965_read32(priv, CSR_INT_MASK); /* just for debug */
  4408. iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
  4409. /* Discover which interrupts are active/pending */
  4410. inta = iwl4965_read32(priv, CSR_INT);
  4411. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4412. /* Ignore interrupt if there's nothing in NIC to service.
  4413. * This may be due to IRQ shared with another device,
  4414. * or due to sporadic interrupts thrown from our NIC. */
  4415. if (!inta && !inta_fh) {
  4416. IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
  4417. goto none;
  4418. }
  4419. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  4420. /* Hardware disappeared. It might have already raised
  4421. * an interrupt */
  4422. IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
  4423. goto unplugged;
  4424. }
  4425. IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4426. inta, inta_mask, inta_fh);
  4427. /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
  4428. tasklet_schedule(&priv->irq_tasklet);
  4429. unplugged:
  4430. spin_unlock(&priv->lock);
  4431. return IRQ_HANDLED;
  4432. none:
  4433. /* re-enable interrupts here since we don't have anything to service. */
  4434. iwl4965_enable_interrupts(priv);
  4435. spin_unlock(&priv->lock);
  4436. return IRQ_NONE;
  4437. }
  4438. /************************** EEPROM BANDS ****************************
  4439. *
  4440. * The iwl4965_eeprom_band definitions below provide the mapping from the
  4441. * EEPROM contents to the specific channel number supported for each
  4442. * band.
  4443. *
  4444. * For example, iwl4965_priv->eeprom.band_3_channels[4] from the band_3
  4445. * definition below maps to physical channel 42 in the 5.2GHz spectrum.
  4446. * The specific geography and calibration information for that channel
  4447. * is contained in the eeprom map itself.
  4448. *
  4449. * During init, we copy the eeprom information and channel map
  4450. * information into priv->channel_info_24/52 and priv->channel_map_24/52
  4451. *
  4452. * channel_map_24/52 provides the index in the channel_info array for a
  4453. * given channel. We have to have two separate maps as there is channel
  4454. * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
  4455. * band_2
  4456. *
  4457. * A value of 0xff stored in the channel_map indicates that the channel
  4458. * is not supported by the hardware at all.
  4459. *
  4460. * A value of 0xfe in the channel_map indicates that the channel is not
  4461. * valid for Tx with the current hardware. This means that
  4462. * while the system can tune and receive on a given channel, it may not
  4463. * be able to associate or transmit any frames on that
  4464. * channel. There is no corresponding channel information for that
  4465. * entry.
  4466. *
  4467. *********************************************************************/
  4468. /* 2.4 GHz */
  4469. static const u8 iwl4965_eeprom_band_1[14] = {
  4470. 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
  4471. };
  4472. /* 5.2 GHz bands */
  4473. static const u8 iwl4965_eeprom_band_2[] = { /* 4915-5080MHz */
  4474. 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
  4475. };
  4476. static const u8 iwl4965_eeprom_band_3[] = { /* 5170-5320MHz */
  4477. 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
  4478. };
  4479. static const u8 iwl4965_eeprom_band_4[] = { /* 5500-5700MHz */
  4480. 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
  4481. };
  4482. static const u8 iwl4965_eeprom_band_5[] = { /* 5725-5825MHz */
  4483. 145, 149, 153, 157, 161, 165
  4484. };
  4485. static u8 iwl4965_eeprom_band_6[] = { /* 2.4 FAT channel */
  4486. 1, 2, 3, 4, 5, 6, 7
  4487. };
  4488. static u8 iwl4965_eeprom_band_7[] = { /* 5.2 FAT channel */
  4489. 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
  4490. };
  4491. static void iwl4965_init_band_reference(const struct iwl4965_priv *priv,
  4492. int band,
  4493. int *eeprom_ch_count,
  4494. const struct iwl4965_eeprom_channel
  4495. **eeprom_ch_info,
  4496. const u8 **eeprom_ch_index)
  4497. {
  4498. switch (band) {
  4499. case 1: /* 2.4GHz band */
  4500. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_1);
  4501. *eeprom_ch_info = priv->eeprom.band_1_channels;
  4502. *eeprom_ch_index = iwl4965_eeprom_band_1;
  4503. break;
  4504. case 2: /* 4.9GHz band */
  4505. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_2);
  4506. *eeprom_ch_info = priv->eeprom.band_2_channels;
  4507. *eeprom_ch_index = iwl4965_eeprom_band_2;
  4508. break;
  4509. case 3: /* 5.2GHz band */
  4510. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_3);
  4511. *eeprom_ch_info = priv->eeprom.band_3_channels;
  4512. *eeprom_ch_index = iwl4965_eeprom_band_3;
  4513. break;
  4514. case 4: /* 5.5GHz band */
  4515. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_4);
  4516. *eeprom_ch_info = priv->eeprom.band_4_channels;
  4517. *eeprom_ch_index = iwl4965_eeprom_band_4;
  4518. break;
  4519. case 5: /* 5.7GHz band */
  4520. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_5);
  4521. *eeprom_ch_info = priv->eeprom.band_5_channels;
  4522. *eeprom_ch_index = iwl4965_eeprom_band_5;
  4523. break;
  4524. case 6: /* 2.4GHz FAT channels */
  4525. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_6);
  4526. *eeprom_ch_info = priv->eeprom.band_24_channels;
  4527. *eeprom_ch_index = iwl4965_eeprom_band_6;
  4528. break;
  4529. case 7: /* 5 GHz FAT channels */
  4530. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_7);
  4531. *eeprom_ch_info = priv->eeprom.band_52_channels;
  4532. *eeprom_ch_index = iwl4965_eeprom_band_7;
  4533. break;
  4534. default:
  4535. BUG();
  4536. return;
  4537. }
  4538. }
  4539. /**
  4540. * iwl4965_get_channel_info - Find driver's private channel info
  4541. *
  4542. * Based on band and channel number.
  4543. */
  4544. const struct iwl4965_channel_info *iwl4965_get_channel_info(const struct iwl4965_priv *priv,
  4545. int phymode, u16 channel)
  4546. {
  4547. int i;
  4548. switch (phymode) {
  4549. case MODE_IEEE80211A:
  4550. for (i = 14; i < priv->channel_count; i++) {
  4551. if (priv->channel_info[i].channel == channel)
  4552. return &priv->channel_info[i];
  4553. }
  4554. break;
  4555. case MODE_IEEE80211B:
  4556. case MODE_IEEE80211G:
  4557. if (channel >= 1 && channel <= 14)
  4558. return &priv->channel_info[channel - 1];
  4559. break;
  4560. }
  4561. return NULL;
  4562. }
  4563. #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
  4564. ? # x " " : "")
  4565. /**
  4566. * iwl4965_init_channel_map - Set up driver's info for all possible channels
  4567. */
  4568. static int iwl4965_init_channel_map(struct iwl4965_priv *priv)
  4569. {
  4570. int eeprom_ch_count = 0;
  4571. const u8 *eeprom_ch_index = NULL;
  4572. const struct iwl4965_eeprom_channel *eeprom_ch_info = NULL;
  4573. int band, ch;
  4574. struct iwl4965_channel_info *ch_info;
  4575. if (priv->channel_count) {
  4576. IWL_DEBUG_INFO("Channel map already initialized.\n");
  4577. return 0;
  4578. }
  4579. if (priv->eeprom.version < 0x2f) {
  4580. IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
  4581. priv->eeprom.version);
  4582. return -EINVAL;
  4583. }
  4584. IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
  4585. priv->channel_count =
  4586. ARRAY_SIZE(iwl4965_eeprom_band_1) +
  4587. ARRAY_SIZE(iwl4965_eeprom_band_2) +
  4588. ARRAY_SIZE(iwl4965_eeprom_band_3) +
  4589. ARRAY_SIZE(iwl4965_eeprom_band_4) +
  4590. ARRAY_SIZE(iwl4965_eeprom_band_5);
  4591. IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
  4592. priv->channel_info = kzalloc(sizeof(struct iwl4965_channel_info) *
  4593. priv->channel_count, GFP_KERNEL);
  4594. if (!priv->channel_info) {
  4595. IWL_ERROR("Could not allocate channel_info\n");
  4596. priv->channel_count = 0;
  4597. return -ENOMEM;
  4598. }
  4599. ch_info = priv->channel_info;
  4600. /* Loop through the 5 EEPROM bands adding them in order to the
  4601. * channel map we maintain (that contains additional information than
  4602. * what just in the EEPROM) */
  4603. for (band = 1; band <= 5; band++) {
  4604. iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
  4605. &eeprom_ch_info, &eeprom_ch_index);
  4606. /* Loop through each band adding each of the channels */
  4607. for (ch = 0; ch < eeprom_ch_count; ch++) {
  4608. ch_info->channel = eeprom_ch_index[ch];
  4609. ch_info->phymode = (band == 1) ? MODE_IEEE80211B :
  4610. MODE_IEEE80211A;
  4611. /* permanently store EEPROM's channel regulatory flags
  4612. * and max power in channel info database. */
  4613. ch_info->eeprom = eeprom_ch_info[ch];
  4614. /* Copy the run-time flags so they are there even on
  4615. * invalid channels */
  4616. ch_info->flags = eeprom_ch_info[ch].flags;
  4617. if (!(is_channel_valid(ch_info))) {
  4618. IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
  4619. "No traffic\n",
  4620. ch_info->channel,
  4621. ch_info->flags,
  4622. is_channel_a_band(ch_info) ?
  4623. "5.2" : "2.4");
  4624. ch_info++;
  4625. continue;
  4626. }
  4627. /* Initialize regulatory-based run-time data */
  4628. ch_info->max_power_avg = ch_info->curr_txpow =
  4629. eeprom_ch_info[ch].max_power_avg;
  4630. ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
  4631. ch_info->min_power = 0;
  4632. IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
  4633. " %ddBm): Ad-Hoc %ssupported\n",
  4634. ch_info->channel,
  4635. is_channel_a_band(ch_info) ?
  4636. "5.2" : "2.4",
  4637. CHECK_AND_PRINT(IBSS),
  4638. CHECK_AND_PRINT(ACTIVE),
  4639. CHECK_AND_PRINT(RADAR),
  4640. CHECK_AND_PRINT(WIDE),
  4641. CHECK_AND_PRINT(NARROW),
  4642. CHECK_AND_PRINT(DFS),
  4643. eeprom_ch_info[ch].flags,
  4644. eeprom_ch_info[ch].max_power_avg,
  4645. ((eeprom_ch_info[ch].
  4646. flags & EEPROM_CHANNEL_IBSS)
  4647. && !(eeprom_ch_info[ch].
  4648. flags & EEPROM_CHANNEL_RADAR))
  4649. ? "" : "not ");
  4650. /* Set the user_txpower_limit to the highest power
  4651. * supported by any channel */
  4652. if (eeprom_ch_info[ch].max_power_avg >
  4653. priv->user_txpower_limit)
  4654. priv->user_txpower_limit =
  4655. eeprom_ch_info[ch].max_power_avg;
  4656. ch_info++;
  4657. }
  4658. }
  4659. /* Two additional EEPROM bands for 2.4 and 5 GHz FAT channels */
  4660. for (band = 6; band <= 7; band++) {
  4661. int phymode;
  4662. u8 fat_extension_chan;
  4663. iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
  4664. &eeprom_ch_info, &eeprom_ch_index);
  4665. /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
  4666. phymode = (band == 6) ? MODE_IEEE80211B : MODE_IEEE80211A;
  4667. /* Loop through each band adding each of the channels */
  4668. for (ch = 0; ch < eeprom_ch_count; ch++) {
  4669. if ((band == 6) &&
  4670. ((eeprom_ch_index[ch] == 5) ||
  4671. (eeprom_ch_index[ch] == 6) ||
  4672. (eeprom_ch_index[ch] == 7)))
  4673. fat_extension_chan = HT_IE_EXT_CHANNEL_MAX;
  4674. else
  4675. fat_extension_chan = HT_IE_EXT_CHANNEL_ABOVE;
  4676. /* Set up driver's info for lower half */
  4677. iwl4965_set_fat_chan_info(priv, phymode,
  4678. eeprom_ch_index[ch],
  4679. &(eeprom_ch_info[ch]),
  4680. fat_extension_chan);
  4681. /* Set up driver's info for upper half */
  4682. iwl4965_set_fat_chan_info(priv, phymode,
  4683. (eeprom_ch_index[ch] + 4),
  4684. &(eeprom_ch_info[ch]),
  4685. HT_IE_EXT_CHANNEL_BELOW);
  4686. }
  4687. }
  4688. return 0;
  4689. }
  4690. /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
  4691. * sending probe req. This should be set long enough to hear probe responses
  4692. * from more than one AP. */
  4693. #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
  4694. #define IWL_ACTIVE_DWELL_TIME_52 (10)
  4695. /* For faster active scanning, scan will move to the next channel if fewer than
  4696. * PLCP_QUIET_THRESH packets are heard on this channel within
  4697. * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
  4698. * time if it's a quiet channel (nothing responded to our probe, and there's
  4699. * no other traffic).
  4700. * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
  4701. #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
  4702. #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
  4703. /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
  4704. * Must be set longer than active dwell time.
  4705. * For the most reliable scan, set > AP beacon interval (typically 100msec). */
  4706. #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
  4707. #define IWL_PASSIVE_DWELL_TIME_52 (10)
  4708. #define IWL_PASSIVE_DWELL_BASE (100)
  4709. #define IWL_CHANNEL_TUNE_TIME 5
  4710. static inline u16 iwl4965_get_active_dwell_time(struct iwl4965_priv *priv, int phymode)
  4711. {
  4712. if (phymode == MODE_IEEE80211A)
  4713. return IWL_ACTIVE_DWELL_TIME_52;
  4714. else
  4715. return IWL_ACTIVE_DWELL_TIME_24;
  4716. }
  4717. static u16 iwl4965_get_passive_dwell_time(struct iwl4965_priv *priv, int phymode)
  4718. {
  4719. u16 active = iwl4965_get_active_dwell_time(priv, phymode);
  4720. u16 passive = (phymode != MODE_IEEE80211A) ?
  4721. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
  4722. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
  4723. if (iwl4965_is_associated(priv)) {
  4724. /* If we're associated, we clamp the maximum passive
  4725. * dwell time to be 98% of the beacon interval (minus
  4726. * 2 * channel tune time) */
  4727. passive = priv->beacon_int;
  4728. if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
  4729. passive = IWL_PASSIVE_DWELL_BASE;
  4730. passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
  4731. }
  4732. if (passive <= active)
  4733. passive = active + 1;
  4734. return passive;
  4735. }
  4736. static int iwl4965_get_channels_for_scan(struct iwl4965_priv *priv, int phymode,
  4737. u8 is_active, u8 direct_mask,
  4738. struct iwl4965_scan_channel *scan_ch)
  4739. {
  4740. const struct ieee80211_channel *channels = NULL;
  4741. const struct ieee80211_hw_mode *hw_mode;
  4742. const struct iwl4965_channel_info *ch_info;
  4743. u16 passive_dwell = 0;
  4744. u16 active_dwell = 0;
  4745. int added, i;
  4746. hw_mode = iwl4965_get_hw_mode(priv, phymode);
  4747. if (!hw_mode)
  4748. return 0;
  4749. channels = hw_mode->channels;
  4750. active_dwell = iwl4965_get_active_dwell_time(priv, phymode);
  4751. passive_dwell = iwl4965_get_passive_dwell_time(priv, phymode);
  4752. for (i = 0, added = 0; i < hw_mode->num_channels; i++) {
  4753. if (channels[i].chan ==
  4754. le16_to_cpu(priv->active_rxon.channel)) {
  4755. if (iwl4965_is_associated(priv)) {
  4756. IWL_DEBUG_SCAN
  4757. ("Skipping current channel %d\n",
  4758. le16_to_cpu(priv->active_rxon.channel));
  4759. continue;
  4760. }
  4761. } else if (priv->only_active_channel)
  4762. continue;
  4763. scan_ch->channel = channels[i].chan;
  4764. ch_info = iwl4965_get_channel_info(priv, phymode,
  4765. scan_ch->channel);
  4766. if (!is_channel_valid(ch_info)) {
  4767. IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
  4768. scan_ch->channel);
  4769. continue;
  4770. }
  4771. if (!is_active || is_channel_passive(ch_info) ||
  4772. !(channels[i].flag & IEEE80211_CHAN_W_ACTIVE_SCAN))
  4773. scan_ch->type = 0; /* passive */
  4774. else
  4775. scan_ch->type = 1; /* active */
  4776. if (scan_ch->type & 1)
  4777. scan_ch->type |= (direct_mask << 1);
  4778. if (is_channel_narrow(ch_info))
  4779. scan_ch->type |= (1 << 7);
  4780. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  4781. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  4782. /* Set txpower levels to defaults */
  4783. scan_ch->tpc.dsp_atten = 110;
  4784. /* scan_pwr_info->tpc.dsp_atten; */
  4785. /*scan_pwr_info->tpc.tx_gain; */
  4786. if (phymode == MODE_IEEE80211A)
  4787. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  4788. else {
  4789. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  4790. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  4791. * power level:
  4792. * scan_ch->tpc.tx_gain = ((1<<5) | (2 << 3)) | 3;
  4793. */
  4794. }
  4795. IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
  4796. scan_ch->channel,
  4797. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  4798. (scan_ch->type & 1) ?
  4799. active_dwell : passive_dwell);
  4800. scan_ch++;
  4801. added++;
  4802. }
  4803. IWL_DEBUG_SCAN("total channels to scan %d \n", added);
  4804. return added;
  4805. }
  4806. static void iwl4965_reset_channel_flag(struct iwl4965_priv *priv)
  4807. {
  4808. int i, j;
  4809. for (i = 0; i < 3; i++) {
  4810. struct ieee80211_hw_mode *hw_mode = (void *)&priv->modes[i];
  4811. for (j = 0; j < hw_mode->num_channels; j++)
  4812. hw_mode->channels[j].flag = hw_mode->channels[j].val;
  4813. }
  4814. }
  4815. static void iwl4965_init_hw_rates(struct iwl4965_priv *priv,
  4816. struct ieee80211_rate *rates)
  4817. {
  4818. int i;
  4819. for (i = 0; i < IWL_RATE_COUNT; i++) {
  4820. rates[i].rate = iwl4965_rates[i].ieee * 5;
  4821. rates[i].val = i; /* Rate scaling will work on indexes */
  4822. rates[i].val2 = i;
  4823. rates[i].flags = IEEE80211_RATE_SUPPORTED;
  4824. /* Only OFDM have the bits-per-symbol set */
  4825. if ((i <= IWL_LAST_OFDM_RATE) && (i >= IWL_FIRST_OFDM_RATE))
  4826. rates[i].flags |= IEEE80211_RATE_OFDM;
  4827. else {
  4828. /*
  4829. * If CCK 1M then set rate flag to CCK else CCK_2
  4830. * which is CCK | PREAMBLE2
  4831. */
  4832. rates[i].flags |= (iwl4965_rates[i].plcp == 10) ?
  4833. IEEE80211_RATE_CCK : IEEE80211_RATE_CCK_2;
  4834. }
  4835. /* Set up which ones are basic rates... */
  4836. if (IWL_BASIC_RATES_MASK & (1 << i))
  4837. rates[i].flags |= IEEE80211_RATE_BASIC;
  4838. }
  4839. }
  4840. /**
  4841. * iwl4965_init_geos - Initialize mac80211's geo/channel info based from eeprom
  4842. */
  4843. static int iwl4965_init_geos(struct iwl4965_priv *priv)
  4844. {
  4845. struct iwl4965_channel_info *ch;
  4846. struct ieee80211_hw_mode *modes;
  4847. struct ieee80211_channel *channels;
  4848. struct ieee80211_channel *geo_ch;
  4849. struct ieee80211_rate *rates;
  4850. int i = 0;
  4851. enum {
  4852. A = 0,
  4853. B = 1,
  4854. G = 2,
  4855. };
  4856. int mode_count = 3;
  4857. if (priv->modes) {
  4858. IWL_DEBUG_INFO("Geography modes already initialized.\n");
  4859. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4860. return 0;
  4861. }
  4862. modes = kzalloc(sizeof(struct ieee80211_hw_mode) * mode_count,
  4863. GFP_KERNEL);
  4864. if (!modes)
  4865. return -ENOMEM;
  4866. channels = kzalloc(sizeof(struct ieee80211_channel) *
  4867. priv->channel_count, GFP_KERNEL);
  4868. if (!channels) {
  4869. kfree(modes);
  4870. return -ENOMEM;
  4871. }
  4872. rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_MAX_RATES + 1)),
  4873. GFP_KERNEL);
  4874. if (!rates) {
  4875. kfree(modes);
  4876. kfree(channels);
  4877. return -ENOMEM;
  4878. }
  4879. /* 0 = 802.11a
  4880. * 1 = 802.11b
  4881. * 2 = 802.11g
  4882. */
  4883. /* 5.2GHz channels start after the 2.4GHz channels */
  4884. modes[A].mode = MODE_IEEE80211A;
  4885. modes[A].channels = &channels[ARRAY_SIZE(iwl4965_eeprom_band_1)];
  4886. modes[A].rates = rates;
  4887. modes[A].num_rates = 8; /* just OFDM */
  4888. modes[A].rates = &rates[4];
  4889. modes[A].num_channels = 0;
  4890. #ifdef CONFIG_IWL4965_HT
  4891. iwl4965_init_ht_hw_capab(&modes[A].ht_info, MODE_IEEE80211A);
  4892. #endif
  4893. modes[B].mode = MODE_IEEE80211B;
  4894. modes[B].channels = channels;
  4895. modes[B].rates = rates;
  4896. modes[B].num_rates = 4; /* just CCK */
  4897. modes[B].num_channels = 0;
  4898. modes[G].mode = MODE_IEEE80211G;
  4899. modes[G].channels = channels;
  4900. modes[G].rates = rates;
  4901. modes[G].num_rates = 12; /* OFDM & CCK */
  4902. modes[G].num_channels = 0;
  4903. #ifdef CONFIG_IWL4965_HT
  4904. iwl4965_init_ht_hw_capab(&modes[G].ht_info, MODE_IEEE80211G);
  4905. #endif
  4906. priv->ieee_channels = channels;
  4907. priv->ieee_rates = rates;
  4908. iwl4965_init_hw_rates(priv, rates);
  4909. for (i = 0, geo_ch = channels; i < priv->channel_count; i++) {
  4910. ch = &priv->channel_info[i];
  4911. if (!is_channel_valid(ch)) {
  4912. IWL_DEBUG_INFO("Channel %d [%sGHz] is restricted -- "
  4913. "skipping.\n",
  4914. ch->channel, is_channel_a_band(ch) ?
  4915. "5.2" : "2.4");
  4916. continue;
  4917. }
  4918. if (is_channel_a_band(ch)) {
  4919. geo_ch = &modes[A].channels[modes[A].num_channels++];
  4920. } else {
  4921. geo_ch = &modes[B].channels[modes[B].num_channels++];
  4922. modes[G].num_channels++;
  4923. }
  4924. geo_ch->freq = ieee80211chan2mhz(ch->channel);
  4925. geo_ch->chan = ch->channel;
  4926. geo_ch->power_level = ch->max_power_avg;
  4927. geo_ch->antenna_max = 0xff;
  4928. if (is_channel_valid(ch)) {
  4929. geo_ch->flag = IEEE80211_CHAN_W_SCAN;
  4930. if (ch->flags & EEPROM_CHANNEL_IBSS)
  4931. geo_ch->flag |= IEEE80211_CHAN_W_IBSS;
  4932. if (ch->flags & EEPROM_CHANNEL_ACTIVE)
  4933. geo_ch->flag |= IEEE80211_CHAN_W_ACTIVE_SCAN;
  4934. if (ch->flags & EEPROM_CHANNEL_RADAR)
  4935. geo_ch->flag |= IEEE80211_CHAN_W_RADAR_DETECT;
  4936. if (ch->max_power_avg > priv->max_channel_txpower_limit)
  4937. priv->max_channel_txpower_limit =
  4938. ch->max_power_avg;
  4939. }
  4940. geo_ch->val = geo_ch->flag;
  4941. }
  4942. if ((modes[A].num_channels == 0) && priv->is_abg) {
  4943. printk(KERN_INFO DRV_NAME
  4944. ": Incorrectly detected BG card as ABG. Please send "
  4945. "your PCI ID 0x%04X:0x%04X to maintainer.\n",
  4946. priv->pci_dev->device, priv->pci_dev->subsystem_device);
  4947. priv->is_abg = 0;
  4948. }
  4949. printk(KERN_INFO DRV_NAME
  4950. ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  4951. modes[G].num_channels, modes[A].num_channels);
  4952. /*
  4953. * NOTE: We register these in preference of order -- the
  4954. * stack doesn't currently (as of 7.0.6 / Apr 24 '07) pick
  4955. * a phymode based on rates or AP capabilities but seems to
  4956. * configure it purely on if the channel being configured
  4957. * is supported by a mode -- and the first match is taken
  4958. */
  4959. if (modes[G].num_channels)
  4960. ieee80211_register_hwmode(priv->hw, &modes[G]);
  4961. if (modes[B].num_channels)
  4962. ieee80211_register_hwmode(priv->hw, &modes[B]);
  4963. if (modes[A].num_channels)
  4964. ieee80211_register_hwmode(priv->hw, &modes[A]);
  4965. priv->modes = modes;
  4966. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4967. return 0;
  4968. }
  4969. /******************************************************************************
  4970. *
  4971. * uCode download functions
  4972. *
  4973. ******************************************************************************/
  4974. static void iwl4965_dealloc_ucode_pci(struct iwl4965_priv *priv)
  4975. {
  4976. if (priv->ucode_code.v_addr != NULL) {
  4977. pci_free_consistent(priv->pci_dev,
  4978. priv->ucode_code.len,
  4979. priv->ucode_code.v_addr,
  4980. priv->ucode_code.p_addr);
  4981. priv->ucode_code.v_addr = NULL;
  4982. }
  4983. if (priv->ucode_data.v_addr != NULL) {
  4984. pci_free_consistent(priv->pci_dev,
  4985. priv->ucode_data.len,
  4986. priv->ucode_data.v_addr,
  4987. priv->ucode_data.p_addr);
  4988. priv->ucode_data.v_addr = NULL;
  4989. }
  4990. if (priv->ucode_data_backup.v_addr != NULL) {
  4991. pci_free_consistent(priv->pci_dev,
  4992. priv->ucode_data_backup.len,
  4993. priv->ucode_data_backup.v_addr,
  4994. priv->ucode_data_backup.p_addr);
  4995. priv->ucode_data_backup.v_addr = NULL;
  4996. }
  4997. if (priv->ucode_init.v_addr != NULL) {
  4998. pci_free_consistent(priv->pci_dev,
  4999. priv->ucode_init.len,
  5000. priv->ucode_init.v_addr,
  5001. priv->ucode_init.p_addr);
  5002. priv->ucode_init.v_addr = NULL;
  5003. }
  5004. if (priv->ucode_init_data.v_addr != NULL) {
  5005. pci_free_consistent(priv->pci_dev,
  5006. priv->ucode_init_data.len,
  5007. priv->ucode_init_data.v_addr,
  5008. priv->ucode_init_data.p_addr);
  5009. priv->ucode_init_data.v_addr = NULL;
  5010. }
  5011. if (priv->ucode_boot.v_addr != NULL) {
  5012. pci_free_consistent(priv->pci_dev,
  5013. priv->ucode_boot.len,
  5014. priv->ucode_boot.v_addr,
  5015. priv->ucode_boot.p_addr);
  5016. priv->ucode_boot.v_addr = NULL;
  5017. }
  5018. }
  5019. /**
  5020. * iwl4965_verify_inst_full - verify runtime uCode image in card vs. host,
  5021. * looking at all data.
  5022. */
  5023. static int iwl4965_verify_inst_full(struct iwl4965_priv *priv, __le32 *image,
  5024. u32 len)
  5025. {
  5026. u32 val;
  5027. u32 save_len = len;
  5028. int rc = 0;
  5029. u32 errcnt;
  5030. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  5031. rc = iwl4965_grab_nic_access(priv);
  5032. if (rc)
  5033. return rc;
  5034. iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
  5035. errcnt = 0;
  5036. for (; len > 0; len -= sizeof(u32), image++) {
  5037. /* read data comes through single port, auto-incr addr */
  5038. /* NOTE: Use the debugless read so we don't flood kernel log
  5039. * if IWL_DL_IO is set */
  5040. val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  5041. if (val != le32_to_cpu(*image)) {
  5042. IWL_ERROR("uCode INST section is invalid at "
  5043. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  5044. save_len - len, val, le32_to_cpu(*image));
  5045. rc = -EIO;
  5046. errcnt++;
  5047. if (errcnt >= 20)
  5048. break;
  5049. }
  5050. }
  5051. iwl4965_release_nic_access(priv);
  5052. if (!errcnt)
  5053. IWL_DEBUG_INFO
  5054. ("ucode image in INSTRUCTION memory is good\n");
  5055. return rc;
  5056. }
  5057. /**
  5058. * iwl4965_verify_inst_sparse - verify runtime uCode image in card vs. host,
  5059. * using sample data 100 bytes apart. If these sample points are good,
  5060. * it's a pretty good bet that everything between them is good, too.
  5061. */
  5062. static int iwl4965_verify_inst_sparse(struct iwl4965_priv *priv, __le32 *image, u32 len)
  5063. {
  5064. u32 val;
  5065. int rc = 0;
  5066. u32 errcnt = 0;
  5067. u32 i;
  5068. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  5069. rc = iwl4965_grab_nic_access(priv);
  5070. if (rc)
  5071. return rc;
  5072. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  5073. /* read data comes through single port, auto-incr addr */
  5074. /* NOTE: Use the debugless read so we don't flood kernel log
  5075. * if IWL_DL_IO is set */
  5076. iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  5077. i + RTC_INST_LOWER_BOUND);
  5078. val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  5079. if (val != le32_to_cpu(*image)) {
  5080. #if 0 /* Enable this if you want to see details */
  5081. IWL_ERROR("uCode INST section is invalid at "
  5082. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  5083. i, val, *image);
  5084. #endif
  5085. rc = -EIO;
  5086. errcnt++;
  5087. if (errcnt >= 3)
  5088. break;
  5089. }
  5090. }
  5091. iwl4965_release_nic_access(priv);
  5092. return rc;
  5093. }
  5094. /**
  5095. * iwl4965_verify_ucode - determine which instruction image is in SRAM,
  5096. * and verify its contents
  5097. */
  5098. static int iwl4965_verify_ucode(struct iwl4965_priv *priv)
  5099. {
  5100. __le32 *image;
  5101. u32 len;
  5102. int rc = 0;
  5103. /* Try bootstrap */
  5104. image = (__le32 *)priv->ucode_boot.v_addr;
  5105. len = priv->ucode_boot.len;
  5106. rc = iwl4965_verify_inst_sparse(priv, image, len);
  5107. if (rc == 0) {
  5108. IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
  5109. return 0;
  5110. }
  5111. /* Try initialize */
  5112. image = (__le32 *)priv->ucode_init.v_addr;
  5113. len = priv->ucode_init.len;
  5114. rc = iwl4965_verify_inst_sparse(priv, image, len);
  5115. if (rc == 0) {
  5116. IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
  5117. return 0;
  5118. }
  5119. /* Try runtime/protocol */
  5120. image = (__le32 *)priv->ucode_code.v_addr;
  5121. len = priv->ucode_code.len;
  5122. rc = iwl4965_verify_inst_sparse(priv, image, len);
  5123. if (rc == 0) {
  5124. IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
  5125. return 0;
  5126. }
  5127. IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  5128. /* Since nothing seems to match, show first several data entries in
  5129. * instruction SRAM, so maybe visual inspection will give a clue.
  5130. * Selection of bootstrap image (vs. other images) is arbitrary. */
  5131. image = (__le32 *)priv->ucode_boot.v_addr;
  5132. len = priv->ucode_boot.len;
  5133. rc = iwl4965_verify_inst_full(priv, image, len);
  5134. return rc;
  5135. }
  5136. /* check contents of special bootstrap uCode SRAM */
  5137. static int iwl4965_verify_bsm(struct iwl4965_priv *priv)
  5138. {
  5139. __le32 *image = priv->ucode_boot.v_addr;
  5140. u32 len = priv->ucode_boot.len;
  5141. u32 reg;
  5142. u32 val;
  5143. IWL_DEBUG_INFO("Begin verify bsm\n");
  5144. /* verify BSM SRAM contents */
  5145. val = iwl4965_read_prph(priv, BSM_WR_DWCOUNT_REG);
  5146. for (reg = BSM_SRAM_LOWER_BOUND;
  5147. reg < BSM_SRAM_LOWER_BOUND + len;
  5148. reg += sizeof(u32), image ++) {
  5149. val = iwl4965_read_prph(priv, reg);
  5150. if (val != le32_to_cpu(*image)) {
  5151. IWL_ERROR("BSM uCode verification failed at "
  5152. "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  5153. BSM_SRAM_LOWER_BOUND,
  5154. reg - BSM_SRAM_LOWER_BOUND, len,
  5155. val, le32_to_cpu(*image));
  5156. return -EIO;
  5157. }
  5158. }
  5159. IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
  5160. return 0;
  5161. }
  5162. /**
  5163. * iwl4965_load_bsm - Load bootstrap instructions
  5164. *
  5165. * BSM operation:
  5166. *
  5167. * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
  5168. * in special SRAM that does not power down during RFKILL. When powering back
  5169. * up after power-saving sleeps (or during initial uCode load), the BSM loads
  5170. * the bootstrap program into the on-board processor, and starts it.
  5171. *
  5172. * The bootstrap program loads (via DMA) instructions and data for a new
  5173. * program from host DRAM locations indicated by the host driver in the
  5174. * BSM_DRAM_* registers. Once the new program is loaded, it starts
  5175. * automatically.
  5176. *
  5177. * When initializing the NIC, the host driver points the BSM to the
  5178. * "initialize" uCode image. This uCode sets up some internal data, then
  5179. * notifies host via "initialize alive" that it is complete.
  5180. *
  5181. * The host then replaces the BSM_DRAM_* pointer values to point to the
  5182. * normal runtime uCode instructions and a backup uCode data cache buffer
  5183. * (filled initially with starting data values for the on-board processor),
  5184. * then triggers the "initialize" uCode to load and launch the runtime uCode,
  5185. * which begins normal operation.
  5186. *
  5187. * When doing a power-save shutdown, runtime uCode saves data SRAM into
  5188. * the backup data cache in DRAM before SRAM is powered down.
  5189. *
  5190. * When powering back up, the BSM loads the bootstrap program. This reloads
  5191. * the runtime uCode instructions and the backup data cache into SRAM,
  5192. * and re-launches the runtime uCode from where it left off.
  5193. */
  5194. static int iwl4965_load_bsm(struct iwl4965_priv *priv)
  5195. {
  5196. __le32 *image = priv->ucode_boot.v_addr;
  5197. u32 len = priv->ucode_boot.len;
  5198. dma_addr_t pinst;
  5199. dma_addr_t pdata;
  5200. u32 inst_len;
  5201. u32 data_len;
  5202. int rc;
  5203. int i;
  5204. u32 done;
  5205. u32 reg_offset;
  5206. IWL_DEBUG_INFO("Begin load bsm\n");
  5207. /* make sure bootstrap program is no larger than BSM's SRAM size */
  5208. if (len > IWL_MAX_BSM_SIZE)
  5209. return -EINVAL;
  5210. /* Tell bootstrap uCode where to find the "Initialize" uCode
  5211. * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
  5212. * NOTE: iwl4965_initialize_alive_start() will replace these values,
  5213. * after the "initialize" uCode has run, to point to
  5214. * runtime/protocol instructions and backup data cache. */
  5215. pinst = priv->ucode_init.p_addr >> 4;
  5216. pdata = priv->ucode_init_data.p_addr >> 4;
  5217. inst_len = priv->ucode_init.len;
  5218. data_len = priv->ucode_init_data.len;
  5219. rc = iwl4965_grab_nic_access(priv);
  5220. if (rc)
  5221. return rc;
  5222. iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  5223. iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  5224. iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
  5225. iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
  5226. /* Fill BSM memory with bootstrap instructions */
  5227. for (reg_offset = BSM_SRAM_LOWER_BOUND;
  5228. reg_offset < BSM_SRAM_LOWER_BOUND + len;
  5229. reg_offset += sizeof(u32), image++)
  5230. _iwl4965_write_prph(priv, reg_offset,
  5231. le32_to_cpu(*image));
  5232. rc = iwl4965_verify_bsm(priv);
  5233. if (rc) {
  5234. iwl4965_release_nic_access(priv);
  5235. return rc;
  5236. }
  5237. /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
  5238. iwl4965_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
  5239. iwl4965_write_prph(priv, BSM_WR_MEM_DST_REG,
  5240. RTC_INST_LOWER_BOUND);
  5241. iwl4965_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
  5242. /* Load bootstrap code into instruction SRAM now,
  5243. * to prepare to load "initialize" uCode */
  5244. iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
  5245. BSM_WR_CTRL_REG_BIT_START);
  5246. /* Wait for load of bootstrap uCode to finish */
  5247. for (i = 0; i < 100; i++) {
  5248. done = iwl4965_read_prph(priv, BSM_WR_CTRL_REG);
  5249. if (!(done & BSM_WR_CTRL_REG_BIT_START))
  5250. break;
  5251. udelay(10);
  5252. }
  5253. if (i < 100)
  5254. IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
  5255. else {
  5256. IWL_ERROR("BSM write did not complete!\n");
  5257. return -EIO;
  5258. }
  5259. /* Enable future boot loads whenever power management unit triggers it
  5260. * (e.g. when powering back up after power-save shutdown) */
  5261. iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
  5262. BSM_WR_CTRL_REG_BIT_START_EN);
  5263. iwl4965_release_nic_access(priv);
  5264. return 0;
  5265. }
  5266. static void iwl4965_nic_start(struct iwl4965_priv *priv)
  5267. {
  5268. /* Remove all resets to allow NIC to operate */
  5269. iwl4965_write32(priv, CSR_RESET, 0);
  5270. }
  5271. static int iwl4965_alloc_fw_desc(struct pci_dev *pci_dev, struct fw_desc *desc)
  5272. {
  5273. desc->v_addr = pci_alloc_consistent(pci_dev, desc->len, &desc->p_addr);
  5274. return (desc->v_addr != NULL) ? 0 : -ENOMEM;
  5275. }
  5276. /**
  5277. * iwl4965_read_ucode - Read uCode images from disk file.
  5278. *
  5279. * Copy into buffers for card to fetch via bus-mastering
  5280. */
  5281. static int iwl4965_read_ucode(struct iwl4965_priv *priv)
  5282. {
  5283. struct iwl4965_ucode *ucode;
  5284. int ret;
  5285. const struct firmware *ucode_raw;
  5286. const char *name = "iwlwifi-4965" IWL4965_UCODE_API ".ucode";
  5287. u8 *src;
  5288. size_t len;
  5289. u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
  5290. /* Ask kernel firmware_class module to get the boot firmware off disk.
  5291. * request_firmware() is synchronous, file is in memory on return. */
  5292. ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
  5293. if (ret < 0) {
  5294. IWL_ERROR("%s firmware file req failed: Reason %d\n",
  5295. name, ret);
  5296. goto error;
  5297. }
  5298. IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
  5299. name, ucode_raw->size);
  5300. /* Make sure that we got at least our header! */
  5301. if (ucode_raw->size < sizeof(*ucode)) {
  5302. IWL_ERROR("File size way too small!\n");
  5303. ret = -EINVAL;
  5304. goto err_release;
  5305. }
  5306. /* Data from ucode file: header followed by uCode images */
  5307. ucode = (void *)ucode_raw->data;
  5308. ver = le32_to_cpu(ucode->ver);
  5309. inst_size = le32_to_cpu(ucode->inst_size);
  5310. data_size = le32_to_cpu(ucode->data_size);
  5311. init_size = le32_to_cpu(ucode->init_size);
  5312. init_data_size = le32_to_cpu(ucode->init_data_size);
  5313. boot_size = le32_to_cpu(ucode->boot_size);
  5314. IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
  5315. IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
  5316. inst_size);
  5317. IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
  5318. data_size);
  5319. IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
  5320. init_size);
  5321. IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
  5322. init_data_size);
  5323. IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
  5324. boot_size);
  5325. /* Verify size of file vs. image size info in file's header */
  5326. if (ucode_raw->size < sizeof(*ucode) +
  5327. inst_size + data_size + init_size +
  5328. init_data_size + boot_size) {
  5329. IWL_DEBUG_INFO("uCode file size %d too small\n",
  5330. (int)ucode_raw->size);
  5331. ret = -EINVAL;
  5332. goto err_release;
  5333. }
  5334. /* Verify that uCode images will fit in card's SRAM */
  5335. if (inst_size > IWL_MAX_INST_SIZE) {
  5336. IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
  5337. inst_size);
  5338. ret = -EINVAL;
  5339. goto err_release;
  5340. }
  5341. if (data_size > IWL_MAX_DATA_SIZE) {
  5342. IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
  5343. data_size);
  5344. ret = -EINVAL;
  5345. goto err_release;
  5346. }
  5347. if (init_size > IWL_MAX_INST_SIZE) {
  5348. IWL_DEBUG_INFO
  5349. ("uCode init instr len %d too large to fit in\n",
  5350. init_size);
  5351. ret = -EINVAL;
  5352. goto err_release;
  5353. }
  5354. if (init_data_size > IWL_MAX_DATA_SIZE) {
  5355. IWL_DEBUG_INFO
  5356. ("uCode init data len %d too large to fit in\n",
  5357. init_data_size);
  5358. ret = -EINVAL;
  5359. goto err_release;
  5360. }
  5361. if (boot_size > IWL_MAX_BSM_SIZE) {
  5362. IWL_DEBUG_INFO
  5363. ("uCode boot instr len %d too large to fit in\n",
  5364. boot_size);
  5365. ret = -EINVAL;
  5366. goto err_release;
  5367. }
  5368. /* Allocate ucode buffers for card's bus-master loading ... */
  5369. /* Runtime instructions and 2 copies of data:
  5370. * 1) unmodified from disk
  5371. * 2) backup cache for save/restore during power-downs */
  5372. priv->ucode_code.len = inst_size;
  5373. iwl4965_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  5374. priv->ucode_data.len = data_size;
  5375. iwl4965_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  5376. priv->ucode_data_backup.len = data_size;
  5377. iwl4965_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  5378. /* Initialization instructions and data */
  5379. if (init_size && init_data_size) {
  5380. priv->ucode_init.len = init_size;
  5381. iwl4965_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  5382. priv->ucode_init_data.len = init_data_size;
  5383. iwl4965_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  5384. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  5385. goto err_pci_alloc;
  5386. }
  5387. /* Bootstrap (instructions only, no data) */
  5388. if (boot_size) {
  5389. priv->ucode_boot.len = boot_size;
  5390. iwl4965_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  5391. if (!priv->ucode_boot.v_addr)
  5392. goto err_pci_alloc;
  5393. }
  5394. /* Copy images into buffers for card's bus-master reads ... */
  5395. /* Runtime instructions (first block of data in file) */
  5396. src = &ucode->data[0];
  5397. len = priv->ucode_code.len;
  5398. IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
  5399. memcpy(priv->ucode_code.v_addr, src, len);
  5400. IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  5401. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  5402. /* Runtime data (2nd block)
  5403. * NOTE: Copy into backup buffer will be done in iwl4965_up() */
  5404. src = &ucode->data[inst_size];
  5405. len = priv->ucode_data.len;
  5406. IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
  5407. memcpy(priv->ucode_data.v_addr, src, len);
  5408. memcpy(priv->ucode_data_backup.v_addr, src, len);
  5409. /* Initialization instructions (3rd block) */
  5410. if (init_size) {
  5411. src = &ucode->data[inst_size + data_size];
  5412. len = priv->ucode_init.len;
  5413. IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
  5414. len);
  5415. memcpy(priv->ucode_init.v_addr, src, len);
  5416. }
  5417. /* Initialization data (4th block) */
  5418. if (init_data_size) {
  5419. src = &ucode->data[inst_size + data_size + init_size];
  5420. len = priv->ucode_init_data.len;
  5421. IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
  5422. len);
  5423. memcpy(priv->ucode_init_data.v_addr, src, len);
  5424. }
  5425. /* Bootstrap instructions (5th block) */
  5426. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  5427. len = priv->ucode_boot.len;
  5428. IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
  5429. memcpy(priv->ucode_boot.v_addr, src, len);
  5430. /* We have our copies now, allow OS release its copies */
  5431. release_firmware(ucode_raw);
  5432. return 0;
  5433. err_pci_alloc:
  5434. IWL_ERROR("failed to allocate pci memory\n");
  5435. ret = -ENOMEM;
  5436. iwl4965_dealloc_ucode_pci(priv);
  5437. err_release:
  5438. release_firmware(ucode_raw);
  5439. error:
  5440. return ret;
  5441. }
  5442. /**
  5443. * iwl4965_set_ucode_ptrs - Set uCode address location
  5444. *
  5445. * Tell initialization uCode where to find runtime uCode.
  5446. *
  5447. * BSM registers initially contain pointers to initialization uCode.
  5448. * We need to replace them to load runtime uCode inst and data,
  5449. * and to save runtime data when powering down.
  5450. */
  5451. static int iwl4965_set_ucode_ptrs(struct iwl4965_priv *priv)
  5452. {
  5453. dma_addr_t pinst;
  5454. dma_addr_t pdata;
  5455. int rc = 0;
  5456. unsigned long flags;
  5457. /* bits 35:4 for 4965 */
  5458. pinst = priv->ucode_code.p_addr >> 4;
  5459. pdata = priv->ucode_data_backup.p_addr >> 4;
  5460. spin_lock_irqsave(&priv->lock, flags);
  5461. rc = iwl4965_grab_nic_access(priv);
  5462. if (rc) {
  5463. spin_unlock_irqrestore(&priv->lock, flags);
  5464. return rc;
  5465. }
  5466. /* Tell bootstrap uCode where to find image to load */
  5467. iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  5468. iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  5469. iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  5470. priv->ucode_data.len);
  5471. /* Inst bytecount must be last to set up, bit 31 signals uCode
  5472. * that all new ptr/size info is in place */
  5473. iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  5474. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  5475. iwl4965_release_nic_access(priv);
  5476. spin_unlock_irqrestore(&priv->lock, flags);
  5477. IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
  5478. return rc;
  5479. }
  5480. /**
  5481. * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
  5482. *
  5483. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  5484. *
  5485. * The 4965 "initialize" ALIVE reply contains calibration data for:
  5486. * Voltage, temperature, and MIMO tx gain correction, now stored in priv
  5487. * (3945 does not contain this data).
  5488. *
  5489. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  5490. */
  5491. static void iwl4965_init_alive_start(struct iwl4965_priv *priv)
  5492. {
  5493. /* Check alive response for "valid" sign from uCode */
  5494. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  5495. /* We had an error bringing up the hardware, so take it
  5496. * all the way back down so we can try again */
  5497. IWL_DEBUG_INFO("Initialize Alive failed.\n");
  5498. goto restart;
  5499. }
  5500. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  5501. * This is a paranoid check, because we would not have gotten the
  5502. * "initialize" alive if code weren't properly loaded. */
  5503. if (iwl4965_verify_ucode(priv)) {
  5504. /* Runtime instruction load was bad;
  5505. * take it all the way back down so we can try again */
  5506. IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
  5507. goto restart;
  5508. }
  5509. /* Calculate temperature */
  5510. priv->temperature = iwl4965_get_temperature(priv);
  5511. /* Send pointers to protocol/runtime uCode image ... init code will
  5512. * load and launch runtime uCode, which will send us another "Alive"
  5513. * notification. */
  5514. IWL_DEBUG_INFO("Initialization Alive received.\n");
  5515. if (iwl4965_set_ucode_ptrs(priv)) {
  5516. /* Runtime instruction load won't happen;
  5517. * take it all the way back down so we can try again */
  5518. IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
  5519. goto restart;
  5520. }
  5521. return;
  5522. restart:
  5523. queue_work(priv->workqueue, &priv->restart);
  5524. }
  5525. /**
  5526. * iwl4965_alive_start - called after REPLY_ALIVE notification received
  5527. * from protocol/runtime uCode (initialization uCode's
  5528. * Alive gets handled by iwl4965_init_alive_start()).
  5529. */
  5530. static void iwl4965_alive_start(struct iwl4965_priv *priv)
  5531. {
  5532. int rc = 0;
  5533. IWL_DEBUG_INFO("Runtime Alive received.\n");
  5534. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  5535. /* We had an error bringing up the hardware, so take it
  5536. * all the way back down so we can try again */
  5537. IWL_DEBUG_INFO("Alive failed.\n");
  5538. goto restart;
  5539. }
  5540. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  5541. * This is a paranoid check, because we would not have gotten the
  5542. * "runtime" alive if code weren't properly loaded. */
  5543. if (iwl4965_verify_ucode(priv)) {
  5544. /* Runtime instruction load was bad;
  5545. * take it all the way back down so we can try again */
  5546. IWL_DEBUG_INFO("Bad runtime uCode load.\n");
  5547. goto restart;
  5548. }
  5549. iwl4965_clear_stations_table(priv);
  5550. rc = iwl4965_alive_notify(priv);
  5551. if (rc) {
  5552. IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
  5553. rc);
  5554. goto restart;
  5555. }
  5556. /* After the ALIVE response, we can send host commands to 4965 uCode */
  5557. set_bit(STATUS_ALIVE, &priv->status);
  5558. /* Clear out the uCode error bit if it is set */
  5559. clear_bit(STATUS_FW_ERROR, &priv->status);
  5560. rc = iwl4965_init_channel_map(priv);
  5561. if (rc) {
  5562. IWL_ERROR("initializing regulatory failed: %d\n", rc);
  5563. return;
  5564. }
  5565. iwl4965_init_geos(priv);
  5566. if (iwl4965_is_rfkill(priv))
  5567. return;
  5568. if (!priv->mac80211_registered) {
  5569. /* Unlock so any user space entry points can call back into
  5570. * the driver without a deadlock... */
  5571. mutex_unlock(&priv->mutex);
  5572. iwl4965_rate_control_register(priv->hw);
  5573. rc = ieee80211_register_hw(priv->hw);
  5574. priv->hw->conf.beacon_int = 100;
  5575. mutex_lock(&priv->mutex);
  5576. if (rc) {
  5577. iwl4965_rate_control_unregister(priv->hw);
  5578. IWL_ERROR("Failed to register network "
  5579. "device (error %d)\n", rc);
  5580. return;
  5581. }
  5582. priv->mac80211_registered = 1;
  5583. iwl4965_reset_channel_flag(priv);
  5584. } else
  5585. ieee80211_start_queues(priv->hw);
  5586. priv->active_rate = priv->rates_mask;
  5587. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  5588. iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
  5589. if (iwl4965_is_associated(priv)) {
  5590. struct iwl4965_rxon_cmd *active_rxon =
  5591. (struct iwl4965_rxon_cmd *)(&priv->active_rxon);
  5592. memcpy(&priv->staging_rxon, &priv->active_rxon,
  5593. sizeof(priv->staging_rxon));
  5594. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5595. } else {
  5596. /* Initialize our rx_config data */
  5597. iwl4965_connection_init_rx_config(priv);
  5598. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  5599. }
  5600. /* Configure Bluetooth device coexistence support */
  5601. iwl4965_send_bt_config(priv);
  5602. /* Configure the adapter for unassociated operation */
  5603. iwl4965_commit_rxon(priv);
  5604. /* At this point, the NIC is initialized and operational */
  5605. priv->notif_missed_beacons = 0;
  5606. set_bit(STATUS_READY, &priv->status);
  5607. iwl4965_rf_kill_ct_config(priv);
  5608. IWL_DEBUG_INFO("ALIVE processing complete.\n");
  5609. if (priv->error_recovering)
  5610. iwl4965_error_recovery(priv);
  5611. return;
  5612. restart:
  5613. queue_work(priv->workqueue, &priv->restart);
  5614. }
  5615. static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv);
  5616. static void __iwl4965_down(struct iwl4965_priv *priv)
  5617. {
  5618. unsigned long flags;
  5619. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  5620. struct ieee80211_conf *conf = NULL;
  5621. IWL_DEBUG_INFO(DRV_NAME " is going down\n");
  5622. conf = ieee80211_get_hw_conf(priv->hw);
  5623. if (!exit_pending)
  5624. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5625. iwl4965_clear_stations_table(priv);
  5626. /* Unblock any waiting calls */
  5627. wake_up_interruptible_all(&priv->wait_command_queue);
  5628. /* Wipe out the EXIT_PENDING status bit if we are not actually
  5629. * exiting the module */
  5630. if (!exit_pending)
  5631. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  5632. /* stop and reset the on-board processor */
  5633. iwl4965_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  5634. /* tell the device to stop sending interrupts */
  5635. iwl4965_disable_interrupts(priv);
  5636. if (priv->mac80211_registered)
  5637. ieee80211_stop_queues(priv->hw);
  5638. /* If we have not previously called iwl4965_init() then
  5639. * clear all bits but the RF Kill and SUSPEND bits and return */
  5640. if (!iwl4965_is_init(priv)) {
  5641. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5642. STATUS_RF_KILL_HW |
  5643. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5644. STATUS_RF_KILL_SW |
  5645. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5646. STATUS_IN_SUSPEND;
  5647. goto exit;
  5648. }
  5649. /* ...otherwise clear out all the status bits but the RF Kill and
  5650. * SUSPEND bits and continue taking the NIC down. */
  5651. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5652. STATUS_RF_KILL_HW |
  5653. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5654. STATUS_RF_KILL_SW |
  5655. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5656. STATUS_IN_SUSPEND |
  5657. test_bit(STATUS_FW_ERROR, &priv->status) <<
  5658. STATUS_FW_ERROR;
  5659. spin_lock_irqsave(&priv->lock, flags);
  5660. iwl4965_clear_bit(priv, CSR_GP_CNTRL,
  5661. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  5662. spin_unlock_irqrestore(&priv->lock, flags);
  5663. iwl4965_hw_txq_ctx_stop(priv);
  5664. iwl4965_hw_rxq_stop(priv);
  5665. spin_lock_irqsave(&priv->lock, flags);
  5666. if (!iwl4965_grab_nic_access(priv)) {
  5667. iwl4965_write_prph(priv, APMG_CLK_DIS_REG,
  5668. APMG_CLK_VAL_DMA_CLK_RQT);
  5669. iwl4965_release_nic_access(priv);
  5670. }
  5671. spin_unlock_irqrestore(&priv->lock, flags);
  5672. udelay(5);
  5673. iwl4965_hw_nic_stop_master(priv);
  5674. iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  5675. iwl4965_hw_nic_reset(priv);
  5676. exit:
  5677. memset(&priv->card_alive, 0, sizeof(struct iwl4965_alive_resp));
  5678. if (priv->ibss_beacon)
  5679. dev_kfree_skb(priv->ibss_beacon);
  5680. priv->ibss_beacon = NULL;
  5681. /* clear out any free frames */
  5682. iwl4965_clear_free_frames(priv);
  5683. }
  5684. static void iwl4965_down(struct iwl4965_priv *priv)
  5685. {
  5686. mutex_lock(&priv->mutex);
  5687. __iwl4965_down(priv);
  5688. mutex_unlock(&priv->mutex);
  5689. iwl4965_cancel_deferred_work(priv);
  5690. }
  5691. #define MAX_HW_RESTARTS 5
  5692. static int __iwl4965_up(struct iwl4965_priv *priv)
  5693. {
  5694. DECLARE_MAC_BUF(mac);
  5695. int rc, i;
  5696. u32 hw_rf_kill = 0;
  5697. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5698. IWL_WARNING("Exit pending; will not bring the NIC up\n");
  5699. return -EIO;
  5700. }
  5701. if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
  5702. IWL_WARNING("Radio disabled by SW RF kill (module "
  5703. "parameter)\n");
  5704. return 0;
  5705. }
  5706. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  5707. IWL_ERROR("ucode not available for device bringup\n");
  5708. return -EIO;
  5709. }
  5710. iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
  5711. rc = iwl4965_hw_nic_init(priv);
  5712. if (rc) {
  5713. IWL_ERROR("Unable to int nic\n");
  5714. return rc;
  5715. }
  5716. /* make sure rfkill handshake bits are cleared */
  5717. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5718. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  5719. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  5720. /* clear (again), then enable host interrupts */
  5721. iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
  5722. iwl4965_enable_interrupts(priv);
  5723. /* really make sure rfkill handshake bits are cleared */
  5724. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5725. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5726. /* Copy original ucode data image from disk into backup cache.
  5727. * This will be used to initialize the on-board processor's
  5728. * data SRAM for a clean start when the runtime program first loads. */
  5729. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  5730. priv->ucode_data.len);
  5731. /* If platform's RF_KILL switch is set to KILL,
  5732. * wait for BIT_INT_RF_KILL interrupt before loading uCode
  5733. * and getting things started */
  5734. if (!(iwl4965_read32(priv, CSR_GP_CNTRL) &
  5735. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  5736. hw_rf_kill = 1;
  5737. if (test_bit(STATUS_RF_KILL_HW, &priv->status) || hw_rf_kill) {
  5738. IWL_WARNING("Radio disabled by HW RF Kill switch\n");
  5739. return 0;
  5740. }
  5741. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  5742. iwl4965_clear_stations_table(priv);
  5743. /* load bootstrap state machine,
  5744. * load bootstrap program into processor's memory,
  5745. * prepare to load the "initialize" uCode */
  5746. rc = iwl4965_load_bsm(priv);
  5747. if (rc) {
  5748. IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
  5749. continue;
  5750. }
  5751. /* start card; "initialize" will load runtime ucode */
  5752. iwl4965_nic_start(priv);
  5753. /* MAC Address location in EEPROM is same for 3945/4965 */
  5754. get_eeprom_mac(priv, priv->mac_addr);
  5755. IWL_DEBUG_INFO("MAC address: %s\n",
  5756. print_mac(mac, priv->mac_addr));
  5757. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  5758. IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
  5759. return 0;
  5760. }
  5761. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5762. __iwl4965_down(priv);
  5763. /* tried to restart and config the device for as long as our
  5764. * patience could withstand */
  5765. IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
  5766. return -EIO;
  5767. }
  5768. /*****************************************************************************
  5769. *
  5770. * Workqueue callbacks
  5771. *
  5772. *****************************************************************************/
  5773. static void iwl4965_bg_init_alive_start(struct work_struct *data)
  5774. {
  5775. struct iwl4965_priv *priv =
  5776. container_of(data, struct iwl4965_priv, init_alive_start.work);
  5777. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5778. return;
  5779. mutex_lock(&priv->mutex);
  5780. iwl4965_init_alive_start(priv);
  5781. mutex_unlock(&priv->mutex);
  5782. }
  5783. static void iwl4965_bg_alive_start(struct work_struct *data)
  5784. {
  5785. struct iwl4965_priv *priv =
  5786. container_of(data, struct iwl4965_priv, alive_start.work);
  5787. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5788. return;
  5789. mutex_lock(&priv->mutex);
  5790. iwl4965_alive_start(priv);
  5791. mutex_unlock(&priv->mutex);
  5792. }
  5793. static void iwl4965_bg_rf_kill(struct work_struct *work)
  5794. {
  5795. struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, rf_kill);
  5796. wake_up_interruptible(&priv->wait_command_queue);
  5797. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5798. return;
  5799. mutex_lock(&priv->mutex);
  5800. if (!iwl4965_is_rfkill(priv)) {
  5801. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
  5802. "HW and/or SW RF Kill no longer active, restarting "
  5803. "device\n");
  5804. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5805. queue_work(priv->workqueue, &priv->restart);
  5806. } else {
  5807. if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
  5808. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  5809. "disabled by SW switch\n");
  5810. else
  5811. IWL_WARNING("Radio Frequency Kill Switch is On:\n"
  5812. "Kill switch must be turned off for "
  5813. "wireless networking to work.\n");
  5814. }
  5815. mutex_unlock(&priv->mutex);
  5816. }
  5817. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  5818. static void iwl4965_bg_scan_check(struct work_struct *data)
  5819. {
  5820. struct iwl4965_priv *priv =
  5821. container_of(data, struct iwl4965_priv, scan_check.work);
  5822. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5823. return;
  5824. mutex_lock(&priv->mutex);
  5825. if (test_bit(STATUS_SCANNING, &priv->status) ||
  5826. test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5827. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
  5828. "Scan completion watchdog resetting adapter (%dms)\n",
  5829. jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
  5830. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5831. iwl4965_send_scan_abort(priv);
  5832. }
  5833. mutex_unlock(&priv->mutex);
  5834. }
  5835. static void iwl4965_bg_request_scan(struct work_struct *data)
  5836. {
  5837. struct iwl4965_priv *priv =
  5838. container_of(data, struct iwl4965_priv, request_scan);
  5839. struct iwl4965_host_cmd cmd = {
  5840. .id = REPLY_SCAN_CMD,
  5841. .len = sizeof(struct iwl4965_scan_cmd),
  5842. .meta.flags = CMD_SIZE_HUGE,
  5843. };
  5844. int rc = 0;
  5845. struct iwl4965_scan_cmd *scan;
  5846. struct ieee80211_conf *conf = NULL;
  5847. u8 direct_mask;
  5848. int phymode;
  5849. conf = ieee80211_get_hw_conf(priv->hw);
  5850. mutex_lock(&priv->mutex);
  5851. if (!iwl4965_is_ready(priv)) {
  5852. IWL_WARNING("request scan called when driver not ready.\n");
  5853. goto done;
  5854. }
  5855. /* Make sure the scan wasn't cancelled before this queued work
  5856. * was given the chance to run... */
  5857. if (!test_bit(STATUS_SCANNING, &priv->status))
  5858. goto done;
  5859. /* This should never be called or scheduled if there is currently
  5860. * a scan active in the hardware. */
  5861. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  5862. IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
  5863. "Ignoring second request.\n");
  5864. rc = -EIO;
  5865. goto done;
  5866. }
  5867. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5868. IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
  5869. goto done;
  5870. }
  5871. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5872. IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
  5873. goto done;
  5874. }
  5875. if (iwl4965_is_rfkill(priv)) {
  5876. IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
  5877. goto done;
  5878. }
  5879. if (!test_bit(STATUS_READY, &priv->status)) {
  5880. IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
  5881. goto done;
  5882. }
  5883. if (!priv->scan_bands) {
  5884. IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
  5885. goto done;
  5886. }
  5887. if (!priv->scan) {
  5888. priv->scan = kmalloc(sizeof(struct iwl4965_scan_cmd) +
  5889. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  5890. if (!priv->scan) {
  5891. rc = -ENOMEM;
  5892. goto done;
  5893. }
  5894. }
  5895. scan = priv->scan;
  5896. memset(scan, 0, sizeof(struct iwl4965_scan_cmd) + IWL_MAX_SCAN_SIZE);
  5897. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  5898. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  5899. if (iwl4965_is_associated(priv)) {
  5900. u16 interval = 0;
  5901. u32 extra;
  5902. u32 suspend_time = 100;
  5903. u32 scan_suspend_time = 100;
  5904. unsigned long flags;
  5905. IWL_DEBUG_INFO("Scanning while associated...\n");
  5906. spin_lock_irqsave(&priv->lock, flags);
  5907. interval = priv->beacon_int;
  5908. spin_unlock_irqrestore(&priv->lock, flags);
  5909. scan->suspend_time = 0;
  5910. scan->max_out_time = cpu_to_le32(200 * 1024);
  5911. if (!interval)
  5912. interval = suspend_time;
  5913. extra = (suspend_time / interval) << 22;
  5914. scan_suspend_time = (extra |
  5915. ((suspend_time % interval) * 1024));
  5916. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  5917. IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
  5918. scan_suspend_time, interval);
  5919. }
  5920. /* We should add the ability for user to lock to PASSIVE ONLY */
  5921. if (priv->one_direct_scan) {
  5922. IWL_DEBUG_SCAN
  5923. ("Kicking off one direct scan for '%s'\n",
  5924. iwl4965_escape_essid(priv->direct_ssid,
  5925. priv->direct_ssid_len));
  5926. scan->direct_scan[0].id = WLAN_EID_SSID;
  5927. scan->direct_scan[0].len = priv->direct_ssid_len;
  5928. memcpy(scan->direct_scan[0].ssid,
  5929. priv->direct_ssid, priv->direct_ssid_len);
  5930. direct_mask = 1;
  5931. } else if (!iwl4965_is_associated(priv) && priv->essid_len) {
  5932. scan->direct_scan[0].id = WLAN_EID_SSID;
  5933. scan->direct_scan[0].len = priv->essid_len;
  5934. memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
  5935. direct_mask = 1;
  5936. } else
  5937. direct_mask = 0;
  5938. /* We don't build a direct scan probe request; the uCode will do
  5939. * that based on the direct_mask added to each channel entry */
  5940. scan->tx_cmd.len = cpu_to_le16(
  5941. iwl4965_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
  5942. IWL_MAX_SCAN_SIZE - sizeof(scan), 0));
  5943. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  5944. scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
  5945. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  5946. /* flags + rate selection */
  5947. scan->tx_cmd.tx_flags |= cpu_to_le32(0x200);
  5948. switch (priv->scan_bands) {
  5949. case 2:
  5950. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  5951. scan->tx_cmd.rate_n_flags =
  5952. iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP,
  5953. RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK);
  5954. scan->good_CRC_th = 0;
  5955. phymode = MODE_IEEE80211G;
  5956. break;
  5957. case 1:
  5958. scan->tx_cmd.rate_n_flags =
  5959. iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP,
  5960. RATE_MCS_ANT_B_MSK);
  5961. scan->good_CRC_th = IWL_GOOD_CRC_TH;
  5962. phymode = MODE_IEEE80211A;
  5963. break;
  5964. default:
  5965. IWL_WARNING("Invalid scan band count\n");
  5966. goto done;
  5967. }
  5968. /* select Rx chains */
  5969. /* Force use of chains B and C (0x6) for scan Rx.
  5970. * Avoid A (0x1) because of its off-channel reception on A-band.
  5971. * MIMO is not used here, but value is required to make uCode happy. */
  5972. scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK |
  5973. cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) |
  5974. (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) |
  5975. (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS));
  5976. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
  5977. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  5978. if (direct_mask)
  5979. IWL_DEBUG_SCAN
  5980. ("Initiating direct scan for %s.\n",
  5981. iwl4965_escape_essid(priv->essid, priv->essid_len));
  5982. else
  5983. IWL_DEBUG_SCAN("Initiating indirect scan.\n");
  5984. scan->channel_count =
  5985. iwl4965_get_channels_for_scan(
  5986. priv, phymode, 1, /* active */
  5987. direct_mask,
  5988. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  5989. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  5990. scan->channel_count * sizeof(struct iwl4965_scan_channel);
  5991. cmd.data = scan;
  5992. scan->len = cpu_to_le16(cmd.len);
  5993. set_bit(STATUS_SCAN_HW, &priv->status);
  5994. rc = iwl4965_send_cmd_sync(priv, &cmd);
  5995. if (rc)
  5996. goto done;
  5997. queue_delayed_work(priv->workqueue, &priv->scan_check,
  5998. IWL_SCAN_CHECK_WATCHDOG);
  5999. mutex_unlock(&priv->mutex);
  6000. return;
  6001. done:
  6002. /* inform mac80211 scan aborted */
  6003. queue_work(priv->workqueue, &priv->scan_completed);
  6004. mutex_unlock(&priv->mutex);
  6005. }
  6006. static void iwl4965_bg_up(struct work_struct *data)
  6007. {
  6008. struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, up);
  6009. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6010. return;
  6011. mutex_lock(&priv->mutex);
  6012. __iwl4965_up(priv);
  6013. mutex_unlock(&priv->mutex);
  6014. }
  6015. static void iwl4965_bg_restart(struct work_struct *data)
  6016. {
  6017. struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, restart);
  6018. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6019. return;
  6020. iwl4965_down(priv);
  6021. queue_work(priv->workqueue, &priv->up);
  6022. }
  6023. static void iwl4965_bg_rx_replenish(struct work_struct *data)
  6024. {
  6025. struct iwl4965_priv *priv =
  6026. container_of(data, struct iwl4965_priv, rx_replenish);
  6027. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6028. return;
  6029. mutex_lock(&priv->mutex);
  6030. iwl4965_rx_replenish(priv);
  6031. mutex_unlock(&priv->mutex);
  6032. }
  6033. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  6034. static void iwl4965_bg_post_associate(struct work_struct *data)
  6035. {
  6036. struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv,
  6037. post_associate.work);
  6038. int rc = 0;
  6039. struct ieee80211_conf *conf = NULL;
  6040. DECLARE_MAC_BUF(mac);
  6041. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  6042. IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
  6043. return;
  6044. }
  6045. IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
  6046. priv->assoc_id,
  6047. print_mac(mac, priv->active_rxon.bssid_addr));
  6048. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6049. return;
  6050. mutex_lock(&priv->mutex);
  6051. if (!priv->vif || !priv->is_open) {
  6052. mutex_unlock(&priv->mutex);
  6053. return;
  6054. }
  6055. iwl4965_scan_cancel_timeout(priv, 200);
  6056. conf = ieee80211_get_hw_conf(priv->hw);
  6057. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6058. iwl4965_commit_rxon(priv);
  6059. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  6060. iwl4965_setup_rxon_timing(priv);
  6061. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  6062. sizeof(priv->rxon_timing), &priv->rxon_timing);
  6063. if (rc)
  6064. IWL_WARNING("REPLY_RXON_TIMING failed - "
  6065. "Attempting to continue.\n");
  6066. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  6067. #ifdef CONFIG_IWL4965_HT
  6068. if (priv->current_ht_config.is_ht)
  6069. iwl4965_set_rxon_ht(priv, &priv->current_ht_config);
  6070. #endif /* CONFIG_IWL4965_HT*/
  6071. iwl4965_set_rxon_chain(priv);
  6072. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  6073. IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
  6074. priv->assoc_id, priv->beacon_int);
  6075. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  6076. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  6077. else
  6078. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  6079. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  6080. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  6081. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  6082. else
  6083. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  6084. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  6085. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  6086. }
  6087. iwl4965_commit_rxon(priv);
  6088. switch (priv->iw_mode) {
  6089. case IEEE80211_IF_TYPE_STA:
  6090. iwl4965_rate_scale_init(priv->hw, IWL_AP_ID);
  6091. break;
  6092. case IEEE80211_IF_TYPE_IBSS:
  6093. /* clear out the station table */
  6094. iwl4965_clear_stations_table(priv);
  6095. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  6096. iwl4965_rxon_add_station(priv, priv->bssid, 0);
  6097. iwl4965_rate_scale_init(priv->hw, IWL_STA_ID);
  6098. iwl4965_send_beacon_cmd(priv);
  6099. break;
  6100. default:
  6101. IWL_ERROR("%s Should not be called in %d mode\n",
  6102. __FUNCTION__, priv->iw_mode);
  6103. break;
  6104. }
  6105. iwl4965_sequence_reset(priv);
  6106. #ifdef CONFIG_IWL4965_SENSITIVITY
  6107. /* Enable Rx differential gain and sensitivity calibrations */
  6108. iwl4965_chain_noise_reset(priv);
  6109. priv->start_calib = 1;
  6110. #endif /* CONFIG_IWL4965_SENSITIVITY */
  6111. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  6112. priv->assoc_station_added = 1;
  6113. #ifdef CONFIG_IWL4965_QOS
  6114. iwl4965_activate_qos(priv, 0);
  6115. #endif /* CONFIG_IWL4965_QOS */
  6116. /* we have just associated, don't start scan too early */
  6117. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  6118. mutex_unlock(&priv->mutex);
  6119. }
  6120. static void iwl4965_bg_abort_scan(struct work_struct *work)
  6121. {
  6122. struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, abort_scan);
  6123. if (!iwl4965_is_ready(priv))
  6124. return;
  6125. mutex_lock(&priv->mutex);
  6126. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  6127. iwl4965_send_scan_abort(priv);
  6128. mutex_unlock(&priv->mutex);
  6129. }
  6130. static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
  6131. static void iwl4965_bg_scan_completed(struct work_struct *work)
  6132. {
  6133. struct iwl4965_priv *priv =
  6134. container_of(work, struct iwl4965_priv, scan_completed);
  6135. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
  6136. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6137. return;
  6138. if (test_bit(STATUS_CONF_PENDING, &priv->status))
  6139. iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
  6140. ieee80211_scan_completed(priv->hw);
  6141. /* Since setting the TXPOWER may have been deferred while
  6142. * performing the scan, fire one off */
  6143. mutex_lock(&priv->mutex);
  6144. iwl4965_hw_reg_send_txpower(priv);
  6145. mutex_unlock(&priv->mutex);
  6146. }
  6147. /*****************************************************************************
  6148. *
  6149. * mac80211 entry point functions
  6150. *
  6151. *****************************************************************************/
  6152. static int iwl4965_mac_start(struct ieee80211_hw *hw)
  6153. {
  6154. struct iwl4965_priv *priv = hw->priv;
  6155. IWL_DEBUG_MAC80211("enter\n");
  6156. /* we should be verifying the device is ready to be opened */
  6157. mutex_lock(&priv->mutex);
  6158. priv->is_open = 1;
  6159. if (!iwl4965_is_rfkill(priv))
  6160. ieee80211_start_queues(priv->hw);
  6161. mutex_unlock(&priv->mutex);
  6162. IWL_DEBUG_MAC80211("leave\n");
  6163. return 0;
  6164. }
  6165. static void iwl4965_mac_stop(struct ieee80211_hw *hw)
  6166. {
  6167. struct iwl4965_priv *priv = hw->priv;
  6168. IWL_DEBUG_MAC80211("enter\n");
  6169. mutex_lock(&priv->mutex);
  6170. /* stop mac, cancel any scan request and clear
  6171. * RXON_FILTER_ASSOC_MSK BIT
  6172. */
  6173. priv->is_open = 0;
  6174. if (!iwl4965_is_ready_rf(priv)) {
  6175. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6176. mutex_unlock(&priv->mutex);
  6177. return;
  6178. }
  6179. iwl4965_scan_cancel_timeout(priv, 100);
  6180. cancel_delayed_work(&priv->post_associate);
  6181. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6182. iwl4965_commit_rxon(priv);
  6183. mutex_unlock(&priv->mutex);
  6184. IWL_DEBUG_MAC80211("leave\n");
  6185. }
  6186. static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
  6187. struct ieee80211_tx_control *ctl)
  6188. {
  6189. struct iwl4965_priv *priv = hw->priv;
  6190. IWL_DEBUG_MAC80211("enter\n");
  6191. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
  6192. IWL_DEBUG_MAC80211("leave - monitor\n");
  6193. return -1;
  6194. }
  6195. IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  6196. ctl->tx_rate);
  6197. if (iwl4965_tx_skb(priv, skb, ctl))
  6198. dev_kfree_skb_any(skb);
  6199. IWL_DEBUG_MAC80211("leave\n");
  6200. return 0;
  6201. }
  6202. static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
  6203. struct ieee80211_if_init_conf *conf)
  6204. {
  6205. struct iwl4965_priv *priv = hw->priv;
  6206. unsigned long flags;
  6207. DECLARE_MAC_BUF(mac);
  6208. IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
  6209. if (priv->vif) {
  6210. IWL_DEBUG_MAC80211("leave - vif != NULL\n");
  6211. return 0;
  6212. }
  6213. spin_lock_irqsave(&priv->lock, flags);
  6214. priv->vif = conf->vif;
  6215. spin_unlock_irqrestore(&priv->lock, flags);
  6216. mutex_lock(&priv->mutex);
  6217. if (conf->mac_addr) {
  6218. IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
  6219. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  6220. }
  6221. iwl4965_set_mode(priv, conf->type);
  6222. IWL_DEBUG_MAC80211("leave\n");
  6223. mutex_unlock(&priv->mutex);
  6224. return 0;
  6225. }
  6226. /**
  6227. * iwl4965_mac_config - mac80211 config callback
  6228. *
  6229. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  6230. * be set inappropriately and the driver currently sets the hardware up to
  6231. * use it whenever needed.
  6232. */
  6233. static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
  6234. {
  6235. struct iwl4965_priv *priv = hw->priv;
  6236. const struct iwl4965_channel_info *ch_info;
  6237. unsigned long flags;
  6238. int ret = 0;
  6239. mutex_lock(&priv->mutex);
  6240. IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel);
  6241. priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
  6242. if (!iwl4965_is_ready(priv)) {
  6243. IWL_DEBUG_MAC80211("leave - not ready\n");
  6244. ret = -EIO;
  6245. goto out;
  6246. }
  6247. if (unlikely(!iwl4965_param_disable_hw_scan &&
  6248. test_bit(STATUS_SCANNING, &priv->status))) {
  6249. IWL_DEBUG_MAC80211("leave - scanning\n");
  6250. set_bit(STATUS_CONF_PENDING, &priv->status);
  6251. mutex_unlock(&priv->mutex);
  6252. return 0;
  6253. }
  6254. spin_lock_irqsave(&priv->lock, flags);
  6255. ch_info = iwl4965_get_channel_info(priv, conf->phymode, conf->channel);
  6256. if (!is_channel_valid(ch_info)) {
  6257. IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this SKU.\n",
  6258. conf->channel, conf->phymode);
  6259. IWL_DEBUG_MAC80211("leave - invalid channel\n");
  6260. spin_unlock_irqrestore(&priv->lock, flags);
  6261. ret = -EINVAL;
  6262. goto out;
  6263. }
  6264. #ifdef CONFIG_IWL4965_HT
  6265. /* if we are switching fron ht to 2.4 clear flags
  6266. * from any ht related info since 2.4 does not
  6267. * support ht */
  6268. if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel)
  6269. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  6270. && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
  6271. #endif
  6272. )
  6273. priv->staging_rxon.flags = 0;
  6274. #endif /* CONFIG_IWL4965_HT */
  6275. iwl4965_set_rxon_channel(priv, conf->phymode, conf->channel);
  6276. iwl4965_set_flags_for_phymode(priv, conf->phymode);
  6277. /* The list of supported rates and rate mask can be different
  6278. * for each phymode; since the phymode may have changed, reset
  6279. * the rate mask to what mac80211 lists */
  6280. iwl4965_set_rate(priv);
  6281. spin_unlock_irqrestore(&priv->lock, flags);
  6282. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  6283. if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
  6284. iwl4965_hw_channel_switch(priv, conf->channel);
  6285. goto out;
  6286. }
  6287. #endif
  6288. iwl4965_radio_kill_sw(priv, !conf->radio_enabled);
  6289. if (!conf->radio_enabled) {
  6290. IWL_DEBUG_MAC80211("leave - radio disabled\n");
  6291. goto out;
  6292. }
  6293. if (iwl4965_is_rfkill(priv)) {
  6294. IWL_DEBUG_MAC80211("leave - RF kill\n");
  6295. ret = -EIO;
  6296. goto out;
  6297. }
  6298. iwl4965_set_rate(priv);
  6299. if (memcmp(&priv->active_rxon,
  6300. &priv->staging_rxon, sizeof(priv->staging_rxon)))
  6301. iwl4965_commit_rxon(priv);
  6302. else
  6303. IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
  6304. IWL_DEBUG_MAC80211("leave\n");
  6305. mutex_unlock(&priv->mutex);
  6306. out:
  6307. clear_bit(STATUS_CONF_PENDING, &priv->status);
  6308. return ret;
  6309. }
  6310. static void iwl4965_config_ap(struct iwl4965_priv *priv)
  6311. {
  6312. int rc = 0;
  6313. if (priv->status & STATUS_EXIT_PENDING)
  6314. return;
  6315. /* The following should be done only at AP bring up */
  6316. if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
  6317. /* RXON - unassoc (to set timing command) */
  6318. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6319. iwl4965_commit_rxon(priv);
  6320. /* RXON Timing */
  6321. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  6322. iwl4965_setup_rxon_timing(priv);
  6323. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  6324. sizeof(priv->rxon_timing), &priv->rxon_timing);
  6325. if (rc)
  6326. IWL_WARNING("REPLY_RXON_TIMING failed - "
  6327. "Attempting to continue.\n");
  6328. iwl4965_set_rxon_chain(priv);
  6329. /* FIXME: what should be the assoc_id for AP? */
  6330. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  6331. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  6332. priv->staging_rxon.flags |=
  6333. RXON_FLG_SHORT_PREAMBLE_MSK;
  6334. else
  6335. priv->staging_rxon.flags &=
  6336. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  6337. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  6338. if (priv->assoc_capability &
  6339. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  6340. priv->staging_rxon.flags |=
  6341. RXON_FLG_SHORT_SLOT_MSK;
  6342. else
  6343. priv->staging_rxon.flags &=
  6344. ~RXON_FLG_SHORT_SLOT_MSK;
  6345. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  6346. priv->staging_rxon.flags &=
  6347. ~RXON_FLG_SHORT_SLOT_MSK;
  6348. }
  6349. /* restore RXON assoc */
  6350. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  6351. iwl4965_commit_rxon(priv);
  6352. #ifdef CONFIG_IWL4965_QOS
  6353. iwl4965_activate_qos(priv, 1);
  6354. #endif
  6355. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  6356. }
  6357. iwl4965_send_beacon_cmd(priv);
  6358. /* FIXME - we need to add code here to detect a totally new
  6359. * configuration, reset the AP, unassoc, rxon timing, assoc,
  6360. * clear sta table, add BCAST sta... */
  6361. }
  6362. static int iwl4965_mac_config_interface(struct ieee80211_hw *hw,
  6363. struct ieee80211_vif *vif,
  6364. struct ieee80211_if_conf *conf)
  6365. {
  6366. struct iwl4965_priv *priv = hw->priv;
  6367. DECLARE_MAC_BUF(mac);
  6368. unsigned long flags;
  6369. int rc;
  6370. if (conf == NULL)
  6371. return -EIO;
  6372. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  6373. (!conf->beacon || !conf->ssid_len)) {
  6374. IWL_DEBUG_MAC80211
  6375. ("Leaving in AP mode because HostAPD is not ready.\n");
  6376. return 0;
  6377. }
  6378. mutex_lock(&priv->mutex);
  6379. if (conf->bssid)
  6380. IWL_DEBUG_MAC80211("bssid: %s\n",
  6381. print_mac(mac, conf->bssid));
  6382. /*
  6383. * very dubious code was here; the probe filtering flag is never set:
  6384. *
  6385. if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
  6386. !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
  6387. */
  6388. if (unlikely(test_bit(STATUS_SCANNING, &priv->status))) {
  6389. IWL_DEBUG_MAC80211("leave - scanning\n");
  6390. mutex_unlock(&priv->mutex);
  6391. return 0;
  6392. }
  6393. if (priv->vif != vif) {
  6394. IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
  6395. mutex_unlock(&priv->mutex);
  6396. return 0;
  6397. }
  6398. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  6399. if (!conf->bssid) {
  6400. conf->bssid = priv->mac_addr;
  6401. memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
  6402. IWL_DEBUG_MAC80211("bssid was set to: %s\n",
  6403. print_mac(mac, conf->bssid));
  6404. }
  6405. if (priv->ibss_beacon)
  6406. dev_kfree_skb(priv->ibss_beacon);
  6407. priv->ibss_beacon = conf->beacon;
  6408. }
  6409. if (iwl4965_is_rfkill(priv))
  6410. goto done;
  6411. if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
  6412. !is_multicast_ether_addr(conf->bssid)) {
  6413. /* If there is currently a HW scan going on in the background
  6414. * then we need to cancel it else the RXON below will fail. */
  6415. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  6416. IWL_WARNING("Aborted scan still in progress "
  6417. "after 100ms\n");
  6418. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  6419. mutex_unlock(&priv->mutex);
  6420. return -EAGAIN;
  6421. }
  6422. memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
  6423. /* TODO: Audit driver for usage of these members and see
  6424. * if mac80211 deprecates them (priv->bssid looks like it
  6425. * shouldn't be there, but I haven't scanned the IBSS code
  6426. * to verify) - jpk */
  6427. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  6428. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6429. iwl4965_config_ap(priv);
  6430. else {
  6431. rc = iwl4965_commit_rxon(priv);
  6432. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
  6433. iwl4965_rxon_add_station(
  6434. priv, priv->active_rxon.bssid_addr, 1);
  6435. }
  6436. } else {
  6437. iwl4965_scan_cancel_timeout(priv, 100);
  6438. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6439. iwl4965_commit_rxon(priv);
  6440. }
  6441. done:
  6442. spin_lock_irqsave(&priv->lock, flags);
  6443. if (!conf->ssid_len)
  6444. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6445. else
  6446. memcpy(priv->essid, conf->ssid, conf->ssid_len);
  6447. priv->essid_len = conf->ssid_len;
  6448. spin_unlock_irqrestore(&priv->lock, flags);
  6449. IWL_DEBUG_MAC80211("leave\n");
  6450. mutex_unlock(&priv->mutex);
  6451. return 0;
  6452. }
  6453. static void iwl4965_configure_filter(struct ieee80211_hw *hw,
  6454. unsigned int changed_flags,
  6455. unsigned int *total_flags,
  6456. int mc_count, struct dev_addr_list *mc_list)
  6457. {
  6458. /*
  6459. * XXX: dummy
  6460. * see also iwl4965_connection_init_rx_config
  6461. */
  6462. *total_flags = 0;
  6463. }
  6464. static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
  6465. struct ieee80211_if_init_conf *conf)
  6466. {
  6467. struct iwl4965_priv *priv = hw->priv;
  6468. IWL_DEBUG_MAC80211("enter\n");
  6469. mutex_lock(&priv->mutex);
  6470. if (iwl4965_is_ready_rf(priv)) {
  6471. iwl4965_scan_cancel_timeout(priv, 100);
  6472. cancel_delayed_work(&priv->post_associate);
  6473. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6474. iwl4965_commit_rxon(priv);
  6475. }
  6476. if (priv->vif == conf->vif) {
  6477. priv->vif = NULL;
  6478. memset(priv->bssid, 0, ETH_ALEN);
  6479. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6480. priv->essid_len = 0;
  6481. }
  6482. mutex_unlock(&priv->mutex);
  6483. IWL_DEBUG_MAC80211("leave\n");
  6484. }
  6485. static void iwl4965_bss_info_changed(struct ieee80211_hw *hw,
  6486. struct ieee80211_vif *vif,
  6487. struct ieee80211_bss_conf *bss_conf,
  6488. u32 changes)
  6489. {
  6490. struct iwl4965_priv *priv = hw->priv;
  6491. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  6492. if (bss_conf->use_short_preamble)
  6493. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  6494. else
  6495. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  6496. }
  6497. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  6498. if (bss_conf->use_cts_prot && (priv->phymode != MODE_IEEE80211A))
  6499. priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
  6500. else
  6501. priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  6502. }
  6503. if (changes & BSS_CHANGED_ASSOC) {
  6504. /*
  6505. * TODO:
  6506. * do stuff instead of sniffing assoc resp
  6507. */
  6508. }
  6509. if (iwl4965_is_associated(priv))
  6510. iwl4965_send_rxon_assoc(priv);
  6511. }
  6512. static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
  6513. {
  6514. int rc = 0;
  6515. unsigned long flags;
  6516. struct iwl4965_priv *priv = hw->priv;
  6517. IWL_DEBUG_MAC80211("enter\n");
  6518. mutex_lock(&priv->mutex);
  6519. spin_lock_irqsave(&priv->lock, flags);
  6520. if (!iwl4965_is_ready_rf(priv)) {
  6521. rc = -EIO;
  6522. IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
  6523. goto out_unlock;
  6524. }
  6525. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
  6526. rc = -EIO;
  6527. IWL_ERROR("ERROR: APs don't scan\n");
  6528. goto out_unlock;
  6529. }
  6530. /* we don't schedule scan within next_scan_jiffies period */
  6531. if (priv->next_scan_jiffies &&
  6532. time_after(priv->next_scan_jiffies, jiffies)) {
  6533. rc = -EAGAIN;
  6534. goto out_unlock;
  6535. }
  6536. /* if we just finished scan ask for delay */
  6537. if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
  6538. IWL_DELAY_NEXT_SCAN, jiffies)) {
  6539. rc = -EAGAIN;
  6540. goto out_unlock;
  6541. }
  6542. if (len) {
  6543. IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
  6544. iwl4965_escape_essid(ssid, len), (int)len);
  6545. priv->one_direct_scan = 1;
  6546. priv->direct_ssid_len = (u8)
  6547. min((u8) len, (u8) IW_ESSID_MAX_SIZE);
  6548. memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
  6549. } else
  6550. priv->one_direct_scan = 0;
  6551. rc = iwl4965_scan_initiate(priv);
  6552. IWL_DEBUG_MAC80211("leave\n");
  6553. out_unlock:
  6554. spin_unlock_irqrestore(&priv->lock, flags);
  6555. mutex_unlock(&priv->mutex);
  6556. return rc;
  6557. }
  6558. static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  6559. const u8 *local_addr, const u8 *addr,
  6560. struct ieee80211_key_conf *key)
  6561. {
  6562. struct iwl4965_priv *priv = hw->priv;
  6563. DECLARE_MAC_BUF(mac);
  6564. int rc = 0;
  6565. u8 sta_id;
  6566. IWL_DEBUG_MAC80211("enter\n");
  6567. if (!iwl4965_param_hwcrypto) {
  6568. IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
  6569. return -EOPNOTSUPP;
  6570. }
  6571. if (is_zero_ether_addr(addr))
  6572. /* only support pairwise keys */
  6573. return -EOPNOTSUPP;
  6574. sta_id = iwl4965_hw_find_station(priv, addr);
  6575. if (sta_id == IWL_INVALID_STATION) {
  6576. IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
  6577. print_mac(mac, addr));
  6578. return -EINVAL;
  6579. }
  6580. mutex_lock(&priv->mutex);
  6581. iwl4965_scan_cancel_timeout(priv, 100);
  6582. switch (cmd) {
  6583. case SET_KEY:
  6584. rc = iwl4965_update_sta_key_info(priv, key, sta_id);
  6585. if (!rc) {
  6586. iwl4965_set_rxon_hwcrypto(priv, 1);
  6587. iwl4965_commit_rxon(priv);
  6588. key->hw_key_idx = sta_id;
  6589. IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
  6590. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  6591. }
  6592. break;
  6593. case DISABLE_KEY:
  6594. rc = iwl4965_clear_sta_key_info(priv, sta_id);
  6595. if (!rc) {
  6596. iwl4965_set_rxon_hwcrypto(priv, 0);
  6597. iwl4965_commit_rxon(priv);
  6598. IWL_DEBUG_MAC80211("disable hwcrypto key\n");
  6599. }
  6600. break;
  6601. default:
  6602. rc = -EINVAL;
  6603. }
  6604. IWL_DEBUG_MAC80211("leave\n");
  6605. mutex_unlock(&priv->mutex);
  6606. return rc;
  6607. }
  6608. static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, int queue,
  6609. const struct ieee80211_tx_queue_params *params)
  6610. {
  6611. struct iwl4965_priv *priv = hw->priv;
  6612. #ifdef CONFIG_IWL4965_QOS
  6613. unsigned long flags;
  6614. int q;
  6615. #endif /* CONFIG_IWL4965_QOS */
  6616. IWL_DEBUG_MAC80211("enter\n");
  6617. if (!iwl4965_is_ready_rf(priv)) {
  6618. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6619. return -EIO;
  6620. }
  6621. if (queue >= AC_NUM) {
  6622. IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  6623. return 0;
  6624. }
  6625. #ifdef CONFIG_IWL4965_QOS
  6626. if (!priv->qos_data.qos_enable) {
  6627. priv->qos_data.qos_active = 0;
  6628. IWL_DEBUG_MAC80211("leave - qos not enabled\n");
  6629. return 0;
  6630. }
  6631. q = AC_NUM - 1 - queue;
  6632. spin_lock_irqsave(&priv->lock, flags);
  6633. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  6634. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  6635. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  6636. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  6637. cpu_to_le16((params->burst_time * 100));
  6638. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  6639. priv->qos_data.qos_active = 1;
  6640. spin_unlock_irqrestore(&priv->lock, flags);
  6641. mutex_lock(&priv->mutex);
  6642. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6643. iwl4965_activate_qos(priv, 1);
  6644. else if (priv->assoc_id && iwl4965_is_associated(priv))
  6645. iwl4965_activate_qos(priv, 0);
  6646. mutex_unlock(&priv->mutex);
  6647. #endif /*CONFIG_IWL4965_QOS */
  6648. IWL_DEBUG_MAC80211("leave\n");
  6649. return 0;
  6650. }
  6651. static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
  6652. struct ieee80211_tx_queue_stats *stats)
  6653. {
  6654. struct iwl4965_priv *priv = hw->priv;
  6655. int i, avail;
  6656. struct iwl4965_tx_queue *txq;
  6657. struct iwl4965_queue *q;
  6658. unsigned long flags;
  6659. IWL_DEBUG_MAC80211("enter\n");
  6660. if (!iwl4965_is_ready_rf(priv)) {
  6661. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6662. return -EIO;
  6663. }
  6664. spin_lock_irqsave(&priv->lock, flags);
  6665. for (i = 0; i < AC_NUM; i++) {
  6666. txq = &priv->txq[i];
  6667. q = &txq->q;
  6668. avail = iwl4965_queue_space(q);
  6669. stats->data[i].len = q->n_window - avail;
  6670. stats->data[i].limit = q->n_window - q->high_mark;
  6671. stats->data[i].count = q->n_window;
  6672. }
  6673. spin_unlock_irqrestore(&priv->lock, flags);
  6674. IWL_DEBUG_MAC80211("leave\n");
  6675. return 0;
  6676. }
  6677. static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
  6678. struct ieee80211_low_level_stats *stats)
  6679. {
  6680. IWL_DEBUG_MAC80211("enter\n");
  6681. IWL_DEBUG_MAC80211("leave\n");
  6682. return 0;
  6683. }
  6684. static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw)
  6685. {
  6686. IWL_DEBUG_MAC80211("enter\n");
  6687. IWL_DEBUG_MAC80211("leave\n");
  6688. return 0;
  6689. }
  6690. static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
  6691. {
  6692. struct iwl4965_priv *priv = hw->priv;
  6693. unsigned long flags;
  6694. mutex_lock(&priv->mutex);
  6695. IWL_DEBUG_MAC80211("enter\n");
  6696. priv->lq_mngr.lq_ready = 0;
  6697. #ifdef CONFIG_IWL4965_HT
  6698. spin_lock_irqsave(&priv->lock, flags);
  6699. memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
  6700. spin_unlock_irqrestore(&priv->lock, flags);
  6701. #ifdef CONFIG_IWL4965_HT_AGG
  6702. /* if (priv->lq_mngr.agg_ctrl.granted_ba)
  6703. iwl4965_turn_off_agg(priv, TID_ALL_SPECIFIED);*/
  6704. memset(&(priv->lq_mngr.agg_ctrl), 0, sizeof(struct iwl4965_agg_control));
  6705. priv->lq_mngr.agg_ctrl.tid_traffic_load_threshold = 10;
  6706. priv->lq_mngr.agg_ctrl.ba_timeout = 5000;
  6707. priv->lq_mngr.agg_ctrl.auto_agg = 1;
  6708. if (priv->lq_mngr.agg_ctrl.auto_agg)
  6709. priv->lq_mngr.agg_ctrl.requested_ba = TID_ALL_ENABLED;
  6710. #endif /*CONFIG_IWL4965_HT_AGG */
  6711. #endif /* CONFIG_IWL4965_HT */
  6712. #ifdef CONFIG_IWL4965_QOS
  6713. iwl4965_reset_qos(priv);
  6714. #endif
  6715. cancel_delayed_work(&priv->post_associate);
  6716. spin_lock_irqsave(&priv->lock, flags);
  6717. priv->assoc_id = 0;
  6718. priv->assoc_capability = 0;
  6719. priv->call_post_assoc_from_beacon = 0;
  6720. priv->assoc_station_added = 0;
  6721. /* new association get rid of ibss beacon skb */
  6722. if (priv->ibss_beacon)
  6723. dev_kfree_skb(priv->ibss_beacon);
  6724. priv->ibss_beacon = NULL;
  6725. priv->beacon_int = priv->hw->conf.beacon_int;
  6726. priv->timestamp1 = 0;
  6727. priv->timestamp0 = 0;
  6728. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
  6729. priv->beacon_int = 0;
  6730. spin_unlock_irqrestore(&priv->lock, flags);
  6731. if (!iwl4965_is_ready_rf(priv)) {
  6732. IWL_DEBUG_MAC80211("leave - not ready\n");
  6733. mutex_unlock(&priv->mutex);
  6734. return;
  6735. }
  6736. /* we are restarting association process
  6737. * clear RXON_FILTER_ASSOC_MSK bit
  6738. */
  6739. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  6740. iwl4965_scan_cancel_timeout(priv, 100);
  6741. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6742. iwl4965_commit_rxon(priv);
  6743. }
  6744. /* Per mac80211.h: This is only used in IBSS mode... */
  6745. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6746. IWL_DEBUG_MAC80211("leave - not in IBSS\n");
  6747. mutex_unlock(&priv->mutex);
  6748. return;
  6749. }
  6750. priv->only_active_channel = 0;
  6751. iwl4965_set_rate(priv);
  6752. mutex_unlock(&priv->mutex);
  6753. IWL_DEBUG_MAC80211("leave\n");
  6754. }
  6755. static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
  6756. struct ieee80211_tx_control *control)
  6757. {
  6758. struct iwl4965_priv *priv = hw->priv;
  6759. unsigned long flags;
  6760. mutex_lock(&priv->mutex);
  6761. IWL_DEBUG_MAC80211("enter\n");
  6762. if (!iwl4965_is_ready_rf(priv)) {
  6763. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6764. mutex_unlock(&priv->mutex);
  6765. return -EIO;
  6766. }
  6767. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6768. IWL_DEBUG_MAC80211("leave - not IBSS\n");
  6769. mutex_unlock(&priv->mutex);
  6770. return -EIO;
  6771. }
  6772. spin_lock_irqsave(&priv->lock, flags);
  6773. if (priv->ibss_beacon)
  6774. dev_kfree_skb(priv->ibss_beacon);
  6775. priv->ibss_beacon = skb;
  6776. priv->assoc_id = 0;
  6777. IWL_DEBUG_MAC80211("leave\n");
  6778. spin_unlock_irqrestore(&priv->lock, flags);
  6779. #ifdef CONFIG_IWL4965_QOS
  6780. iwl4965_reset_qos(priv);
  6781. #endif
  6782. queue_work(priv->workqueue, &priv->post_associate.work);
  6783. mutex_unlock(&priv->mutex);
  6784. return 0;
  6785. }
  6786. #ifdef CONFIG_IWL4965_HT
  6787. static void iwl4965_ht_info_fill(struct ieee80211_conf *conf,
  6788. struct iwl4965_priv *priv)
  6789. {
  6790. struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
  6791. struct ieee80211_ht_info *ht_conf = &conf->ht_conf;
  6792. struct ieee80211_ht_bss_info *ht_bss_conf = &conf->ht_bss_conf;
  6793. IWL_DEBUG_MAC80211("enter: \n");
  6794. if (!(conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE)) {
  6795. iwl_conf->is_ht = 0;
  6796. return;
  6797. }
  6798. iwl_conf->is_ht = 1;
  6799. priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
  6800. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
  6801. iwl_conf->sgf |= 0x1;
  6802. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
  6803. iwl_conf->sgf |= 0x2;
  6804. iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
  6805. iwl_conf->max_amsdu_size =
  6806. !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
  6807. iwl_conf->supported_chan_width =
  6808. !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH);
  6809. iwl_conf->tx_mimo_ps_mode =
  6810. (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
  6811. memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16);
  6812. iwl_conf->control_channel = ht_bss_conf->primary_channel;
  6813. iwl_conf->extension_chan_offset =
  6814. ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET;
  6815. iwl_conf->tx_chan_width =
  6816. !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH);
  6817. iwl_conf->ht_protection =
  6818. ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION;
  6819. iwl_conf->non_GF_STA_present =
  6820. !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT);
  6821. IWL_DEBUG_MAC80211("control channel %d\n",
  6822. iwl_conf->control_channel);
  6823. IWL_DEBUG_MAC80211("leave\n");
  6824. }
  6825. static int iwl4965_mac_conf_ht(struct ieee80211_hw *hw,
  6826. struct ieee80211_conf *conf)
  6827. {
  6828. struct iwl4965_priv *priv = hw->priv;
  6829. IWL_DEBUG_MAC80211("enter: \n");
  6830. iwl4965_ht_info_fill(conf, priv);
  6831. iwl4965_set_rxon_chain(priv);
  6832. if (priv && priv->assoc_id &&
  6833. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  6834. unsigned long flags;
  6835. spin_lock_irqsave(&priv->lock, flags);
  6836. if (priv->beacon_int)
  6837. queue_work(priv->workqueue, &priv->post_associate.work);
  6838. else
  6839. priv->call_post_assoc_from_beacon = 1;
  6840. spin_unlock_irqrestore(&priv->lock, flags);
  6841. }
  6842. IWL_DEBUG_MAC80211("leave:\n");
  6843. return 0;
  6844. }
  6845. static void iwl4965_set_ht_capab(struct ieee80211_hw *hw,
  6846. struct ieee80211_ht_cap *ht_cap,
  6847. u8 use_current_config)
  6848. {
  6849. struct ieee80211_conf *conf = &hw->conf;
  6850. struct ieee80211_hw_mode *mode = conf->mode;
  6851. if (use_current_config) {
  6852. ht_cap->cap_info = cpu_to_le16(conf->ht_conf.cap);
  6853. memcpy(ht_cap->supp_mcs_set,
  6854. conf->ht_conf.supp_mcs_set, 16);
  6855. } else {
  6856. ht_cap->cap_info = cpu_to_le16(mode->ht_info.cap);
  6857. memcpy(ht_cap->supp_mcs_set,
  6858. mode->ht_info.supp_mcs_set, 16);
  6859. }
  6860. ht_cap->ampdu_params_info =
  6861. (mode->ht_info.ampdu_factor & IEEE80211_HT_CAP_AMPDU_FACTOR) |
  6862. ((mode->ht_info.ampdu_density << 2) &
  6863. IEEE80211_HT_CAP_AMPDU_DENSITY);
  6864. }
  6865. #endif /*CONFIG_IWL4965_HT*/
  6866. /*****************************************************************************
  6867. *
  6868. * sysfs attributes
  6869. *
  6870. *****************************************************************************/
  6871. #ifdef CONFIG_IWL4965_DEBUG
  6872. /*
  6873. * The following adds a new attribute to the sysfs representation
  6874. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  6875. * used for controlling the debug level.
  6876. *
  6877. * See the level definitions in iwl for details.
  6878. */
  6879. static ssize_t show_debug_level(struct device_driver *d, char *buf)
  6880. {
  6881. return sprintf(buf, "0x%08X\n", iwl4965_debug_level);
  6882. }
  6883. static ssize_t store_debug_level(struct device_driver *d,
  6884. const char *buf, size_t count)
  6885. {
  6886. char *p = (char *)buf;
  6887. u32 val;
  6888. val = simple_strtoul(p, &p, 0);
  6889. if (p == buf)
  6890. printk(KERN_INFO DRV_NAME
  6891. ": %s is not in hex or decimal form.\n", buf);
  6892. else
  6893. iwl4965_debug_level = val;
  6894. return strnlen(buf, count);
  6895. }
  6896. static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
  6897. show_debug_level, store_debug_level);
  6898. #endif /* CONFIG_IWL4965_DEBUG */
  6899. static ssize_t show_rf_kill(struct device *d,
  6900. struct device_attribute *attr, char *buf)
  6901. {
  6902. /*
  6903. * 0 - RF kill not enabled
  6904. * 1 - SW based RF kill active (sysfs)
  6905. * 2 - HW based RF kill active
  6906. * 3 - Both HW and SW based RF kill active
  6907. */
  6908. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6909. int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
  6910. (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
  6911. return sprintf(buf, "%i\n", val);
  6912. }
  6913. static ssize_t store_rf_kill(struct device *d,
  6914. struct device_attribute *attr,
  6915. const char *buf, size_t count)
  6916. {
  6917. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6918. mutex_lock(&priv->mutex);
  6919. iwl4965_radio_kill_sw(priv, buf[0] == '1');
  6920. mutex_unlock(&priv->mutex);
  6921. return count;
  6922. }
  6923. static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
  6924. static ssize_t show_temperature(struct device *d,
  6925. struct device_attribute *attr, char *buf)
  6926. {
  6927. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6928. if (!iwl4965_is_alive(priv))
  6929. return -EAGAIN;
  6930. return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv));
  6931. }
  6932. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  6933. static ssize_t show_rs_window(struct device *d,
  6934. struct device_attribute *attr,
  6935. char *buf)
  6936. {
  6937. struct iwl4965_priv *priv = d->driver_data;
  6938. return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID);
  6939. }
  6940. static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
  6941. static ssize_t show_tx_power(struct device *d,
  6942. struct device_attribute *attr, char *buf)
  6943. {
  6944. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6945. return sprintf(buf, "%d\n", priv->user_txpower_limit);
  6946. }
  6947. static ssize_t store_tx_power(struct device *d,
  6948. struct device_attribute *attr,
  6949. const char *buf, size_t count)
  6950. {
  6951. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6952. char *p = (char *)buf;
  6953. u32 val;
  6954. val = simple_strtoul(p, &p, 10);
  6955. if (p == buf)
  6956. printk(KERN_INFO DRV_NAME
  6957. ": %s is not in decimal form.\n", buf);
  6958. else
  6959. iwl4965_hw_reg_set_txpower(priv, val);
  6960. return count;
  6961. }
  6962. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  6963. static ssize_t show_flags(struct device *d,
  6964. struct device_attribute *attr, char *buf)
  6965. {
  6966. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6967. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  6968. }
  6969. static ssize_t store_flags(struct device *d,
  6970. struct device_attribute *attr,
  6971. const char *buf, size_t count)
  6972. {
  6973. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6974. u32 flags = simple_strtoul(buf, NULL, 0);
  6975. mutex_lock(&priv->mutex);
  6976. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  6977. /* Cancel any currently running scans... */
  6978. if (iwl4965_scan_cancel_timeout(priv, 100))
  6979. IWL_WARNING("Could not cancel scan.\n");
  6980. else {
  6981. IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
  6982. flags);
  6983. priv->staging_rxon.flags = cpu_to_le32(flags);
  6984. iwl4965_commit_rxon(priv);
  6985. }
  6986. }
  6987. mutex_unlock(&priv->mutex);
  6988. return count;
  6989. }
  6990. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  6991. static ssize_t show_filter_flags(struct device *d,
  6992. struct device_attribute *attr, char *buf)
  6993. {
  6994. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6995. return sprintf(buf, "0x%04X\n",
  6996. le32_to_cpu(priv->active_rxon.filter_flags));
  6997. }
  6998. static ssize_t store_filter_flags(struct device *d,
  6999. struct device_attribute *attr,
  7000. const char *buf, size_t count)
  7001. {
  7002. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7003. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  7004. mutex_lock(&priv->mutex);
  7005. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  7006. /* Cancel any currently running scans... */
  7007. if (iwl4965_scan_cancel_timeout(priv, 100))
  7008. IWL_WARNING("Could not cancel scan.\n");
  7009. else {
  7010. IWL_DEBUG_INFO("Committing rxon.filter_flags = "
  7011. "0x%04X\n", filter_flags);
  7012. priv->staging_rxon.filter_flags =
  7013. cpu_to_le32(filter_flags);
  7014. iwl4965_commit_rxon(priv);
  7015. }
  7016. }
  7017. mutex_unlock(&priv->mutex);
  7018. return count;
  7019. }
  7020. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  7021. store_filter_flags);
  7022. static ssize_t show_tune(struct device *d,
  7023. struct device_attribute *attr, char *buf)
  7024. {
  7025. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7026. return sprintf(buf, "0x%04X\n",
  7027. (priv->phymode << 8) |
  7028. le16_to_cpu(priv->active_rxon.channel));
  7029. }
  7030. static void iwl4965_set_flags_for_phymode(struct iwl4965_priv *priv, u8 phymode);
  7031. static ssize_t store_tune(struct device *d,
  7032. struct device_attribute *attr,
  7033. const char *buf, size_t count)
  7034. {
  7035. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7036. char *p = (char *)buf;
  7037. u16 tune = simple_strtoul(p, &p, 0);
  7038. u8 phymode = (tune >> 8) & 0xff;
  7039. u16 channel = tune & 0xff;
  7040. IWL_DEBUG_INFO("Tune request to:%d channel:%d\n", phymode, channel);
  7041. mutex_lock(&priv->mutex);
  7042. if ((le16_to_cpu(priv->staging_rxon.channel) != channel) ||
  7043. (priv->phymode != phymode)) {
  7044. const struct iwl4965_channel_info *ch_info;
  7045. ch_info = iwl4965_get_channel_info(priv, phymode, channel);
  7046. if (!ch_info) {
  7047. IWL_WARNING("Requested invalid phymode/channel "
  7048. "combination: %d %d\n", phymode, channel);
  7049. mutex_unlock(&priv->mutex);
  7050. return -EINVAL;
  7051. }
  7052. /* Cancel any currently running scans... */
  7053. if (iwl4965_scan_cancel_timeout(priv, 100))
  7054. IWL_WARNING("Could not cancel scan.\n");
  7055. else {
  7056. IWL_DEBUG_INFO("Committing phymode and "
  7057. "rxon.channel = %d %d\n",
  7058. phymode, channel);
  7059. iwl4965_set_rxon_channel(priv, phymode, channel);
  7060. iwl4965_set_flags_for_phymode(priv, phymode);
  7061. iwl4965_set_rate(priv);
  7062. iwl4965_commit_rxon(priv);
  7063. }
  7064. }
  7065. mutex_unlock(&priv->mutex);
  7066. return count;
  7067. }
  7068. static DEVICE_ATTR(tune, S_IWUSR | S_IRUGO, show_tune, store_tune);
  7069. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  7070. static ssize_t show_measurement(struct device *d,
  7071. struct device_attribute *attr, char *buf)
  7072. {
  7073. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7074. struct iwl4965_spectrum_notification measure_report;
  7075. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  7076. u8 *data = (u8 *) & measure_report;
  7077. unsigned long flags;
  7078. spin_lock_irqsave(&priv->lock, flags);
  7079. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  7080. spin_unlock_irqrestore(&priv->lock, flags);
  7081. return 0;
  7082. }
  7083. memcpy(&measure_report, &priv->measure_report, size);
  7084. priv->measurement_status = 0;
  7085. spin_unlock_irqrestore(&priv->lock, flags);
  7086. while (size && (PAGE_SIZE - len)) {
  7087. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  7088. PAGE_SIZE - len, 1);
  7089. len = strlen(buf);
  7090. if (PAGE_SIZE - len)
  7091. buf[len++] = '\n';
  7092. ofs += 16;
  7093. size -= min(size, 16U);
  7094. }
  7095. return len;
  7096. }
  7097. static ssize_t store_measurement(struct device *d,
  7098. struct device_attribute *attr,
  7099. const char *buf, size_t count)
  7100. {
  7101. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7102. struct ieee80211_measurement_params params = {
  7103. .channel = le16_to_cpu(priv->active_rxon.channel),
  7104. .start_time = cpu_to_le64(priv->last_tsf),
  7105. .duration = cpu_to_le16(1),
  7106. };
  7107. u8 type = IWL_MEASURE_BASIC;
  7108. u8 buffer[32];
  7109. u8 channel;
  7110. if (count) {
  7111. char *p = buffer;
  7112. strncpy(buffer, buf, min(sizeof(buffer), count));
  7113. channel = simple_strtoul(p, NULL, 0);
  7114. if (channel)
  7115. params.channel = channel;
  7116. p = buffer;
  7117. while (*p && *p != ' ')
  7118. p++;
  7119. if (*p)
  7120. type = simple_strtoul(p + 1, NULL, 0);
  7121. }
  7122. IWL_DEBUG_INFO("Invoking measurement of type %d on "
  7123. "channel %d (for '%s')\n", type, params.channel, buf);
  7124. iwl4965_get_measurement(priv, &params, type);
  7125. return count;
  7126. }
  7127. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  7128. show_measurement, store_measurement);
  7129. #endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */
  7130. static ssize_t store_retry_rate(struct device *d,
  7131. struct device_attribute *attr,
  7132. const char *buf, size_t count)
  7133. {
  7134. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7135. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  7136. if (priv->retry_rate <= 0)
  7137. priv->retry_rate = 1;
  7138. return count;
  7139. }
  7140. static ssize_t show_retry_rate(struct device *d,
  7141. struct device_attribute *attr, char *buf)
  7142. {
  7143. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7144. return sprintf(buf, "%d", priv->retry_rate);
  7145. }
  7146. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  7147. store_retry_rate);
  7148. static ssize_t store_power_level(struct device *d,
  7149. struct device_attribute *attr,
  7150. const char *buf, size_t count)
  7151. {
  7152. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7153. int rc;
  7154. int mode;
  7155. mode = simple_strtoul(buf, NULL, 0);
  7156. mutex_lock(&priv->mutex);
  7157. if (!iwl4965_is_ready(priv)) {
  7158. rc = -EAGAIN;
  7159. goto out;
  7160. }
  7161. if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
  7162. mode = IWL_POWER_AC;
  7163. else
  7164. mode |= IWL_POWER_ENABLED;
  7165. if (mode != priv->power_mode) {
  7166. rc = iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(mode));
  7167. if (rc) {
  7168. IWL_DEBUG_MAC80211("failed setting power mode.\n");
  7169. goto out;
  7170. }
  7171. priv->power_mode = mode;
  7172. }
  7173. rc = count;
  7174. out:
  7175. mutex_unlock(&priv->mutex);
  7176. return rc;
  7177. }
  7178. #define MAX_WX_STRING 80
  7179. /* Values are in microsecond */
  7180. static const s32 timeout_duration[] = {
  7181. 350000,
  7182. 250000,
  7183. 75000,
  7184. 37000,
  7185. 25000,
  7186. };
  7187. static const s32 period_duration[] = {
  7188. 400000,
  7189. 700000,
  7190. 1000000,
  7191. 1000000,
  7192. 1000000
  7193. };
  7194. static ssize_t show_power_level(struct device *d,
  7195. struct device_attribute *attr, char *buf)
  7196. {
  7197. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7198. int level = IWL_POWER_LEVEL(priv->power_mode);
  7199. char *p = buf;
  7200. p += sprintf(p, "%d ", level);
  7201. switch (level) {
  7202. case IWL_POWER_MODE_CAM:
  7203. case IWL_POWER_AC:
  7204. p += sprintf(p, "(AC)");
  7205. break;
  7206. case IWL_POWER_BATTERY:
  7207. p += sprintf(p, "(BATTERY)");
  7208. break;
  7209. default:
  7210. p += sprintf(p,
  7211. "(Timeout %dms, Period %dms)",
  7212. timeout_duration[level - 1] / 1000,
  7213. period_duration[level - 1] / 1000);
  7214. }
  7215. if (!(priv->power_mode & IWL_POWER_ENABLED))
  7216. p += sprintf(p, " OFF\n");
  7217. else
  7218. p += sprintf(p, " \n");
  7219. return (p - buf + 1);
  7220. }
  7221. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
  7222. store_power_level);
  7223. static ssize_t show_channels(struct device *d,
  7224. struct device_attribute *attr, char *buf)
  7225. {
  7226. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7227. int len = 0, i;
  7228. struct ieee80211_channel *channels = NULL;
  7229. const struct ieee80211_hw_mode *hw_mode = NULL;
  7230. int count = 0;
  7231. if (!iwl4965_is_ready(priv))
  7232. return -EAGAIN;
  7233. hw_mode = iwl4965_get_hw_mode(priv, MODE_IEEE80211G);
  7234. if (!hw_mode)
  7235. hw_mode = iwl4965_get_hw_mode(priv, MODE_IEEE80211B);
  7236. if (hw_mode) {
  7237. channels = hw_mode->channels;
  7238. count = hw_mode->num_channels;
  7239. }
  7240. len +=
  7241. sprintf(&buf[len],
  7242. "Displaying %d channels in 2.4GHz band "
  7243. "(802.11bg):\n", count);
  7244. for (i = 0; i < count; i++)
  7245. len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
  7246. channels[i].chan,
  7247. channels[i].power_level,
  7248. channels[i].
  7249. flag & IEEE80211_CHAN_W_RADAR_DETECT ?
  7250. " (IEEE 802.11h required)" : "",
  7251. (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
  7252. || (channels[i].
  7253. flag &
  7254. IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
  7255. ", IBSS",
  7256. channels[i].
  7257. flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
  7258. "active/passive" : "passive only");
  7259. hw_mode = iwl4965_get_hw_mode(priv, MODE_IEEE80211A);
  7260. if (hw_mode) {
  7261. channels = hw_mode->channels;
  7262. count = hw_mode->num_channels;
  7263. } else {
  7264. channels = NULL;
  7265. count = 0;
  7266. }
  7267. len += sprintf(&buf[len], "Displaying %d channels in 5.2GHz band "
  7268. "(802.11a):\n", count);
  7269. for (i = 0; i < count; i++)
  7270. len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
  7271. channels[i].chan,
  7272. channels[i].power_level,
  7273. channels[i].
  7274. flag & IEEE80211_CHAN_W_RADAR_DETECT ?
  7275. " (IEEE 802.11h required)" : "",
  7276. (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
  7277. || (channels[i].
  7278. flag &
  7279. IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
  7280. ", IBSS",
  7281. channels[i].
  7282. flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
  7283. "active/passive" : "passive only");
  7284. return len;
  7285. }
  7286. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  7287. static ssize_t show_statistics(struct device *d,
  7288. struct device_attribute *attr, char *buf)
  7289. {
  7290. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7291. u32 size = sizeof(struct iwl4965_notif_statistics);
  7292. u32 len = 0, ofs = 0;
  7293. u8 *data = (u8 *) & priv->statistics;
  7294. int rc = 0;
  7295. if (!iwl4965_is_alive(priv))
  7296. return -EAGAIN;
  7297. mutex_lock(&priv->mutex);
  7298. rc = iwl4965_send_statistics_request(priv);
  7299. mutex_unlock(&priv->mutex);
  7300. if (rc) {
  7301. len = sprintf(buf,
  7302. "Error sending statistics request: 0x%08X\n", rc);
  7303. return len;
  7304. }
  7305. while (size && (PAGE_SIZE - len)) {
  7306. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  7307. PAGE_SIZE - len, 1);
  7308. len = strlen(buf);
  7309. if (PAGE_SIZE - len)
  7310. buf[len++] = '\n';
  7311. ofs += 16;
  7312. size -= min(size, 16U);
  7313. }
  7314. return len;
  7315. }
  7316. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  7317. static ssize_t show_antenna(struct device *d,
  7318. struct device_attribute *attr, char *buf)
  7319. {
  7320. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7321. if (!iwl4965_is_alive(priv))
  7322. return -EAGAIN;
  7323. return sprintf(buf, "%d\n", priv->antenna);
  7324. }
  7325. static ssize_t store_antenna(struct device *d,
  7326. struct device_attribute *attr,
  7327. const char *buf, size_t count)
  7328. {
  7329. int ant;
  7330. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7331. if (count == 0)
  7332. return 0;
  7333. if (sscanf(buf, "%1i", &ant) != 1) {
  7334. IWL_DEBUG_INFO("not in hex or decimal form.\n");
  7335. return count;
  7336. }
  7337. if ((ant >= 0) && (ant <= 2)) {
  7338. IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
  7339. priv->antenna = (enum iwl4965_antenna)ant;
  7340. } else
  7341. IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
  7342. return count;
  7343. }
  7344. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  7345. static ssize_t show_status(struct device *d,
  7346. struct device_attribute *attr, char *buf)
  7347. {
  7348. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7349. if (!iwl4965_is_alive(priv))
  7350. return -EAGAIN;
  7351. return sprintf(buf, "0x%08x\n", (int)priv->status);
  7352. }
  7353. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  7354. static ssize_t dump_error_log(struct device *d,
  7355. struct device_attribute *attr,
  7356. const char *buf, size_t count)
  7357. {
  7358. char *p = (char *)buf;
  7359. if (p[0] == '1')
  7360. iwl4965_dump_nic_error_log((struct iwl4965_priv *)d->driver_data);
  7361. return strnlen(buf, count);
  7362. }
  7363. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  7364. static ssize_t dump_event_log(struct device *d,
  7365. struct device_attribute *attr,
  7366. const char *buf, size_t count)
  7367. {
  7368. char *p = (char *)buf;
  7369. if (p[0] == '1')
  7370. iwl4965_dump_nic_event_log((struct iwl4965_priv *)d->driver_data);
  7371. return strnlen(buf, count);
  7372. }
  7373. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  7374. /*****************************************************************************
  7375. *
  7376. * driver setup and teardown
  7377. *
  7378. *****************************************************************************/
  7379. static void iwl4965_setup_deferred_work(struct iwl4965_priv *priv)
  7380. {
  7381. priv->workqueue = create_workqueue(DRV_NAME);
  7382. init_waitqueue_head(&priv->wait_command_queue);
  7383. INIT_WORK(&priv->up, iwl4965_bg_up);
  7384. INIT_WORK(&priv->restart, iwl4965_bg_restart);
  7385. INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
  7386. INIT_WORK(&priv->scan_completed, iwl4965_bg_scan_completed);
  7387. INIT_WORK(&priv->request_scan, iwl4965_bg_request_scan);
  7388. INIT_WORK(&priv->abort_scan, iwl4965_bg_abort_scan);
  7389. INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
  7390. INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
  7391. INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate);
  7392. INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start);
  7393. INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start);
  7394. INIT_DELAYED_WORK(&priv->scan_check, iwl4965_bg_scan_check);
  7395. iwl4965_hw_setup_deferred_work(priv);
  7396. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  7397. iwl4965_irq_tasklet, (unsigned long)priv);
  7398. }
  7399. static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv)
  7400. {
  7401. iwl4965_hw_cancel_deferred_work(priv);
  7402. cancel_delayed_work_sync(&priv->init_alive_start);
  7403. cancel_delayed_work(&priv->scan_check);
  7404. cancel_delayed_work(&priv->alive_start);
  7405. cancel_delayed_work(&priv->post_associate);
  7406. cancel_work_sync(&priv->beacon_update);
  7407. }
  7408. static struct attribute *iwl4965_sysfs_entries[] = {
  7409. &dev_attr_antenna.attr,
  7410. &dev_attr_channels.attr,
  7411. &dev_attr_dump_errors.attr,
  7412. &dev_attr_dump_events.attr,
  7413. &dev_attr_flags.attr,
  7414. &dev_attr_filter_flags.attr,
  7415. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  7416. &dev_attr_measurement.attr,
  7417. #endif
  7418. &dev_attr_power_level.attr,
  7419. &dev_attr_retry_rate.attr,
  7420. &dev_attr_rf_kill.attr,
  7421. &dev_attr_rs_window.attr,
  7422. &dev_attr_statistics.attr,
  7423. &dev_attr_status.attr,
  7424. &dev_attr_temperature.attr,
  7425. &dev_attr_tune.attr,
  7426. &dev_attr_tx_power.attr,
  7427. NULL
  7428. };
  7429. static struct attribute_group iwl4965_attribute_group = {
  7430. .name = NULL, /* put in device directory */
  7431. .attrs = iwl4965_sysfs_entries,
  7432. };
  7433. static struct ieee80211_ops iwl4965_hw_ops = {
  7434. .tx = iwl4965_mac_tx,
  7435. .start = iwl4965_mac_start,
  7436. .stop = iwl4965_mac_stop,
  7437. .add_interface = iwl4965_mac_add_interface,
  7438. .remove_interface = iwl4965_mac_remove_interface,
  7439. .config = iwl4965_mac_config,
  7440. .config_interface = iwl4965_mac_config_interface,
  7441. .configure_filter = iwl4965_configure_filter,
  7442. .set_key = iwl4965_mac_set_key,
  7443. .get_stats = iwl4965_mac_get_stats,
  7444. .get_tx_stats = iwl4965_mac_get_tx_stats,
  7445. .conf_tx = iwl4965_mac_conf_tx,
  7446. .get_tsf = iwl4965_mac_get_tsf,
  7447. .reset_tsf = iwl4965_mac_reset_tsf,
  7448. .beacon_update = iwl4965_mac_beacon_update,
  7449. .bss_info_changed = iwl4965_bss_info_changed,
  7450. #ifdef CONFIG_IWL4965_HT
  7451. .conf_ht = iwl4965_mac_conf_ht,
  7452. .ampdu_action = iwl4965_mac_ampdu_action,
  7453. #ifdef CONFIG_IWL4965_HT_AGG
  7454. .ht_tx_agg_start = iwl4965_mac_ht_tx_agg_start,
  7455. .ht_tx_agg_stop = iwl4965_mac_ht_tx_agg_stop,
  7456. #endif /* CONFIG_IWL4965_HT_AGG */
  7457. #endif /* CONFIG_IWL4965_HT */
  7458. .hw_scan = iwl4965_mac_hw_scan
  7459. };
  7460. static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  7461. {
  7462. int err = 0;
  7463. struct iwl4965_priv *priv;
  7464. struct ieee80211_hw *hw;
  7465. int i;
  7466. /* Disabling hardware scan means that mac80211 will perform scans
  7467. * "the hard way", rather than using device's scan. */
  7468. if (iwl4965_param_disable_hw_scan) {
  7469. IWL_DEBUG_INFO("Disabling hw_scan\n");
  7470. iwl4965_hw_ops.hw_scan = NULL;
  7471. }
  7472. if ((iwl4965_param_queues_num > IWL_MAX_NUM_QUEUES) ||
  7473. (iwl4965_param_queues_num < IWL_MIN_NUM_QUEUES)) {
  7474. IWL_ERROR("invalid queues_num, should be between %d and %d\n",
  7475. IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
  7476. err = -EINVAL;
  7477. goto out;
  7478. }
  7479. /* mac80211 allocates memory for this device instance, including
  7480. * space for this driver's private structure */
  7481. hw = ieee80211_alloc_hw(sizeof(struct iwl4965_priv), &iwl4965_hw_ops);
  7482. if (hw == NULL) {
  7483. IWL_ERROR("Can not allocate network device\n");
  7484. err = -ENOMEM;
  7485. goto out;
  7486. }
  7487. SET_IEEE80211_DEV(hw, &pdev->dev);
  7488. hw->rate_control_algorithm = "iwl-4965-rs";
  7489. IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
  7490. priv = hw->priv;
  7491. priv->hw = hw;
  7492. priv->pci_dev = pdev;
  7493. priv->antenna = (enum iwl4965_antenna)iwl4965_param_antenna;
  7494. #ifdef CONFIG_IWL4965_DEBUG
  7495. iwl4965_debug_level = iwl4965_param_debug;
  7496. atomic_set(&priv->restrict_refcnt, 0);
  7497. #endif
  7498. priv->retry_rate = 1;
  7499. priv->ibss_beacon = NULL;
  7500. /* Tell mac80211 and its clients (e.g. Wireless Extensions)
  7501. * the range of signal quality values that we'll provide.
  7502. * Negative values for level/noise indicate that we'll provide dBm.
  7503. * For WE, at least, non-0 values here *enable* display of values
  7504. * in app (iwconfig). */
  7505. hw->max_rssi = -20; /* signal level, negative indicates dBm */
  7506. hw->max_noise = -20; /* noise level, negative indicates dBm */
  7507. hw->max_signal = 100; /* link quality indication (%) */
  7508. /* Tell mac80211 our Tx characteristics */
  7509. hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
  7510. /* Default value; 4 EDCA QOS priorities */
  7511. hw->queues = 4;
  7512. #ifdef CONFIG_IWL4965_HT
  7513. #ifdef CONFIG_IWL4965_HT_AGG
  7514. /* Enhanced value; more queues, to support 11n aggregation */
  7515. hw->queues = 16;
  7516. #endif /* CONFIG_IWL4965_HT_AGG */
  7517. #endif /* CONFIG_IWL4965_HT */
  7518. spin_lock_init(&priv->lock);
  7519. spin_lock_init(&priv->power_data.lock);
  7520. spin_lock_init(&priv->sta_lock);
  7521. spin_lock_init(&priv->hcmd_lock);
  7522. spin_lock_init(&priv->lq_mngr.lock);
  7523. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
  7524. INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
  7525. INIT_LIST_HEAD(&priv->free_frames);
  7526. mutex_init(&priv->mutex);
  7527. if (pci_enable_device(pdev)) {
  7528. err = -ENODEV;
  7529. goto out_ieee80211_free_hw;
  7530. }
  7531. pci_set_master(pdev);
  7532. /* Clear the driver's (not device's) station table */
  7533. iwl4965_clear_stations_table(priv);
  7534. priv->data_retry_limit = -1;
  7535. priv->ieee_channels = NULL;
  7536. priv->ieee_rates = NULL;
  7537. priv->phymode = -1;
  7538. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  7539. if (!err)
  7540. err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
  7541. if (err) {
  7542. printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
  7543. goto out_pci_disable_device;
  7544. }
  7545. pci_set_drvdata(pdev, priv);
  7546. err = pci_request_regions(pdev, DRV_NAME);
  7547. if (err)
  7548. goto out_pci_disable_device;
  7549. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  7550. * PCI Tx retries from interfering with C3 CPU state */
  7551. pci_write_config_byte(pdev, 0x41, 0x00);
  7552. priv->hw_base = pci_iomap(pdev, 0, 0);
  7553. if (!priv->hw_base) {
  7554. err = -ENODEV;
  7555. goto out_pci_release_regions;
  7556. }
  7557. IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
  7558. (unsigned long long) pci_resource_len(pdev, 0));
  7559. IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
  7560. /* Initialize module parameter values here */
  7561. /* Disable radio (SW RF KILL) via parameter when loading driver */
  7562. if (iwl4965_param_disable) {
  7563. set_bit(STATUS_RF_KILL_SW, &priv->status);
  7564. IWL_DEBUG_INFO("Radio disabled.\n");
  7565. }
  7566. priv->iw_mode = IEEE80211_IF_TYPE_STA;
  7567. priv->ps_mode = 0;
  7568. priv->use_ant_b_for_management_frame = 1; /* start with ant B */
  7569. priv->valid_antenna = 0x7; /* assume all 3 connected */
  7570. priv->ps_mode = IWL_MIMO_PS_NONE;
  7571. /* Choose which receivers/antennas to use */
  7572. iwl4965_set_rxon_chain(priv);
  7573. printk(KERN_INFO DRV_NAME
  7574. ": Detected Intel Wireless WiFi Link 4965AGN\n");
  7575. /* Device-specific setup */
  7576. if (iwl4965_hw_set_hw_setting(priv)) {
  7577. IWL_ERROR("failed to set hw settings\n");
  7578. mutex_unlock(&priv->mutex);
  7579. goto out_iounmap;
  7580. }
  7581. #ifdef CONFIG_IWL4965_QOS
  7582. if (iwl4965_param_qos_enable)
  7583. priv->qos_data.qos_enable = 1;
  7584. iwl4965_reset_qos(priv);
  7585. priv->qos_data.qos_active = 0;
  7586. priv->qos_data.qos_cap.val = 0;
  7587. #endif /* CONFIG_IWL4965_QOS */
  7588. iwl4965_set_rxon_channel(priv, MODE_IEEE80211G, 6);
  7589. iwl4965_setup_deferred_work(priv);
  7590. iwl4965_setup_rx_handlers(priv);
  7591. priv->rates_mask = IWL_RATES_MASK;
  7592. /* If power management is turned on, default to AC mode */
  7593. priv->power_mode = IWL_POWER_AC;
  7594. priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
  7595. iwl4965_disable_interrupts(priv);
  7596. pci_enable_msi(pdev);
  7597. err = request_irq(pdev->irq, iwl4965_isr, IRQF_SHARED, DRV_NAME, priv);
  7598. if (err) {
  7599. IWL_ERROR("Error allocating IRQ %d\n", pdev->irq);
  7600. goto out_disable_msi;
  7601. }
  7602. mutex_lock(&priv->mutex);
  7603. err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7604. if (err) {
  7605. IWL_ERROR("failed to create sysfs device attributes\n");
  7606. mutex_unlock(&priv->mutex);
  7607. goto out_release_irq;
  7608. }
  7609. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  7610. * ucode filename and max sizes are card-specific. */
  7611. err = iwl4965_read_ucode(priv);
  7612. if (err) {
  7613. IWL_ERROR("Could not read microcode: %d\n", err);
  7614. mutex_unlock(&priv->mutex);
  7615. goto out_pci_alloc;
  7616. }
  7617. mutex_unlock(&priv->mutex);
  7618. IWL_DEBUG_INFO("Queueing UP work.\n");
  7619. queue_work(priv->workqueue, &priv->up);
  7620. return 0;
  7621. out_pci_alloc:
  7622. iwl4965_dealloc_ucode_pci(priv);
  7623. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7624. out_release_irq:
  7625. free_irq(pdev->irq, priv);
  7626. out_disable_msi:
  7627. pci_disable_msi(pdev);
  7628. destroy_workqueue(priv->workqueue);
  7629. priv->workqueue = NULL;
  7630. iwl4965_unset_hw_setting(priv);
  7631. out_iounmap:
  7632. pci_iounmap(pdev, priv->hw_base);
  7633. out_pci_release_regions:
  7634. pci_release_regions(pdev);
  7635. out_pci_disable_device:
  7636. pci_disable_device(pdev);
  7637. pci_set_drvdata(pdev, NULL);
  7638. out_ieee80211_free_hw:
  7639. ieee80211_free_hw(priv->hw);
  7640. out:
  7641. return err;
  7642. }
  7643. static void iwl4965_pci_remove(struct pci_dev *pdev)
  7644. {
  7645. struct iwl4965_priv *priv = pci_get_drvdata(pdev);
  7646. struct list_head *p, *q;
  7647. int i;
  7648. if (!priv)
  7649. return;
  7650. IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
  7651. set_bit(STATUS_EXIT_PENDING, &priv->status);
  7652. iwl4965_down(priv);
  7653. /* Free MAC hash list for ADHOC */
  7654. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
  7655. list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
  7656. list_del(p);
  7657. kfree(list_entry(p, struct iwl4965_ibss_seq, list));
  7658. }
  7659. }
  7660. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7661. iwl4965_dealloc_ucode_pci(priv);
  7662. if (priv->rxq.bd)
  7663. iwl4965_rx_queue_free(priv, &priv->rxq);
  7664. iwl4965_hw_txq_ctx_free(priv);
  7665. iwl4965_unset_hw_setting(priv);
  7666. iwl4965_clear_stations_table(priv);
  7667. if (priv->mac80211_registered) {
  7668. ieee80211_unregister_hw(priv->hw);
  7669. iwl4965_rate_control_unregister(priv->hw);
  7670. }
  7671. /*netif_stop_queue(dev); */
  7672. flush_workqueue(priv->workqueue);
  7673. /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
  7674. * priv->workqueue... so we can't take down the workqueue
  7675. * until now... */
  7676. destroy_workqueue(priv->workqueue);
  7677. priv->workqueue = NULL;
  7678. free_irq(pdev->irq, priv);
  7679. pci_disable_msi(pdev);
  7680. pci_iounmap(pdev, priv->hw_base);
  7681. pci_release_regions(pdev);
  7682. pci_disable_device(pdev);
  7683. pci_set_drvdata(pdev, NULL);
  7684. kfree(priv->channel_info);
  7685. kfree(priv->ieee_channels);
  7686. kfree(priv->ieee_rates);
  7687. if (priv->ibss_beacon)
  7688. dev_kfree_skb(priv->ibss_beacon);
  7689. ieee80211_free_hw(priv->hw);
  7690. }
  7691. #ifdef CONFIG_PM
  7692. static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  7693. {
  7694. struct iwl4965_priv *priv = pci_get_drvdata(pdev);
  7695. set_bit(STATUS_IN_SUSPEND, &priv->status);
  7696. /* Take down the device; powers it off, etc. */
  7697. iwl4965_down(priv);
  7698. if (priv->mac80211_registered)
  7699. ieee80211_stop_queues(priv->hw);
  7700. pci_save_state(pdev);
  7701. pci_disable_device(pdev);
  7702. pci_set_power_state(pdev, PCI_D3hot);
  7703. return 0;
  7704. }
  7705. static void iwl4965_resume(struct iwl4965_priv *priv)
  7706. {
  7707. unsigned long flags;
  7708. /* The following it a temporary work around due to the
  7709. * suspend / resume not fully initializing the NIC correctly.
  7710. * Without all of the following, resume will not attempt to take
  7711. * down the NIC (it shouldn't really need to) and will just try
  7712. * and bring the NIC back up. However that fails during the
  7713. * ucode verification process. This then causes iwl4965_down to be
  7714. * called *after* iwl4965_hw_nic_init() has succeeded -- which
  7715. * then lets the next init sequence succeed. So, we've
  7716. * replicated all of that NIC init code here... */
  7717. iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
  7718. iwl4965_hw_nic_init(priv);
  7719. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  7720. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  7721. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  7722. iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
  7723. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  7724. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  7725. /* tell the device to stop sending interrupts */
  7726. iwl4965_disable_interrupts(priv);
  7727. spin_lock_irqsave(&priv->lock, flags);
  7728. iwl4965_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  7729. if (!iwl4965_grab_nic_access(priv)) {
  7730. iwl4965_write_prph(priv, APMG_CLK_DIS_REG,
  7731. APMG_CLK_VAL_DMA_CLK_RQT);
  7732. iwl4965_release_nic_access(priv);
  7733. }
  7734. spin_unlock_irqrestore(&priv->lock, flags);
  7735. udelay(5);
  7736. iwl4965_hw_nic_reset(priv);
  7737. /* Bring the device back up */
  7738. clear_bit(STATUS_IN_SUSPEND, &priv->status);
  7739. queue_work(priv->workqueue, &priv->up);
  7740. }
  7741. static int iwl4965_pci_resume(struct pci_dev *pdev)
  7742. {
  7743. struct iwl4965_priv *priv = pci_get_drvdata(pdev);
  7744. int err;
  7745. printk(KERN_INFO "Coming out of suspend...\n");
  7746. pci_set_power_state(pdev, PCI_D0);
  7747. err = pci_enable_device(pdev);
  7748. pci_restore_state(pdev);
  7749. /*
  7750. * Suspend/Resume resets the PCI configuration space, so we have to
  7751. * re-disable the RETRY_TIMEOUT register (0x41) to keep PCI Tx retries
  7752. * from interfering with C3 CPU state. pci_restore_state won't help
  7753. * here since it only restores the first 64 bytes pci config header.
  7754. */
  7755. pci_write_config_byte(pdev, 0x41, 0x00);
  7756. iwl4965_resume(priv);
  7757. return 0;
  7758. }
  7759. #endif /* CONFIG_PM */
  7760. /*****************************************************************************
  7761. *
  7762. * driver and module entry point
  7763. *
  7764. *****************************************************************************/
  7765. static struct pci_driver iwl4965_driver = {
  7766. .name = DRV_NAME,
  7767. .id_table = iwl4965_hw_card_ids,
  7768. .probe = iwl4965_pci_probe,
  7769. .remove = __devexit_p(iwl4965_pci_remove),
  7770. #ifdef CONFIG_PM
  7771. .suspend = iwl4965_pci_suspend,
  7772. .resume = iwl4965_pci_resume,
  7773. #endif
  7774. };
  7775. static int __init iwl4965_init(void)
  7776. {
  7777. int ret;
  7778. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  7779. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  7780. ret = pci_register_driver(&iwl4965_driver);
  7781. if (ret) {
  7782. IWL_ERROR("Unable to initialize PCI module\n");
  7783. return ret;
  7784. }
  7785. #ifdef CONFIG_IWL4965_DEBUG
  7786. ret = driver_create_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  7787. if (ret) {
  7788. IWL_ERROR("Unable to create driver sysfs file\n");
  7789. pci_unregister_driver(&iwl4965_driver);
  7790. return ret;
  7791. }
  7792. #endif
  7793. return ret;
  7794. }
  7795. static void __exit iwl4965_exit(void)
  7796. {
  7797. #ifdef CONFIG_IWL4965_DEBUG
  7798. driver_remove_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  7799. #endif
  7800. pci_unregister_driver(&iwl4965_driver);
  7801. }
  7802. module_param_named(antenna, iwl4965_param_antenna, int, 0444);
  7803. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  7804. module_param_named(disable, iwl4965_param_disable, int, 0444);
  7805. MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
  7806. module_param_named(hwcrypto, iwl4965_param_hwcrypto, int, 0444);
  7807. MODULE_PARM_DESC(hwcrypto,
  7808. "using hardware crypto engine (default 0 [software])\n");
  7809. module_param_named(debug, iwl4965_param_debug, int, 0444);
  7810. MODULE_PARM_DESC(debug, "debug output mask");
  7811. module_param_named(disable_hw_scan, iwl4965_param_disable_hw_scan, int, 0444);
  7812. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  7813. module_param_named(queues_num, iwl4965_param_queues_num, int, 0444);
  7814. MODULE_PARM_DESC(queues_num, "number of hw queues.");
  7815. /* QoS */
  7816. module_param_named(qos_enable, iwl4965_param_qos_enable, int, 0444);
  7817. MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
  7818. module_param_named(amsdu_size_8K, iwl4965_param_amsdu_size_8K, int, 0444);
  7819. MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
  7820. module_exit(iwl4965_exit);
  7821. module_init(iwl4965_init);