lpfc_init.c 57 KB

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  1. /*******************************************************************
  2. * This file is part of the Emulex Linux Device Driver for *
  3. * Fibre Channel Host Bus Adapters. *
  4. * Copyright (C) 2004-2006 Emulex. All rights reserved. *
  5. * EMULEX and SLI are trademarks of Emulex. *
  6. * www.emulex.com *
  7. * Portions Copyright (C) 2004-2005 Christoph Hellwig *
  8. * *
  9. * This program is free software; you can redistribute it and/or *
  10. * modify it under the terms of version 2 of the GNU General *
  11. * Public License as published by the Free Software Foundation. *
  12. * This program is distributed in the hope that it will be useful. *
  13. * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
  14. * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
  15. * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
  16. * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
  17. * TO BE LEGALLY INVALID. See the GNU General Public License for *
  18. * more details, a copy of which can be found in the file COPYING *
  19. * included with this package. *
  20. *******************************************************************/
  21. #include <linux/blkdev.h>
  22. #include <linux/delay.h>
  23. #include <linux/dma-mapping.h>
  24. #include <linux/idr.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/kthread.h>
  27. #include <linux/pci.h>
  28. #include <linux/spinlock.h>
  29. #include <scsi/scsi.h>
  30. #include <scsi/scsi_device.h>
  31. #include <scsi/scsi_host.h>
  32. #include <scsi/scsi_transport_fc.h>
  33. #include "lpfc_hw.h"
  34. #include "lpfc_sli.h"
  35. #include "lpfc_disc.h"
  36. #include "lpfc_scsi.h"
  37. #include "lpfc.h"
  38. #include "lpfc_logmsg.h"
  39. #include "lpfc_crtn.h"
  40. #include "lpfc_version.h"
  41. static int lpfc_parse_vpd(struct lpfc_hba *, uint8_t *, int);
  42. static void lpfc_get_hba_model_desc(struct lpfc_hba *, uint8_t *, uint8_t *);
  43. static int lpfc_post_rcv_buf(struct lpfc_hba *);
  44. static struct scsi_transport_template *lpfc_transport_template = NULL;
  45. static DEFINE_IDR(lpfc_hba_index);
  46. /************************************************************************/
  47. /* */
  48. /* lpfc_config_port_prep */
  49. /* This routine will do LPFC initialization prior to the */
  50. /* CONFIG_PORT mailbox command. This will be initialized */
  51. /* as a SLI layer callback routine. */
  52. /* This routine returns 0 on success or -ERESTART if it wants */
  53. /* the SLI layer to reset the HBA and try again. Any */
  54. /* other return value indicates an error. */
  55. /* */
  56. /************************************************************************/
  57. int
  58. lpfc_config_port_prep(struct lpfc_hba * phba)
  59. {
  60. lpfc_vpd_t *vp = &phba->vpd;
  61. int i = 0, rc;
  62. LPFC_MBOXQ_t *pmb;
  63. MAILBOX_t *mb;
  64. char *lpfc_vpd_data = NULL;
  65. uint16_t offset = 0;
  66. static char licensed[56] =
  67. "key unlock for use with gnu public licensed code only\0";
  68. static int init_key = 1;
  69. pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
  70. if (!pmb) {
  71. phba->hba_state = LPFC_HBA_ERROR;
  72. return -ENOMEM;
  73. }
  74. mb = &pmb->mb;
  75. phba->hba_state = LPFC_INIT_MBX_CMDS;
  76. if (lpfc_is_LC_HBA(phba->pcidev->device)) {
  77. if (init_key) {
  78. uint32_t *ptext = (uint32_t *) licensed;
  79. for (i = 0; i < 56; i += sizeof (uint32_t), ptext++)
  80. *ptext = cpu_to_be32(*ptext);
  81. init_key = 0;
  82. }
  83. lpfc_read_nv(phba, pmb);
  84. memset((char*)mb->un.varRDnvp.rsvd3, 0,
  85. sizeof (mb->un.varRDnvp.rsvd3));
  86. memcpy((char*)mb->un.varRDnvp.rsvd3, licensed,
  87. sizeof (licensed));
  88. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
  89. if (rc != MBX_SUCCESS) {
  90. lpfc_printf_log(phba,
  91. KERN_ERR,
  92. LOG_MBOX,
  93. "%d:0324 Config Port initialization "
  94. "error, mbxCmd x%x READ_NVPARM, "
  95. "mbxStatus x%x\n",
  96. phba->brd_no,
  97. mb->mbxCommand, mb->mbxStatus);
  98. mempool_free(pmb, phba->mbox_mem_pool);
  99. return -ERESTART;
  100. }
  101. memcpy(phba->wwnn, (char *)mb->un.varRDnvp.nodename,
  102. sizeof (mb->un.varRDnvp.nodename));
  103. }
  104. /* Setup and issue mailbox READ REV command */
  105. lpfc_read_rev(phba, pmb);
  106. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
  107. if (rc != MBX_SUCCESS) {
  108. lpfc_printf_log(phba,
  109. KERN_ERR,
  110. LOG_INIT,
  111. "%d:0439 Adapter failed to init, mbxCmd x%x "
  112. "READ_REV, mbxStatus x%x\n",
  113. phba->brd_no,
  114. mb->mbxCommand, mb->mbxStatus);
  115. mempool_free( pmb, phba->mbox_mem_pool);
  116. return -ERESTART;
  117. }
  118. /*
  119. * The value of rr must be 1 since the driver set the cv field to 1.
  120. * This setting requires the FW to set all revision fields.
  121. */
  122. if (mb->un.varRdRev.rr == 0) {
  123. vp->rev.rBit = 0;
  124. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  125. "%d:0440 Adapter failed to init, READ_REV has "
  126. "missing revision information.\n",
  127. phba->brd_no);
  128. mempool_free(pmb, phba->mbox_mem_pool);
  129. return -ERESTART;
  130. }
  131. /* Save information as VPD data */
  132. vp->rev.rBit = 1;
  133. vp->rev.sli1FwRev = mb->un.varRdRev.sli1FwRev;
  134. memcpy(vp->rev.sli1FwName, (char*) mb->un.varRdRev.sli1FwName, 16);
  135. vp->rev.sli2FwRev = mb->un.varRdRev.sli2FwRev;
  136. memcpy(vp->rev.sli2FwName, (char *) mb->un.varRdRev.sli2FwName, 16);
  137. vp->rev.biuRev = mb->un.varRdRev.biuRev;
  138. vp->rev.smRev = mb->un.varRdRev.smRev;
  139. vp->rev.smFwRev = mb->un.varRdRev.un.smFwRev;
  140. vp->rev.endecRev = mb->un.varRdRev.endecRev;
  141. vp->rev.fcphHigh = mb->un.varRdRev.fcphHigh;
  142. vp->rev.fcphLow = mb->un.varRdRev.fcphLow;
  143. vp->rev.feaLevelHigh = mb->un.varRdRev.feaLevelHigh;
  144. vp->rev.feaLevelLow = mb->un.varRdRev.feaLevelLow;
  145. vp->rev.postKernRev = mb->un.varRdRev.postKernRev;
  146. vp->rev.opFwRev = mb->un.varRdRev.opFwRev;
  147. if (lpfc_is_LC_HBA(phba->pcidev->device))
  148. memcpy(phba->RandomData, (char *)&mb->un.varWords[24],
  149. sizeof (phba->RandomData));
  150. /* Get adapter VPD information */
  151. pmb->context2 = kmalloc(DMP_RSP_SIZE, GFP_KERNEL);
  152. if (!pmb->context2)
  153. goto out_free_mbox;
  154. lpfc_vpd_data = kmalloc(DMP_VPD_SIZE, GFP_KERNEL);
  155. if (!lpfc_vpd_data)
  156. goto out_free_context2;
  157. do {
  158. lpfc_dump_mem(phba, pmb, offset);
  159. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
  160. if (rc != MBX_SUCCESS) {
  161. lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
  162. "%d:0441 VPD not present on adapter, "
  163. "mbxCmd x%x DUMP VPD, mbxStatus x%x\n",
  164. phba->brd_no,
  165. mb->mbxCommand, mb->mbxStatus);
  166. mb->un.varDmp.word_cnt = 0;
  167. }
  168. if (mb->un.varDmp.word_cnt > DMP_VPD_SIZE - offset)
  169. mb->un.varDmp.word_cnt = DMP_VPD_SIZE - offset;
  170. lpfc_sli_pcimem_bcopy(pmb->context2, lpfc_vpd_data + offset,
  171. mb->un.varDmp.word_cnt);
  172. offset += mb->un.varDmp.word_cnt;
  173. } while (mb->un.varDmp.word_cnt && offset < DMP_VPD_SIZE);
  174. lpfc_parse_vpd(phba, lpfc_vpd_data, offset);
  175. kfree(lpfc_vpd_data);
  176. out_free_context2:
  177. kfree(pmb->context2);
  178. out_free_mbox:
  179. mempool_free(pmb, phba->mbox_mem_pool);
  180. return 0;
  181. }
  182. /************************************************************************/
  183. /* */
  184. /* lpfc_config_port_post */
  185. /* This routine will do LPFC initialization after the */
  186. /* CONFIG_PORT mailbox command. This will be initialized */
  187. /* as a SLI layer callback routine. */
  188. /* This routine returns 0 on success. Any other return value */
  189. /* indicates an error. */
  190. /* */
  191. /************************************************************************/
  192. int
  193. lpfc_config_port_post(struct lpfc_hba * phba)
  194. {
  195. LPFC_MBOXQ_t *pmb;
  196. MAILBOX_t *mb;
  197. struct lpfc_dmabuf *mp;
  198. struct lpfc_sli *psli = &phba->sli;
  199. uint32_t status, timeout;
  200. int i, j, rc;
  201. pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
  202. if (!pmb) {
  203. phba->hba_state = LPFC_HBA_ERROR;
  204. return -ENOMEM;
  205. }
  206. mb = &pmb->mb;
  207. lpfc_config_link(phba, pmb);
  208. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
  209. if (rc != MBX_SUCCESS) {
  210. lpfc_printf_log(phba,
  211. KERN_ERR,
  212. LOG_INIT,
  213. "%d:0447 Adapter failed init, mbxCmd x%x "
  214. "CONFIG_LINK mbxStatus x%x\n",
  215. phba->brd_no,
  216. mb->mbxCommand, mb->mbxStatus);
  217. phba->hba_state = LPFC_HBA_ERROR;
  218. mempool_free( pmb, phba->mbox_mem_pool);
  219. return -EIO;
  220. }
  221. /* Get login parameters for NID. */
  222. lpfc_read_sparam(phba, pmb);
  223. if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
  224. lpfc_printf_log(phba,
  225. KERN_ERR,
  226. LOG_INIT,
  227. "%d:0448 Adapter failed init, mbxCmd x%x "
  228. "READ_SPARM mbxStatus x%x\n",
  229. phba->brd_no,
  230. mb->mbxCommand, mb->mbxStatus);
  231. phba->hba_state = LPFC_HBA_ERROR;
  232. mp = (struct lpfc_dmabuf *) pmb->context1;
  233. mempool_free( pmb, phba->mbox_mem_pool);
  234. lpfc_mbuf_free(phba, mp->virt, mp->phys);
  235. kfree(mp);
  236. return -EIO;
  237. }
  238. mp = (struct lpfc_dmabuf *) pmb->context1;
  239. memcpy(&phba->fc_sparam, mp->virt, sizeof (struct serv_parm));
  240. lpfc_mbuf_free(phba, mp->virt, mp->phys);
  241. kfree(mp);
  242. pmb->context1 = NULL;
  243. if (phba->cfg_soft_wwnn)
  244. u64_to_wwn(phba->cfg_soft_wwnn, phba->fc_sparam.nodeName.u.wwn);
  245. if (phba->cfg_soft_wwpn)
  246. u64_to_wwn(phba->cfg_soft_wwpn, phba->fc_sparam.portName.u.wwn);
  247. memcpy(&phba->fc_nodename, &phba->fc_sparam.nodeName,
  248. sizeof (struct lpfc_name));
  249. memcpy(&phba->fc_portname, &phba->fc_sparam.portName,
  250. sizeof (struct lpfc_name));
  251. /* If no serial number in VPD data, use low 6 bytes of WWNN */
  252. /* This should be consolidated into parse_vpd ? - mr */
  253. if (phba->SerialNumber[0] == 0) {
  254. uint8_t *outptr;
  255. outptr = &phba->fc_nodename.u.s.IEEE[0];
  256. for (i = 0; i < 12; i++) {
  257. status = *outptr++;
  258. j = ((status & 0xf0) >> 4);
  259. if (j <= 9)
  260. phba->SerialNumber[i] =
  261. (char)((uint8_t) 0x30 + (uint8_t) j);
  262. else
  263. phba->SerialNumber[i] =
  264. (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
  265. i++;
  266. j = (status & 0xf);
  267. if (j <= 9)
  268. phba->SerialNumber[i] =
  269. (char)((uint8_t) 0x30 + (uint8_t) j);
  270. else
  271. phba->SerialNumber[i] =
  272. (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
  273. }
  274. }
  275. lpfc_read_config(phba, pmb);
  276. if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
  277. lpfc_printf_log(phba,
  278. KERN_ERR,
  279. LOG_INIT,
  280. "%d:0453 Adapter failed to init, mbxCmd x%x "
  281. "READ_CONFIG, mbxStatus x%x\n",
  282. phba->brd_no,
  283. mb->mbxCommand, mb->mbxStatus);
  284. phba->hba_state = LPFC_HBA_ERROR;
  285. mempool_free( pmb, phba->mbox_mem_pool);
  286. return -EIO;
  287. }
  288. /* Reset the DFT_HBA_Q_DEPTH to the max xri */
  289. if (phba->cfg_hba_queue_depth > (mb->un.varRdConfig.max_xri+1))
  290. phba->cfg_hba_queue_depth =
  291. mb->un.varRdConfig.max_xri + 1;
  292. phba->lmt = mb->un.varRdConfig.lmt;
  293. /* Get the default values for Model Name and Description */
  294. lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
  295. if ((phba->cfg_link_speed > LINK_SPEED_10G)
  296. || ((phba->cfg_link_speed == LINK_SPEED_1G)
  297. && !(phba->lmt & LMT_1Gb))
  298. || ((phba->cfg_link_speed == LINK_SPEED_2G)
  299. && !(phba->lmt & LMT_2Gb))
  300. || ((phba->cfg_link_speed == LINK_SPEED_4G)
  301. && !(phba->lmt & LMT_4Gb))
  302. || ((phba->cfg_link_speed == LINK_SPEED_8G)
  303. && !(phba->lmt & LMT_8Gb))
  304. || ((phba->cfg_link_speed == LINK_SPEED_10G)
  305. && !(phba->lmt & LMT_10Gb))) {
  306. /* Reset link speed to auto */
  307. lpfc_printf_log(phba,
  308. KERN_WARNING,
  309. LOG_LINK_EVENT,
  310. "%d:1302 Invalid speed for this board: "
  311. "Reset link speed to auto: x%x\n",
  312. phba->brd_no,
  313. phba->cfg_link_speed);
  314. phba->cfg_link_speed = LINK_SPEED_AUTO;
  315. }
  316. phba->hba_state = LPFC_LINK_DOWN;
  317. /* Only process IOCBs on ring 0 till hba_state is READY */
  318. if (psli->ring[psli->extra_ring].cmdringaddr)
  319. psli->ring[psli->extra_ring].flag |= LPFC_STOP_IOCB_EVENT;
  320. if (psli->ring[psli->fcp_ring].cmdringaddr)
  321. psli->ring[psli->fcp_ring].flag |= LPFC_STOP_IOCB_EVENT;
  322. if (psli->ring[psli->next_ring].cmdringaddr)
  323. psli->ring[psli->next_ring].flag |= LPFC_STOP_IOCB_EVENT;
  324. /* Post receive buffers for desired rings */
  325. lpfc_post_rcv_buf(phba);
  326. /* Enable appropriate host interrupts */
  327. spin_lock_irq(phba->host->host_lock);
  328. status = readl(phba->HCregaddr);
  329. status |= HC_MBINT_ENA | HC_ERINT_ENA | HC_LAINT_ENA;
  330. if (psli->num_rings > 0)
  331. status |= HC_R0INT_ENA;
  332. if (psli->num_rings > 1)
  333. status |= HC_R1INT_ENA;
  334. if (psli->num_rings > 2)
  335. status |= HC_R2INT_ENA;
  336. if (psli->num_rings > 3)
  337. status |= HC_R3INT_ENA;
  338. if ((phba->cfg_poll & ENABLE_FCP_RING_POLLING) &&
  339. (phba->cfg_poll & DISABLE_FCP_RING_INT))
  340. status &= ~(HC_R0INT_ENA << LPFC_FCP_RING);
  341. writel(status, phba->HCregaddr);
  342. readl(phba->HCregaddr); /* flush */
  343. spin_unlock_irq(phba->host->host_lock);
  344. /*
  345. * Setup the ring 0 (els) timeout handler
  346. */
  347. timeout = phba->fc_ratov << 1;
  348. mod_timer(&phba->els_tmofunc, jiffies + HZ * timeout);
  349. lpfc_init_link(phba, pmb, phba->cfg_topology, phba->cfg_link_speed);
  350. pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
  351. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  352. if (rc != MBX_SUCCESS) {
  353. lpfc_printf_log(phba,
  354. KERN_ERR,
  355. LOG_INIT,
  356. "%d:0454 Adapter failed to init, mbxCmd x%x "
  357. "INIT_LINK, mbxStatus x%x\n",
  358. phba->brd_no,
  359. mb->mbxCommand, mb->mbxStatus);
  360. /* Clear all interrupt enable conditions */
  361. writel(0, phba->HCregaddr);
  362. readl(phba->HCregaddr); /* flush */
  363. /* Clear all pending interrupts */
  364. writel(0xffffffff, phba->HAregaddr);
  365. readl(phba->HAregaddr); /* flush */
  366. phba->hba_state = LPFC_HBA_ERROR;
  367. if (rc != MBX_BUSY)
  368. mempool_free(pmb, phba->mbox_mem_pool);
  369. return -EIO;
  370. }
  371. /* MBOX buffer will be freed in mbox compl */
  372. return (0);
  373. }
  374. static int
  375. lpfc_discovery_wait(struct lpfc_hba *phba)
  376. {
  377. int i = 0;
  378. while ((phba->hba_state != LPFC_HBA_READY) ||
  379. (phba->num_disc_nodes) || (phba->fc_prli_sent) ||
  380. ((phba->fc_map_cnt == 0) && (i<2)) ||
  381. (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE)) {
  382. /* Check every second for 30 retries. */
  383. i++;
  384. if (i > 30) {
  385. return -ETIMEDOUT;
  386. }
  387. if ((i >= 15) && (phba->hba_state <= LPFC_LINK_DOWN)) {
  388. /* The link is down. Set linkdown timeout */
  389. return -ETIMEDOUT;
  390. }
  391. /* Delay for 1 second to give discovery time to complete. */
  392. msleep(1000);
  393. }
  394. return 0;
  395. }
  396. /************************************************************************/
  397. /* */
  398. /* lpfc_hba_down_prep */
  399. /* This routine will do LPFC uninitialization before the */
  400. /* HBA is reset when bringing down the SLI Layer. This will be */
  401. /* initialized as a SLI layer callback routine. */
  402. /* This routine returns 0 on success. Any other return value */
  403. /* indicates an error. */
  404. /* */
  405. /************************************************************************/
  406. int
  407. lpfc_hba_down_prep(struct lpfc_hba * phba)
  408. {
  409. /* Disable interrupts */
  410. writel(0, phba->HCregaddr);
  411. readl(phba->HCregaddr); /* flush */
  412. /* Cleanup potential discovery resources */
  413. lpfc_els_flush_rscn(phba);
  414. lpfc_els_flush_cmd(phba);
  415. lpfc_disc_flush_list(phba);
  416. return (0);
  417. }
  418. /************************************************************************/
  419. /* */
  420. /* lpfc_hba_down_post */
  421. /* This routine will do uninitialization after the HBA is reset */
  422. /* when bringing down the SLI Layer. */
  423. /* This routine returns 0 on success. Any other return value */
  424. /* indicates an error. */
  425. /* */
  426. /************************************************************************/
  427. int
  428. lpfc_hba_down_post(struct lpfc_hba * phba)
  429. {
  430. struct lpfc_sli *psli = &phba->sli;
  431. struct lpfc_sli_ring *pring;
  432. struct lpfc_dmabuf *mp, *next_mp;
  433. int i;
  434. /* Cleanup preposted buffers on the ELS ring */
  435. pring = &psli->ring[LPFC_ELS_RING];
  436. list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
  437. list_del(&mp->list);
  438. pring->postbufq_cnt--;
  439. lpfc_mbuf_free(phba, mp->virt, mp->phys);
  440. kfree(mp);
  441. }
  442. for (i = 0; i < psli->num_rings; i++) {
  443. pring = &psli->ring[i];
  444. lpfc_sli_abort_iocb_ring(phba, pring);
  445. }
  446. return 0;
  447. }
  448. /************************************************************************/
  449. /* */
  450. /* lpfc_handle_eratt */
  451. /* This routine will handle processing a Host Attention */
  452. /* Error Status event. This will be initialized */
  453. /* as a SLI layer callback routine. */
  454. /* */
  455. /************************************************************************/
  456. void
  457. lpfc_handle_eratt(struct lpfc_hba * phba)
  458. {
  459. struct lpfc_sli *psli = &phba->sli;
  460. struct lpfc_sli_ring *pring;
  461. uint32_t event_data;
  462. /* If the pci channel is offline, ignore possible errors,
  463. * since we cannot communicate with the pci card anyway. */
  464. if (pci_channel_offline(phba->pcidev))
  465. return;
  466. if (phba->work_hs & HS_FFER6 ||
  467. phba->work_hs & HS_FFER5) {
  468. /* Re-establishing Link */
  469. lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
  470. "%d:1301 Re-establishing Link "
  471. "Data: x%x x%x x%x\n",
  472. phba->brd_no, phba->work_hs,
  473. phba->work_status[0], phba->work_status[1]);
  474. spin_lock_irq(phba->host->host_lock);
  475. phba->fc_flag |= FC_ESTABLISH_LINK;
  476. psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
  477. spin_unlock_irq(phba->host->host_lock);
  478. /*
  479. * Firmware stops when it triggled erratt with HS_FFER6.
  480. * That could cause the I/Os dropped by the firmware.
  481. * Error iocb (I/O) on txcmplq and let the SCSI layer
  482. * retry it after re-establishing link.
  483. */
  484. pring = &psli->ring[psli->fcp_ring];
  485. lpfc_sli_abort_iocb_ring(phba, pring);
  486. /*
  487. * There was a firmware error. Take the hba offline and then
  488. * attempt to restart it.
  489. */
  490. lpfc_offline_prep(phba);
  491. lpfc_offline(phba);
  492. lpfc_sli_brdrestart(phba);
  493. if (lpfc_online(phba) == 0) { /* Initialize the HBA */
  494. mod_timer(&phba->fc_estabtmo, jiffies + HZ * 60);
  495. lpfc_unblock_mgmt_io(phba);
  496. return;
  497. }
  498. lpfc_unblock_mgmt_io(phba);
  499. } else {
  500. /* The if clause above forces this code path when the status
  501. * failure is a value other than FFER6. Do not call the offline
  502. * twice. This is the adapter hardware error path.
  503. */
  504. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  505. "%d:0457 Adapter Hardware Error "
  506. "Data: x%x x%x x%x\n",
  507. phba->brd_no, phba->work_hs,
  508. phba->work_status[0], phba->work_status[1]);
  509. event_data = FC_REG_DUMP_EVENT;
  510. fc_host_post_vendor_event(phba->host, fc_get_event_number(),
  511. sizeof(event_data), (char *) &event_data,
  512. SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
  513. psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
  514. lpfc_offline_prep(phba);
  515. lpfc_offline(phba);
  516. lpfc_unblock_mgmt_io(phba);
  517. phba->hba_state = LPFC_HBA_ERROR;
  518. lpfc_hba_down_post(phba);
  519. }
  520. }
  521. /************************************************************************/
  522. /* */
  523. /* lpfc_handle_latt */
  524. /* This routine will handle processing a Host Attention */
  525. /* Link Status event. This will be initialized */
  526. /* as a SLI layer callback routine. */
  527. /* */
  528. /************************************************************************/
  529. void
  530. lpfc_handle_latt(struct lpfc_hba * phba)
  531. {
  532. struct lpfc_sli *psli = &phba->sli;
  533. LPFC_MBOXQ_t *pmb;
  534. volatile uint32_t control;
  535. struct lpfc_dmabuf *mp;
  536. int rc = -ENOMEM;
  537. pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
  538. if (!pmb)
  539. goto lpfc_handle_latt_err_exit;
  540. mp = kmalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
  541. if (!mp)
  542. goto lpfc_handle_latt_free_pmb;
  543. mp->virt = lpfc_mbuf_alloc(phba, 0, &mp->phys);
  544. if (!mp->virt)
  545. goto lpfc_handle_latt_free_mp;
  546. rc = -EIO;
  547. /* Cleanup any outstanding ELS commands */
  548. lpfc_els_flush_cmd(phba);
  549. psli->slistat.link_event++;
  550. lpfc_read_la(phba, pmb, mp);
  551. pmb->mbox_cmpl = lpfc_mbx_cmpl_read_la;
  552. rc = lpfc_sli_issue_mbox (phba, pmb, (MBX_NOWAIT | MBX_STOP_IOCB));
  553. if (rc == MBX_NOT_FINISHED)
  554. goto lpfc_handle_latt_free_mbuf;
  555. /* Clear Link Attention in HA REG */
  556. spin_lock_irq(phba->host->host_lock);
  557. writel(HA_LATT, phba->HAregaddr);
  558. readl(phba->HAregaddr); /* flush */
  559. spin_unlock_irq(phba->host->host_lock);
  560. return;
  561. lpfc_handle_latt_free_mbuf:
  562. lpfc_mbuf_free(phba, mp->virt, mp->phys);
  563. lpfc_handle_latt_free_mp:
  564. kfree(mp);
  565. lpfc_handle_latt_free_pmb:
  566. mempool_free(pmb, phba->mbox_mem_pool);
  567. lpfc_handle_latt_err_exit:
  568. /* Enable Link attention interrupts */
  569. spin_lock_irq(phba->host->host_lock);
  570. psli->sli_flag |= LPFC_PROCESS_LA;
  571. control = readl(phba->HCregaddr);
  572. control |= HC_LAINT_ENA;
  573. writel(control, phba->HCregaddr);
  574. readl(phba->HCregaddr); /* flush */
  575. /* Clear Link Attention in HA REG */
  576. writel(HA_LATT, phba->HAregaddr);
  577. readl(phba->HAregaddr); /* flush */
  578. spin_unlock_irq(phba->host->host_lock);
  579. lpfc_linkdown(phba);
  580. phba->hba_state = LPFC_HBA_ERROR;
  581. /* The other case is an error from issue_mbox */
  582. if (rc == -ENOMEM)
  583. lpfc_printf_log(phba,
  584. KERN_WARNING,
  585. LOG_MBOX,
  586. "%d:0300 READ_LA: no buffers\n",
  587. phba->brd_no);
  588. return;
  589. }
  590. /************************************************************************/
  591. /* */
  592. /* lpfc_parse_vpd */
  593. /* This routine will parse the VPD data */
  594. /* */
  595. /************************************************************************/
  596. static int
  597. lpfc_parse_vpd(struct lpfc_hba * phba, uint8_t * vpd, int len)
  598. {
  599. uint8_t lenlo, lenhi;
  600. int Length;
  601. int i, j;
  602. int finished = 0;
  603. int index = 0;
  604. if (!vpd)
  605. return 0;
  606. /* Vital Product */
  607. lpfc_printf_log(phba,
  608. KERN_INFO,
  609. LOG_INIT,
  610. "%d:0455 Vital Product Data: x%x x%x x%x x%x\n",
  611. phba->brd_no,
  612. (uint32_t) vpd[0], (uint32_t) vpd[1], (uint32_t) vpd[2],
  613. (uint32_t) vpd[3]);
  614. while (!finished && (index < (len - 4))) {
  615. switch (vpd[index]) {
  616. case 0x82:
  617. case 0x91:
  618. index += 1;
  619. lenlo = vpd[index];
  620. index += 1;
  621. lenhi = vpd[index];
  622. index += 1;
  623. i = ((((unsigned short)lenhi) << 8) + lenlo);
  624. index += i;
  625. break;
  626. case 0x90:
  627. index += 1;
  628. lenlo = vpd[index];
  629. index += 1;
  630. lenhi = vpd[index];
  631. index += 1;
  632. Length = ((((unsigned short)lenhi) << 8) + lenlo);
  633. if (Length > len - index)
  634. Length = len - index;
  635. while (Length > 0) {
  636. /* Look for Serial Number */
  637. if ((vpd[index] == 'S') && (vpd[index+1] == 'N')) {
  638. index += 2;
  639. i = vpd[index];
  640. index += 1;
  641. j = 0;
  642. Length -= (3+i);
  643. while(i--) {
  644. phba->SerialNumber[j++] = vpd[index++];
  645. if (j == 31)
  646. break;
  647. }
  648. phba->SerialNumber[j] = 0;
  649. continue;
  650. }
  651. else if ((vpd[index] == 'V') && (vpd[index+1] == '1')) {
  652. phba->vpd_flag |= VPD_MODEL_DESC;
  653. index += 2;
  654. i = vpd[index];
  655. index += 1;
  656. j = 0;
  657. Length -= (3+i);
  658. while(i--) {
  659. phba->ModelDesc[j++] = vpd[index++];
  660. if (j == 255)
  661. break;
  662. }
  663. phba->ModelDesc[j] = 0;
  664. continue;
  665. }
  666. else if ((vpd[index] == 'V') && (vpd[index+1] == '2')) {
  667. phba->vpd_flag |= VPD_MODEL_NAME;
  668. index += 2;
  669. i = vpd[index];
  670. index += 1;
  671. j = 0;
  672. Length -= (3+i);
  673. while(i--) {
  674. phba->ModelName[j++] = vpd[index++];
  675. if (j == 79)
  676. break;
  677. }
  678. phba->ModelName[j] = 0;
  679. continue;
  680. }
  681. else if ((vpd[index] == 'V') && (vpd[index+1] == '3')) {
  682. phba->vpd_flag |= VPD_PROGRAM_TYPE;
  683. index += 2;
  684. i = vpd[index];
  685. index += 1;
  686. j = 0;
  687. Length -= (3+i);
  688. while(i--) {
  689. phba->ProgramType[j++] = vpd[index++];
  690. if (j == 255)
  691. break;
  692. }
  693. phba->ProgramType[j] = 0;
  694. continue;
  695. }
  696. else if ((vpd[index] == 'V') && (vpd[index+1] == '4')) {
  697. phba->vpd_flag |= VPD_PORT;
  698. index += 2;
  699. i = vpd[index];
  700. index += 1;
  701. j = 0;
  702. Length -= (3+i);
  703. while(i--) {
  704. phba->Port[j++] = vpd[index++];
  705. if (j == 19)
  706. break;
  707. }
  708. phba->Port[j] = 0;
  709. continue;
  710. }
  711. else {
  712. index += 2;
  713. i = vpd[index];
  714. index += 1;
  715. index += i;
  716. Length -= (3 + i);
  717. }
  718. }
  719. finished = 0;
  720. break;
  721. case 0x78:
  722. finished = 1;
  723. break;
  724. default:
  725. index ++;
  726. break;
  727. }
  728. }
  729. return(1);
  730. }
  731. static void
  732. lpfc_get_hba_model_desc(struct lpfc_hba * phba, uint8_t * mdp, uint8_t * descp)
  733. {
  734. lpfc_vpd_t *vp;
  735. uint16_t dev_id = phba->pcidev->device;
  736. int max_speed;
  737. struct {
  738. char * name;
  739. int max_speed;
  740. char * bus;
  741. } m = {"<Unknown>", 0, ""};
  742. if (mdp && mdp[0] != '\0'
  743. && descp && descp[0] != '\0')
  744. return;
  745. if (phba->lmt & LMT_10Gb)
  746. max_speed = 10;
  747. else if (phba->lmt & LMT_8Gb)
  748. max_speed = 8;
  749. else if (phba->lmt & LMT_4Gb)
  750. max_speed = 4;
  751. else if (phba->lmt & LMT_2Gb)
  752. max_speed = 2;
  753. else
  754. max_speed = 1;
  755. vp = &phba->vpd;
  756. switch (dev_id) {
  757. case PCI_DEVICE_ID_FIREFLY:
  758. m = (typeof(m)){"LP6000", max_speed, "PCI"};
  759. break;
  760. case PCI_DEVICE_ID_SUPERFLY:
  761. if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3)
  762. m = (typeof(m)){"LP7000", max_speed, "PCI"};
  763. else
  764. m = (typeof(m)){"LP7000E", max_speed, "PCI"};
  765. break;
  766. case PCI_DEVICE_ID_DRAGONFLY:
  767. m = (typeof(m)){"LP8000", max_speed, "PCI"};
  768. break;
  769. case PCI_DEVICE_ID_CENTAUR:
  770. if (FC_JEDEC_ID(vp->rev.biuRev) == CENTAUR_2G_JEDEC_ID)
  771. m = (typeof(m)){"LP9002", max_speed, "PCI"};
  772. else
  773. m = (typeof(m)){"LP9000", max_speed, "PCI"};
  774. break;
  775. case PCI_DEVICE_ID_RFLY:
  776. m = (typeof(m)){"LP952", max_speed, "PCI"};
  777. break;
  778. case PCI_DEVICE_ID_PEGASUS:
  779. m = (typeof(m)){"LP9802", max_speed, "PCI-X"};
  780. break;
  781. case PCI_DEVICE_ID_THOR:
  782. m = (typeof(m)){"LP10000", max_speed, "PCI-X"};
  783. break;
  784. case PCI_DEVICE_ID_VIPER:
  785. m = (typeof(m)){"LPX1000", max_speed, "PCI-X"};
  786. break;
  787. case PCI_DEVICE_ID_PFLY:
  788. m = (typeof(m)){"LP982", max_speed, "PCI-X"};
  789. break;
  790. case PCI_DEVICE_ID_TFLY:
  791. m = (typeof(m)){"LP1050", max_speed, "PCI-X"};
  792. break;
  793. case PCI_DEVICE_ID_HELIOS:
  794. m = (typeof(m)){"LP11000", max_speed, "PCI-X2"};
  795. break;
  796. case PCI_DEVICE_ID_HELIOS_SCSP:
  797. m = (typeof(m)){"LP11000-SP", max_speed, "PCI-X2"};
  798. break;
  799. case PCI_DEVICE_ID_HELIOS_DCSP:
  800. m = (typeof(m)){"LP11002-SP", max_speed, "PCI-X2"};
  801. break;
  802. case PCI_DEVICE_ID_NEPTUNE:
  803. m = (typeof(m)){"LPe1000", max_speed, "PCIe"};
  804. break;
  805. case PCI_DEVICE_ID_NEPTUNE_SCSP:
  806. m = (typeof(m)){"LPe1000-SP", max_speed, "PCIe"};
  807. break;
  808. case PCI_DEVICE_ID_NEPTUNE_DCSP:
  809. m = (typeof(m)){"LPe1002-SP", max_speed, "PCIe"};
  810. break;
  811. case PCI_DEVICE_ID_BMID:
  812. m = (typeof(m)){"LP1150", max_speed, "PCI-X2"};
  813. break;
  814. case PCI_DEVICE_ID_BSMB:
  815. m = (typeof(m)){"LP111", max_speed, "PCI-X2"};
  816. break;
  817. case PCI_DEVICE_ID_ZEPHYR:
  818. m = (typeof(m)){"LPe11000", max_speed, "PCIe"};
  819. break;
  820. case PCI_DEVICE_ID_ZEPHYR_SCSP:
  821. m = (typeof(m)){"LPe11000", max_speed, "PCIe"};
  822. break;
  823. case PCI_DEVICE_ID_ZEPHYR_DCSP:
  824. m = (typeof(m)){"LPe11002-SP", max_speed, "PCIe"};
  825. break;
  826. case PCI_DEVICE_ID_ZMID:
  827. m = (typeof(m)){"LPe1150", max_speed, "PCIe"};
  828. break;
  829. case PCI_DEVICE_ID_ZSMB:
  830. m = (typeof(m)){"LPe111", max_speed, "PCIe"};
  831. break;
  832. case PCI_DEVICE_ID_LP101:
  833. m = (typeof(m)){"LP101", max_speed, "PCI-X"};
  834. break;
  835. case PCI_DEVICE_ID_LP10000S:
  836. m = (typeof(m)){"LP10000-S", max_speed, "PCI"};
  837. break;
  838. case PCI_DEVICE_ID_LP11000S:
  839. m = (typeof(m)){"LP11000-S", max_speed,
  840. "PCI-X2"};
  841. break;
  842. case PCI_DEVICE_ID_LPE11000S:
  843. m = (typeof(m)){"LPe11000-S", max_speed,
  844. "PCIe"};
  845. break;
  846. default:
  847. m = (typeof(m)){ NULL };
  848. break;
  849. }
  850. if (mdp && mdp[0] == '\0')
  851. snprintf(mdp, 79,"%s", m.name);
  852. if (descp && descp[0] == '\0')
  853. snprintf(descp, 255,
  854. "Emulex %s %dGb %s Fibre Channel Adapter",
  855. m.name, m.max_speed, m.bus);
  856. }
  857. /**************************************************/
  858. /* lpfc_post_buffer */
  859. /* */
  860. /* This routine will post count buffers to the */
  861. /* ring with the QUE_RING_BUF_CN command. This */
  862. /* allows 3 buffers / command to be posted. */
  863. /* Returns the number of buffers NOT posted. */
  864. /**************************************************/
  865. int
  866. lpfc_post_buffer(struct lpfc_hba * phba, struct lpfc_sli_ring * pring, int cnt,
  867. int type)
  868. {
  869. IOCB_t *icmd;
  870. struct lpfc_iocbq *iocb;
  871. struct lpfc_dmabuf *mp1, *mp2;
  872. cnt += pring->missbufcnt;
  873. /* While there are buffers to post */
  874. while (cnt > 0) {
  875. /* Allocate buffer for command iocb */
  876. spin_lock_irq(phba->host->host_lock);
  877. iocb = lpfc_sli_get_iocbq(phba);
  878. spin_unlock_irq(phba->host->host_lock);
  879. if (iocb == NULL) {
  880. pring->missbufcnt = cnt;
  881. return cnt;
  882. }
  883. icmd = &iocb->iocb;
  884. /* 2 buffers can be posted per command */
  885. /* Allocate buffer to post */
  886. mp1 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
  887. if (mp1)
  888. mp1->virt = lpfc_mbuf_alloc(phba, MEM_PRI,
  889. &mp1->phys);
  890. if (mp1 == 0 || mp1->virt == 0) {
  891. kfree(mp1);
  892. spin_lock_irq(phba->host->host_lock);
  893. lpfc_sli_release_iocbq(phba, iocb);
  894. spin_unlock_irq(phba->host->host_lock);
  895. pring->missbufcnt = cnt;
  896. return cnt;
  897. }
  898. INIT_LIST_HEAD(&mp1->list);
  899. /* Allocate buffer to post */
  900. if (cnt > 1) {
  901. mp2 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
  902. if (mp2)
  903. mp2->virt = lpfc_mbuf_alloc(phba, MEM_PRI,
  904. &mp2->phys);
  905. if (mp2 == 0 || mp2->virt == 0) {
  906. kfree(mp2);
  907. lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
  908. kfree(mp1);
  909. spin_lock_irq(phba->host->host_lock);
  910. lpfc_sli_release_iocbq(phba, iocb);
  911. spin_unlock_irq(phba->host->host_lock);
  912. pring->missbufcnt = cnt;
  913. return cnt;
  914. }
  915. INIT_LIST_HEAD(&mp2->list);
  916. } else {
  917. mp2 = NULL;
  918. }
  919. icmd->un.cont64[0].addrHigh = putPaddrHigh(mp1->phys);
  920. icmd->un.cont64[0].addrLow = putPaddrLow(mp1->phys);
  921. icmd->un.cont64[0].tus.f.bdeSize = FCELSSIZE;
  922. icmd->ulpBdeCount = 1;
  923. cnt--;
  924. if (mp2) {
  925. icmd->un.cont64[1].addrHigh = putPaddrHigh(mp2->phys);
  926. icmd->un.cont64[1].addrLow = putPaddrLow(mp2->phys);
  927. icmd->un.cont64[1].tus.f.bdeSize = FCELSSIZE;
  928. cnt--;
  929. icmd->ulpBdeCount = 2;
  930. }
  931. icmd->ulpCommand = CMD_QUE_RING_BUF64_CN;
  932. icmd->ulpLe = 1;
  933. spin_lock_irq(phba->host->host_lock);
  934. if (lpfc_sli_issue_iocb(phba, pring, iocb, 0) == IOCB_ERROR) {
  935. lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
  936. kfree(mp1);
  937. cnt++;
  938. if (mp2) {
  939. lpfc_mbuf_free(phba, mp2->virt, mp2->phys);
  940. kfree(mp2);
  941. cnt++;
  942. }
  943. lpfc_sli_release_iocbq(phba, iocb);
  944. pring->missbufcnt = cnt;
  945. spin_unlock_irq(phba->host->host_lock);
  946. return cnt;
  947. }
  948. spin_unlock_irq(phba->host->host_lock);
  949. lpfc_sli_ringpostbuf_put(phba, pring, mp1);
  950. if (mp2) {
  951. lpfc_sli_ringpostbuf_put(phba, pring, mp2);
  952. }
  953. }
  954. pring->missbufcnt = 0;
  955. return 0;
  956. }
  957. /************************************************************************/
  958. /* */
  959. /* lpfc_post_rcv_buf */
  960. /* This routine post initial rcv buffers to the configured rings */
  961. /* */
  962. /************************************************************************/
  963. static int
  964. lpfc_post_rcv_buf(struct lpfc_hba * phba)
  965. {
  966. struct lpfc_sli *psli = &phba->sli;
  967. /* Ring 0, ELS / CT buffers */
  968. lpfc_post_buffer(phba, &psli->ring[LPFC_ELS_RING], LPFC_BUF_RING0, 1);
  969. /* Ring 2 - FCP no buffers needed */
  970. return 0;
  971. }
  972. #define S(N,V) (((V)<<(N))|((V)>>(32-(N))))
  973. /************************************************************************/
  974. /* */
  975. /* lpfc_sha_init */
  976. /* */
  977. /************************************************************************/
  978. static void
  979. lpfc_sha_init(uint32_t * HashResultPointer)
  980. {
  981. HashResultPointer[0] = 0x67452301;
  982. HashResultPointer[1] = 0xEFCDAB89;
  983. HashResultPointer[2] = 0x98BADCFE;
  984. HashResultPointer[3] = 0x10325476;
  985. HashResultPointer[4] = 0xC3D2E1F0;
  986. }
  987. /************************************************************************/
  988. /* */
  989. /* lpfc_sha_iterate */
  990. /* */
  991. /************************************************************************/
  992. static void
  993. lpfc_sha_iterate(uint32_t * HashResultPointer, uint32_t * HashWorkingPointer)
  994. {
  995. int t;
  996. uint32_t TEMP;
  997. uint32_t A, B, C, D, E;
  998. t = 16;
  999. do {
  1000. HashWorkingPointer[t] =
  1001. S(1,
  1002. HashWorkingPointer[t - 3] ^ HashWorkingPointer[t -
  1003. 8] ^
  1004. HashWorkingPointer[t - 14] ^ HashWorkingPointer[t - 16]);
  1005. } while (++t <= 79);
  1006. t = 0;
  1007. A = HashResultPointer[0];
  1008. B = HashResultPointer[1];
  1009. C = HashResultPointer[2];
  1010. D = HashResultPointer[3];
  1011. E = HashResultPointer[4];
  1012. do {
  1013. if (t < 20) {
  1014. TEMP = ((B & C) | ((~B) & D)) + 0x5A827999;
  1015. } else if (t < 40) {
  1016. TEMP = (B ^ C ^ D) + 0x6ED9EBA1;
  1017. } else if (t < 60) {
  1018. TEMP = ((B & C) | (B & D) | (C & D)) + 0x8F1BBCDC;
  1019. } else {
  1020. TEMP = (B ^ C ^ D) + 0xCA62C1D6;
  1021. }
  1022. TEMP += S(5, A) + E + HashWorkingPointer[t];
  1023. E = D;
  1024. D = C;
  1025. C = S(30, B);
  1026. B = A;
  1027. A = TEMP;
  1028. } while (++t <= 79);
  1029. HashResultPointer[0] += A;
  1030. HashResultPointer[1] += B;
  1031. HashResultPointer[2] += C;
  1032. HashResultPointer[3] += D;
  1033. HashResultPointer[4] += E;
  1034. }
  1035. /************************************************************************/
  1036. /* */
  1037. /* lpfc_challenge_key */
  1038. /* */
  1039. /************************************************************************/
  1040. static void
  1041. lpfc_challenge_key(uint32_t * RandomChallenge, uint32_t * HashWorking)
  1042. {
  1043. *HashWorking = (*RandomChallenge ^ *HashWorking);
  1044. }
  1045. /************************************************************************/
  1046. /* */
  1047. /* lpfc_hba_init */
  1048. /* */
  1049. /************************************************************************/
  1050. void
  1051. lpfc_hba_init(struct lpfc_hba *phba, uint32_t *hbainit)
  1052. {
  1053. int t;
  1054. uint32_t *HashWorking;
  1055. uint32_t *pwwnn = phba->wwnn;
  1056. HashWorking = kmalloc(80 * sizeof(uint32_t), GFP_KERNEL);
  1057. if (!HashWorking)
  1058. return;
  1059. memset(HashWorking, 0, (80 * sizeof(uint32_t)));
  1060. HashWorking[0] = HashWorking[78] = *pwwnn++;
  1061. HashWorking[1] = HashWorking[79] = *pwwnn;
  1062. for (t = 0; t < 7; t++)
  1063. lpfc_challenge_key(phba->RandomData + t, HashWorking + t);
  1064. lpfc_sha_init(hbainit);
  1065. lpfc_sha_iterate(hbainit, HashWorking);
  1066. kfree(HashWorking);
  1067. }
  1068. static void
  1069. lpfc_cleanup(struct lpfc_hba * phba)
  1070. {
  1071. struct lpfc_nodelist *ndlp, *next_ndlp;
  1072. /* clean up phba - lpfc specific */
  1073. lpfc_can_disctmo(phba);
  1074. list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_nlpunmap_list,
  1075. nlp_listp) {
  1076. lpfc_nlp_remove(phba, ndlp);
  1077. }
  1078. list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_nlpmap_list,
  1079. nlp_listp) {
  1080. lpfc_nlp_remove(phba, ndlp);
  1081. }
  1082. list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_unused_list,
  1083. nlp_listp) {
  1084. lpfc_nlp_list(phba, ndlp, NLP_NO_LIST);
  1085. }
  1086. list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_plogi_list,
  1087. nlp_listp) {
  1088. lpfc_nlp_remove(phba, ndlp);
  1089. }
  1090. list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_adisc_list,
  1091. nlp_listp) {
  1092. lpfc_nlp_remove(phba, ndlp);
  1093. }
  1094. list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_reglogin_list,
  1095. nlp_listp) {
  1096. lpfc_nlp_remove(phba, ndlp);
  1097. }
  1098. list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_prli_list,
  1099. nlp_listp) {
  1100. lpfc_nlp_remove(phba, ndlp);
  1101. }
  1102. list_for_each_entry_safe(ndlp, next_ndlp, &phba->fc_npr_list,
  1103. nlp_listp) {
  1104. lpfc_nlp_remove(phba, ndlp);
  1105. }
  1106. INIT_LIST_HEAD(&phba->fc_nlpmap_list);
  1107. INIT_LIST_HEAD(&phba->fc_nlpunmap_list);
  1108. INIT_LIST_HEAD(&phba->fc_unused_list);
  1109. INIT_LIST_HEAD(&phba->fc_plogi_list);
  1110. INIT_LIST_HEAD(&phba->fc_adisc_list);
  1111. INIT_LIST_HEAD(&phba->fc_reglogin_list);
  1112. INIT_LIST_HEAD(&phba->fc_prli_list);
  1113. INIT_LIST_HEAD(&phba->fc_npr_list);
  1114. phba->fc_map_cnt = 0;
  1115. phba->fc_unmap_cnt = 0;
  1116. phba->fc_plogi_cnt = 0;
  1117. phba->fc_adisc_cnt = 0;
  1118. phba->fc_reglogin_cnt = 0;
  1119. phba->fc_prli_cnt = 0;
  1120. phba->fc_npr_cnt = 0;
  1121. phba->fc_unused_cnt= 0;
  1122. return;
  1123. }
  1124. static void
  1125. lpfc_establish_link_tmo(unsigned long ptr)
  1126. {
  1127. struct lpfc_hba *phba = (struct lpfc_hba *)ptr;
  1128. unsigned long iflag;
  1129. /* Re-establishing Link, timer expired */
  1130. lpfc_printf_log(phba, KERN_ERR, LOG_LINK_EVENT,
  1131. "%d:1300 Re-establishing Link, timer expired "
  1132. "Data: x%x x%x\n",
  1133. phba->brd_no, phba->fc_flag, phba->hba_state);
  1134. spin_lock_irqsave(phba->host->host_lock, iflag);
  1135. phba->fc_flag &= ~FC_ESTABLISH_LINK;
  1136. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  1137. }
  1138. static int
  1139. lpfc_stop_timer(struct lpfc_hba * phba)
  1140. {
  1141. struct lpfc_sli *psli = &phba->sli;
  1142. del_timer_sync(&phba->fcp_poll_timer);
  1143. del_timer_sync(&phba->fc_estabtmo);
  1144. del_timer_sync(&phba->fc_disctmo);
  1145. del_timer_sync(&phba->fc_fdmitmo);
  1146. del_timer_sync(&phba->els_tmofunc);
  1147. psli = &phba->sli;
  1148. del_timer_sync(&psli->mbox_tmo);
  1149. return(1);
  1150. }
  1151. int
  1152. lpfc_online(struct lpfc_hba * phba)
  1153. {
  1154. if (!phba)
  1155. return 0;
  1156. if (!(phba->fc_flag & FC_OFFLINE_MODE))
  1157. return 0;
  1158. lpfc_printf_log(phba,
  1159. KERN_WARNING,
  1160. LOG_INIT,
  1161. "%d:0458 Bring Adapter online\n",
  1162. phba->brd_no);
  1163. lpfc_block_mgmt_io(phba);
  1164. if (!lpfc_sli_queue_setup(phba)) {
  1165. lpfc_unblock_mgmt_io(phba);
  1166. return 1;
  1167. }
  1168. if (lpfc_sli_hba_setup(phba)) { /* Initialize the HBA */
  1169. lpfc_unblock_mgmt_io(phba);
  1170. return 1;
  1171. }
  1172. spin_lock_irq(phba->host->host_lock);
  1173. phba->fc_flag &= ~FC_OFFLINE_MODE;
  1174. spin_unlock_irq(phba->host->host_lock);
  1175. lpfc_unblock_mgmt_io(phba);
  1176. return 0;
  1177. }
  1178. void
  1179. lpfc_block_mgmt_io(struct lpfc_hba * phba)
  1180. {
  1181. unsigned long iflag;
  1182. spin_lock_irqsave(phba->host->host_lock, iflag);
  1183. phba->fc_flag |= FC_BLOCK_MGMT_IO;
  1184. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  1185. }
  1186. void
  1187. lpfc_unblock_mgmt_io(struct lpfc_hba * phba)
  1188. {
  1189. unsigned long iflag;
  1190. spin_lock_irqsave(phba->host->host_lock, iflag);
  1191. phba->fc_flag &= ~FC_BLOCK_MGMT_IO;
  1192. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  1193. }
  1194. void
  1195. lpfc_offline_prep(struct lpfc_hba * phba)
  1196. {
  1197. struct lpfc_nodelist *ndlp, *next_ndlp;
  1198. struct list_head *listp, *node_list[7];
  1199. int i;
  1200. if (phba->fc_flag & FC_OFFLINE_MODE)
  1201. return;
  1202. lpfc_block_mgmt_io(phba);
  1203. lpfc_linkdown(phba);
  1204. /* Issue an unreg_login to all nodes */
  1205. node_list[0] = &phba->fc_npr_list; /* MUST do this list first */
  1206. node_list[1] = &phba->fc_nlpmap_list;
  1207. node_list[2] = &phba->fc_nlpunmap_list;
  1208. node_list[3] = &phba->fc_prli_list;
  1209. node_list[4] = &phba->fc_reglogin_list;
  1210. node_list[5] = &phba->fc_adisc_list;
  1211. node_list[6] = &phba->fc_plogi_list;
  1212. for (i = 0; i < 7; i++) {
  1213. listp = node_list[i];
  1214. if (list_empty(listp))
  1215. continue;
  1216. list_for_each_entry_safe(ndlp, next_ndlp, listp, nlp_listp)
  1217. lpfc_unreg_rpi(phba, ndlp);
  1218. }
  1219. lpfc_sli_flush_mbox_queue(phba);
  1220. }
  1221. void
  1222. lpfc_offline(struct lpfc_hba * phba)
  1223. {
  1224. unsigned long iflag;
  1225. if (phba->fc_flag & FC_OFFLINE_MODE)
  1226. return;
  1227. /* stop all timers associated with this hba */
  1228. lpfc_stop_timer(phba);
  1229. phba->work_hba_events = 0;
  1230. phba->work_ha = 0;
  1231. lpfc_printf_log(phba,
  1232. KERN_WARNING,
  1233. LOG_INIT,
  1234. "%d:0460 Bring Adapter offline\n",
  1235. phba->brd_no);
  1236. /* Bring down the SLI Layer and cleanup. The HBA is offline
  1237. now. */
  1238. lpfc_sli_hba_down(phba);
  1239. lpfc_cleanup(phba);
  1240. spin_lock_irqsave(phba->host->host_lock, iflag);
  1241. phba->fc_flag |= FC_OFFLINE_MODE;
  1242. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  1243. }
  1244. /******************************************************************************
  1245. * Function name: lpfc_scsi_free
  1246. *
  1247. * Description: Called from lpfc_pci_remove_one free internal driver resources
  1248. *
  1249. ******************************************************************************/
  1250. static int
  1251. lpfc_scsi_free(struct lpfc_hba * phba)
  1252. {
  1253. struct lpfc_scsi_buf *sb, *sb_next;
  1254. struct lpfc_iocbq *io, *io_next;
  1255. spin_lock_irq(phba->host->host_lock);
  1256. /* Release all the lpfc_scsi_bufs maintained by this host. */
  1257. list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list, list) {
  1258. list_del(&sb->list);
  1259. pci_pool_free(phba->lpfc_scsi_dma_buf_pool, sb->data,
  1260. sb->dma_handle);
  1261. kfree(sb);
  1262. phba->total_scsi_bufs--;
  1263. }
  1264. /* Release all the lpfc_iocbq entries maintained by this host. */
  1265. list_for_each_entry_safe(io, io_next, &phba->lpfc_iocb_list, list) {
  1266. list_del(&io->list);
  1267. kfree(io);
  1268. phba->total_iocbq_bufs--;
  1269. }
  1270. spin_unlock_irq(phba->host->host_lock);
  1271. return 0;
  1272. }
  1273. static int __devinit
  1274. lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid)
  1275. {
  1276. struct Scsi_Host *host;
  1277. struct lpfc_hba *phba;
  1278. struct lpfc_sli *psli;
  1279. struct lpfc_iocbq *iocbq_entry = NULL, *iocbq_next = NULL;
  1280. unsigned long bar0map_len, bar2map_len;
  1281. int error = -ENODEV, retval;
  1282. int i;
  1283. uint16_t iotag;
  1284. if (pci_enable_device(pdev))
  1285. goto out;
  1286. if (pci_request_regions(pdev, LPFC_DRIVER_NAME))
  1287. goto out_disable_device;
  1288. host = scsi_host_alloc(&lpfc_template, sizeof (struct lpfc_hba));
  1289. if (!host)
  1290. goto out_release_regions;
  1291. phba = (struct lpfc_hba*)host->hostdata;
  1292. memset(phba, 0, sizeof (struct lpfc_hba));
  1293. phba->host = host;
  1294. phba->fc_flag |= FC_LOADING;
  1295. phba->pcidev = pdev;
  1296. /* Assign an unused board number */
  1297. if (!idr_pre_get(&lpfc_hba_index, GFP_KERNEL))
  1298. goto out_put_host;
  1299. error = idr_get_new(&lpfc_hba_index, NULL, &phba->brd_no);
  1300. if (error)
  1301. goto out_put_host;
  1302. host->unique_id = phba->brd_no;
  1303. /* Initialize timers used by driver */
  1304. init_timer(&phba->fc_estabtmo);
  1305. phba->fc_estabtmo.function = lpfc_establish_link_tmo;
  1306. phba->fc_estabtmo.data = (unsigned long)phba;
  1307. init_timer(&phba->fc_disctmo);
  1308. phba->fc_disctmo.function = lpfc_disc_timeout;
  1309. phba->fc_disctmo.data = (unsigned long)phba;
  1310. init_timer(&phba->fc_fdmitmo);
  1311. phba->fc_fdmitmo.function = lpfc_fdmi_tmo;
  1312. phba->fc_fdmitmo.data = (unsigned long)phba;
  1313. init_timer(&phba->els_tmofunc);
  1314. phba->els_tmofunc.function = lpfc_els_timeout;
  1315. phba->els_tmofunc.data = (unsigned long)phba;
  1316. psli = &phba->sli;
  1317. init_timer(&psli->mbox_tmo);
  1318. psli->mbox_tmo.function = lpfc_mbox_timeout;
  1319. psli->mbox_tmo.data = (unsigned long)phba;
  1320. init_timer(&phba->fcp_poll_timer);
  1321. phba->fcp_poll_timer.function = lpfc_poll_timeout;
  1322. phba->fcp_poll_timer.data = (unsigned long)phba;
  1323. /*
  1324. * Get all the module params for configuring this host and then
  1325. * establish the host parameters.
  1326. */
  1327. lpfc_get_cfgparam(phba);
  1328. host->max_id = LPFC_MAX_TARGET;
  1329. host->max_lun = phba->cfg_max_luns;
  1330. host->this_id = -1;
  1331. /* Initialize all internally managed lists. */
  1332. INIT_LIST_HEAD(&phba->fc_nlpmap_list);
  1333. INIT_LIST_HEAD(&phba->fc_nlpunmap_list);
  1334. INIT_LIST_HEAD(&phba->fc_unused_list);
  1335. INIT_LIST_HEAD(&phba->fc_plogi_list);
  1336. INIT_LIST_HEAD(&phba->fc_adisc_list);
  1337. INIT_LIST_HEAD(&phba->fc_reglogin_list);
  1338. INIT_LIST_HEAD(&phba->fc_prli_list);
  1339. INIT_LIST_HEAD(&phba->fc_npr_list);
  1340. pci_set_master(pdev);
  1341. retval = pci_set_mwi(pdev);
  1342. if (retval)
  1343. dev_printk(KERN_WARNING, &pdev->dev,
  1344. "Warning: pci_set_mwi returned %d\n", retval);
  1345. if (pci_set_dma_mask(phba->pcidev, DMA_64BIT_MASK) != 0)
  1346. if (pci_set_dma_mask(phba->pcidev, DMA_32BIT_MASK) != 0)
  1347. goto out_idr_remove;
  1348. /*
  1349. * Get the bus address of Bar0 and Bar2 and the number of bytes
  1350. * required by each mapping.
  1351. */
  1352. phba->pci_bar0_map = pci_resource_start(phba->pcidev, 0);
  1353. bar0map_len = pci_resource_len(phba->pcidev, 0);
  1354. phba->pci_bar2_map = pci_resource_start(phba->pcidev, 2);
  1355. bar2map_len = pci_resource_len(phba->pcidev, 2);
  1356. /* Map HBA SLIM to a kernel virtual address. */
  1357. phba->slim_memmap_p = ioremap(phba->pci_bar0_map, bar0map_len);
  1358. if (!phba->slim_memmap_p) {
  1359. error = -ENODEV;
  1360. dev_printk(KERN_ERR, &pdev->dev,
  1361. "ioremap failed for SLIM memory.\n");
  1362. goto out_idr_remove;
  1363. }
  1364. /* Map HBA Control Registers to a kernel virtual address. */
  1365. phba->ctrl_regs_memmap_p = ioremap(phba->pci_bar2_map, bar2map_len);
  1366. if (!phba->ctrl_regs_memmap_p) {
  1367. error = -ENODEV;
  1368. dev_printk(KERN_ERR, &pdev->dev,
  1369. "ioremap failed for HBA control registers.\n");
  1370. goto out_iounmap_slim;
  1371. }
  1372. /* Allocate memory for SLI-2 structures */
  1373. phba->slim2p = dma_alloc_coherent(&phba->pcidev->dev, SLI2_SLIM_SIZE,
  1374. &phba->slim2p_mapping, GFP_KERNEL);
  1375. if (!phba->slim2p)
  1376. goto out_iounmap;
  1377. memset(phba->slim2p, 0, SLI2_SLIM_SIZE);
  1378. /* Initialize the SLI Layer to run with lpfc HBAs. */
  1379. lpfc_sli_setup(phba);
  1380. lpfc_sli_queue_setup(phba);
  1381. error = lpfc_mem_alloc(phba);
  1382. if (error)
  1383. goto out_free_slim;
  1384. /* Initialize and populate the iocb list per host. */
  1385. INIT_LIST_HEAD(&phba->lpfc_iocb_list);
  1386. for (i = 0; i < LPFC_IOCB_LIST_CNT; i++) {
  1387. iocbq_entry = kmalloc(sizeof(struct lpfc_iocbq), GFP_KERNEL);
  1388. if (iocbq_entry == NULL) {
  1389. printk(KERN_ERR "%s: only allocated %d iocbs of "
  1390. "expected %d count. Unloading driver.\n",
  1391. __FUNCTION__, i, LPFC_IOCB_LIST_CNT);
  1392. error = -ENOMEM;
  1393. goto out_free_iocbq;
  1394. }
  1395. memset(iocbq_entry, 0, sizeof(struct lpfc_iocbq));
  1396. iotag = lpfc_sli_next_iotag(phba, iocbq_entry);
  1397. if (iotag == 0) {
  1398. kfree (iocbq_entry);
  1399. printk(KERN_ERR "%s: failed to allocate IOTAG. "
  1400. "Unloading driver.\n",
  1401. __FUNCTION__);
  1402. error = -ENOMEM;
  1403. goto out_free_iocbq;
  1404. }
  1405. spin_lock_irq(phba->host->host_lock);
  1406. list_add(&iocbq_entry->list, &phba->lpfc_iocb_list);
  1407. phba->total_iocbq_bufs++;
  1408. spin_unlock_irq(phba->host->host_lock);
  1409. }
  1410. /* Initialize HBA structure */
  1411. phba->fc_edtov = FF_DEF_EDTOV;
  1412. phba->fc_ratov = FF_DEF_RATOV;
  1413. phba->fc_altov = FF_DEF_ALTOV;
  1414. phba->fc_arbtov = FF_DEF_ARBTOV;
  1415. INIT_LIST_HEAD(&phba->work_list);
  1416. phba->work_ha_mask = (HA_ERATT|HA_MBATT|HA_LATT);
  1417. phba->work_ha_mask |= (HA_RXMASK << (LPFC_ELS_RING * 4));
  1418. /* Startup the kernel thread for this host adapter. */
  1419. phba->worker_thread = kthread_run(lpfc_do_work, phba,
  1420. "lpfc_worker_%d", phba->brd_no);
  1421. if (IS_ERR(phba->worker_thread)) {
  1422. error = PTR_ERR(phba->worker_thread);
  1423. goto out_free_iocbq;
  1424. }
  1425. /*
  1426. * Set initial can_queue value since 0 is no longer supported and
  1427. * scsi_add_host will fail. This will be adjusted later based on the
  1428. * max xri value determined in hba setup.
  1429. */
  1430. host->can_queue = phba->cfg_hba_queue_depth - 10;
  1431. /* Tell the midlayer we support 16 byte commands */
  1432. host->max_cmd_len = 16;
  1433. /* Initialize the list of scsi buffers used by driver for scsi IO. */
  1434. spin_lock_init(&phba->scsi_buf_list_lock);
  1435. INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list);
  1436. host->transportt = lpfc_transport_template;
  1437. pci_set_drvdata(pdev, host);
  1438. error = scsi_add_host(host, &pdev->dev);
  1439. if (error)
  1440. goto out_kthread_stop;
  1441. error = lpfc_alloc_sysfs_attr(phba);
  1442. if (error)
  1443. goto out_remove_host;
  1444. if (phba->cfg_use_msi) {
  1445. error = pci_enable_msi(phba->pcidev);
  1446. if (error)
  1447. lpfc_printf_log(phba, KERN_INFO, LOG_INIT, "%d:0452 "
  1448. "Enable MSI failed, continuing with "
  1449. "IRQ\n", phba->brd_no);
  1450. }
  1451. error = request_irq(phba->pcidev->irq, lpfc_intr_handler, IRQF_SHARED,
  1452. LPFC_DRIVER_NAME, phba);
  1453. if (error) {
  1454. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  1455. "%d:0451 Enable interrupt handler failed\n",
  1456. phba->brd_no);
  1457. goto out_free_sysfs_attr;
  1458. }
  1459. phba->MBslimaddr = phba->slim_memmap_p;
  1460. phba->HAregaddr = phba->ctrl_regs_memmap_p + HA_REG_OFFSET;
  1461. phba->CAregaddr = phba->ctrl_regs_memmap_p + CA_REG_OFFSET;
  1462. phba->HSregaddr = phba->ctrl_regs_memmap_p + HS_REG_OFFSET;
  1463. phba->HCregaddr = phba->ctrl_regs_memmap_p + HC_REG_OFFSET;
  1464. error = lpfc_sli_hba_setup(phba);
  1465. if (error) {
  1466. error = -ENODEV;
  1467. goto out_free_irq;
  1468. }
  1469. /*
  1470. * hba setup may have changed the hba_queue_depth so we need to adjust
  1471. * the value of can_queue.
  1472. */
  1473. host->can_queue = phba->cfg_hba_queue_depth - 10;
  1474. lpfc_discovery_wait(phba);
  1475. if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
  1476. spin_lock_irq(phba->host->host_lock);
  1477. lpfc_poll_start_timer(phba);
  1478. spin_unlock_irq(phba->host->host_lock);
  1479. }
  1480. /*
  1481. * set fixed host attributes
  1482. * Must done after lpfc_sli_hba_setup()
  1483. */
  1484. fc_host_node_name(host) = wwn_to_u64(phba->fc_nodename.u.wwn);
  1485. fc_host_port_name(host) = wwn_to_u64(phba->fc_portname.u.wwn);
  1486. fc_host_supported_classes(host) = FC_COS_CLASS3;
  1487. memset(fc_host_supported_fc4s(host), 0,
  1488. sizeof(fc_host_supported_fc4s(host)));
  1489. fc_host_supported_fc4s(host)[2] = 1;
  1490. fc_host_supported_fc4s(host)[7] = 1;
  1491. lpfc_get_hba_sym_node_name(phba, fc_host_symbolic_name(host));
  1492. fc_host_supported_speeds(host) = 0;
  1493. if (phba->lmt & LMT_10Gb)
  1494. fc_host_supported_speeds(host) |= FC_PORTSPEED_10GBIT;
  1495. if (phba->lmt & LMT_4Gb)
  1496. fc_host_supported_speeds(host) |= FC_PORTSPEED_4GBIT;
  1497. if (phba->lmt & LMT_2Gb)
  1498. fc_host_supported_speeds(host) |= FC_PORTSPEED_2GBIT;
  1499. if (phba->lmt & LMT_1Gb)
  1500. fc_host_supported_speeds(host) |= FC_PORTSPEED_1GBIT;
  1501. fc_host_maxframe_size(host) =
  1502. ((((uint32_t) phba->fc_sparam.cmn.bbRcvSizeMsb & 0x0F) << 8) |
  1503. (uint32_t) phba->fc_sparam.cmn.bbRcvSizeLsb);
  1504. /* This value is also unchanging */
  1505. memset(fc_host_active_fc4s(host), 0,
  1506. sizeof(fc_host_active_fc4s(host)));
  1507. fc_host_active_fc4s(host)[2] = 1;
  1508. fc_host_active_fc4s(host)[7] = 1;
  1509. spin_lock_irq(phba->host->host_lock);
  1510. phba->fc_flag &= ~FC_LOADING;
  1511. spin_unlock_irq(phba->host->host_lock);
  1512. return 0;
  1513. out_free_irq:
  1514. lpfc_stop_timer(phba);
  1515. phba->work_hba_events = 0;
  1516. free_irq(phba->pcidev->irq, phba);
  1517. pci_disable_msi(phba->pcidev);
  1518. out_free_sysfs_attr:
  1519. lpfc_free_sysfs_attr(phba);
  1520. out_remove_host:
  1521. fc_remove_host(phba->host);
  1522. scsi_remove_host(phba->host);
  1523. out_kthread_stop:
  1524. kthread_stop(phba->worker_thread);
  1525. out_free_iocbq:
  1526. list_for_each_entry_safe(iocbq_entry, iocbq_next,
  1527. &phba->lpfc_iocb_list, list) {
  1528. spin_lock_irq(phba->host->host_lock);
  1529. kfree(iocbq_entry);
  1530. phba->total_iocbq_bufs--;
  1531. spin_unlock_irq(phba->host->host_lock);
  1532. }
  1533. lpfc_mem_free(phba);
  1534. out_free_slim:
  1535. dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE, phba->slim2p,
  1536. phba->slim2p_mapping);
  1537. out_iounmap:
  1538. iounmap(phba->ctrl_regs_memmap_p);
  1539. out_iounmap_slim:
  1540. iounmap(phba->slim_memmap_p);
  1541. out_idr_remove:
  1542. idr_remove(&lpfc_hba_index, phba->brd_no);
  1543. out_put_host:
  1544. phba->host = NULL;
  1545. scsi_host_put(host);
  1546. out_release_regions:
  1547. pci_release_regions(pdev);
  1548. out_disable_device:
  1549. pci_disable_device(pdev);
  1550. out:
  1551. pci_set_drvdata(pdev, NULL);
  1552. return error;
  1553. }
  1554. static void __devexit
  1555. lpfc_pci_remove_one(struct pci_dev *pdev)
  1556. {
  1557. struct Scsi_Host *host = pci_get_drvdata(pdev);
  1558. struct lpfc_hba *phba = (struct lpfc_hba *)host->hostdata;
  1559. unsigned long iflag;
  1560. lpfc_free_sysfs_attr(phba);
  1561. spin_lock_irqsave(phba->host->host_lock, iflag);
  1562. phba->fc_flag |= FC_UNLOADING;
  1563. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  1564. fc_remove_host(phba->host);
  1565. scsi_remove_host(phba->host);
  1566. kthread_stop(phba->worker_thread);
  1567. /*
  1568. * Bring down the SLI Layer. This step disable all interrupts,
  1569. * clears the rings, discards all mailbox commands, and resets
  1570. * the HBA.
  1571. */
  1572. lpfc_sli_hba_down(phba);
  1573. lpfc_sli_brdrestart(phba);
  1574. /* Release the irq reservation */
  1575. free_irq(phba->pcidev->irq, phba);
  1576. pci_disable_msi(phba->pcidev);
  1577. lpfc_cleanup(phba);
  1578. lpfc_stop_timer(phba);
  1579. phba->work_hba_events = 0;
  1580. /*
  1581. * Call scsi_free before mem_free since scsi bufs are released to their
  1582. * corresponding pools here.
  1583. */
  1584. lpfc_scsi_free(phba);
  1585. lpfc_mem_free(phba);
  1586. /* Free resources associated with SLI2 interface */
  1587. dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
  1588. phba->slim2p, phba->slim2p_mapping);
  1589. /* unmap adapter SLIM and Control Registers */
  1590. iounmap(phba->ctrl_regs_memmap_p);
  1591. iounmap(phba->slim_memmap_p);
  1592. pci_release_regions(phba->pcidev);
  1593. pci_disable_device(phba->pcidev);
  1594. idr_remove(&lpfc_hba_index, phba->brd_no);
  1595. scsi_host_put(phba->host);
  1596. pci_set_drvdata(pdev, NULL);
  1597. }
  1598. /**
  1599. * lpfc_io_error_detected - called when PCI error is detected
  1600. * @pdev: Pointer to PCI device
  1601. * @state: The current pci conneection state
  1602. *
  1603. * This function is called after a PCI bus error affecting
  1604. * this device has been detected.
  1605. */
  1606. static pci_ers_result_t lpfc_io_error_detected(struct pci_dev *pdev,
  1607. pci_channel_state_t state)
  1608. {
  1609. struct Scsi_Host *host = pci_get_drvdata(pdev);
  1610. struct lpfc_hba *phba = (struct lpfc_hba *)host->hostdata;
  1611. struct lpfc_sli *psli = &phba->sli;
  1612. struct lpfc_sli_ring *pring;
  1613. if (state == pci_channel_io_perm_failure)
  1614. return PCI_ERS_RESULT_DISCONNECT;
  1615. pci_disable_device(pdev);
  1616. /*
  1617. * There may be I/Os dropped by the firmware.
  1618. * Error iocb (I/O) on txcmplq and let the SCSI layer
  1619. * retry it after re-establishing link.
  1620. */
  1621. pring = &psli->ring[psli->fcp_ring];
  1622. lpfc_sli_abort_iocb_ring(phba, pring);
  1623. /* Request a slot reset. */
  1624. return PCI_ERS_RESULT_NEED_RESET;
  1625. }
  1626. /**
  1627. * lpfc_io_slot_reset - called after the pci bus has been reset.
  1628. * @pdev: Pointer to PCI device
  1629. *
  1630. * Restart the card from scratch, as if from a cold-boot.
  1631. */
  1632. static pci_ers_result_t lpfc_io_slot_reset(struct pci_dev *pdev)
  1633. {
  1634. struct Scsi_Host *host = pci_get_drvdata(pdev);
  1635. struct lpfc_hba *phba = (struct lpfc_hba *)host->hostdata;
  1636. struct lpfc_sli *psli = &phba->sli;
  1637. int bars = pci_select_bars(pdev, IORESOURCE_MEM);
  1638. dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n");
  1639. if (pci_enable_device_bars(pdev, bars)) {
  1640. printk(KERN_ERR "lpfc: Cannot re-enable "
  1641. "PCI device after reset.\n");
  1642. return PCI_ERS_RESULT_DISCONNECT;
  1643. }
  1644. pci_set_master(pdev);
  1645. /* Re-establishing Link */
  1646. spin_lock_irq(phba->host->host_lock);
  1647. phba->fc_flag |= FC_ESTABLISH_LINK;
  1648. psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
  1649. spin_unlock_irq(phba->host->host_lock);
  1650. /* Take device offline; this will perform cleanup */
  1651. lpfc_offline(phba);
  1652. lpfc_sli_brdrestart(phba);
  1653. return PCI_ERS_RESULT_RECOVERED;
  1654. }
  1655. /**
  1656. * lpfc_io_resume - called when traffic can start flowing again.
  1657. * @pdev: Pointer to PCI device
  1658. *
  1659. * This callback is called when the error recovery driver tells us that
  1660. * its OK to resume normal operation.
  1661. */
  1662. static void lpfc_io_resume(struct pci_dev *pdev)
  1663. {
  1664. struct Scsi_Host *host = pci_get_drvdata(pdev);
  1665. struct lpfc_hba *phba = (struct lpfc_hba *)host->hostdata;
  1666. if (lpfc_online(phba) == 0) {
  1667. mod_timer(&phba->fc_estabtmo, jiffies + HZ * 60);
  1668. }
  1669. }
  1670. static struct pci_device_id lpfc_id_table[] = {
  1671. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_VIPER,
  1672. PCI_ANY_ID, PCI_ANY_ID, },
  1673. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_FIREFLY,
  1674. PCI_ANY_ID, PCI_ANY_ID, },
  1675. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_THOR,
  1676. PCI_ANY_ID, PCI_ANY_ID, },
  1677. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_PEGASUS,
  1678. PCI_ANY_ID, PCI_ANY_ID, },
  1679. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_CENTAUR,
  1680. PCI_ANY_ID, PCI_ANY_ID, },
  1681. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_DRAGONFLY,
  1682. PCI_ANY_ID, PCI_ANY_ID, },
  1683. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_SUPERFLY,
  1684. PCI_ANY_ID, PCI_ANY_ID, },
  1685. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_RFLY,
  1686. PCI_ANY_ID, PCI_ANY_ID, },
  1687. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_PFLY,
  1688. PCI_ANY_ID, PCI_ANY_ID, },
  1689. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_NEPTUNE,
  1690. PCI_ANY_ID, PCI_ANY_ID, },
  1691. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_NEPTUNE_SCSP,
  1692. PCI_ANY_ID, PCI_ANY_ID, },
  1693. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_NEPTUNE_DCSP,
  1694. PCI_ANY_ID, PCI_ANY_ID, },
  1695. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_HELIOS,
  1696. PCI_ANY_ID, PCI_ANY_ID, },
  1697. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_HELIOS_SCSP,
  1698. PCI_ANY_ID, PCI_ANY_ID, },
  1699. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_HELIOS_DCSP,
  1700. PCI_ANY_ID, PCI_ANY_ID, },
  1701. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_BMID,
  1702. PCI_ANY_ID, PCI_ANY_ID, },
  1703. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_BSMB,
  1704. PCI_ANY_ID, PCI_ANY_ID, },
  1705. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZEPHYR,
  1706. PCI_ANY_ID, PCI_ANY_ID, },
  1707. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZEPHYR_SCSP,
  1708. PCI_ANY_ID, PCI_ANY_ID, },
  1709. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZEPHYR_DCSP,
  1710. PCI_ANY_ID, PCI_ANY_ID, },
  1711. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZMID,
  1712. PCI_ANY_ID, PCI_ANY_ID, },
  1713. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_ZSMB,
  1714. PCI_ANY_ID, PCI_ANY_ID, },
  1715. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_TFLY,
  1716. PCI_ANY_ID, PCI_ANY_ID, },
  1717. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LP101,
  1718. PCI_ANY_ID, PCI_ANY_ID, },
  1719. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LP10000S,
  1720. PCI_ANY_ID, PCI_ANY_ID, },
  1721. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LP11000S,
  1722. PCI_ANY_ID, PCI_ANY_ID, },
  1723. {PCI_VENDOR_ID_EMULEX, PCI_DEVICE_ID_LPE11000S,
  1724. PCI_ANY_ID, PCI_ANY_ID, },
  1725. { 0 }
  1726. };
  1727. MODULE_DEVICE_TABLE(pci, lpfc_id_table);
  1728. static struct pci_error_handlers lpfc_err_handler = {
  1729. .error_detected = lpfc_io_error_detected,
  1730. .slot_reset = lpfc_io_slot_reset,
  1731. .resume = lpfc_io_resume,
  1732. };
  1733. static struct pci_driver lpfc_driver = {
  1734. .name = LPFC_DRIVER_NAME,
  1735. .id_table = lpfc_id_table,
  1736. .probe = lpfc_pci_probe_one,
  1737. .remove = __devexit_p(lpfc_pci_remove_one),
  1738. .err_handler = &lpfc_err_handler,
  1739. };
  1740. static int __init
  1741. lpfc_init(void)
  1742. {
  1743. int error = 0;
  1744. printk(LPFC_MODULE_DESC "\n");
  1745. printk(LPFC_COPYRIGHT "\n");
  1746. lpfc_transport_template =
  1747. fc_attach_transport(&lpfc_transport_functions);
  1748. if (!lpfc_transport_template)
  1749. return -ENOMEM;
  1750. error = pci_register_driver(&lpfc_driver);
  1751. if (error)
  1752. fc_release_transport(lpfc_transport_template);
  1753. return error;
  1754. }
  1755. static void __exit
  1756. lpfc_exit(void)
  1757. {
  1758. pci_unregister_driver(&lpfc_driver);
  1759. fc_release_transport(lpfc_transport_template);
  1760. }
  1761. module_init(lpfc_init);
  1762. module_exit(lpfc_exit);
  1763. MODULE_LICENSE("GPL");
  1764. MODULE_DESCRIPTION(LPFC_MODULE_DESC);
  1765. MODULE_AUTHOR("Emulex Corporation - tech.support@emulex.com");
  1766. MODULE_VERSION("0:" LPFC_DRIVER_VERSION);