Kconfig 9.5 KB

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  1. menu "Platform support"
  2. source "arch/powerpc/platforms/powernv/Kconfig"
  3. source "arch/powerpc/platforms/pseries/Kconfig"
  4. source "arch/powerpc/platforms/iseries/Kconfig"
  5. source "arch/powerpc/platforms/chrp/Kconfig"
  6. source "arch/powerpc/platforms/512x/Kconfig"
  7. source "arch/powerpc/platforms/52xx/Kconfig"
  8. source "arch/powerpc/platforms/powermac/Kconfig"
  9. source "arch/powerpc/platforms/prep/Kconfig"
  10. source "arch/powerpc/platforms/maple/Kconfig"
  11. source "arch/powerpc/platforms/pasemi/Kconfig"
  12. source "arch/powerpc/platforms/ps3/Kconfig"
  13. source "arch/powerpc/platforms/cell/Kconfig"
  14. source "arch/powerpc/platforms/8xx/Kconfig"
  15. source "arch/powerpc/platforms/82xx/Kconfig"
  16. source "arch/powerpc/platforms/83xx/Kconfig"
  17. source "arch/powerpc/platforms/85xx/Kconfig"
  18. source "arch/powerpc/platforms/86xx/Kconfig"
  19. source "arch/powerpc/platforms/embedded6xx/Kconfig"
  20. source "arch/powerpc/platforms/44x/Kconfig"
  21. source "arch/powerpc/platforms/40x/Kconfig"
  22. source "arch/powerpc/platforms/amigaone/Kconfig"
  23. source "arch/powerpc/platforms/wsp/Kconfig"
  24. config KVM_GUEST
  25. bool "KVM Guest support"
  26. default n
  27. ---help---
  28. This option enables various optimizations for running under the KVM
  29. hypervisor. Overhead for the kernel when not running inside KVM should
  30. be minimal.
  31. In case of doubt, say Y
  32. config PPC_NATIVE
  33. bool
  34. depends on 6xx || PPC64
  35. help
  36. Support for running natively on the hardware, i.e. without
  37. a hypervisor. This option is not user-selectable but should
  38. be selected by all platforms that need it.
  39. config PPC_OF_BOOT_TRAMPOLINE
  40. bool "Support booting from Open Firmware or yaboot"
  41. depends on 6xx || PPC64
  42. default y
  43. help
  44. Support from booting from Open Firmware or yaboot using an
  45. Open Firmware client interface. This enables the kernel to
  46. communicate with open firmware to retrieve system information
  47. such as the device tree.
  48. In case of doubt, say Y
  49. config UDBG_RTAS_CONSOLE
  50. bool "RTAS based debug console"
  51. depends on PPC_RTAS
  52. default n
  53. config PPC_SMP_MUXED_IPI
  54. bool
  55. help
  56. Select this opton if your platform supports SMP and your
  57. interrupt controller provides less than 4 interrupts to each
  58. cpu. This will enable the generic code to multiplex the 4
  59. messages on to one ipi.
  60. config PPC_UDBG_BEAT
  61. bool "BEAT based debug console"
  62. depends on PPC_CELLEB
  63. default n
  64. config IPIC
  65. bool
  66. default n
  67. config MPIC
  68. bool
  69. default n
  70. config PPC_EPAPR_HV_PIC
  71. bool
  72. default n
  73. config MPIC_WEIRD
  74. bool
  75. default n
  76. config PPC_I8259
  77. bool
  78. default n
  79. config U3_DART
  80. bool
  81. depends on PPC64
  82. default n
  83. config PPC_RTAS
  84. bool
  85. default n
  86. config RTAS_ERROR_LOGGING
  87. bool
  88. depends on PPC_RTAS
  89. default n
  90. config PPC_RTAS_DAEMON
  91. bool
  92. depends on PPC_RTAS
  93. default n
  94. config RTAS_PROC
  95. bool "Proc interface to RTAS"
  96. depends on PPC_RTAS
  97. default y
  98. config RTAS_FLASH
  99. tristate "Firmware flash interface"
  100. depends on PPC64 && RTAS_PROC
  101. config MMIO_NVRAM
  102. bool
  103. default n
  104. config MPIC_U3_HT_IRQS
  105. bool
  106. default n
  107. config MPIC_BROKEN_REGREAD
  108. bool
  109. depends on MPIC
  110. help
  111. This option enables a MPIC driver workaround for some chips
  112. that have a bug that causes some interrupt source information
  113. to not read back properly. It is safe to use on other chips as
  114. well, but enabling it uses about 8KB of memory to keep copies
  115. of the register contents in software.
  116. config IBMVIO
  117. depends on PPC_PSERIES || PPC_ISERIES
  118. bool
  119. default y
  120. config IBMEBUS
  121. depends on PPC_PSERIES
  122. bool "Support for GX bus based adapters"
  123. help
  124. Bus device driver for GX bus based adapters.
  125. config PPC_MPC106
  126. bool
  127. default n
  128. config PPC_970_NAP
  129. bool
  130. default n
  131. config PPC_P7_NAP
  132. bool
  133. default n
  134. config PPC_INDIRECT_IO
  135. bool
  136. select GENERIC_IOMAP
  137. config PPC_INDIRECT_PIO
  138. bool
  139. select PPC_INDIRECT_IO
  140. config PPC_INDIRECT_MMIO
  141. bool
  142. select PPC_INDIRECT_IO
  143. config PPC_IO_WORKAROUNDS
  144. bool
  145. source "drivers/cpufreq/Kconfig"
  146. menu "CPU Frequency drivers"
  147. depends on CPU_FREQ
  148. config CPU_FREQ_PMAC
  149. bool "Support for Apple PowerBooks"
  150. depends on ADB_PMU && PPC32
  151. select CPU_FREQ_TABLE
  152. help
  153. This adds support for frequency switching on Apple PowerBooks,
  154. this currently includes some models of iBook & Titanium
  155. PowerBook.
  156. config CPU_FREQ_PMAC64
  157. bool "Support for some Apple G5s"
  158. depends on PPC_PMAC && PPC64
  159. select CPU_FREQ_TABLE
  160. help
  161. This adds support for frequency switching on Apple iMac G5,
  162. and some of the more recent desktop G5 machines as well.
  163. config PPC_PASEMI_CPUFREQ
  164. bool "Support for PA Semi PWRficient"
  165. depends on PPC_PASEMI
  166. default y
  167. select CPU_FREQ_TABLE
  168. help
  169. This adds the support for frequency switching on PA Semi
  170. PWRficient processors.
  171. endmenu
  172. config PPC601_SYNC_FIX
  173. bool "Workarounds for PPC601 bugs"
  174. depends on 6xx && (PPC_PREP || PPC_PMAC)
  175. help
  176. Some versions of the PPC601 (the first PowerPC chip) have bugs which
  177. mean that extra synchronization instructions are required near
  178. certain instructions, typically those that make major changes to the
  179. CPU state. These extra instructions reduce performance slightly.
  180. If you say N here, these extra instructions will not be included,
  181. resulting in a kernel which will run faster but may not run at all
  182. on some systems with the PPC601 chip.
  183. If in doubt, say Y here.
  184. config TAU
  185. bool "On-chip CPU temperature sensor support"
  186. depends on 6xx
  187. help
  188. G3 and G4 processors have an on-chip temperature sensor called the
  189. 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die
  190. temperature within 2-4 degrees Celsius. This option shows the current
  191. on-die temperature in /proc/cpuinfo if the cpu supports it.
  192. Unfortunately, on some chip revisions, this sensor is very inaccurate
  193. and in many cases, does not work at all, so don't assume the cpu
  194. temp is actually what /proc/cpuinfo says it is.
  195. config TAU_INT
  196. bool "Interrupt driven TAU driver (DANGEROUS)"
  197. depends on TAU
  198. ---help---
  199. The TAU supports an interrupt driven mode which causes an interrupt
  200. whenever the temperature goes out of range. This is the fastest way
  201. to get notified the temp has exceeded a range. With this option off,
  202. a timer is used to re-check the temperature periodically.
  203. However, on some cpus it appears that the TAU interrupt hardware
  204. is buggy and can cause a situation which would lead unexplained hard
  205. lockups.
  206. Unless you are extending the TAU driver, or enjoy kernel/hardware
  207. debugging, leave this option off.
  208. config TAU_AVERAGE
  209. bool "Average high and low temp"
  210. depends on TAU
  211. ---help---
  212. The TAU hardware can compare the temperature to an upper and lower
  213. bound. The default behavior is to show both the upper and lower
  214. bound in /proc/cpuinfo. If the range is large, the temperature is
  215. either changing a lot, or the TAU hardware is broken (likely on some
  216. G4's). If the range is small (around 4 degrees), the temperature is
  217. relatively stable. If you say Y here, a single temperature value,
  218. halfway between the upper and lower bounds, will be reported in
  219. /proc/cpuinfo.
  220. If in doubt, say N here.
  221. config QUICC_ENGINE
  222. bool "Freescale QUICC Engine (QE) Support"
  223. depends on FSL_SOC && PPC32
  224. select PPC_LIB_RHEAP
  225. select CRC32
  226. help
  227. The QUICC Engine (QE) is a new generation of communications
  228. coprocessors on Freescale embedded CPUs (akin to CPM in older chips).
  229. Selecting this option means that you wish to build a kernel
  230. for a machine with a QE coprocessor.
  231. config QE_GPIO
  232. bool "QE GPIO support"
  233. depends on QUICC_ENGINE
  234. select GENERIC_GPIO
  235. select ARCH_REQUIRE_GPIOLIB
  236. help
  237. Say Y here if you're going to use hardware that connects to the
  238. QE GPIOs.
  239. config CPM2
  240. bool "Enable support for the CPM2 (Communications Processor Module)"
  241. depends on (FSL_SOC_BOOKE && PPC32) || 8260
  242. select CPM
  243. select PPC_LIB_RHEAP
  244. select PPC_PCI_CHOICE
  245. select ARCH_REQUIRE_GPIOLIB
  246. select GENERIC_GPIO
  247. help
  248. The CPM2 (Communications Processor Module) is a coprocessor on
  249. embedded CPUs made by Freescale. Selecting this option means that
  250. you wish to build a kernel for a machine with a CPM2 coprocessor
  251. on it (826x, 827x, 8560).
  252. config AXON_RAM
  253. tristate "Axon DDR2 memory device driver"
  254. depends on PPC_IBM_CELL_BLADE && BLOCK
  255. default m
  256. help
  257. It registers one block device per Axon's DDR2 memory bank found
  258. on a system. Block devices are called axonram?, their major and
  259. minor numbers are available in /proc/devices, /proc/partitions or
  260. in /sys/block/axonram?/dev.
  261. config FSL_ULI1575
  262. bool
  263. default n
  264. select GENERIC_ISA_DMA
  265. help
  266. Supports for the ULI1575 PCIe south bridge that exists on some
  267. Freescale reference boards. The boards all use the ULI in pretty
  268. much the same way.
  269. config CPM
  270. bool
  271. select PPC_CLOCK
  272. config OF_RTC
  273. bool
  274. help
  275. Uses information from the OF or flattened device tree to instantiate
  276. platform devices for direct mapped RTC chips like the DS1742 or DS1743.
  277. source "arch/powerpc/sysdev/bestcomm/Kconfig"
  278. config SIMPLE_GPIO
  279. bool "Support for simple, memory-mapped GPIO controllers"
  280. depends on PPC
  281. select GENERIC_GPIO
  282. select ARCH_REQUIRE_GPIOLIB
  283. help
  284. Say Y here to support simple, memory-mapped GPIO controllers.
  285. These are usually BCSRs used to control board's switches, LEDs,
  286. chip-selects, Ethernet/USB PHY's power and various other small
  287. on-board peripherals.
  288. config MCU_MPC8349EMITX
  289. bool "MPC8349E-mITX MCU driver"
  290. depends on I2C=y && PPC_83xx
  291. select GENERIC_GPIO
  292. select ARCH_REQUIRE_GPIOLIB
  293. help
  294. Say Y here to enable soft power-off functionality on the Freescale
  295. boards with the MPC8349E-mITX-compatible MCU chips. This driver will
  296. also register MCU GPIOs with the generic GPIO API, so you'll able
  297. to use MCU pins as GPIOs.
  298. config XILINX_PCI
  299. bool "Xilinx PCI host bridge support"
  300. depends on PCI && XILINX_VIRTEX
  301. endmenu