hpsa.c 123 KB

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  1. /*
  2. * Disk Array driver for HP Smart Array SAS controllers
  3. * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  12. * NON INFRINGEMENT. See the GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. *
  18. * Questions/Comments/Bugfixes to iss_storagedev@hp.com
  19. *
  20. */
  21. #include <linux/module.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/types.h>
  24. #include <linux/pci.h>
  25. #include <linux/kernel.h>
  26. #include <linux/slab.h>
  27. #include <linux/delay.h>
  28. #include <linux/fs.h>
  29. #include <linux/timer.h>
  30. #include <linux/seq_file.h>
  31. #include <linux/init.h>
  32. #include <linux/spinlock.h>
  33. #include <linux/compat.h>
  34. #include <linux/blktrace_api.h>
  35. #include <linux/uaccess.h>
  36. #include <linux/io.h>
  37. #include <linux/dma-mapping.h>
  38. #include <linux/completion.h>
  39. #include <linux/moduleparam.h>
  40. #include <scsi/scsi.h>
  41. #include <scsi/scsi_cmnd.h>
  42. #include <scsi/scsi_device.h>
  43. #include <scsi/scsi_host.h>
  44. #include <scsi/scsi_tcq.h>
  45. #include <linux/cciss_ioctl.h>
  46. #include <linux/string.h>
  47. #include <linux/bitmap.h>
  48. #include <asm/atomic.h>
  49. #include <linux/kthread.h>
  50. #include "hpsa_cmd.h"
  51. #include "hpsa.h"
  52. /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
  53. #define HPSA_DRIVER_VERSION "2.0.2-1"
  54. #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
  55. /* How long to wait (in milliseconds) for board to go into simple mode */
  56. #define MAX_CONFIG_WAIT 30000
  57. #define MAX_IOCTL_CONFIG_WAIT 1000
  58. /*define how many times we will try a command because of bus resets */
  59. #define MAX_CMD_RETRIES 3
  60. /* Embedded module documentation macros - see modules.h */
  61. MODULE_AUTHOR("Hewlett-Packard Company");
  62. MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
  63. HPSA_DRIVER_VERSION);
  64. MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
  65. MODULE_VERSION(HPSA_DRIVER_VERSION);
  66. MODULE_LICENSE("GPL");
  67. static int hpsa_allow_any;
  68. module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
  69. MODULE_PARM_DESC(hpsa_allow_any,
  70. "Allow hpsa driver to access unknown HP Smart Array hardware");
  71. static int hpsa_simple_mode;
  72. module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
  73. MODULE_PARM_DESC(hpsa_simple_mode,
  74. "Use 'simple mode' rather than 'performant mode'");
  75. /* define the PCI info for the cards we can control */
  76. static const struct pci_device_id hpsa_pci_device_id[] = {
  77. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
  78. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
  79. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
  80. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
  81. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
  82. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a},
  83. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b},
  84. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
  85. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
  86. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
  87. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
  88. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
  89. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
  90. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
  91. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
  92. {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  93. PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
  94. {0,}
  95. };
  96. MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
  97. /* board_id = Subsystem Device ID & Vendor ID
  98. * product = Marketing Name for the board
  99. * access = Address of the struct of function pointers
  100. */
  101. static struct board_type products[] = {
  102. {0x3241103C, "Smart Array P212", &SA5_access},
  103. {0x3243103C, "Smart Array P410", &SA5_access},
  104. {0x3245103C, "Smart Array P410i", &SA5_access},
  105. {0x3247103C, "Smart Array P411", &SA5_access},
  106. {0x3249103C, "Smart Array P812", &SA5_access},
  107. {0x324a103C, "Smart Array P712m", &SA5_access},
  108. {0x324b103C, "Smart Array P711m", &SA5_access},
  109. {0x3350103C, "Smart Array", &SA5_access},
  110. {0x3351103C, "Smart Array", &SA5_access},
  111. {0x3352103C, "Smart Array", &SA5_access},
  112. {0x3353103C, "Smart Array", &SA5_access},
  113. {0x3354103C, "Smart Array", &SA5_access},
  114. {0x3355103C, "Smart Array", &SA5_access},
  115. {0x3356103C, "Smart Array", &SA5_access},
  116. {0xFFFF103C, "Unknown Smart Array", &SA5_access},
  117. };
  118. static int number_of_controllers;
  119. static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
  120. static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
  121. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
  122. static void start_io(struct ctlr_info *h);
  123. #ifdef CONFIG_COMPAT
  124. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
  125. #endif
  126. static void cmd_free(struct ctlr_info *h, struct CommandList *c);
  127. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
  128. static struct CommandList *cmd_alloc(struct ctlr_info *h);
  129. static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
  130. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  131. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  132. int cmd_type);
  133. static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
  134. static void hpsa_scan_start(struct Scsi_Host *);
  135. static int hpsa_scan_finished(struct Scsi_Host *sh,
  136. unsigned long elapsed_time);
  137. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  138. int qdepth, int reason);
  139. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
  140. static int hpsa_slave_alloc(struct scsi_device *sdev);
  141. static void hpsa_slave_destroy(struct scsi_device *sdev);
  142. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
  143. static int check_for_unit_attention(struct ctlr_info *h,
  144. struct CommandList *c);
  145. static void check_ioctl_unit_attention(struct ctlr_info *h,
  146. struct CommandList *c);
  147. /* performant mode helper functions */
  148. static void calc_bucket_map(int *bucket, int num_buckets,
  149. int nsgs, int *bucket_map);
  150. static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
  151. static inline u32 next_command(struct ctlr_info *h);
  152. static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
  153. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  154. u64 *cfg_offset);
  155. static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
  156. unsigned long *memory_bar);
  157. static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
  158. static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
  159. void __iomem *vaddr, int wait_for_ready);
  160. #define BOARD_NOT_READY 0
  161. #define BOARD_READY 1
  162. static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
  163. {
  164. unsigned long *priv = shost_priv(sdev->host);
  165. return (struct ctlr_info *) *priv;
  166. }
  167. static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
  168. {
  169. unsigned long *priv = shost_priv(sh);
  170. return (struct ctlr_info *) *priv;
  171. }
  172. static int check_for_unit_attention(struct ctlr_info *h,
  173. struct CommandList *c)
  174. {
  175. if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
  176. return 0;
  177. switch (c->err_info->SenseInfo[12]) {
  178. case STATE_CHANGED:
  179. dev_warn(&h->pdev->dev, "hpsa%d: a state change "
  180. "detected, command retried\n", h->ctlr);
  181. break;
  182. case LUN_FAILED:
  183. dev_warn(&h->pdev->dev, "hpsa%d: LUN failure "
  184. "detected, action required\n", h->ctlr);
  185. break;
  186. case REPORT_LUNS_CHANGED:
  187. dev_warn(&h->pdev->dev, "hpsa%d: report LUN data "
  188. "changed, action required\n", h->ctlr);
  189. /*
  190. * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
  191. */
  192. break;
  193. case POWER_OR_RESET:
  194. dev_warn(&h->pdev->dev, "hpsa%d: a power on "
  195. "or device reset detected\n", h->ctlr);
  196. break;
  197. case UNIT_ATTENTION_CLEARED:
  198. dev_warn(&h->pdev->dev, "hpsa%d: unit attention "
  199. "cleared by another initiator\n", h->ctlr);
  200. break;
  201. default:
  202. dev_warn(&h->pdev->dev, "hpsa%d: unknown "
  203. "unit attention detected\n", h->ctlr);
  204. break;
  205. }
  206. return 1;
  207. }
  208. static ssize_t host_store_rescan(struct device *dev,
  209. struct device_attribute *attr,
  210. const char *buf, size_t count)
  211. {
  212. struct ctlr_info *h;
  213. struct Scsi_Host *shost = class_to_shost(dev);
  214. h = shost_to_hba(shost);
  215. hpsa_scan_start(h->scsi_host);
  216. return count;
  217. }
  218. static ssize_t host_show_firmware_revision(struct device *dev,
  219. struct device_attribute *attr, char *buf)
  220. {
  221. struct ctlr_info *h;
  222. struct Scsi_Host *shost = class_to_shost(dev);
  223. unsigned char *fwrev;
  224. h = shost_to_hba(shost);
  225. if (!h->hba_inquiry_data)
  226. return 0;
  227. fwrev = &h->hba_inquiry_data[32];
  228. return snprintf(buf, 20, "%c%c%c%c\n",
  229. fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
  230. }
  231. static ssize_t host_show_commands_outstanding(struct device *dev,
  232. struct device_attribute *attr, char *buf)
  233. {
  234. struct Scsi_Host *shost = class_to_shost(dev);
  235. struct ctlr_info *h = shost_to_hba(shost);
  236. return snprintf(buf, 20, "%d\n", h->commands_outstanding);
  237. }
  238. static ssize_t host_show_transport_mode(struct device *dev,
  239. struct device_attribute *attr, char *buf)
  240. {
  241. struct ctlr_info *h;
  242. struct Scsi_Host *shost = class_to_shost(dev);
  243. h = shost_to_hba(shost);
  244. return snprintf(buf, 20, "%s\n",
  245. h->transMethod & CFGTBL_Trans_Performant ?
  246. "performant" : "simple");
  247. }
  248. /* List of controllers which cannot be hard reset on kexec with reset_devices */
  249. static u32 unresettable_controller[] = {
  250. 0x324a103C, /* Smart Array P712m */
  251. 0x324b103C, /* SmartArray P711m */
  252. 0x3223103C, /* Smart Array P800 */
  253. 0x3234103C, /* Smart Array P400 */
  254. 0x3235103C, /* Smart Array P400i */
  255. 0x3211103C, /* Smart Array E200i */
  256. 0x3212103C, /* Smart Array E200 */
  257. 0x3213103C, /* Smart Array E200i */
  258. 0x3214103C, /* Smart Array E200i */
  259. 0x3215103C, /* Smart Array E200i */
  260. 0x3237103C, /* Smart Array E500 */
  261. 0x323D103C, /* Smart Array P700m */
  262. 0x409C0E11, /* Smart Array 6400 */
  263. 0x409D0E11, /* Smart Array 6400 EM */
  264. };
  265. /* List of controllers which cannot even be soft reset */
  266. static u32 soft_unresettable_controller[] = {
  267. /* Exclude 640x boards. These are two pci devices in one slot
  268. * which share a battery backed cache module. One controls the
  269. * cache, the other accesses the cache through the one that controls
  270. * it. If we reset the one controlling the cache, the other will
  271. * likely not be happy. Just forbid resetting this conjoined mess.
  272. * The 640x isn't really supported by hpsa anyway.
  273. */
  274. 0x409C0E11, /* Smart Array 6400 */
  275. 0x409D0E11, /* Smart Array 6400 EM */
  276. };
  277. static int ctlr_is_hard_resettable(u32 board_id)
  278. {
  279. int i;
  280. for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
  281. if (unresettable_controller[i] == board_id)
  282. return 0;
  283. return 1;
  284. }
  285. static int ctlr_is_soft_resettable(u32 board_id)
  286. {
  287. int i;
  288. for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
  289. if (soft_unresettable_controller[i] == board_id)
  290. return 0;
  291. return 1;
  292. }
  293. static int ctlr_is_resettable(u32 board_id)
  294. {
  295. return ctlr_is_hard_resettable(board_id) ||
  296. ctlr_is_soft_resettable(board_id);
  297. }
  298. static ssize_t host_show_resettable(struct device *dev,
  299. struct device_attribute *attr, char *buf)
  300. {
  301. struct ctlr_info *h;
  302. struct Scsi_Host *shost = class_to_shost(dev);
  303. h = shost_to_hba(shost);
  304. return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
  305. }
  306. static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
  307. {
  308. return (scsi3addr[3] & 0xC0) == 0x40;
  309. }
  310. static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
  311. "UNKNOWN"
  312. };
  313. #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
  314. static ssize_t raid_level_show(struct device *dev,
  315. struct device_attribute *attr, char *buf)
  316. {
  317. ssize_t l = 0;
  318. unsigned char rlevel;
  319. struct ctlr_info *h;
  320. struct scsi_device *sdev;
  321. struct hpsa_scsi_dev_t *hdev;
  322. unsigned long flags;
  323. sdev = to_scsi_device(dev);
  324. h = sdev_to_hba(sdev);
  325. spin_lock_irqsave(&h->lock, flags);
  326. hdev = sdev->hostdata;
  327. if (!hdev) {
  328. spin_unlock_irqrestore(&h->lock, flags);
  329. return -ENODEV;
  330. }
  331. /* Is this even a logical drive? */
  332. if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
  333. spin_unlock_irqrestore(&h->lock, flags);
  334. l = snprintf(buf, PAGE_SIZE, "N/A\n");
  335. return l;
  336. }
  337. rlevel = hdev->raid_level;
  338. spin_unlock_irqrestore(&h->lock, flags);
  339. if (rlevel > RAID_UNKNOWN)
  340. rlevel = RAID_UNKNOWN;
  341. l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
  342. return l;
  343. }
  344. static ssize_t lunid_show(struct device *dev,
  345. struct device_attribute *attr, char *buf)
  346. {
  347. struct ctlr_info *h;
  348. struct scsi_device *sdev;
  349. struct hpsa_scsi_dev_t *hdev;
  350. unsigned long flags;
  351. unsigned char lunid[8];
  352. sdev = to_scsi_device(dev);
  353. h = sdev_to_hba(sdev);
  354. spin_lock_irqsave(&h->lock, flags);
  355. hdev = sdev->hostdata;
  356. if (!hdev) {
  357. spin_unlock_irqrestore(&h->lock, flags);
  358. return -ENODEV;
  359. }
  360. memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
  361. spin_unlock_irqrestore(&h->lock, flags);
  362. return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
  363. lunid[0], lunid[1], lunid[2], lunid[3],
  364. lunid[4], lunid[5], lunid[6], lunid[7]);
  365. }
  366. static ssize_t unique_id_show(struct device *dev,
  367. struct device_attribute *attr, char *buf)
  368. {
  369. struct ctlr_info *h;
  370. struct scsi_device *sdev;
  371. struct hpsa_scsi_dev_t *hdev;
  372. unsigned long flags;
  373. unsigned char sn[16];
  374. sdev = to_scsi_device(dev);
  375. h = sdev_to_hba(sdev);
  376. spin_lock_irqsave(&h->lock, flags);
  377. hdev = sdev->hostdata;
  378. if (!hdev) {
  379. spin_unlock_irqrestore(&h->lock, flags);
  380. return -ENODEV;
  381. }
  382. memcpy(sn, hdev->device_id, sizeof(sn));
  383. spin_unlock_irqrestore(&h->lock, flags);
  384. return snprintf(buf, 16 * 2 + 2,
  385. "%02X%02X%02X%02X%02X%02X%02X%02X"
  386. "%02X%02X%02X%02X%02X%02X%02X%02X\n",
  387. sn[0], sn[1], sn[2], sn[3],
  388. sn[4], sn[5], sn[6], sn[7],
  389. sn[8], sn[9], sn[10], sn[11],
  390. sn[12], sn[13], sn[14], sn[15]);
  391. }
  392. static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
  393. static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
  394. static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
  395. static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
  396. static DEVICE_ATTR(firmware_revision, S_IRUGO,
  397. host_show_firmware_revision, NULL);
  398. static DEVICE_ATTR(commands_outstanding, S_IRUGO,
  399. host_show_commands_outstanding, NULL);
  400. static DEVICE_ATTR(transport_mode, S_IRUGO,
  401. host_show_transport_mode, NULL);
  402. static DEVICE_ATTR(resettable, S_IRUGO,
  403. host_show_resettable, NULL);
  404. static struct device_attribute *hpsa_sdev_attrs[] = {
  405. &dev_attr_raid_level,
  406. &dev_attr_lunid,
  407. &dev_attr_unique_id,
  408. NULL,
  409. };
  410. static struct device_attribute *hpsa_shost_attrs[] = {
  411. &dev_attr_rescan,
  412. &dev_attr_firmware_revision,
  413. &dev_attr_commands_outstanding,
  414. &dev_attr_transport_mode,
  415. &dev_attr_resettable,
  416. NULL,
  417. };
  418. static struct scsi_host_template hpsa_driver_template = {
  419. .module = THIS_MODULE,
  420. .name = "hpsa",
  421. .proc_name = "hpsa",
  422. .queuecommand = hpsa_scsi_queue_command,
  423. .scan_start = hpsa_scan_start,
  424. .scan_finished = hpsa_scan_finished,
  425. .change_queue_depth = hpsa_change_queue_depth,
  426. .this_id = -1,
  427. .use_clustering = ENABLE_CLUSTERING,
  428. .eh_device_reset_handler = hpsa_eh_device_reset_handler,
  429. .ioctl = hpsa_ioctl,
  430. .slave_alloc = hpsa_slave_alloc,
  431. .slave_destroy = hpsa_slave_destroy,
  432. #ifdef CONFIG_COMPAT
  433. .compat_ioctl = hpsa_compat_ioctl,
  434. #endif
  435. .sdev_attrs = hpsa_sdev_attrs,
  436. .shost_attrs = hpsa_shost_attrs,
  437. };
  438. /* Enqueuing and dequeuing functions for cmdlists. */
  439. static inline void addQ(struct list_head *list, struct CommandList *c)
  440. {
  441. list_add_tail(&c->list, list);
  442. }
  443. static inline u32 next_command(struct ctlr_info *h)
  444. {
  445. u32 a;
  446. if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
  447. return h->access.command_completed(h);
  448. if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
  449. a = *(h->reply_pool_head); /* Next cmd in ring buffer */
  450. (h->reply_pool_head)++;
  451. h->commands_outstanding--;
  452. } else {
  453. a = FIFO_EMPTY;
  454. }
  455. /* Check for wraparound */
  456. if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
  457. h->reply_pool_head = h->reply_pool;
  458. h->reply_pool_wraparound ^= 1;
  459. }
  460. return a;
  461. }
  462. /* set_performant_mode: Modify the tag for cciss performant
  463. * set bit 0 for pull model, bits 3-1 for block fetch
  464. * register number
  465. */
  466. static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
  467. {
  468. if (likely(h->transMethod & CFGTBL_Trans_Performant))
  469. c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
  470. }
  471. static void enqueue_cmd_and_start_io(struct ctlr_info *h,
  472. struct CommandList *c)
  473. {
  474. unsigned long flags;
  475. set_performant_mode(h, c);
  476. spin_lock_irqsave(&h->lock, flags);
  477. addQ(&h->reqQ, c);
  478. h->Qdepth++;
  479. start_io(h);
  480. spin_unlock_irqrestore(&h->lock, flags);
  481. }
  482. static inline void removeQ(struct CommandList *c)
  483. {
  484. if (WARN_ON(list_empty(&c->list)))
  485. return;
  486. list_del_init(&c->list);
  487. }
  488. static inline int is_hba_lunid(unsigned char scsi3addr[])
  489. {
  490. return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
  491. }
  492. static inline int is_scsi_rev_5(struct ctlr_info *h)
  493. {
  494. if (!h->hba_inquiry_data)
  495. return 0;
  496. if ((h->hba_inquiry_data[2] & 0x07) == 5)
  497. return 1;
  498. return 0;
  499. }
  500. static int hpsa_find_target_lun(struct ctlr_info *h,
  501. unsigned char scsi3addr[], int bus, int *target, int *lun)
  502. {
  503. /* finds an unused bus, target, lun for a new physical device
  504. * assumes h->devlock is held
  505. */
  506. int i, found = 0;
  507. DECLARE_BITMAP(lun_taken, HPSA_MAX_SCSI_DEVS_PER_HBA);
  508. memset(&lun_taken[0], 0, HPSA_MAX_SCSI_DEVS_PER_HBA >> 3);
  509. for (i = 0; i < h->ndevices; i++) {
  510. if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
  511. set_bit(h->dev[i]->target, lun_taken);
  512. }
  513. for (i = 0; i < HPSA_MAX_SCSI_DEVS_PER_HBA; i++) {
  514. if (!test_bit(i, lun_taken)) {
  515. /* *bus = 1; */
  516. *target = i;
  517. *lun = 0;
  518. found = 1;
  519. break;
  520. }
  521. }
  522. return !found;
  523. }
  524. /* Add an entry into h->dev[] array. */
  525. static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
  526. struct hpsa_scsi_dev_t *device,
  527. struct hpsa_scsi_dev_t *added[], int *nadded)
  528. {
  529. /* assumes h->devlock is held */
  530. int n = h->ndevices;
  531. int i;
  532. unsigned char addr1[8], addr2[8];
  533. struct hpsa_scsi_dev_t *sd;
  534. if (n >= HPSA_MAX_SCSI_DEVS_PER_HBA) {
  535. dev_err(&h->pdev->dev, "too many devices, some will be "
  536. "inaccessible.\n");
  537. return -1;
  538. }
  539. /* physical devices do not have lun or target assigned until now. */
  540. if (device->lun != -1)
  541. /* Logical device, lun is already assigned. */
  542. goto lun_assigned;
  543. /* If this device a non-zero lun of a multi-lun device
  544. * byte 4 of the 8-byte LUN addr will contain the logical
  545. * unit no, zero otherise.
  546. */
  547. if (device->scsi3addr[4] == 0) {
  548. /* This is not a non-zero lun of a multi-lun device */
  549. if (hpsa_find_target_lun(h, device->scsi3addr,
  550. device->bus, &device->target, &device->lun) != 0)
  551. return -1;
  552. goto lun_assigned;
  553. }
  554. /* This is a non-zero lun of a multi-lun device.
  555. * Search through our list and find the device which
  556. * has the same 8 byte LUN address, excepting byte 4.
  557. * Assign the same bus and target for this new LUN.
  558. * Use the logical unit number from the firmware.
  559. */
  560. memcpy(addr1, device->scsi3addr, 8);
  561. addr1[4] = 0;
  562. for (i = 0; i < n; i++) {
  563. sd = h->dev[i];
  564. memcpy(addr2, sd->scsi3addr, 8);
  565. addr2[4] = 0;
  566. /* differ only in byte 4? */
  567. if (memcmp(addr1, addr2, 8) == 0) {
  568. device->bus = sd->bus;
  569. device->target = sd->target;
  570. device->lun = device->scsi3addr[4];
  571. break;
  572. }
  573. }
  574. if (device->lun == -1) {
  575. dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
  576. " suspect firmware bug or unsupported hardware "
  577. "configuration.\n");
  578. return -1;
  579. }
  580. lun_assigned:
  581. h->dev[n] = device;
  582. h->ndevices++;
  583. added[*nadded] = device;
  584. (*nadded)++;
  585. /* initially, (before registering with scsi layer) we don't
  586. * know our hostno and we don't want to print anything first
  587. * time anyway (the scsi layer's inquiries will show that info)
  588. */
  589. /* if (hostno != -1) */
  590. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
  591. scsi_device_type(device->devtype), hostno,
  592. device->bus, device->target, device->lun);
  593. return 0;
  594. }
  595. /* Replace an entry from h->dev[] array. */
  596. static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
  597. int entry, struct hpsa_scsi_dev_t *new_entry,
  598. struct hpsa_scsi_dev_t *added[], int *nadded,
  599. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  600. {
  601. /* assumes h->devlock is held */
  602. BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
  603. removed[*nremoved] = h->dev[entry];
  604. (*nremoved)++;
  605. h->dev[entry] = new_entry;
  606. added[*nadded] = new_entry;
  607. (*nadded)++;
  608. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
  609. scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
  610. new_entry->target, new_entry->lun);
  611. }
  612. /* Remove an entry from h->dev[] array. */
  613. static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
  614. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  615. {
  616. /* assumes h->devlock is held */
  617. int i;
  618. struct hpsa_scsi_dev_t *sd;
  619. BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
  620. sd = h->dev[entry];
  621. removed[*nremoved] = h->dev[entry];
  622. (*nremoved)++;
  623. for (i = entry; i < h->ndevices-1; i++)
  624. h->dev[i] = h->dev[i+1];
  625. h->ndevices--;
  626. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
  627. scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
  628. sd->lun);
  629. }
  630. #define SCSI3ADDR_EQ(a, b) ( \
  631. (a)[7] == (b)[7] && \
  632. (a)[6] == (b)[6] && \
  633. (a)[5] == (b)[5] && \
  634. (a)[4] == (b)[4] && \
  635. (a)[3] == (b)[3] && \
  636. (a)[2] == (b)[2] && \
  637. (a)[1] == (b)[1] && \
  638. (a)[0] == (b)[0])
  639. static void fixup_botched_add(struct ctlr_info *h,
  640. struct hpsa_scsi_dev_t *added)
  641. {
  642. /* called when scsi_add_device fails in order to re-adjust
  643. * h->dev[] to match the mid layer's view.
  644. */
  645. unsigned long flags;
  646. int i, j;
  647. spin_lock_irqsave(&h->lock, flags);
  648. for (i = 0; i < h->ndevices; i++) {
  649. if (h->dev[i] == added) {
  650. for (j = i; j < h->ndevices-1; j++)
  651. h->dev[j] = h->dev[j+1];
  652. h->ndevices--;
  653. break;
  654. }
  655. }
  656. spin_unlock_irqrestore(&h->lock, flags);
  657. kfree(added);
  658. }
  659. static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
  660. struct hpsa_scsi_dev_t *dev2)
  661. {
  662. /* we compare everything except lun and target as these
  663. * are not yet assigned. Compare parts likely
  664. * to differ first
  665. */
  666. if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
  667. sizeof(dev1->scsi3addr)) != 0)
  668. return 0;
  669. if (memcmp(dev1->device_id, dev2->device_id,
  670. sizeof(dev1->device_id)) != 0)
  671. return 0;
  672. if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
  673. return 0;
  674. if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
  675. return 0;
  676. if (dev1->devtype != dev2->devtype)
  677. return 0;
  678. if (dev1->bus != dev2->bus)
  679. return 0;
  680. return 1;
  681. }
  682. /* Find needle in haystack. If exact match found, return DEVICE_SAME,
  683. * and return needle location in *index. If scsi3addr matches, but not
  684. * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
  685. * location in *index. If needle not found, return DEVICE_NOT_FOUND.
  686. */
  687. static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
  688. struct hpsa_scsi_dev_t *haystack[], int haystack_size,
  689. int *index)
  690. {
  691. int i;
  692. #define DEVICE_NOT_FOUND 0
  693. #define DEVICE_CHANGED 1
  694. #define DEVICE_SAME 2
  695. for (i = 0; i < haystack_size; i++) {
  696. if (haystack[i] == NULL) /* previously removed. */
  697. continue;
  698. if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
  699. *index = i;
  700. if (device_is_the_same(needle, haystack[i]))
  701. return DEVICE_SAME;
  702. else
  703. return DEVICE_CHANGED;
  704. }
  705. }
  706. *index = -1;
  707. return DEVICE_NOT_FOUND;
  708. }
  709. static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
  710. struct hpsa_scsi_dev_t *sd[], int nsds)
  711. {
  712. /* sd contains scsi3 addresses and devtypes, and inquiry
  713. * data. This function takes what's in sd to be the current
  714. * reality and updates h->dev[] to reflect that reality.
  715. */
  716. int i, entry, device_change, changes = 0;
  717. struct hpsa_scsi_dev_t *csd;
  718. unsigned long flags;
  719. struct hpsa_scsi_dev_t **added, **removed;
  720. int nadded, nremoved;
  721. struct Scsi_Host *sh = NULL;
  722. added = kzalloc(sizeof(*added) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  723. GFP_KERNEL);
  724. removed = kzalloc(sizeof(*removed) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  725. GFP_KERNEL);
  726. if (!added || !removed) {
  727. dev_warn(&h->pdev->dev, "out of memory in "
  728. "adjust_hpsa_scsi_table\n");
  729. goto free_and_out;
  730. }
  731. spin_lock_irqsave(&h->devlock, flags);
  732. /* find any devices in h->dev[] that are not in
  733. * sd[] and remove them from h->dev[], and for any
  734. * devices which have changed, remove the old device
  735. * info and add the new device info.
  736. */
  737. i = 0;
  738. nremoved = 0;
  739. nadded = 0;
  740. while (i < h->ndevices) {
  741. csd = h->dev[i];
  742. device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
  743. if (device_change == DEVICE_NOT_FOUND) {
  744. changes++;
  745. hpsa_scsi_remove_entry(h, hostno, i,
  746. removed, &nremoved);
  747. continue; /* remove ^^^, hence i not incremented */
  748. } else if (device_change == DEVICE_CHANGED) {
  749. changes++;
  750. hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
  751. added, &nadded, removed, &nremoved);
  752. /* Set it to NULL to prevent it from being freed
  753. * at the bottom of hpsa_update_scsi_devices()
  754. */
  755. sd[entry] = NULL;
  756. }
  757. i++;
  758. }
  759. /* Now, make sure every device listed in sd[] is also
  760. * listed in h->dev[], adding them if they aren't found
  761. */
  762. for (i = 0; i < nsds; i++) {
  763. if (!sd[i]) /* if already added above. */
  764. continue;
  765. device_change = hpsa_scsi_find_entry(sd[i], h->dev,
  766. h->ndevices, &entry);
  767. if (device_change == DEVICE_NOT_FOUND) {
  768. changes++;
  769. if (hpsa_scsi_add_entry(h, hostno, sd[i],
  770. added, &nadded) != 0)
  771. break;
  772. sd[i] = NULL; /* prevent from being freed later. */
  773. } else if (device_change == DEVICE_CHANGED) {
  774. /* should never happen... */
  775. changes++;
  776. dev_warn(&h->pdev->dev,
  777. "device unexpectedly changed.\n");
  778. /* but if it does happen, we just ignore that device */
  779. }
  780. }
  781. spin_unlock_irqrestore(&h->devlock, flags);
  782. /* Don't notify scsi mid layer of any changes the first time through
  783. * (or if there are no changes) scsi_scan_host will do it later the
  784. * first time through.
  785. */
  786. if (hostno == -1 || !changes)
  787. goto free_and_out;
  788. sh = h->scsi_host;
  789. /* Notify scsi mid layer of any removed devices */
  790. for (i = 0; i < nremoved; i++) {
  791. struct scsi_device *sdev =
  792. scsi_device_lookup(sh, removed[i]->bus,
  793. removed[i]->target, removed[i]->lun);
  794. if (sdev != NULL) {
  795. scsi_remove_device(sdev);
  796. scsi_device_put(sdev);
  797. } else {
  798. /* We don't expect to get here.
  799. * future cmds to this device will get selection
  800. * timeout as if the device was gone.
  801. */
  802. dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
  803. " for removal.", hostno, removed[i]->bus,
  804. removed[i]->target, removed[i]->lun);
  805. }
  806. kfree(removed[i]);
  807. removed[i] = NULL;
  808. }
  809. /* Notify scsi mid layer of any added devices */
  810. for (i = 0; i < nadded; i++) {
  811. if (scsi_add_device(sh, added[i]->bus,
  812. added[i]->target, added[i]->lun) == 0)
  813. continue;
  814. dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
  815. "device not added.\n", hostno, added[i]->bus,
  816. added[i]->target, added[i]->lun);
  817. /* now we have to remove it from h->dev,
  818. * since it didn't get added to scsi mid layer
  819. */
  820. fixup_botched_add(h, added[i]);
  821. }
  822. free_and_out:
  823. kfree(added);
  824. kfree(removed);
  825. }
  826. /*
  827. * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t *
  828. * Assume's h->devlock is held.
  829. */
  830. static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
  831. int bus, int target, int lun)
  832. {
  833. int i;
  834. struct hpsa_scsi_dev_t *sd;
  835. for (i = 0; i < h->ndevices; i++) {
  836. sd = h->dev[i];
  837. if (sd->bus == bus && sd->target == target && sd->lun == lun)
  838. return sd;
  839. }
  840. return NULL;
  841. }
  842. /* link sdev->hostdata to our per-device structure. */
  843. static int hpsa_slave_alloc(struct scsi_device *sdev)
  844. {
  845. struct hpsa_scsi_dev_t *sd;
  846. unsigned long flags;
  847. struct ctlr_info *h;
  848. h = sdev_to_hba(sdev);
  849. spin_lock_irqsave(&h->devlock, flags);
  850. sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
  851. sdev_id(sdev), sdev->lun);
  852. if (sd != NULL)
  853. sdev->hostdata = sd;
  854. spin_unlock_irqrestore(&h->devlock, flags);
  855. return 0;
  856. }
  857. static void hpsa_slave_destroy(struct scsi_device *sdev)
  858. {
  859. /* nothing to do. */
  860. }
  861. static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
  862. {
  863. int i;
  864. if (!h->cmd_sg_list)
  865. return;
  866. for (i = 0; i < h->nr_cmds; i++) {
  867. kfree(h->cmd_sg_list[i]);
  868. h->cmd_sg_list[i] = NULL;
  869. }
  870. kfree(h->cmd_sg_list);
  871. h->cmd_sg_list = NULL;
  872. }
  873. static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
  874. {
  875. int i;
  876. if (h->chainsize <= 0)
  877. return 0;
  878. h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
  879. GFP_KERNEL);
  880. if (!h->cmd_sg_list)
  881. return -ENOMEM;
  882. for (i = 0; i < h->nr_cmds; i++) {
  883. h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
  884. h->chainsize, GFP_KERNEL);
  885. if (!h->cmd_sg_list[i])
  886. goto clean;
  887. }
  888. return 0;
  889. clean:
  890. hpsa_free_sg_chain_blocks(h);
  891. return -ENOMEM;
  892. }
  893. static void hpsa_map_sg_chain_block(struct ctlr_info *h,
  894. struct CommandList *c)
  895. {
  896. struct SGDescriptor *chain_sg, *chain_block;
  897. u64 temp64;
  898. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  899. chain_block = h->cmd_sg_list[c->cmdindex];
  900. chain_sg->Ext = HPSA_SG_CHAIN;
  901. chain_sg->Len = sizeof(*chain_sg) *
  902. (c->Header.SGTotal - h->max_cmd_sg_entries);
  903. temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
  904. PCI_DMA_TODEVICE);
  905. chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
  906. chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
  907. }
  908. static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
  909. struct CommandList *c)
  910. {
  911. struct SGDescriptor *chain_sg;
  912. union u64bit temp64;
  913. if (c->Header.SGTotal <= h->max_cmd_sg_entries)
  914. return;
  915. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  916. temp64.val32.lower = chain_sg->Addr.lower;
  917. temp64.val32.upper = chain_sg->Addr.upper;
  918. pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
  919. }
  920. static void complete_scsi_command(struct CommandList *cp)
  921. {
  922. struct scsi_cmnd *cmd;
  923. struct ctlr_info *h;
  924. struct ErrorInfo *ei;
  925. unsigned char sense_key;
  926. unsigned char asc; /* additional sense code */
  927. unsigned char ascq; /* additional sense code qualifier */
  928. ei = cp->err_info;
  929. cmd = (struct scsi_cmnd *) cp->scsi_cmd;
  930. h = cp->h;
  931. scsi_dma_unmap(cmd); /* undo the DMA mappings */
  932. if (cp->Header.SGTotal > h->max_cmd_sg_entries)
  933. hpsa_unmap_sg_chain_block(h, cp);
  934. cmd->result = (DID_OK << 16); /* host byte */
  935. cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
  936. cmd->result |= ei->ScsiStatus;
  937. /* copy the sense data whether we need to or not. */
  938. memcpy(cmd->sense_buffer, ei->SenseInfo,
  939. ei->SenseLen > SCSI_SENSE_BUFFERSIZE ?
  940. SCSI_SENSE_BUFFERSIZE :
  941. ei->SenseLen);
  942. scsi_set_resid(cmd, ei->ResidualCnt);
  943. if (ei->CommandStatus == 0) {
  944. cmd->scsi_done(cmd);
  945. cmd_free(h, cp);
  946. return;
  947. }
  948. /* an error has occurred */
  949. switch (ei->CommandStatus) {
  950. case CMD_TARGET_STATUS:
  951. if (ei->ScsiStatus) {
  952. /* Get sense key */
  953. sense_key = 0xf & ei->SenseInfo[2];
  954. /* Get additional sense code */
  955. asc = ei->SenseInfo[12];
  956. /* Get addition sense code qualifier */
  957. ascq = ei->SenseInfo[13];
  958. }
  959. if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
  960. if (check_for_unit_attention(h, cp)) {
  961. cmd->result = DID_SOFT_ERROR << 16;
  962. break;
  963. }
  964. if (sense_key == ILLEGAL_REQUEST) {
  965. /*
  966. * SCSI REPORT_LUNS is commonly unsupported on
  967. * Smart Array. Suppress noisy complaint.
  968. */
  969. if (cp->Request.CDB[0] == REPORT_LUNS)
  970. break;
  971. /* If ASC/ASCQ indicate Logical Unit
  972. * Not Supported condition,
  973. */
  974. if ((asc == 0x25) && (ascq == 0x0)) {
  975. dev_warn(&h->pdev->dev, "cp %p "
  976. "has check condition\n", cp);
  977. break;
  978. }
  979. }
  980. if (sense_key == NOT_READY) {
  981. /* If Sense is Not Ready, Logical Unit
  982. * Not ready, Manual Intervention
  983. * required
  984. */
  985. if ((asc == 0x04) && (ascq == 0x03)) {
  986. dev_warn(&h->pdev->dev, "cp %p "
  987. "has check condition: unit "
  988. "not ready, manual "
  989. "intervention required\n", cp);
  990. break;
  991. }
  992. }
  993. if (sense_key == ABORTED_COMMAND) {
  994. /* Aborted command is retryable */
  995. dev_warn(&h->pdev->dev, "cp %p "
  996. "has check condition: aborted command: "
  997. "ASC: 0x%x, ASCQ: 0x%x\n",
  998. cp, asc, ascq);
  999. cmd->result = DID_SOFT_ERROR << 16;
  1000. break;
  1001. }
  1002. /* Must be some other type of check condition */
  1003. dev_warn(&h->pdev->dev, "cp %p has check condition: "
  1004. "unknown type: "
  1005. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  1006. "Returning result: 0x%x, "
  1007. "cmd=[%02x %02x %02x %02x %02x "
  1008. "%02x %02x %02x %02x %02x %02x "
  1009. "%02x %02x %02x %02x %02x]\n",
  1010. cp, sense_key, asc, ascq,
  1011. cmd->result,
  1012. cmd->cmnd[0], cmd->cmnd[1],
  1013. cmd->cmnd[2], cmd->cmnd[3],
  1014. cmd->cmnd[4], cmd->cmnd[5],
  1015. cmd->cmnd[6], cmd->cmnd[7],
  1016. cmd->cmnd[8], cmd->cmnd[9],
  1017. cmd->cmnd[10], cmd->cmnd[11],
  1018. cmd->cmnd[12], cmd->cmnd[13],
  1019. cmd->cmnd[14], cmd->cmnd[15]);
  1020. break;
  1021. }
  1022. /* Problem was not a check condition
  1023. * Pass it up to the upper layers...
  1024. */
  1025. if (ei->ScsiStatus) {
  1026. dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
  1027. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  1028. "Returning result: 0x%x\n",
  1029. cp, ei->ScsiStatus,
  1030. sense_key, asc, ascq,
  1031. cmd->result);
  1032. } else { /* scsi status is zero??? How??? */
  1033. dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
  1034. "Returning no connection.\n", cp),
  1035. /* Ordinarily, this case should never happen,
  1036. * but there is a bug in some released firmware
  1037. * revisions that allows it to happen if, for
  1038. * example, a 4100 backplane loses power and
  1039. * the tape drive is in it. We assume that
  1040. * it's a fatal error of some kind because we
  1041. * can't show that it wasn't. We will make it
  1042. * look like selection timeout since that is
  1043. * the most common reason for this to occur,
  1044. * and it's severe enough.
  1045. */
  1046. cmd->result = DID_NO_CONNECT << 16;
  1047. }
  1048. break;
  1049. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  1050. break;
  1051. case CMD_DATA_OVERRUN:
  1052. dev_warn(&h->pdev->dev, "cp %p has"
  1053. " completed with data overrun "
  1054. "reported\n", cp);
  1055. break;
  1056. case CMD_INVALID: {
  1057. /* print_bytes(cp, sizeof(*cp), 1, 0);
  1058. print_cmd(cp); */
  1059. /* We get CMD_INVALID if you address a non-existent device
  1060. * instead of a selection timeout (no response). You will
  1061. * see this if you yank out a drive, then try to access it.
  1062. * This is kind of a shame because it means that any other
  1063. * CMD_INVALID (e.g. driver bug) will get interpreted as a
  1064. * missing target. */
  1065. cmd->result = DID_NO_CONNECT << 16;
  1066. }
  1067. break;
  1068. case CMD_PROTOCOL_ERR:
  1069. dev_warn(&h->pdev->dev, "cp %p has "
  1070. "protocol error \n", cp);
  1071. break;
  1072. case CMD_HARDWARE_ERR:
  1073. cmd->result = DID_ERROR << 16;
  1074. dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
  1075. break;
  1076. case CMD_CONNECTION_LOST:
  1077. cmd->result = DID_ERROR << 16;
  1078. dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
  1079. break;
  1080. case CMD_ABORTED:
  1081. cmd->result = DID_ABORT << 16;
  1082. dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
  1083. cp, ei->ScsiStatus);
  1084. break;
  1085. case CMD_ABORT_FAILED:
  1086. cmd->result = DID_ERROR << 16;
  1087. dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
  1088. break;
  1089. case CMD_UNSOLICITED_ABORT:
  1090. cmd->result = DID_RESET << 16;
  1091. dev_warn(&h->pdev->dev, "cp %p aborted do to an unsolicited "
  1092. "abort\n", cp);
  1093. break;
  1094. case CMD_TIMEOUT:
  1095. cmd->result = DID_TIME_OUT << 16;
  1096. dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
  1097. break;
  1098. case CMD_UNABORTABLE:
  1099. cmd->result = DID_ERROR << 16;
  1100. dev_warn(&h->pdev->dev, "Command unabortable\n");
  1101. break;
  1102. default:
  1103. cmd->result = DID_ERROR << 16;
  1104. dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
  1105. cp, ei->CommandStatus);
  1106. }
  1107. cmd->scsi_done(cmd);
  1108. cmd_free(h, cp);
  1109. }
  1110. static int hpsa_scsi_detect(struct ctlr_info *h)
  1111. {
  1112. struct Scsi_Host *sh;
  1113. int error;
  1114. sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
  1115. if (sh == NULL)
  1116. goto fail;
  1117. sh->io_port = 0;
  1118. sh->n_io_port = 0;
  1119. sh->this_id = -1;
  1120. sh->max_channel = 3;
  1121. sh->max_cmd_len = MAX_COMMAND_SIZE;
  1122. sh->max_lun = HPSA_MAX_LUN;
  1123. sh->max_id = HPSA_MAX_LUN;
  1124. sh->can_queue = h->nr_cmds;
  1125. sh->cmd_per_lun = h->nr_cmds;
  1126. sh->sg_tablesize = h->maxsgentries;
  1127. h->scsi_host = sh;
  1128. sh->hostdata[0] = (unsigned long) h;
  1129. sh->irq = h->intr[h->intr_mode];
  1130. sh->unique_id = sh->irq;
  1131. error = scsi_add_host(sh, &h->pdev->dev);
  1132. if (error)
  1133. goto fail_host_put;
  1134. scsi_scan_host(sh);
  1135. return 0;
  1136. fail_host_put:
  1137. dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_add_host"
  1138. " failed for controller %d\n", h->ctlr);
  1139. scsi_host_put(sh);
  1140. return error;
  1141. fail:
  1142. dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_host_alloc"
  1143. " failed for controller %d\n", h->ctlr);
  1144. return -ENOMEM;
  1145. }
  1146. static void hpsa_pci_unmap(struct pci_dev *pdev,
  1147. struct CommandList *c, int sg_used, int data_direction)
  1148. {
  1149. int i;
  1150. union u64bit addr64;
  1151. for (i = 0; i < sg_used; i++) {
  1152. addr64.val32.lower = c->SG[i].Addr.lower;
  1153. addr64.val32.upper = c->SG[i].Addr.upper;
  1154. pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
  1155. data_direction);
  1156. }
  1157. }
  1158. static void hpsa_map_one(struct pci_dev *pdev,
  1159. struct CommandList *cp,
  1160. unsigned char *buf,
  1161. size_t buflen,
  1162. int data_direction)
  1163. {
  1164. u64 addr64;
  1165. if (buflen == 0 || data_direction == PCI_DMA_NONE) {
  1166. cp->Header.SGList = 0;
  1167. cp->Header.SGTotal = 0;
  1168. return;
  1169. }
  1170. addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
  1171. cp->SG[0].Addr.lower =
  1172. (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
  1173. cp->SG[0].Addr.upper =
  1174. (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
  1175. cp->SG[0].Len = buflen;
  1176. cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
  1177. cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
  1178. }
  1179. static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
  1180. struct CommandList *c)
  1181. {
  1182. DECLARE_COMPLETION_ONSTACK(wait);
  1183. c->waiting = &wait;
  1184. enqueue_cmd_and_start_io(h, c);
  1185. wait_for_completion(&wait);
  1186. }
  1187. static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
  1188. struct CommandList *c, int data_direction)
  1189. {
  1190. int retry_count = 0;
  1191. do {
  1192. memset(c->err_info, 0, sizeof(c->err_info));
  1193. hpsa_scsi_do_simple_cmd_core(h, c);
  1194. retry_count++;
  1195. } while (check_for_unit_attention(h, c) && retry_count <= 3);
  1196. hpsa_pci_unmap(h->pdev, c, 1, data_direction);
  1197. }
  1198. static void hpsa_scsi_interpret_error(struct CommandList *cp)
  1199. {
  1200. struct ErrorInfo *ei;
  1201. struct device *d = &cp->h->pdev->dev;
  1202. ei = cp->err_info;
  1203. switch (ei->CommandStatus) {
  1204. case CMD_TARGET_STATUS:
  1205. dev_warn(d, "cmd %p has completed with errors\n", cp);
  1206. dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
  1207. ei->ScsiStatus);
  1208. if (ei->ScsiStatus == 0)
  1209. dev_warn(d, "SCSI status is abnormally zero. "
  1210. "(probably indicates selection timeout "
  1211. "reported incorrectly due to a known "
  1212. "firmware bug, circa July, 2001.)\n");
  1213. break;
  1214. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  1215. dev_info(d, "UNDERRUN\n");
  1216. break;
  1217. case CMD_DATA_OVERRUN:
  1218. dev_warn(d, "cp %p has completed with data overrun\n", cp);
  1219. break;
  1220. case CMD_INVALID: {
  1221. /* controller unfortunately reports SCSI passthru's
  1222. * to non-existent targets as invalid commands.
  1223. */
  1224. dev_warn(d, "cp %p is reported invalid (probably means "
  1225. "target device no longer present)\n", cp);
  1226. /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
  1227. print_cmd(cp); */
  1228. }
  1229. break;
  1230. case CMD_PROTOCOL_ERR:
  1231. dev_warn(d, "cp %p has protocol error \n", cp);
  1232. break;
  1233. case CMD_HARDWARE_ERR:
  1234. /* cmd->result = DID_ERROR << 16; */
  1235. dev_warn(d, "cp %p had hardware error\n", cp);
  1236. break;
  1237. case CMD_CONNECTION_LOST:
  1238. dev_warn(d, "cp %p had connection lost\n", cp);
  1239. break;
  1240. case CMD_ABORTED:
  1241. dev_warn(d, "cp %p was aborted\n", cp);
  1242. break;
  1243. case CMD_ABORT_FAILED:
  1244. dev_warn(d, "cp %p reports abort failed\n", cp);
  1245. break;
  1246. case CMD_UNSOLICITED_ABORT:
  1247. dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
  1248. break;
  1249. case CMD_TIMEOUT:
  1250. dev_warn(d, "cp %p timed out\n", cp);
  1251. break;
  1252. case CMD_UNABORTABLE:
  1253. dev_warn(d, "Command unabortable\n");
  1254. break;
  1255. default:
  1256. dev_warn(d, "cp %p returned unknown status %x\n", cp,
  1257. ei->CommandStatus);
  1258. }
  1259. }
  1260. static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
  1261. unsigned char page, unsigned char *buf,
  1262. unsigned char bufsize)
  1263. {
  1264. int rc = IO_OK;
  1265. struct CommandList *c;
  1266. struct ErrorInfo *ei;
  1267. c = cmd_special_alloc(h);
  1268. if (c == NULL) { /* trouble... */
  1269. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1270. return -ENOMEM;
  1271. }
  1272. fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD);
  1273. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1274. ei = c->err_info;
  1275. if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1276. hpsa_scsi_interpret_error(c);
  1277. rc = -1;
  1278. }
  1279. cmd_special_free(h, c);
  1280. return rc;
  1281. }
  1282. static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
  1283. {
  1284. int rc = IO_OK;
  1285. struct CommandList *c;
  1286. struct ErrorInfo *ei;
  1287. c = cmd_special_alloc(h);
  1288. if (c == NULL) { /* trouble... */
  1289. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1290. return -ENOMEM;
  1291. }
  1292. fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG);
  1293. hpsa_scsi_do_simple_cmd_core(h, c);
  1294. /* no unmap needed here because no data xfer. */
  1295. ei = c->err_info;
  1296. if (ei->CommandStatus != 0) {
  1297. hpsa_scsi_interpret_error(c);
  1298. rc = -1;
  1299. }
  1300. cmd_special_free(h, c);
  1301. return rc;
  1302. }
  1303. static void hpsa_get_raid_level(struct ctlr_info *h,
  1304. unsigned char *scsi3addr, unsigned char *raid_level)
  1305. {
  1306. int rc;
  1307. unsigned char *buf;
  1308. *raid_level = RAID_UNKNOWN;
  1309. buf = kzalloc(64, GFP_KERNEL);
  1310. if (!buf)
  1311. return;
  1312. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
  1313. if (rc == 0)
  1314. *raid_level = buf[8];
  1315. if (*raid_level > RAID_UNKNOWN)
  1316. *raid_level = RAID_UNKNOWN;
  1317. kfree(buf);
  1318. return;
  1319. }
  1320. /* Get the device id from inquiry page 0x83 */
  1321. static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
  1322. unsigned char *device_id, int buflen)
  1323. {
  1324. int rc;
  1325. unsigned char *buf;
  1326. if (buflen > 16)
  1327. buflen = 16;
  1328. buf = kzalloc(64, GFP_KERNEL);
  1329. if (!buf)
  1330. return -1;
  1331. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
  1332. if (rc == 0)
  1333. memcpy(device_id, &buf[8], buflen);
  1334. kfree(buf);
  1335. return rc != 0;
  1336. }
  1337. static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
  1338. struct ReportLUNdata *buf, int bufsize,
  1339. int extended_response)
  1340. {
  1341. int rc = IO_OK;
  1342. struct CommandList *c;
  1343. unsigned char scsi3addr[8];
  1344. struct ErrorInfo *ei;
  1345. c = cmd_special_alloc(h);
  1346. if (c == NULL) { /* trouble... */
  1347. dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1348. return -1;
  1349. }
  1350. /* address the controller */
  1351. memset(scsi3addr, 0, sizeof(scsi3addr));
  1352. fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
  1353. buf, bufsize, 0, scsi3addr, TYPE_CMD);
  1354. if (extended_response)
  1355. c->Request.CDB[1] = extended_response;
  1356. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1357. ei = c->err_info;
  1358. if (ei->CommandStatus != 0 &&
  1359. ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1360. hpsa_scsi_interpret_error(c);
  1361. rc = -1;
  1362. }
  1363. cmd_special_free(h, c);
  1364. return rc;
  1365. }
  1366. static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
  1367. struct ReportLUNdata *buf,
  1368. int bufsize, int extended_response)
  1369. {
  1370. return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
  1371. }
  1372. static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
  1373. struct ReportLUNdata *buf, int bufsize)
  1374. {
  1375. return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
  1376. }
  1377. static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
  1378. int bus, int target, int lun)
  1379. {
  1380. device->bus = bus;
  1381. device->target = target;
  1382. device->lun = lun;
  1383. }
  1384. static int hpsa_update_device_info(struct ctlr_info *h,
  1385. unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device)
  1386. {
  1387. #define OBDR_TAPE_INQ_SIZE 49
  1388. unsigned char *inq_buff;
  1389. inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
  1390. if (!inq_buff)
  1391. goto bail_out;
  1392. /* Do an inquiry to the device to see what it is. */
  1393. if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
  1394. (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
  1395. /* Inquiry failed (msg printed already) */
  1396. dev_err(&h->pdev->dev,
  1397. "hpsa_update_device_info: inquiry failed\n");
  1398. goto bail_out;
  1399. }
  1400. this_device->devtype = (inq_buff[0] & 0x1f);
  1401. memcpy(this_device->scsi3addr, scsi3addr, 8);
  1402. memcpy(this_device->vendor, &inq_buff[8],
  1403. sizeof(this_device->vendor));
  1404. memcpy(this_device->model, &inq_buff[16],
  1405. sizeof(this_device->model));
  1406. memset(this_device->device_id, 0,
  1407. sizeof(this_device->device_id));
  1408. hpsa_get_device_id(h, scsi3addr, this_device->device_id,
  1409. sizeof(this_device->device_id));
  1410. if (this_device->devtype == TYPE_DISK &&
  1411. is_logical_dev_addr_mode(scsi3addr))
  1412. hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
  1413. else
  1414. this_device->raid_level = RAID_UNKNOWN;
  1415. kfree(inq_buff);
  1416. return 0;
  1417. bail_out:
  1418. kfree(inq_buff);
  1419. return 1;
  1420. }
  1421. static unsigned char *msa2xxx_model[] = {
  1422. "MSA2012",
  1423. "MSA2024",
  1424. "MSA2312",
  1425. "MSA2324",
  1426. NULL,
  1427. };
  1428. static int is_msa2xxx(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
  1429. {
  1430. int i;
  1431. for (i = 0; msa2xxx_model[i]; i++)
  1432. if (strncmp(device->model, msa2xxx_model[i],
  1433. strlen(msa2xxx_model[i])) == 0)
  1434. return 1;
  1435. return 0;
  1436. }
  1437. /* Helper function to assign bus, target, lun mapping of devices.
  1438. * Puts non-msa2xxx logical volumes on bus 0, msa2xxx logical
  1439. * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
  1440. * Logical drive target and lun are assigned at this time, but
  1441. * physical device lun and target assignment are deferred (assigned
  1442. * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
  1443. */
  1444. static void figure_bus_target_lun(struct ctlr_info *h,
  1445. u8 *lunaddrbytes, int *bus, int *target, int *lun,
  1446. struct hpsa_scsi_dev_t *device)
  1447. {
  1448. u32 lunid;
  1449. if (is_logical_dev_addr_mode(lunaddrbytes)) {
  1450. /* logical device */
  1451. if (unlikely(is_scsi_rev_5(h))) {
  1452. /* p1210m, logical drives lun assignments
  1453. * match SCSI REPORT LUNS data.
  1454. */
  1455. lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
  1456. *bus = 0;
  1457. *target = 0;
  1458. *lun = (lunid & 0x3fff) + 1;
  1459. } else {
  1460. /* not p1210m... */
  1461. lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
  1462. if (is_msa2xxx(h, device)) {
  1463. /* msa2xxx way, put logicals on bus 1
  1464. * and match target/lun numbers box
  1465. * reports.
  1466. */
  1467. *bus = 1;
  1468. *target = (lunid >> 16) & 0x3fff;
  1469. *lun = lunid & 0x00ff;
  1470. } else {
  1471. /* Traditional smart array way. */
  1472. *bus = 0;
  1473. *lun = 0;
  1474. *target = lunid & 0x3fff;
  1475. }
  1476. }
  1477. } else {
  1478. /* physical device */
  1479. if (is_hba_lunid(lunaddrbytes))
  1480. if (unlikely(is_scsi_rev_5(h))) {
  1481. *bus = 0; /* put p1210m ctlr at 0,0,0 */
  1482. *target = 0;
  1483. *lun = 0;
  1484. return;
  1485. } else
  1486. *bus = 3; /* traditional smartarray */
  1487. else
  1488. *bus = 2; /* physical disk */
  1489. *target = -1;
  1490. *lun = -1; /* we will fill these in later. */
  1491. }
  1492. }
  1493. /*
  1494. * If there is no lun 0 on a target, linux won't find any devices.
  1495. * For the MSA2xxx boxes, we have to manually detect the enclosure
  1496. * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
  1497. * it for some reason. *tmpdevice is the target we're adding,
  1498. * this_device is a pointer into the current element of currentsd[]
  1499. * that we're building up in update_scsi_devices(), below.
  1500. * lunzerobits is a bitmap that tracks which targets already have a
  1501. * lun 0 assigned.
  1502. * Returns 1 if an enclosure was added, 0 if not.
  1503. */
  1504. static int add_msa2xxx_enclosure_device(struct ctlr_info *h,
  1505. struct hpsa_scsi_dev_t *tmpdevice,
  1506. struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
  1507. int bus, int target, int lun, unsigned long lunzerobits[],
  1508. int *nmsa2xxx_enclosures)
  1509. {
  1510. unsigned char scsi3addr[8];
  1511. if (test_bit(target, lunzerobits))
  1512. return 0; /* There is already a lun 0 on this target. */
  1513. if (!is_logical_dev_addr_mode(lunaddrbytes))
  1514. return 0; /* It's the logical targets that may lack lun 0. */
  1515. if (!is_msa2xxx(h, tmpdevice))
  1516. return 0; /* It's only the MSA2xxx that have this problem. */
  1517. if (lun == 0) /* if lun is 0, then obviously we have a lun 0. */
  1518. return 0;
  1519. memset(scsi3addr, 0, 8);
  1520. scsi3addr[3] = target;
  1521. if (is_hba_lunid(scsi3addr))
  1522. return 0; /* Don't add the RAID controller here. */
  1523. if (is_scsi_rev_5(h))
  1524. return 0; /* p1210m doesn't need to do this. */
  1525. #define MAX_MSA2XXX_ENCLOSURES 32
  1526. if (*nmsa2xxx_enclosures >= MAX_MSA2XXX_ENCLOSURES) {
  1527. dev_warn(&h->pdev->dev, "Maximum number of MSA2XXX "
  1528. "enclosures exceeded. Check your hardware "
  1529. "configuration.");
  1530. return 0;
  1531. }
  1532. if (hpsa_update_device_info(h, scsi3addr, this_device))
  1533. return 0;
  1534. (*nmsa2xxx_enclosures)++;
  1535. hpsa_set_bus_target_lun(this_device, bus, target, 0);
  1536. set_bit(target, lunzerobits);
  1537. return 1;
  1538. }
  1539. /*
  1540. * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
  1541. * logdev. The number of luns in physdev and logdev are returned in
  1542. * *nphysicals and *nlogicals, respectively.
  1543. * Returns 0 on success, -1 otherwise.
  1544. */
  1545. static int hpsa_gather_lun_info(struct ctlr_info *h,
  1546. int reportlunsize,
  1547. struct ReportLUNdata *physdev, u32 *nphysicals,
  1548. struct ReportLUNdata *logdev, u32 *nlogicals)
  1549. {
  1550. if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
  1551. dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
  1552. return -1;
  1553. }
  1554. *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
  1555. if (*nphysicals > HPSA_MAX_PHYS_LUN) {
  1556. dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
  1557. " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1558. *nphysicals - HPSA_MAX_PHYS_LUN);
  1559. *nphysicals = HPSA_MAX_PHYS_LUN;
  1560. }
  1561. if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
  1562. dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
  1563. return -1;
  1564. }
  1565. *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
  1566. /* Reject Logicals in excess of our max capability. */
  1567. if (*nlogicals > HPSA_MAX_LUN) {
  1568. dev_warn(&h->pdev->dev,
  1569. "maximum logical LUNs (%d) exceeded. "
  1570. "%d LUNs ignored.\n", HPSA_MAX_LUN,
  1571. *nlogicals - HPSA_MAX_LUN);
  1572. *nlogicals = HPSA_MAX_LUN;
  1573. }
  1574. if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
  1575. dev_warn(&h->pdev->dev,
  1576. "maximum logical + physical LUNs (%d) exceeded. "
  1577. "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1578. *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
  1579. *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
  1580. }
  1581. return 0;
  1582. }
  1583. u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
  1584. int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
  1585. struct ReportLUNdata *logdev_list)
  1586. {
  1587. /* Helper function, figure out where the LUN ID info is coming from
  1588. * given index i, lists of physical and logical devices, where in
  1589. * the list the raid controller is supposed to appear (first or last)
  1590. */
  1591. int logicals_start = nphysicals + (raid_ctlr_position == 0);
  1592. int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
  1593. if (i == raid_ctlr_position)
  1594. return RAID_CTLR_LUNID;
  1595. if (i < logicals_start)
  1596. return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
  1597. if (i < last_device)
  1598. return &logdev_list->LUN[i - nphysicals -
  1599. (raid_ctlr_position == 0)][0];
  1600. BUG();
  1601. return NULL;
  1602. }
  1603. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
  1604. {
  1605. /* the idea here is we could get notified
  1606. * that some devices have changed, so we do a report
  1607. * physical luns and report logical luns cmd, and adjust
  1608. * our list of devices accordingly.
  1609. *
  1610. * The scsi3addr's of devices won't change so long as the
  1611. * adapter is not reset. That means we can rescan and
  1612. * tell which devices we already know about, vs. new
  1613. * devices, vs. disappearing devices.
  1614. */
  1615. struct ReportLUNdata *physdev_list = NULL;
  1616. struct ReportLUNdata *logdev_list = NULL;
  1617. unsigned char *inq_buff = NULL;
  1618. u32 nphysicals = 0;
  1619. u32 nlogicals = 0;
  1620. u32 ndev_allocated = 0;
  1621. struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
  1622. int ncurrent = 0;
  1623. int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
  1624. int i, nmsa2xxx_enclosures, ndevs_to_allocate;
  1625. int bus, target, lun;
  1626. int raid_ctlr_position;
  1627. DECLARE_BITMAP(lunzerobits, HPSA_MAX_TARGETS_PER_CTLR);
  1628. currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  1629. GFP_KERNEL);
  1630. physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1631. logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1632. inq_buff = kmalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
  1633. tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
  1634. if (!currentsd || !physdev_list || !logdev_list ||
  1635. !inq_buff || !tmpdevice) {
  1636. dev_err(&h->pdev->dev, "out of memory\n");
  1637. goto out;
  1638. }
  1639. memset(lunzerobits, 0, sizeof(lunzerobits));
  1640. if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
  1641. logdev_list, &nlogicals))
  1642. goto out;
  1643. /* We might see up to 32 MSA2xxx enclosures, actually 8 of them
  1644. * but each of them 4 times through different paths. The plus 1
  1645. * is for the RAID controller.
  1646. */
  1647. ndevs_to_allocate = nphysicals + nlogicals + MAX_MSA2XXX_ENCLOSURES + 1;
  1648. /* Allocate the per device structures */
  1649. for (i = 0; i < ndevs_to_allocate; i++) {
  1650. currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
  1651. if (!currentsd[i]) {
  1652. dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
  1653. __FILE__, __LINE__);
  1654. goto out;
  1655. }
  1656. ndev_allocated++;
  1657. }
  1658. if (unlikely(is_scsi_rev_5(h)))
  1659. raid_ctlr_position = 0;
  1660. else
  1661. raid_ctlr_position = nphysicals + nlogicals;
  1662. /* adjust our table of devices */
  1663. nmsa2xxx_enclosures = 0;
  1664. for (i = 0; i < nphysicals + nlogicals + 1; i++) {
  1665. u8 *lunaddrbytes;
  1666. /* Figure out where the LUN ID info is coming from */
  1667. lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
  1668. i, nphysicals, nlogicals, physdev_list, logdev_list);
  1669. /* skip masked physical devices. */
  1670. if (lunaddrbytes[3] & 0xC0 &&
  1671. i < nphysicals + (raid_ctlr_position == 0))
  1672. continue;
  1673. /* Get device type, vendor, model, device id */
  1674. if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice))
  1675. continue; /* skip it if we can't talk to it. */
  1676. figure_bus_target_lun(h, lunaddrbytes, &bus, &target, &lun,
  1677. tmpdevice);
  1678. this_device = currentsd[ncurrent];
  1679. /*
  1680. * For the msa2xxx boxes, we have to insert a LUN 0 which
  1681. * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
  1682. * is nonetheless an enclosure device there. We have to
  1683. * present that otherwise linux won't find anything if
  1684. * there is no lun 0.
  1685. */
  1686. if (add_msa2xxx_enclosure_device(h, tmpdevice, this_device,
  1687. lunaddrbytes, bus, target, lun, lunzerobits,
  1688. &nmsa2xxx_enclosures)) {
  1689. ncurrent++;
  1690. this_device = currentsd[ncurrent];
  1691. }
  1692. *this_device = *tmpdevice;
  1693. hpsa_set_bus_target_lun(this_device, bus, target, lun);
  1694. switch (this_device->devtype) {
  1695. case TYPE_ROM: {
  1696. /* We don't *really* support actual CD-ROM devices,
  1697. * just "One Button Disaster Recovery" tape drive
  1698. * which temporarily pretends to be a CD-ROM drive.
  1699. * So we check that the device is really an OBDR tape
  1700. * device by checking for "$DR-10" in bytes 43-48 of
  1701. * the inquiry data.
  1702. */
  1703. char obdr_sig[7];
  1704. #define OBDR_TAPE_SIG "$DR-10"
  1705. strncpy(obdr_sig, &inq_buff[43], 6);
  1706. obdr_sig[6] = '\0';
  1707. if (strncmp(obdr_sig, OBDR_TAPE_SIG, 6) != 0)
  1708. /* Not OBDR device, ignore it. */
  1709. break;
  1710. }
  1711. ncurrent++;
  1712. break;
  1713. case TYPE_DISK:
  1714. if (i < nphysicals)
  1715. break;
  1716. ncurrent++;
  1717. break;
  1718. case TYPE_TAPE:
  1719. case TYPE_MEDIUM_CHANGER:
  1720. ncurrent++;
  1721. break;
  1722. case TYPE_RAID:
  1723. /* Only present the Smartarray HBA as a RAID controller.
  1724. * If it's a RAID controller other than the HBA itself
  1725. * (an external RAID controller, MSA500 or similar)
  1726. * don't present it.
  1727. */
  1728. if (!is_hba_lunid(lunaddrbytes))
  1729. break;
  1730. ncurrent++;
  1731. break;
  1732. default:
  1733. break;
  1734. }
  1735. if (ncurrent >= HPSA_MAX_SCSI_DEVS_PER_HBA)
  1736. break;
  1737. }
  1738. adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
  1739. out:
  1740. kfree(tmpdevice);
  1741. for (i = 0; i < ndev_allocated; i++)
  1742. kfree(currentsd[i]);
  1743. kfree(currentsd);
  1744. kfree(inq_buff);
  1745. kfree(physdev_list);
  1746. kfree(logdev_list);
  1747. }
  1748. /* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
  1749. * dma mapping and fills in the scatter gather entries of the
  1750. * hpsa command, cp.
  1751. */
  1752. static int hpsa_scatter_gather(struct ctlr_info *h,
  1753. struct CommandList *cp,
  1754. struct scsi_cmnd *cmd)
  1755. {
  1756. unsigned int len;
  1757. struct scatterlist *sg;
  1758. u64 addr64;
  1759. int use_sg, i, sg_index, chained;
  1760. struct SGDescriptor *curr_sg;
  1761. BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
  1762. use_sg = scsi_dma_map(cmd);
  1763. if (use_sg < 0)
  1764. return use_sg;
  1765. if (!use_sg)
  1766. goto sglist_finished;
  1767. curr_sg = cp->SG;
  1768. chained = 0;
  1769. sg_index = 0;
  1770. scsi_for_each_sg(cmd, sg, use_sg, i) {
  1771. if (i == h->max_cmd_sg_entries - 1 &&
  1772. use_sg > h->max_cmd_sg_entries) {
  1773. chained = 1;
  1774. curr_sg = h->cmd_sg_list[cp->cmdindex];
  1775. sg_index = 0;
  1776. }
  1777. addr64 = (u64) sg_dma_address(sg);
  1778. len = sg_dma_len(sg);
  1779. curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
  1780. curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
  1781. curr_sg->Len = len;
  1782. curr_sg->Ext = 0; /* we are not chaining */
  1783. curr_sg++;
  1784. }
  1785. if (use_sg + chained > h->maxSG)
  1786. h->maxSG = use_sg + chained;
  1787. if (chained) {
  1788. cp->Header.SGList = h->max_cmd_sg_entries;
  1789. cp->Header.SGTotal = (u16) (use_sg + 1);
  1790. hpsa_map_sg_chain_block(h, cp);
  1791. return 0;
  1792. }
  1793. sglist_finished:
  1794. cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
  1795. cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
  1796. return 0;
  1797. }
  1798. static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
  1799. void (*done)(struct scsi_cmnd *))
  1800. {
  1801. struct ctlr_info *h;
  1802. struct hpsa_scsi_dev_t *dev;
  1803. unsigned char scsi3addr[8];
  1804. struct CommandList *c;
  1805. unsigned long flags;
  1806. /* Get the ptr to our adapter structure out of cmd->host. */
  1807. h = sdev_to_hba(cmd->device);
  1808. dev = cmd->device->hostdata;
  1809. if (!dev) {
  1810. cmd->result = DID_NO_CONNECT << 16;
  1811. done(cmd);
  1812. return 0;
  1813. }
  1814. memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
  1815. /* Need a lock as this is being allocated from the pool */
  1816. spin_lock_irqsave(&h->lock, flags);
  1817. c = cmd_alloc(h);
  1818. spin_unlock_irqrestore(&h->lock, flags);
  1819. if (c == NULL) { /* trouble... */
  1820. dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
  1821. return SCSI_MLQUEUE_HOST_BUSY;
  1822. }
  1823. /* Fill in the command list header */
  1824. cmd->scsi_done = done; /* save this for use by completion code */
  1825. /* save c in case we have to abort it */
  1826. cmd->host_scribble = (unsigned char *) c;
  1827. c->cmd_type = CMD_SCSI;
  1828. c->scsi_cmd = cmd;
  1829. c->Header.ReplyQueue = 0; /* unused in simple mode */
  1830. memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
  1831. c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
  1832. c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
  1833. /* Fill in the request block... */
  1834. c->Request.Timeout = 0;
  1835. memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
  1836. BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
  1837. c->Request.CDBLen = cmd->cmd_len;
  1838. memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
  1839. c->Request.Type.Type = TYPE_CMD;
  1840. c->Request.Type.Attribute = ATTR_SIMPLE;
  1841. switch (cmd->sc_data_direction) {
  1842. case DMA_TO_DEVICE:
  1843. c->Request.Type.Direction = XFER_WRITE;
  1844. break;
  1845. case DMA_FROM_DEVICE:
  1846. c->Request.Type.Direction = XFER_READ;
  1847. break;
  1848. case DMA_NONE:
  1849. c->Request.Type.Direction = XFER_NONE;
  1850. break;
  1851. case DMA_BIDIRECTIONAL:
  1852. /* This can happen if a buggy application does a scsi passthru
  1853. * and sets both inlen and outlen to non-zero. ( see
  1854. * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
  1855. */
  1856. c->Request.Type.Direction = XFER_RSVD;
  1857. /* This is technically wrong, and hpsa controllers should
  1858. * reject it with CMD_INVALID, which is the most correct
  1859. * response, but non-fibre backends appear to let it
  1860. * slide by, and give the same results as if this field
  1861. * were set correctly. Either way is acceptable for
  1862. * our purposes here.
  1863. */
  1864. break;
  1865. default:
  1866. dev_err(&h->pdev->dev, "unknown data direction: %d\n",
  1867. cmd->sc_data_direction);
  1868. BUG();
  1869. break;
  1870. }
  1871. if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
  1872. cmd_free(h, c);
  1873. return SCSI_MLQUEUE_HOST_BUSY;
  1874. }
  1875. enqueue_cmd_and_start_io(h, c);
  1876. /* the cmd'll come back via intr handler in complete_scsi_command() */
  1877. return 0;
  1878. }
  1879. static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
  1880. static void hpsa_scan_start(struct Scsi_Host *sh)
  1881. {
  1882. struct ctlr_info *h = shost_to_hba(sh);
  1883. unsigned long flags;
  1884. /* wait until any scan already in progress is finished. */
  1885. while (1) {
  1886. spin_lock_irqsave(&h->scan_lock, flags);
  1887. if (h->scan_finished)
  1888. break;
  1889. spin_unlock_irqrestore(&h->scan_lock, flags);
  1890. wait_event(h->scan_wait_queue, h->scan_finished);
  1891. /* Note: We don't need to worry about a race between this
  1892. * thread and driver unload because the midlayer will
  1893. * have incremented the reference count, so unload won't
  1894. * happen if we're in here.
  1895. */
  1896. }
  1897. h->scan_finished = 0; /* mark scan as in progress */
  1898. spin_unlock_irqrestore(&h->scan_lock, flags);
  1899. hpsa_update_scsi_devices(h, h->scsi_host->host_no);
  1900. spin_lock_irqsave(&h->scan_lock, flags);
  1901. h->scan_finished = 1; /* mark scan as finished. */
  1902. wake_up_all(&h->scan_wait_queue);
  1903. spin_unlock_irqrestore(&h->scan_lock, flags);
  1904. }
  1905. static int hpsa_scan_finished(struct Scsi_Host *sh,
  1906. unsigned long elapsed_time)
  1907. {
  1908. struct ctlr_info *h = shost_to_hba(sh);
  1909. unsigned long flags;
  1910. int finished;
  1911. spin_lock_irqsave(&h->scan_lock, flags);
  1912. finished = h->scan_finished;
  1913. spin_unlock_irqrestore(&h->scan_lock, flags);
  1914. return finished;
  1915. }
  1916. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  1917. int qdepth, int reason)
  1918. {
  1919. struct ctlr_info *h = sdev_to_hba(sdev);
  1920. if (reason != SCSI_QDEPTH_DEFAULT)
  1921. return -ENOTSUPP;
  1922. if (qdepth < 1)
  1923. qdepth = 1;
  1924. else
  1925. if (qdepth > h->nr_cmds)
  1926. qdepth = h->nr_cmds;
  1927. scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
  1928. return sdev->queue_depth;
  1929. }
  1930. static void hpsa_unregister_scsi(struct ctlr_info *h)
  1931. {
  1932. /* we are being forcibly unloaded, and may not refuse. */
  1933. scsi_remove_host(h->scsi_host);
  1934. scsi_host_put(h->scsi_host);
  1935. h->scsi_host = NULL;
  1936. }
  1937. static int hpsa_register_scsi(struct ctlr_info *h)
  1938. {
  1939. int rc;
  1940. rc = hpsa_scsi_detect(h);
  1941. if (rc != 0)
  1942. dev_err(&h->pdev->dev, "hpsa_register_scsi: failed"
  1943. " hpsa_scsi_detect(), rc is %d\n", rc);
  1944. return rc;
  1945. }
  1946. static int wait_for_device_to_become_ready(struct ctlr_info *h,
  1947. unsigned char lunaddr[])
  1948. {
  1949. int rc = 0;
  1950. int count = 0;
  1951. int waittime = 1; /* seconds */
  1952. struct CommandList *c;
  1953. c = cmd_special_alloc(h);
  1954. if (!c) {
  1955. dev_warn(&h->pdev->dev, "out of memory in "
  1956. "wait_for_device_to_become_ready.\n");
  1957. return IO_ERROR;
  1958. }
  1959. /* Send test unit ready until device ready, or give up. */
  1960. while (count < HPSA_TUR_RETRY_LIMIT) {
  1961. /* Wait for a bit. do this first, because if we send
  1962. * the TUR right away, the reset will just abort it.
  1963. */
  1964. msleep(1000 * waittime);
  1965. count++;
  1966. /* Increase wait time with each try, up to a point. */
  1967. if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
  1968. waittime = waittime * 2;
  1969. /* Send the Test Unit Ready */
  1970. fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD);
  1971. hpsa_scsi_do_simple_cmd_core(h, c);
  1972. /* no unmap needed here because no data xfer. */
  1973. if (c->err_info->CommandStatus == CMD_SUCCESS)
  1974. break;
  1975. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  1976. c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
  1977. (c->err_info->SenseInfo[2] == NO_SENSE ||
  1978. c->err_info->SenseInfo[2] == UNIT_ATTENTION))
  1979. break;
  1980. dev_warn(&h->pdev->dev, "waiting %d secs "
  1981. "for device to become ready.\n", waittime);
  1982. rc = 1; /* device not ready. */
  1983. }
  1984. if (rc)
  1985. dev_warn(&h->pdev->dev, "giving up on device.\n");
  1986. else
  1987. dev_warn(&h->pdev->dev, "device is ready.\n");
  1988. cmd_special_free(h, c);
  1989. return rc;
  1990. }
  1991. /* Need at least one of these error handlers to keep ../scsi/hosts.c from
  1992. * complaining. Doing a host- or bus-reset can't do anything good here.
  1993. */
  1994. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
  1995. {
  1996. int rc;
  1997. struct ctlr_info *h;
  1998. struct hpsa_scsi_dev_t *dev;
  1999. /* find the controller to which the command to be aborted was sent */
  2000. h = sdev_to_hba(scsicmd->device);
  2001. if (h == NULL) /* paranoia */
  2002. return FAILED;
  2003. dev = scsicmd->device->hostdata;
  2004. if (!dev) {
  2005. dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
  2006. "device lookup failed.\n");
  2007. return FAILED;
  2008. }
  2009. dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
  2010. h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
  2011. /* send a reset to the SCSI LUN which the command was sent to */
  2012. rc = hpsa_send_reset(h, dev->scsi3addr);
  2013. if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
  2014. return SUCCESS;
  2015. dev_warn(&h->pdev->dev, "resetting device failed.\n");
  2016. return FAILED;
  2017. }
  2018. /*
  2019. * For operations that cannot sleep, a command block is allocated at init,
  2020. * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
  2021. * which ones are free or in use. Lock must be held when calling this.
  2022. * cmd_free() is the complement.
  2023. */
  2024. static struct CommandList *cmd_alloc(struct ctlr_info *h)
  2025. {
  2026. struct CommandList *c;
  2027. int i;
  2028. union u64bit temp64;
  2029. dma_addr_t cmd_dma_handle, err_dma_handle;
  2030. do {
  2031. i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
  2032. if (i == h->nr_cmds)
  2033. return NULL;
  2034. } while (test_and_set_bit
  2035. (i & (BITS_PER_LONG - 1),
  2036. h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
  2037. c = h->cmd_pool + i;
  2038. memset(c, 0, sizeof(*c));
  2039. cmd_dma_handle = h->cmd_pool_dhandle
  2040. + i * sizeof(*c);
  2041. c->err_info = h->errinfo_pool + i;
  2042. memset(c->err_info, 0, sizeof(*c->err_info));
  2043. err_dma_handle = h->errinfo_pool_dhandle
  2044. + i * sizeof(*c->err_info);
  2045. h->nr_allocs++;
  2046. c->cmdindex = i;
  2047. INIT_LIST_HEAD(&c->list);
  2048. c->busaddr = (u32) cmd_dma_handle;
  2049. temp64.val = (u64) err_dma_handle;
  2050. c->ErrDesc.Addr.lower = temp64.val32.lower;
  2051. c->ErrDesc.Addr.upper = temp64.val32.upper;
  2052. c->ErrDesc.Len = sizeof(*c->err_info);
  2053. c->h = h;
  2054. return c;
  2055. }
  2056. /* For operations that can wait for kmalloc to possibly sleep,
  2057. * this routine can be called. Lock need not be held to call
  2058. * cmd_special_alloc. cmd_special_free() is the complement.
  2059. */
  2060. static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
  2061. {
  2062. struct CommandList *c;
  2063. union u64bit temp64;
  2064. dma_addr_t cmd_dma_handle, err_dma_handle;
  2065. c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
  2066. if (c == NULL)
  2067. return NULL;
  2068. memset(c, 0, sizeof(*c));
  2069. c->cmdindex = -1;
  2070. c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
  2071. &err_dma_handle);
  2072. if (c->err_info == NULL) {
  2073. pci_free_consistent(h->pdev,
  2074. sizeof(*c), c, cmd_dma_handle);
  2075. return NULL;
  2076. }
  2077. memset(c->err_info, 0, sizeof(*c->err_info));
  2078. INIT_LIST_HEAD(&c->list);
  2079. c->busaddr = (u32) cmd_dma_handle;
  2080. temp64.val = (u64) err_dma_handle;
  2081. c->ErrDesc.Addr.lower = temp64.val32.lower;
  2082. c->ErrDesc.Addr.upper = temp64.val32.upper;
  2083. c->ErrDesc.Len = sizeof(*c->err_info);
  2084. c->h = h;
  2085. return c;
  2086. }
  2087. static void cmd_free(struct ctlr_info *h, struct CommandList *c)
  2088. {
  2089. int i;
  2090. i = c - h->cmd_pool;
  2091. clear_bit(i & (BITS_PER_LONG - 1),
  2092. h->cmd_pool_bits + (i / BITS_PER_LONG));
  2093. h->nr_frees++;
  2094. }
  2095. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
  2096. {
  2097. union u64bit temp64;
  2098. temp64.val32.lower = c->ErrDesc.Addr.lower;
  2099. temp64.val32.upper = c->ErrDesc.Addr.upper;
  2100. pci_free_consistent(h->pdev, sizeof(*c->err_info),
  2101. c->err_info, (dma_addr_t) temp64.val);
  2102. pci_free_consistent(h->pdev, sizeof(*c),
  2103. c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK));
  2104. }
  2105. #ifdef CONFIG_COMPAT
  2106. static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
  2107. {
  2108. IOCTL32_Command_struct __user *arg32 =
  2109. (IOCTL32_Command_struct __user *) arg;
  2110. IOCTL_Command_struct arg64;
  2111. IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
  2112. int err;
  2113. u32 cp;
  2114. memset(&arg64, 0, sizeof(arg64));
  2115. err = 0;
  2116. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2117. sizeof(arg64.LUN_info));
  2118. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2119. sizeof(arg64.Request));
  2120. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2121. sizeof(arg64.error_info));
  2122. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2123. err |= get_user(cp, &arg32->buf);
  2124. arg64.buf = compat_ptr(cp);
  2125. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2126. if (err)
  2127. return -EFAULT;
  2128. err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
  2129. if (err)
  2130. return err;
  2131. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2132. sizeof(arg32->error_info));
  2133. if (err)
  2134. return -EFAULT;
  2135. return err;
  2136. }
  2137. static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
  2138. int cmd, void *arg)
  2139. {
  2140. BIG_IOCTL32_Command_struct __user *arg32 =
  2141. (BIG_IOCTL32_Command_struct __user *) arg;
  2142. BIG_IOCTL_Command_struct arg64;
  2143. BIG_IOCTL_Command_struct __user *p =
  2144. compat_alloc_user_space(sizeof(arg64));
  2145. int err;
  2146. u32 cp;
  2147. memset(&arg64, 0, sizeof(arg64));
  2148. err = 0;
  2149. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2150. sizeof(arg64.LUN_info));
  2151. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2152. sizeof(arg64.Request));
  2153. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2154. sizeof(arg64.error_info));
  2155. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2156. err |= get_user(arg64.malloc_size, &arg32->malloc_size);
  2157. err |= get_user(cp, &arg32->buf);
  2158. arg64.buf = compat_ptr(cp);
  2159. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2160. if (err)
  2161. return -EFAULT;
  2162. err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
  2163. if (err)
  2164. return err;
  2165. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2166. sizeof(arg32->error_info));
  2167. if (err)
  2168. return -EFAULT;
  2169. return err;
  2170. }
  2171. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2172. {
  2173. switch (cmd) {
  2174. case CCISS_GETPCIINFO:
  2175. case CCISS_GETINTINFO:
  2176. case CCISS_SETINTINFO:
  2177. case CCISS_GETNODENAME:
  2178. case CCISS_SETNODENAME:
  2179. case CCISS_GETHEARTBEAT:
  2180. case CCISS_GETBUSTYPES:
  2181. case CCISS_GETFIRMVER:
  2182. case CCISS_GETDRIVVER:
  2183. case CCISS_REVALIDVOLS:
  2184. case CCISS_DEREGDISK:
  2185. case CCISS_REGNEWDISK:
  2186. case CCISS_REGNEWD:
  2187. case CCISS_RESCANDISK:
  2188. case CCISS_GETLUNINFO:
  2189. return hpsa_ioctl(dev, cmd, arg);
  2190. case CCISS_PASSTHRU32:
  2191. return hpsa_ioctl32_passthru(dev, cmd, arg);
  2192. case CCISS_BIG_PASSTHRU32:
  2193. return hpsa_ioctl32_big_passthru(dev, cmd, arg);
  2194. default:
  2195. return -ENOIOCTLCMD;
  2196. }
  2197. }
  2198. #endif
  2199. static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
  2200. {
  2201. struct hpsa_pci_info pciinfo;
  2202. if (!argp)
  2203. return -EINVAL;
  2204. pciinfo.domain = pci_domain_nr(h->pdev->bus);
  2205. pciinfo.bus = h->pdev->bus->number;
  2206. pciinfo.dev_fn = h->pdev->devfn;
  2207. pciinfo.board_id = h->board_id;
  2208. if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
  2209. return -EFAULT;
  2210. return 0;
  2211. }
  2212. static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
  2213. {
  2214. DriverVer_type DriverVer;
  2215. unsigned char vmaj, vmin, vsubmin;
  2216. int rc;
  2217. rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
  2218. &vmaj, &vmin, &vsubmin);
  2219. if (rc != 3) {
  2220. dev_info(&h->pdev->dev, "driver version string '%s' "
  2221. "unrecognized.", HPSA_DRIVER_VERSION);
  2222. vmaj = 0;
  2223. vmin = 0;
  2224. vsubmin = 0;
  2225. }
  2226. DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
  2227. if (!argp)
  2228. return -EINVAL;
  2229. if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
  2230. return -EFAULT;
  2231. return 0;
  2232. }
  2233. static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2234. {
  2235. IOCTL_Command_struct iocommand;
  2236. struct CommandList *c;
  2237. char *buff = NULL;
  2238. union u64bit temp64;
  2239. if (!argp)
  2240. return -EINVAL;
  2241. if (!capable(CAP_SYS_RAWIO))
  2242. return -EPERM;
  2243. if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
  2244. return -EFAULT;
  2245. if ((iocommand.buf_size < 1) &&
  2246. (iocommand.Request.Type.Direction != XFER_NONE)) {
  2247. return -EINVAL;
  2248. }
  2249. if (iocommand.buf_size > 0) {
  2250. buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
  2251. if (buff == NULL)
  2252. return -EFAULT;
  2253. if (iocommand.Request.Type.Direction == XFER_WRITE) {
  2254. /* Copy the data into the buffer we created */
  2255. if (copy_from_user(buff, iocommand.buf,
  2256. iocommand.buf_size)) {
  2257. kfree(buff);
  2258. return -EFAULT;
  2259. }
  2260. } else {
  2261. memset(buff, 0, iocommand.buf_size);
  2262. }
  2263. }
  2264. c = cmd_special_alloc(h);
  2265. if (c == NULL) {
  2266. kfree(buff);
  2267. return -ENOMEM;
  2268. }
  2269. /* Fill in the command type */
  2270. c->cmd_type = CMD_IOCTL_PEND;
  2271. /* Fill in Command Header */
  2272. c->Header.ReplyQueue = 0; /* unused in simple mode */
  2273. if (iocommand.buf_size > 0) { /* buffer to fill */
  2274. c->Header.SGList = 1;
  2275. c->Header.SGTotal = 1;
  2276. } else { /* no buffers to fill */
  2277. c->Header.SGList = 0;
  2278. c->Header.SGTotal = 0;
  2279. }
  2280. memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
  2281. /* use the kernel address the cmd block for tag */
  2282. c->Header.Tag.lower = c->busaddr;
  2283. /* Fill in Request block */
  2284. memcpy(&c->Request, &iocommand.Request,
  2285. sizeof(c->Request));
  2286. /* Fill in the scatter gather information */
  2287. if (iocommand.buf_size > 0) {
  2288. temp64.val = pci_map_single(h->pdev, buff,
  2289. iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
  2290. c->SG[0].Addr.lower = temp64.val32.lower;
  2291. c->SG[0].Addr.upper = temp64.val32.upper;
  2292. c->SG[0].Len = iocommand.buf_size;
  2293. c->SG[0].Ext = 0; /* we are not chaining*/
  2294. }
  2295. hpsa_scsi_do_simple_cmd_core(h, c);
  2296. hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
  2297. check_ioctl_unit_attention(h, c);
  2298. /* Copy the error information out */
  2299. memcpy(&iocommand.error_info, c->err_info,
  2300. sizeof(iocommand.error_info));
  2301. if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
  2302. kfree(buff);
  2303. cmd_special_free(h, c);
  2304. return -EFAULT;
  2305. }
  2306. if (iocommand.Request.Type.Direction == XFER_READ &&
  2307. iocommand.buf_size > 0) {
  2308. /* Copy the data out of the buffer we created */
  2309. if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
  2310. kfree(buff);
  2311. cmd_special_free(h, c);
  2312. return -EFAULT;
  2313. }
  2314. }
  2315. kfree(buff);
  2316. cmd_special_free(h, c);
  2317. return 0;
  2318. }
  2319. static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2320. {
  2321. BIG_IOCTL_Command_struct *ioc;
  2322. struct CommandList *c;
  2323. unsigned char **buff = NULL;
  2324. int *buff_size = NULL;
  2325. union u64bit temp64;
  2326. BYTE sg_used = 0;
  2327. int status = 0;
  2328. int i;
  2329. u32 left;
  2330. u32 sz;
  2331. BYTE __user *data_ptr;
  2332. if (!argp)
  2333. return -EINVAL;
  2334. if (!capable(CAP_SYS_RAWIO))
  2335. return -EPERM;
  2336. ioc = (BIG_IOCTL_Command_struct *)
  2337. kmalloc(sizeof(*ioc), GFP_KERNEL);
  2338. if (!ioc) {
  2339. status = -ENOMEM;
  2340. goto cleanup1;
  2341. }
  2342. if (copy_from_user(ioc, argp, sizeof(*ioc))) {
  2343. status = -EFAULT;
  2344. goto cleanup1;
  2345. }
  2346. if ((ioc->buf_size < 1) &&
  2347. (ioc->Request.Type.Direction != XFER_NONE)) {
  2348. status = -EINVAL;
  2349. goto cleanup1;
  2350. }
  2351. /* Check kmalloc limits using all SGs */
  2352. if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
  2353. status = -EINVAL;
  2354. goto cleanup1;
  2355. }
  2356. if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
  2357. status = -EINVAL;
  2358. goto cleanup1;
  2359. }
  2360. buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
  2361. if (!buff) {
  2362. status = -ENOMEM;
  2363. goto cleanup1;
  2364. }
  2365. buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
  2366. if (!buff_size) {
  2367. status = -ENOMEM;
  2368. goto cleanup1;
  2369. }
  2370. left = ioc->buf_size;
  2371. data_ptr = ioc->buf;
  2372. while (left) {
  2373. sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
  2374. buff_size[sg_used] = sz;
  2375. buff[sg_used] = kmalloc(sz, GFP_KERNEL);
  2376. if (buff[sg_used] == NULL) {
  2377. status = -ENOMEM;
  2378. goto cleanup1;
  2379. }
  2380. if (ioc->Request.Type.Direction == XFER_WRITE) {
  2381. if (copy_from_user(buff[sg_used], data_ptr, sz)) {
  2382. status = -ENOMEM;
  2383. goto cleanup1;
  2384. }
  2385. } else
  2386. memset(buff[sg_used], 0, sz);
  2387. left -= sz;
  2388. data_ptr += sz;
  2389. sg_used++;
  2390. }
  2391. c = cmd_special_alloc(h);
  2392. if (c == NULL) {
  2393. status = -ENOMEM;
  2394. goto cleanup1;
  2395. }
  2396. c->cmd_type = CMD_IOCTL_PEND;
  2397. c->Header.ReplyQueue = 0;
  2398. c->Header.SGList = c->Header.SGTotal = sg_used;
  2399. memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
  2400. c->Header.Tag.lower = c->busaddr;
  2401. memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
  2402. if (ioc->buf_size > 0) {
  2403. int i;
  2404. for (i = 0; i < sg_used; i++) {
  2405. temp64.val = pci_map_single(h->pdev, buff[i],
  2406. buff_size[i], PCI_DMA_BIDIRECTIONAL);
  2407. c->SG[i].Addr.lower = temp64.val32.lower;
  2408. c->SG[i].Addr.upper = temp64.val32.upper;
  2409. c->SG[i].Len = buff_size[i];
  2410. /* we are not chaining */
  2411. c->SG[i].Ext = 0;
  2412. }
  2413. }
  2414. hpsa_scsi_do_simple_cmd_core(h, c);
  2415. if (sg_used)
  2416. hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
  2417. check_ioctl_unit_attention(h, c);
  2418. /* Copy the error information out */
  2419. memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
  2420. if (copy_to_user(argp, ioc, sizeof(*ioc))) {
  2421. cmd_special_free(h, c);
  2422. status = -EFAULT;
  2423. goto cleanup1;
  2424. }
  2425. if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) {
  2426. /* Copy the data out of the buffer we created */
  2427. BYTE __user *ptr = ioc->buf;
  2428. for (i = 0; i < sg_used; i++) {
  2429. if (copy_to_user(ptr, buff[i], buff_size[i])) {
  2430. cmd_special_free(h, c);
  2431. status = -EFAULT;
  2432. goto cleanup1;
  2433. }
  2434. ptr += buff_size[i];
  2435. }
  2436. }
  2437. cmd_special_free(h, c);
  2438. status = 0;
  2439. cleanup1:
  2440. if (buff) {
  2441. for (i = 0; i < sg_used; i++)
  2442. kfree(buff[i]);
  2443. kfree(buff);
  2444. }
  2445. kfree(buff_size);
  2446. kfree(ioc);
  2447. return status;
  2448. }
  2449. static void check_ioctl_unit_attention(struct ctlr_info *h,
  2450. struct CommandList *c)
  2451. {
  2452. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  2453. c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
  2454. (void) check_for_unit_attention(h, c);
  2455. }
  2456. /*
  2457. * ioctl
  2458. */
  2459. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2460. {
  2461. struct ctlr_info *h;
  2462. void __user *argp = (void __user *)arg;
  2463. h = sdev_to_hba(dev);
  2464. switch (cmd) {
  2465. case CCISS_DEREGDISK:
  2466. case CCISS_REGNEWDISK:
  2467. case CCISS_REGNEWD:
  2468. hpsa_scan_start(h->scsi_host);
  2469. return 0;
  2470. case CCISS_GETPCIINFO:
  2471. return hpsa_getpciinfo_ioctl(h, argp);
  2472. case CCISS_GETDRIVVER:
  2473. return hpsa_getdrivver_ioctl(h, argp);
  2474. case CCISS_PASSTHRU:
  2475. return hpsa_passthru_ioctl(h, argp);
  2476. case CCISS_BIG_PASSTHRU:
  2477. return hpsa_big_passthru_ioctl(h, argp);
  2478. default:
  2479. return -ENOTTY;
  2480. }
  2481. }
  2482. static int __devinit hpsa_send_host_reset(struct ctlr_info *h,
  2483. unsigned char *scsi3addr, u8 reset_type)
  2484. {
  2485. struct CommandList *c;
  2486. c = cmd_alloc(h);
  2487. if (!c)
  2488. return -ENOMEM;
  2489. fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
  2490. RAID_CTLR_LUNID, TYPE_MSG);
  2491. c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
  2492. c->waiting = NULL;
  2493. enqueue_cmd_and_start_io(h, c);
  2494. /* Don't wait for completion, the reset won't complete. Don't free
  2495. * the command either. This is the last command we will send before
  2496. * re-initializing everything, so it doesn't matter and won't leak.
  2497. */
  2498. return 0;
  2499. }
  2500. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  2501. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  2502. int cmd_type)
  2503. {
  2504. int pci_dir = XFER_NONE;
  2505. c->cmd_type = CMD_IOCTL_PEND;
  2506. c->Header.ReplyQueue = 0;
  2507. if (buff != NULL && size > 0) {
  2508. c->Header.SGList = 1;
  2509. c->Header.SGTotal = 1;
  2510. } else {
  2511. c->Header.SGList = 0;
  2512. c->Header.SGTotal = 0;
  2513. }
  2514. c->Header.Tag.lower = c->busaddr;
  2515. memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
  2516. c->Request.Type.Type = cmd_type;
  2517. if (cmd_type == TYPE_CMD) {
  2518. switch (cmd) {
  2519. case HPSA_INQUIRY:
  2520. /* are we trying to read a vital product page */
  2521. if (page_code != 0) {
  2522. c->Request.CDB[1] = 0x01;
  2523. c->Request.CDB[2] = page_code;
  2524. }
  2525. c->Request.CDBLen = 6;
  2526. c->Request.Type.Attribute = ATTR_SIMPLE;
  2527. c->Request.Type.Direction = XFER_READ;
  2528. c->Request.Timeout = 0;
  2529. c->Request.CDB[0] = HPSA_INQUIRY;
  2530. c->Request.CDB[4] = size & 0xFF;
  2531. break;
  2532. case HPSA_REPORT_LOG:
  2533. case HPSA_REPORT_PHYS:
  2534. /* Talking to controller so It's a physical command
  2535. mode = 00 target = 0. Nothing to write.
  2536. */
  2537. c->Request.CDBLen = 12;
  2538. c->Request.Type.Attribute = ATTR_SIMPLE;
  2539. c->Request.Type.Direction = XFER_READ;
  2540. c->Request.Timeout = 0;
  2541. c->Request.CDB[0] = cmd;
  2542. c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
  2543. c->Request.CDB[7] = (size >> 16) & 0xFF;
  2544. c->Request.CDB[8] = (size >> 8) & 0xFF;
  2545. c->Request.CDB[9] = size & 0xFF;
  2546. break;
  2547. case HPSA_CACHE_FLUSH:
  2548. c->Request.CDBLen = 12;
  2549. c->Request.Type.Attribute = ATTR_SIMPLE;
  2550. c->Request.Type.Direction = XFER_WRITE;
  2551. c->Request.Timeout = 0;
  2552. c->Request.CDB[0] = BMIC_WRITE;
  2553. c->Request.CDB[6] = BMIC_CACHE_FLUSH;
  2554. break;
  2555. case TEST_UNIT_READY:
  2556. c->Request.CDBLen = 6;
  2557. c->Request.Type.Attribute = ATTR_SIMPLE;
  2558. c->Request.Type.Direction = XFER_NONE;
  2559. c->Request.Timeout = 0;
  2560. break;
  2561. default:
  2562. dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
  2563. BUG();
  2564. return;
  2565. }
  2566. } else if (cmd_type == TYPE_MSG) {
  2567. switch (cmd) {
  2568. case HPSA_DEVICE_RESET_MSG:
  2569. c->Request.CDBLen = 16;
  2570. c->Request.Type.Type = 1; /* It is a MSG not a CMD */
  2571. c->Request.Type.Attribute = ATTR_SIMPLE;
  2572. c->Request.Type.Direction = XFER_NONE;
  2573. c->Request.Timeout = 0; /* Don't time out */
  2574. memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
  2575. c->Request.CDB[0] = cmd;
  2576. c->Request.CDB[1] = 0x03; /* Reset target above */
  2577. /* If bytes 4-7 are zero, it means reset the */
  2578. /* LunID device */
  2579. c->Request.CDB[4] = 0x00;
  2580. c->Request.CDB[5] = 0x00;
  2581. c->Request.CDB[6] = 0x00;
  2582. c->Request.CDB[7] = 0x00;
  2583. break;
  2584. default:
  2585. dev_warn(&h->pdev->dev, "unknown message type %d\n",
  2586. cmd);
  2587. BUG();
  2588. }
  2589. } else {
  2590. dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
  2591. BUG();
  2592. }
  2593. switch (c->Request.Type.Direction) {
  2594. case XFER_READ:
  2595. pci_dir = PCI_DMA_FROMDEVICE;
  2596. break;
  2597. case XFER_WRITE:
  2598. pci_dir = PCI_DMA_TODEVICE;
  2599. break;
  2600. case XFER_NONE:
  2601. pci_dir = PCI_DMA_NONE;
  2602. break;
  2603. default:
  2604. pci_dir = PCI_DMA_BIDIRECTIONAL;
  2605. }
  2606. hpsa_map_one(h->pdev, c, buff, size, pci_dir);
  2607. return;
  2608. }
  2609. /*
  2610. * Map (physical) PCI mem into (virtual) kernel space
  2611. */
  2612. static void __iomem *remap_pci_mem(ulong base, ulong size)
  2613. {
  2614. ulong page_base = ((ulong) base) & PAGE_MASK;
  2615. ulong page_offs = ((ulong) base) - page_base;
  2616. void __iomem *page_remapped = ioremap(page_base, page_offs + size);
  2617. return page_remapped ? (page_remapped + page_offs) : NULL;
  2618. }
  2619. /* Takes cmds off the submission queue and sends them to the hardware,
  2620. * then puts them on the queue of cmds waiting for completion.
  2621. */
  2622. static void start_io(struct ctlr_info *h)
  2623. {
  2624. struct CommandList *c;
  2625. while (!list_empty(&h->reqQ)) {
  2626. c = list_entry(h->reqQ.next, struct CommandList, list);
  2627. /* can't do anything if fifo is full */
  2628. if ((h->access.fifo_full(h))) {
  2629. dev_warn(&h->pdev->dev, "fifo full\n");
  2630. break;
  2631. }
  2632. /* Get the first entry from the Request Q */
  2633. removeQ(c);
  2634. h->Qdepth--;
  2635. /* Tell the controller execute command */
  2636. h->access.submit_command(h, c);
  2637. /* Put job onto the completed Q */
  2638. addQ(&h->cmpQ, c);
  2639. }
  2640. }
  2641. static inline unsigned long get_next_completion(struct ctlr_info *h)
  2642. {
  2643. return h->access.command_completed(h);
  2644. }
  2645. static inline bool interrupt_pending(struct ctlr_info *h)
  2646. {
  2647. return h->access.intr_pending(h);
  2648. }
  2649. static inline long interrupt_not_for_us(struct ctlr_info *h)
  2650. {
  2651. return (h->access.intr_pending(h) == 0) ||
  2652. (h->interrupts_enabled == 0);
  2653. }
  2654. static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
  2655. u32 raw_tag)
  2656. {
  2657. if (unlikely(tag_index >= h->nr_cmds)) {
  2658. dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
  2659. return 1;
  2660. }
  2661. return 0;
  2662. }
  2663. static inline void finish_cmd(struct CommandList *c, u32 raw_tag)
  2664. {
  2665. removeQ(c);
  2666. if (likely(c->cmd_type == CMD_SCSI))
  2667. complete_scsi_command(c);
  2668. else if (c->cmd_type == CMD_IOCTL_PEND)
  2669. complete(c->waiting);
  2670. }
  2671. static inline u32 hpsa_tag_contains_index(u32 tag)
  2672. {
  2673. return tag & DIRECT_LOOKUP_BIT;
  2674. }
  2675. static inline u32 hpsa_tag_to_index(u32 tag)
  2676. {
  2677. return tag >> DIRECT_LOOKUP_SHIFT;
  2678. }
  2679. static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
  2680. {
  2681. #define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
  2682. #define HPSA_SIMPLE_ERROR_BITS 0x03
  2683. if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
  2684. return tag & ~HPSA_SIMPLE_ERROR_BITS;
  2685. return tag & ~HPSA_PERF_ERROR_BITS;
  2686. }
  2687. /* process completion of an indexed ("direct lookup") command */
  2688. static inline u32 process_indexed_cmd(struct ctlr_info *h,
  2689. u32 raw_tag)
  2690. {
  2691. u32 tag_index;
  2692. struct CommandList *c;
  2693. tag_index = hpsa_tag_to_index(raw_tag);
  2694. if (bad_tag(h, tag_index, raw_tag))
  2695. return next_command(h);
  2696. c = h->cmd_pool + tag_index;
  2697. finish_cmd(c, raw_tag);
  2698. return next_command(h);
  2699. }
  2700. /* process completion of a non-indexed command */
  2701. static inline u32 process_nonindexed_cmd(struct ctlr_info *h,
  2702. u32 raw_tag)
  2703. {
  2704. u32 tag;
  2705. struct CommandList *c = NULL;
  2706. tag = hpsa_tag_discard_error_bits(h, raw_tag);
  2707. list_for_each_entry(c, &h->cmpQ, list) {
  2708. if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
  2709. finish_cmd(c, raw_tag);
  2710. return next_command(h);
  2711. }
  2712. }
  2713. bad_tag(h, h->nr_cmds + 1, raw_tag);
  2714. return next_command(h);
  2715. }
  2716. /* Some controllers, like p400, will give us one interrupt
  2717. * after a soft reset, even if we turned interrupts off.
  2718. * Only need to check for this in the hpsa_xxx_discard_completions
  2719. * functions.
  2720. */
  2721. static int ignore_bogus_interrupt(struct ctlr_info *h)
  2722. {
  2723. if (likely(!reset_devices))
  2724. return 0;
  2725. if (likely(h->interrupts_enabled))
  2726. return 0;
  2727. dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
  2728. "(known firmware bug.) Ignoring.\n");
  2729. return 1;
  2730. }
  2731. static irqreturn_t hpsa_intx_discard_completions(int irq, void *dev_id)
  2732. {
  2733. struct ctlr_info *h = dev_id;
  2734. unsigned long flags;
  2735. u32 raw_tag;
  2736. if (ignore_bogus_interrupt(h))
  2737. return IRQ_NONE;
  2738. if (interrupt_not_for_us(h))
  2739. return IRQ_NONE;
  2740. spin_lock_irqsave(&h->lock, flags);
  2741. while (interrupt_pending(h)) {
  2742. raw_tag = get_next_completion(h);
  2743. while (raw_tag != FIFO_EMPTY)
  2744. raw_tag = next_command(h);
  2745. }
  2746. spin_unlock_irqrestore(&h->lock, flags);
  2747. return IRQ_HANDLED;
  2748. }
  2749. static irqreturn_t hpsa_msix_discard_completions(int irq, void *dev_id)
  2750. {
  2751. struct ctlr_info *h = dev_id;
  2752. unsigned long flags;
  2753. u32 raw_tag;
  2754. if (ignore_bogus_interrupt(h))
  2755. return IRQ_NONE;
  2756. spin_lock_irqsave(&h->lock, flags);
  2757. raw_tag = get_next_completion(h);
  2758. while (raw_tag != FIFO_EMPTY)
  2759. raw_tag = next_command(h);
  2760. spin_unlock_irqrestore(&h->lock, flags);
  2761. return IRQ_HANDLED;
  2762. }
  2763. static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id)
  2764. {
  2765. struct ctlr_info *h = dev_id;
  2766. unsigned long flags;
  2767. u32 raw_tag;
  2768. if (interrupt_not_for_us(h))
  2769. return IRQ_NONE;
  2770. spin_lock_irqsave(&h->lock, flags);
  2771. while (interrupt_pending(h)) {
  2772. raw_tag = get_next_completion(h);
  2773. while (raw_tag != FIFO_EMPTY) {
  2774. if (hpsa_tag_contains_index(raw_tag))
  2775. raw_tag = process_indexed_cmd(h, raw_tag);
  2776. else
  2777. raw_tag = process_nonindexed_cmd(h, raw_tag);
  2778. }
  2779. }
  2780. spin_unlock_irqrestore(&h->lock, flags);
  2781. return IRQ_HANDLED;
  2782. }
  2783. static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id)
  2784. {
  2785. struct ctlr_info *h = dev_id;
  2786. unsigned long flags;
  2787. u32 raw_tag;
  2788. spin_lock_irqsave(&h->lock, flags);
  2789. raw_tag = get_next_completion(h);
  2790. while (raw_tag != FIFO_EMPTY) {
  2791. if (hpsa_tag_contains_index(raw_tag))
  2792. raw_tag = process_indexed_cmd(h, raw_tag);
  2793. else
  2794. raw_tag = process_nonindexed_cmd(h, raw_tag);
  2795. }
  2796. spin_unlock_irqrestore(&h->lock, flags);
  2797. return IRQ_HANDLED;
  2798. }
  2799. /* Send a message CDB to the firmware. Careful, this only works
  2800. * in simple mode, not performant mode due to the tag lookup.
  2801. * We only ever use this immediately after a controller reset.
  2802. */
  2803. static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
  2804. unsigned char type)
  2805. {
  2806. struct Command {
  2807. struct CommandListHeader CommandHeader;
  2808. struct RequestBlock Request;
  2809. struct ErrDescriptor ErrorDescriptor;
  2810. };
  2811. struct Command *cmd;
  2812. static const size_t cmd_sz = sizeof(*cmd) +
  2813. sizeof(cmd->ErrorDescriptor);
  2814. dma_addr_t paddr64;
  2815. uint32_t paddr32, tag;
  2816. void __iomem *vaddr;
  2817. int i, err;
  2818. vaddr = pci_ioremap_bar(pdev, 0);
  2819. if (vaddr == NULL)
  2820. return -ENOMEM;
  2821. /* The Inbound Post Queue only accepts 32-bit physical addresses for the
  2822. * CCISS commands, so they must be allocated from the lower 4GiB of
  2823. * memory.
  2824. */
  2825. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  2826. if (err) {
  2827. iounmap(vaddr);
  2828. return -ENOMEM;
  2829. }
  2830. cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
  2831. if (cmd == NULL) {
  2832. iounmap(vaddr);
  2833. return -ENOMEM;
  2834. }
  2835. /* This must fit, because of the 32-bit consistent DMA mask. Also,
  2836. * although there's no guarantee, we assume that the address is at
  2837. * least 4-byte aligned (most likely, it's page-aligned).
  2838. */
  2839. paddr32 = paddr64;
  2840. cmd->CommandHeader.ReplyQueue = 0;
  2841. cmd->CommandHeader.SGList = 0;
  2842. cmd->CommandHeader.SGTotal = 0;
  2843. cmd->CommandHeader.Tag.lower = paddr32;
  2844. cmd->CommandHeader.Tag.upper = 0;
  2845. memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
  2846. cmd->Request.CDBLen = 16;
  2847. cmd->Request.Type.Type = TYPE_MSG;
  2848. cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
  2849. cmd->Request.Type.Direction = XFER_NONE;
  2850. cmd->Request.Timeout = 0; /* Don't time out */
  2851. cmd->Request.CDB[0] = opcode;
  2852. cmd->Request.CDB[1] = type;
  2853. memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
  2854. cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
  2855. cmd->ErrorDescriptor.Addr.upper = 0;
  2856. cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
  2857. writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
  2858. for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
  2859. tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
  2860. if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32)
  2861. break;
  2862. msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
  2863. }
  2864. iounmap(vaddr);
  2865. /* we leak the DMA buffer here ... no choice since the controller could
  2866. * still complete the command.
  2867. */
  2868. if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
  2869. dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
  2870. opcode, type);
  2871. return -ETIMEDOUT;
  2872. }
  2873. pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
  2874. if (tag & HPSA_ERROR_BIT) {
  2875. dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
  2876. opcode, type);
  2877. return -EIO;
  2878. }
  2879. dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
  2880. opcode, type);
  2881. return 0;
  2882. }
  2883. #define hpsa_noop(p) hpsa_message(p, 3, 0)
  2884. static int hpsa_controller_hard_reset(struct pci_dev *pdev,
  2885. void * __iomem vaddr, u32 use_doorbell)
  2886. {
  2887. u16 pmcsr;
  2888. int pos;
  2889. if (use_doorbell) {
  2890. /* For everything after the P600, the PCI power state method
  2891. * of resetting the controller doesn't work, so we have this
  2892. * other way using the doorbell register.
  2893. */
  2894. dev_info(&pdev->dev, "using doorbell to reset controller\n");
  2895. writel(use_doorbell, vaddr + SA5_DOORBELL);
  2896. } else { /* Try to do it the PCI power state way */
  2897. /* Quoting from the Open CISS Specification: "The Power
  2898. * Management Control/Status Register (CSR) controls the power
  2899. * state of the device. The normal operating state is D0,
  2900. * CSR=00h. The software off state is D3, CSR=03h. To reset
  2901. * the controller, place the interface device in D3 then to D0,
  2902. * this causes a secondary PCI reset which will reset the
  2903. * controller." */
  2904. pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
  2905. if (pos == 0) {
  2906. dev_err(&pdev->dev,
  2907. "hpsa_reset_controller: "
  2908. "PCI PM not supported\n");
  2909. return -ENODEV;
  2910. }
  2911. dev_info(&pdev->dev, "using PCI PM to reset controller\n");
  2912. /* enter the D3hot power management state */
  2913. pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
  2914. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  2915. pmcsr |= PCI_D3hot;
  2916. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  2917. msleep(500);
  2918. /* enter the D0 power management state */
  2919. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  2920. pmcsr |= PCI_D0;
  2921. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  2922. }
  2923. return 0;
  2924. }
  2925. static __devinit void init_driver_version(char *driver_version, int len)
  2926. {
  2927. memset(driver_version, 0, len);
  2928. strncpy(driver_version, "hpsa " HPSA_DRIVER_VERSION, len - 1);
  2929. }
  2930. static __devinit int write_driver_ver_to_cfgtable(
  2931. struct CfgTable __iomem *cfgtable)
  2932. {
  2933. char *driver_version;
  2934. int i, size = sizeof(cfgtable->driver_version);
  2935. driver_version = kmalloc(size, GFP_KERNEL);
  2936. if (!driver_version)
  2937. return -ENOMEM;
  2938. init_driver_version(driver_version, size);
  2939. for (i = 0; i < size; i++)
  2940. writeb(driver_version[i], &cfgtable->driver_version[i]);
  2941. kfree(driver_version);
  2942. return 0;
  2943. }
  2944. static __devinit void read_driver_ver_from_cfgtable(
  2945. struct CfgTable __iomem *cfgtable, unsigned char *driver_ver)
  2946. {
  2947. int i;
  2948. for (i = 0; i < sizeof(cfgtable->driver_version); i++)
  2949. driver_ver[i] = readb(&cfgtable->driver_version[i]);
  2950. }
  2951. static __devinit int controller_reset_failed(
  2952. struct CfgTable __iomem *cfgtable)
  2953. {
  2954. char *driver_ver, *old_driver_ver;
  2955. int rc, size = sizeof(cfgtable->driver_version);
  2956. old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
  2957. if (!old_driver_ver)
  2958. return -ENOMEM;
  2959. driver_ver = old_driver_ver + size;
  2960. /* After a reset, the 32 bytes of "driver version" in the cfgtable
  2961. * should have been changed, otherwise we know the reset failed.
  2962. */
  2963. init_driver_version(old_driver_ver, size);
  2964. read_driver_ver_from_cfgtable(cfgtable, driver_ver);
  2965. rc = !memcmp(driver_ver, old_driver_ver, size);
  2966. kfree(old_driver_ver);
  2967. return rc;
  2968. }
  2969. /* This does a hard reset of the controller using PCI power management
  2970. * states or the using the doorbell register.
  2971. */
  2972. static __devinit int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
  2973. {
  2974. u64 cfg_offset;
  2975. u32 cfg_base_addr;
  2976. u64 cfg_base_addr_index;
  2977. void __iomem *vaddr;
  2978. unsigned long paddr;
  2979. u32 misc_fw_support;
  2980. int rc;
  2981. struct CfgTable __iomem *cfgtable;
  2982. u32 use_doorbell;
  2983. u32 board_id;
  2984. u16 command_register;
  2985. /* For controllers as old as the P600, this is very nearly
  2986. * the same thing as
  2987. *
  2988. * pci_save_state(pci_dev);
  2989. * pci_set_power_state(pci_dev, PCI_D3hot);
  2990. * pci_set_power_state(pci_dev, PCI_D0);
  2991. * pci_restore_state(pci_dev);
  2992. *
  2993. * For controllers newer than the P600, the pci power state
  2994. * method of resetting doesn't work so we have another way
  2995. * using the doorbell register.
  2996. */
  2997. rc = hpsa_lookup_board_id(pdev, &board_id);
  2998. if (rc < 0 || !ctlr_is_resettable(board_id)) {
  2999. dev_warn(&pdev->dev, "Not resetting device.\n");
  3000. return -ENODEV;
  3001. }
  3002. /* if controller is soft- but not hard resettable... */
  3003. if (!ctlr_is_hard_resettable(board_id))
  3004. return -ENOTSUPP; /* try soft reset later. */
  3005. /* Save the PCI command register */
  3006. pci_read_config_word(pdev, 4, &command_register);
  3007. /* Turn the board off. This is so that later pci_restore_state()
  3008. * won't turn the board on before the rest of config space is ready.
  3009. */
  3010. pci_disable_device(pdev);
  3011. pci_save_state(pdev);
  3012. /* find the first memory BAR, so we can find the cfg table */
  3013. rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
  3014. if (rc)
  3015. return rc;
  3016. vaddr = remap_pci_mem(paddr, 0x250);
  3017. if (!vaddr)
  3018. return -ENOMEM;
  3019. /* find cfgtable in order to check if reset via doorbell is supported */
  3020. rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
  3021. &cfg_base_addr_index, &cfg_offset);
  3022. if (rc)
  3023. goto unmap_vaddr;
  3024. cfgtable = remap_pci_mem(pci_resource_start(pdev,
  3025. cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
  3026. if (!cfgtable) {
  3027. rc = -ENOMEM;
  3028. goto unmap_vaddr;
  3029. }
  3030. rc = write_driver_ver_to_cfgtable(cfgtable);
  3031. if (rc)
  3032. goto unmap_vaddr;
  3033. /* If reset via doorbell register is supported, use that.
  3034. * There are two such methods. Favor the newest method.
  3035. */
  3036. misc_fw_support = readl(&cfgtable->misc_fw_support);
  3037. use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
  3038. if (use_doorbell) {
  3039. use_doorbell = DOORBELL_CTLR_RESET2;
  3040. } else {
  3041. use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
  3042. if (use_doorbell) {
  3043. dev_warn(&pdev->dev, "Controller claims that "
  3044. "'Bit 2 doorbell reset' is "
  3045. "supported, but not 'bit 5 doorbell reset'. "
  3046. "Firmware update is recommended.\n");
  3047. rc = -ENOTSUPP; /* try soft reset */
  3048. goto unmap_cfgtable;
  3049. }
  3050. }
  3051. rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
  3052. if (rc)
  3053. goto unmap_cfgtable;
  3054. pci_restore_state(pdev);
  3055. rc = pci_enable_device(pdev);
  3056. if (rc) {
  3057. dev_warn(&pdev->dev, "failed to enable device.\n");
  3058. goto unmap_cfgtable;
  3059. }
  3060. pci_write_config_word(pdev, 4, command_register);
  3061. /* Some devices (notably the HP Smart Array 5i Controller)
  3062. need a little pause here */
  3063. msleep(HPSA_POST_RESET_PAUSE_MSECS);
  3064. /* Wait for board to become not ready, then ready. */
  3065. dev_info(&pdev->dev, "Waiting for board to reset.\n");
  3066. rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
  3067. if (rc) {
  3068. dev_warn(&pdev->dev,
  3069. "failed waiting for board to reset."
  3070. " Will try soft reset.\n");
  3071. rc = -ENOTSUPP; /* Not expected, but try soft reset later */
  3072. goto unmap_cfgtable;
  3073. }
  3074. rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
  3075. if (rc) {
  3076. dev_warn(&pdev->dev,
  3077. "failed waiting for board to become ready "
  3078. "after hard reset\n");
  3079. goto unmap_cfgtable;
  3080. }
  3081. rc = controller_reset_failed(vaddr);
  3082. if (rc < 0)
  3083. goto unmap_cfgtable;
  3084. if (rc) {
  3085. dev_warn(&pdev->dev, "Unable to successfully reset "
  3086. "controller. Will try soft reset.\n");
  3087. rc = -ENOTSUPP;
  3088. } else {
  3089. dev_info(&pdev->dev, "board ready after hard reset.\n");
  3090. }
  3091. unmap_cfgtable:
  3092. iounmap(cfgtable);
  3093. unmap_vaddr:
  3094. iounmap(vaddr);
  3095. return rc;
  3096. }
  3097. /*
  3098. * We cannot read the structure directly, for portability we must use
  3099. * the io functions.
  3100. * This is for debug only.
  3101. */
  3102. static void print_cfg_table(struct device *dev, struct CfgTable *tb)
  3103. {
  3104. #ifdef HPSA_DEBUG
  3105. int i;
  3106. char temp_name[17];
  3107. dev_info(dev, "Controller Configuration information\n");
  3108. dev_info(dev, "------------------------------------\n");
  3109. for (i = 0; i < 4; i++)
  3110. temp_name[i] = readb(&(tb->Signature[i]));
  3111. temp_name[4] = '\0';
  3112. dev_info(dev, " Signature = %s\n", temp_name);
  3113. dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
  3114. dev_info(dev, " Transport methods supported = 0x%x\n",
  3115. readl(&(tb->TransportSupport)));
  3116. dev_info(dev, " Transport methods active = 0x%x\n",
  3117. readl(&(tb->TransportActive)));
  3118. dev_info(dev, " Requested transport Method = 0x%x\n",
  3119. readl(&(tb->HostWrite.TransportRequest)));
  3120. dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
  3121. readl(&(tb->HostWrite.CoalIntDelay)));
  3122. dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
  3123. readl(&(tb->HostWrite.CoalIntCount)));
  3124. dev_info(dev, " Max outstanding commands = 0x%d\n",
  3125. readl(&(tb->CmdsOutMax)));
  3126. dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
  3127. for (i = 0; i < 16; i++)
  3128. temp_name[i] = readb(&(tb->ServerName[i]));
  3129. temp_name[16] = '\0';
  3130. dev_info(dev, " Server Name = %s\n", temp_name);
  3131. dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
  3132. readl(&(tb->HeartBeat)));
  3133. #endif /* HPSA_DEBUG */
  3134. }
  3135. static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
  3136. {
  3137. int i, offset, mem_type, bar_type;
  3138. if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
  3139. return 0;
  3140. offset = 0;
  3141. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
  3142. bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
  3143. if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
  3144. offset += 4;
  3145. else {
  3146. mem_type = pci_resource_flags(pdev, i) &
  3147. PCI_BASE_ADDRESS_MEM_TYPE_MASK;
  3148. switch (mem_type) {
  3149. case PCI_BASE_ADDRESS_MEM_TYPE_32:
  3150. case PCI_BASE_ADDRESS_MEM_TYPE_1M:
  3151. offset += 4; /* 32 bit */
  3152. break;
  3153. case PCI_BASE_ADDRESS_MEM_TYPE_64:
  3154. offset += 8;
  3155. break;
  3156. default: /* reserved in PCI 2.2 */
  3157. dev_warn(&pdev->dev,
  3158. "base address is invalid\n");
  3159. return -1;
  3160. break;
  3161. }
  3162. }
  3163. if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
  3164. return i + 1;
  3165. }
  3166. return -1;
  3167. }
  3168. /* If MSI/MSI-X is supported by the kernel we will try to enable it on
  3169. * controllers that are capable. If not, we use IO-APIC mode.
  3170. */
  3171. static void __devinit hpsa_interrupt_mode(struct ctlr_info *h)
  3172. {
  3173. #ifdef CONFIG_PCI_MSI
  3174. int err;
  3175. struct msix_entry hpsa_msix_entries[4] = { {0, 0}, {0, 1},
  3176. {0, 2}, {0, 3}
  3177. };
  3178. /* Some boards advertise MSI but don't really support it */
  3179. if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
  3180. (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
  3181. goto default_int_mode;
  3182. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
  3183. dev_info(&h->pdev->dev, "MSIX\n");
  3184. err = pci_enable_msix(h->pdev, hpsa_msix_entries, 4);
  3185. if (!err) {
  3186. h->intr[0] = hpsa_msix_entries[0].vector;
  3187. h->intr[1] = hpsa_msix_entries[1].vector;
  3188. h->intr[2] = hpsa_msix_entries[2].vector;
  3189. h->intr[3] = hpsa_msix_entries[3].vector;
  3190. h->msix_vector = 1;
  3191. return;
  3192. }
  3193. if (err > 0) {
  3194. dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
  3195. "available\n", err);
  3196. goto default_int_mode;
  3197. } else {
  3198. dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
  3199. err);
  3200. goto default_int_mode;
  3201. }
  3202. }
  3203. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
  3204. dev_info(&h->pdev->dev, "MSI\n");
  3205. if (!pci_enable_msi(h->pdev))
  3206. h->msi_vector = 1;
  3207. else
  3208. dev_warn(&h->pdev->dev, "MSI init failed\n");
  3209. }
  3210. default_int_mode:
  3211. #endif /* CONFIG_PCI_MSI */
  3212. /* if we get here we're going to use the default interrupt mode */
  3213. h->intr[h->intr_mode] = h->pdev->irq;
  3214. }
  3215. static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
  3216. {
  3217. int i;
  3218. u32 subsystem_vendor_id, subsystem_device_id;
  3219. subsystem_vendor_id = pdev->subsystem_vendor;
  3220. subsystem_device_id = pdev->subsystem_device;
  3221. *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
  3222. subsystem_vendor_id;
  3223. for (i = 0; i < ARRAY_SIZE(products); i++)
  3224. if (*board_id == products[i].board_id)
  3225. return i;
  3226. if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
  3227. subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
  3228. !hpsa_allow_any) {
  3229. dev_warn(&pdev->dev, "unrecognized board ID: "
  3230. "0x%08x, ignoring.\n", *board_id);
  3231. return -ENODEV;
  3232. }
  3233. return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
  3234. }
  3235. static inline bool hpsa_board_disabled(struct pci_dev *pdev)
  3236. {
  3237. u16 command;
  3238. (void) pci_read_config_word(pdev, PCI_COMMAND, &command);
  3239. return ((command & PCI_COMMAND_MEMORY) == 0);
  3240. }
  3241. static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
  3242. unsigned long *memory_bar)
  3243. {
  3244. int i;
  3245. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
  3246. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  3247. /* addressing mode bits already removed */
  3248. *memory_bar = pci_resource_start(pdev, i);
  3249. dev_dbg(&pdev->dev, "memory BAR = %lx\n",
  3250. *memory_bar);
  3251. return 0;
  3252. }
  3253. dev_warn(&pdev->dev, "no memory BAR found\n");
  3254. return -ENODEV;
  3255. }
  3256. static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
  3257. void __iomem *vaddr, int wait_for_ready)
  3258. {
  3259. int i, iterations;
  3260. u32 scratchpad;
  3261. if (wait_for_ready)
  3262. iterations = HPSA_BOARD_READY_ITERATIONS;
  3263. else
  3264. iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
  3265. for (i = 0; i < iterations; i++) {
  3266. scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
  3267. if (wait_for_ready) {
  3268. if (scratchpad == HPSA_FIRMWARE_READY)
  3269. return 0;
  3270. } else {
  3271. if (scratchpad != HPSA_FIRMWARE_READY)
  3272. return 0;
  3273. }
  3274. msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
  3275. }
  3276. dev_warn(&pdev->dev, "board not ready, timed out.\n");
  3277. return -ENODEV;
  3278. }
  3279. static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
  3280. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  3281. u64 *cfg_offset)
  3282. {
  3283. *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
  3284. *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
  3285. *cfg_base_addr &= (u32) 0x0000ffff;
  3286. *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
  3287. if (*cfg_base_addr_index == -1) {
  3288. dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
  3289. return -ENODEV;
  3290. }
  3291. return 0;
  3292. }
  3293. static int __devinit hpsa_find_cfgtables(struct ctlr_info *h)
  3294. {
  3295. u64 cfg_offset;
  3296. u32 cfg_base_addr;
  3297. u64 cfg_base_addr_index;
  3298. u32 trans_offset;
  3299. int rc;
  3300. rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
  3301. &cfg_base_addr_index, &cfg_offset);
  3302. if (rc)
  3303. return rc;
  3304. h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
  3305. cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
  3306. if (!h->cfgtable)
  3307. return -ENOMEM;
  3308. rc = write_driver_ver_to_cfgtable(h->cfgtable);
  3309. if (rc)
  3310. return rc;
  3311. /* Find performant mode table. */
  3312. trans_offset = readl(&h->cfgtable->TransMethodOffset);
  3313. h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
  3314. cfg_base_addr_index)+cfg_offset+trans_offset,
  3315. sizeof(*h->transtable));
  3316. if (!h->transtable)
  3317. return -ENOMEM;
  3318. return 0;
  3319. }
  3320. static void __devinit hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
  3321. {
  3322. h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
  3323. /* Limit commands in memory limited kdump scenario. */
  3324. if (reset_devices && h->max_commands > 32)
  3325. h->max_commands = 32;
  3326. if (h->max_commands < 16) {
  3327. dev_warn(&h->pdev->dev, "Controller reports "
  3328. "max supported commands of %d, an obvious lie. "
  3329. "Using 16. Ensure that firmware is up to date.\n",
  3330. h->max_commands);
  3331. h->max_commands = 16;
  3332. }
  3333. }
  3334. /* Interrogate the hardware for some limits:
  3335. * max commands, max SG elements without chaining, and with chaining,
  3336. * SG chain block size, etc.
  3337. */
  3338. static void __devinit hpsa_find_board_params(struct ctlr_info *h)
  3339. {
  3340. hpsa_get_max_perf_mode_cmds(h);
  3341. h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
  3342. h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
  3343. /*
  3344. * Limit in-command s/g elements to 32 save dma'able memory.
  3345. * Howvever spec says if 0, use 31
  3346. */
  3347. h->max_cmd_sg_entries = 31;
  3348. if (h->maxsgentries > 512) {
  3349. h->max_cmd_sg_entries = 32;
  3350. h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
  3351. h->maxsgentries--; /* save one for chain pointer */
  3352. } else {
  3353. h->maxsgentries = 31; /* default to traditional values */
  3354. h->chainsize = 0;
  3355. }
  3356. }
  3357. static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
  3358. {
  3359. if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
  3360. (readb(&h->cfgtable->Signature[1]) != 'I') ||
  3361. (readb(&h->cfgtable->Signature[2]) != 'S') ||
  3362. (readb(&h->cfgtable->Signature[3]) != 'S')) {
  3363. dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
  3364. return false;
  3365. }
  3366. return true;
  3367. }
  3368. /* Need to enable prefetch in the SCSI core for 6400 in x86 */
  3369. static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h)
  3370. {
  3371. #ifdef CONFIG_X86
  3372. u32 prefetch;
  3373. prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
  3374. prefetch |= 0x100;
  3375. writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
  3376. #endif
  3377. }
  3378. /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
  3379. * in a prefetch beyond physical memory.
  3380. */
  3381. static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
  3382. {
  3383. u32 dma_prefetch;
  3384. if (h->board_id != 0x3225103C)
  3385. return;
  3386. dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
  3387. dma_prefetch |= 0x8000;
  3388. writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
  3389. }
  3390. static void __devinit hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
  3391. {
  3392. int i;
  3393. u32 doorbell_value;
  3394. unsigned long flags;
  3395. /* under certain very rare conditions, this can take awhile.
  3396. * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
  3397. * as we enter this code.)
  3398. */
  3399. for (i = 0; i < MAX_CONFIG_WAIT; i++) {
  3400. spin_lock_irqsave(&h->lock, flags);
  3401. doorbell_value = readl(h->vaddr + SA5_DOORBELL);
  3402. spin_unlock_irqrestore(&h->lock, flags);
  3403. if (!(doorbell_value & CFGTBL_ChangeReq))
  3404. break;
  3405. /* delay and try again */
  3406. usleep_range(10000, 20000);
  3407. }
  3408. }
  3409. static int __devinit hpsa_enter_simple_mode(struct ctlr_info *h)
  3410. {
  3411. u32 trans_support;
  3412. trans_support = readl(&(h->cfgtable->TransportSupport));
  3413. if (!(trans_support & SIMPLE_MODE))
  3414. return -ENOTSUPP;
  3415. h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
  3416. /* Update the field, and then ring the doorbell */
  3417. writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
  3418. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3419. hpsa_wait_for_mode_change_ack(h);
  3420. print_cfg_table(&h->pdev->dev, h->cfgtable);
  3421. if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
  3422. dev_warn(&h->pdev->dev,
  3423. "unable to get board into simple mode\n");
  3424. return -ENODEV;
  3425. }
  3426. h->transMethod = CFGTBL_Trans_Simple;
  3427. return 0;
  3428. }
  3429. static int __devinit hpsa_pci_init(struct ctlr_info *h)
  3430. {
  3431. int prod_index, err;
  3432. prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
  3433. if (prod_index < 0)
  3434. return -ENODEV;
  3435. h->product_name = products[prod_index].product_name;
  3436. h->access = *(products[prod_index].access);
  3437. if (hpsa_board_disabled(h->pdev)) {
  3438. dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
  3439. return -ENODEV;
  3440. }
  3441. err = pci_enable_device(h->pdev);
  3442. if (err) {
  3443. dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
  3444. return err;
  3445. }
  3446. err = pci_request_regions(h->pdev, "hpsa");
  3447. if (err) {
  3448. dev_err(&h->pdev->dev,
  3449. "cannot obtain PCI resources, aborting\n");
  3450. return err;
  3451. }
  3452. hpsa_interrupt_mode(h);
  3453. err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
  3454. if (err)
  3455. goto err_out_free_res;
  3456. h->vaddr = remap_pci_mem(h->paddr, 0x250);
  3457. if (!h->vaddr) {
  3458. err = -ENOMEM;
  3459. goto err_out_free_res;
  3460. }
  3461. err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
  3462. if (err)
  3463. goto err_out_free_res;
  3464. err = hpsa_find_cfgtables(h);
  3465. if (err)
  3466. goto err_out_free_res;
  3467. hpsa_find_board_params(h);
  3468. if (!hpsa_CISS_signature_present(h)) {
  3469. err = -ENODEV;
  3470. goto err_out_free_res;
  3471. }
  3472. hpsa_enable_scsi_prefetch(h);
  3473. hpsa_p600_dma_prefetch_quirk(h);
  3474. err = hpsa_enter_simple_mode(h);
  3475. if (err)
  3476. goto err_out_free_res;
  3477. return 0;
  3478. err_out_free_res:
  3479. if (h->transtable)
  3480. iounmap(h->transtable);
  3481. if (h->cfgtable)
  3482. iounmap(h->cfgtable);
  3483. if (h->vaddr)
  3484. iounmap(h->vaddr);
  3485. /*
  3486. * Deliberately omit pci_disable_device(): it does something nasty to
  3487. * Smart Array controllers that pci_enable_device does not undo
  3488. */
  3489. pci_release_regions(h->pdev);
  3490. return err;
  3491. }
  3492. static void __devinit hpsa_hba_inquiry(struct ctlr_info *h)
  3493. {
  3494. int rc;
  3495. #define HBA_INQUIRY_BYTE_COUNT 64
  3496. h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
  3497. if (!h->hba_inquiry_data)
  3498. return;
  3499. rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
  3500. h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
  3501. if (rc != 0) {
  3502. kfree(h->hba_inquiry_data);
  3503. h->hba_inquiry_data = NULL;
  3504. }
  3505. }
  3506. static __devinit int hpsa_init_reset_devices(struct pci_dev *pdev)
  3507. {
  3508. int rc, i;
  3509. if (!reset_devices)
  3510. return 0;
  3511. /* Reset the controller with a PCI power-cycle or via doorbell */
  3512. rc = hpsa_kdump_hard_reset_controller(pdev);
  3513. /* -ENOTSUPP here means we cannot reset the controller
  3514. * but it's already (and still) up and running in
  3515. * "performant mode". Or, it might be 640x, which can't reset
  3516. * due to concerns about shared bbwc between 6402/6404 pair.
  3517. */
  3518. if (rc == -ENOTSUPP)
  3519. return rc; /* just try to do the kdump anyhow. */
  3520. if (rc)
  3521. return -ENODEV;
  3522. /* Now try to get the controller to respond to a no-op */
  3523. dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
  3524. for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
  3525. if (hpsa_noop(pdev) == 0)
  3526. break;
  3527. else
  3528. dev_warn(&pdev->dev, "no-op failed%s\n",
  3529. (i < 11 ? "; re-trying" : ""));
  3530. }
  3531. return 0;
  3532. }
  3533. static __devinit int hpsa_allocate_cmd_pool(struct ctlr_info *h)
  3534. {
  3535. h->cmd_pool_bits = kzalloc(
  3536. DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
  3537. sizeof(unsigned long), GFP_KERNEL);
  3538. h->cmd_pool = pci_alloc_consistent(h->pdev,
  3539. h->nr_cmds * sizeof(*h->cmd_pool),
  3540. &(h->cmd_pool_dhandle));
  3541. h->errinfo_pool = pci_alloc_consistent(h->pdev,
  3542. h->nr_cmds * sizeof(*h->errinfo_pool),
  3543. &(h->errinfo_pool_dhandle));
  3544. if ((h->cmd_pool_bits == NULL)
  3545. || (h->cmd_pool == NULL)
  3546. || (h->errinfo_pool == NULL)) {
  3547. dev_err(&h->pdev->dev, "out of memory in %s", __func__);
  3548. return -ENOMEM;
  3549. }
  3550. return 0;
  3551. }
  3552. static void hpsa_free_cmd_pool(struct ctlr_info *h)
  3553. {
  3554. kfree(h->cmd_pool_bits);
  3555. if (h->cmd_pool)
  3556. pci_free_consistent(h->pdev,
  3557. h->nr_cmds * sizeof(struct CommandList),
  3558. h->cmd_pool, h->cmd_pool_dhandle);
  3559. if (h->errinfo_pool)
  3560. pci_free_consistent(h->pdev,
  3561. h->nr_cmds * sizeof(struct ErrorInfo),
  3562. h->errinfo_pool,
  3563. h->errinfo_pool_dhandle);
  3564. }
  3565. static int hpsa_request_irq(struct ctlr_info *h,
  3566. irqreturn_t (*msixhandler)(int, void *),
  3567. irqreturn_t (*intxhandler)(int, void *))
  3568. {
  3569. int rc;
  3570. if (h->msix_vector || h->msi_vector)
  3571. rc = request_irq(h->intr[h->intr_mode], msixhandler,
  3572. IRQF_DISABLED, h->devname, h);
  3573. else
  3574. rc = request_irq(h->intr[h->intr_mode], intxhandler,
  3575. IRQF_DISABLED, h->devname, h);
  3576. if (rc) {
  3577. dev_err(&h->pdev->dev, "unable to get irq %d for %s\n",
  3578. h->intr[h->intr_mode], h->devname);
  3579. return -ENODEV;
  3580. }
  3581. return 0;
  3582. }
  3583. static int __devinit hpsa_kdump_soft_reset(struct ctlr_info *h)
  3584. {
  3585. if (hpsa_send_host_reset(h, RAID_CTLR_LUNID,
  3586. HPSA_RESET_TYPE_CONTROLLER)) {
  3587. dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
  3588. return -EIO;
  3589. }
  3590. dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
  3591. if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
  3592. dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
  3593. return -1;
  3594. }
  3595. dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
  3596. if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
  3597. dev_warn(&h->pdev->dev, "Board failed to become ready "
  3598. "after soft reset.\n");
  3599. return -1;
  3600. }
  3601. return 0;
  3602. }
  3603. static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
  3604. {
  3605. free_irq(h->intr[h->intr_mode], h);
  3606. #ifdef CONFIG_PCI_MSI
  3607. if (h->msix_vector)
  3608. pci_disable_msix(h->pdev);
  3609. else if (h->msi_vector)
  3610. pci_disable_msi(h->pdev);
  3611. #endif /* CONFIG_PCI_MSI */
  3612. hpsa_free_sg_chain_blocks(h);
  3613. hpsa_free_cmd_pool(h);
  3614. kfree(h->blockFetchTable);
  3615. pci_free_consistent(h->pdev, h->reply_pool_size,
  3616. h->reply_pool, h->reply_pool_dhandle);
  3617. if (h->vaddr)
  3618. iounmap(h->vaddr);
  3619. if (h->transtable)
  3620. iounmap(h->transtable);
  3621. if (h->cfgtable)
  3622. iounmap(h->cfgtable);
  3623. pci_release_regions(h->pdev);
  3624. kfree(h);
  3625. }
  3626. static int __devinit hpsa_init_one(struct pci_dev *pdev,
  3627. const struct pci_device_id *ent)
  3628. {
  3629. int dac, rc;
  3630. struct ctlr_info *h;
  3631. int try_soft_reset = 0;
  3632. unsigned long flags;
  3633. if (number_of_controllers == 0)
  3634. printk(KERN_INFO DRIVER_NAME "\n");
  3635. rc = hpsa_init_reset_devices(pdev);
  3636. if (rc) {
  3637. if (rc != -ENOTSUPP)
  3638. return rc;
  3639. /* If the reset fails in a particular way (it has no way to do
  3640. * a proper hard reset, so returns -ENOTSUPP) we can try to do
  3641. * a soft reset once we get the controller configured up to the
  3642. * point that it can accept a command.
  3643. */
  3644. try_soft_reset = 1;
  3645. rc = 0;
  3646. }
  3647. reinit_after_soft_reset:
  3648. /* Command structures must be aligned on a 32-byte boundary because
  3649. * the 5 lower bits of the address are used by the hardware. and by
  3650. * the driver. See comments in hpsa.h for more info.
  3651. */
  3652. #define COMMANDLIST_ALIGNMENT 32
  3653. BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
  3654. h = kzalloc(sizeof(*h), GFP_KERNEL);
  3655. if (!h)
  3656. return -ENOMEM;
  3657. h->pdev = pdev;
  3658. h->busy_initializing = 1;
  3659. h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
  3660. INIT_LIST_HEAD(&h->cmpQ);
  3661. INIT_LIST_HEAD(&h->reqQ);
  3662. spin_lock_init(&h->lock);
  3663. spin_lock_init(&h->scan_lock);
  3664. rc = hpsa_pci_init(h);
  3665. if (rc != 0)
  3666. goto clean1;
  3667. sprintf(h->devname, "hpsa%d", number_of_controllers);
  3668. h->ctlr = number_of_controllers;
  3669. number_of_controllers++;
  3670. /* configure PCI DMA stuff */
  3671. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
  3672. if (rc == 0) {
  3673. dac = 1;
  3674. } else {
  3675. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3676. if (rc == 0) {
  3677. dac = 0;
  3678. } else {
  3679. dev_err(&pdev->dev, "no suitable DMA available\n");
  3680. goto clean1;
  3681. }
  3682. }
  3683. /* make sure the board interrupts are off */
  3684. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3685. if (hpsa_request_irq(h, do_hpsa_intr_msi, do_hpsa_intr_intx))
  3686. goto clean2;
  3687. dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
  3688. h->devname, pdev->device,
  3689. h->intr[h->intr_mode], dac ? "" : " not");
  3690. if (hpsa_allocate_cmd_pool(h))
  3691. goto clean4;
  3692. if (hpsa_allocate_sg_chain_blocks(h))
  3693. goto clean4;
  3694. init_waitqueue_head(&h->scan_wait_queue);
  3695. h->scan_finished = 1; /* no scan currently in progress */
  3696. pci_set_drvdata(pdev, h);
  3697. h->ndevices = 0;
  3698. h->scsi_host = NULL;
  3699. spin_lock_init(&h->devlock);
  3700. hpsa_put_ctlr_into_performant_mode(h);
  3701. /* At this point, the controller is ready to take commands.
  3702. * Now, if reset_devices and the hard reset didn't work, try
  3703. * the soft reset and see if that works.
  3704. */
  3705. if (try_soft_reset) {
  3706. /* This is kind of gross. We may or may not get a completion
  3707. * from the soft reset command, and if we do, then the value
  3708. * from the fifo may or may not be valid. So, we wait 10 secs
  3709. * after the reset throwing away any completions we get during
  3710. * that time. Unregister the interrupt handler and register
  3711. * fake ones to scoop up any residual completions.
  3712. */
  3713. spin_lock_irqsave(&h->lock, flags);
  3714. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3715. spin_unlock_irqrestore(&h->lock, flags);
  3716. free_irq(h->intr[h->intr_mode], h);
  3717. rc = hpsa_request_irq(h, hpsa_msix_discard_completions,
  3718. hpsa_intx_discard_completions);
  3719. if (rc) {
  3720. dev_warn(&h->pdev->dev, "Failed to request_irq after "
  3721. "soft reset.\n");
  3722. goto clean4;
  3723. }
  3724. rc = hpsa_kdump_soft_reset(h);
  3725. if (rc)
  3726. /* Neither hard nor soft reset worked, we're hosed. */
  3727. goto clean4;
  3728. dev_info(&h->pdev->dev, "Board READY.\n");
  3729. dev_info(&h->pdev->dev,
  3730. "Waiting for stale completions to drain.\n");
  3731. h->access.set_intr_mask(h, HPSA_INTR_ON);
  3732. msleep(10000);
  3733. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3734. rc = controller_reset_failed(h->cfgtable);
  3735. if (rc)
  3736. dev_info(&h->pdev->dev,
  3737. "Soft reset appears to have failed.\n");
  3738. /* since the controller's reset, we have to go back and re-init
  3739. * everything. Easiest to just forget what we've done and do it
  3740. * all over again.
  3741. */
  3742. hpsa_undo_allocations_after_kdump_soft_reset(h);
  3743. try_soft_reset = 0;
  3744. if (rc)
  3745. /* don't go to clean4, we already unallocated */
  3746. return -ENODEV;
  3747. goto reinit_after_soft_reset;
  3748. }
  3749. /* Turn the interrupts on so we can service requests */
  3750. h->access.set_intr_mask(h, HPSA_INTR_ON);
  3751. hpsa_hba_inquiry(h);
  3752. hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
  3753. h->busy_initializing = 0;
  3754. return 1;
  3755. clean4:
  3756. hpsa_free_sg_chain_blocks(h);
  3757. hpsa_free_cmd_pool(h);
  3758. free_irq(h->intr[h->intr_mode], h);
  3759. clean2:
  3760. clean1:
  3761. h->busy_initializing = 0;
  3762. kfree(h);
  3763. return rc;
  3764. }
  3765. static void hpsa_flush_cache(struct ctlr_info *h)
  3766. {
  3767. char *flush_buf;
  3768. struct CommandList *c;
  3769. flush_buf = kzalloc(4, GFP_KERNEL);
  3770. if (!flush_buf)
  3771. return;
  3772. c = cmd_special_alloc(h);
  3773. if (!c) {
  3774. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  3775. goto out_of_memory;
  3776. }
  3777. fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
  3778. RAID_CTLR_LUNID, TYPE_CMD);
  3779. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
  3780. if (c->err_info->CommandStatus != 0)
  3781. dev_warn(&h->pdev->dev,
  3782. "error flushing cache on controller\n");
  3783. cmd_special_free(h, c);
  3784. out_of_memory:
  3785. kfree(flush_buf);
  3786. }
  3787. static void hpsa_shutdown(struct pci_dev *pdev)
  3788. {
  3789. struct ctlr_info *h;
  3790. h = pci_get_drvdata(pdev);
  3791. /* Turn board interrupts off and send the flush cache command
  3792. * sendcmd will turn off interrupt, and send the flush...
  3793. * To write all data in the battery backed cache to disks
  3794. */
  3795. hpsa_flush_cache(h);
  3796. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3797. free_irq(h->intr[h->intr_mode], h);
  3798. #ifdef CONFIG_PCI_MSI
  3799. if (h->msix_vector)
  3800. pci_disable_msix(h->pdev);
  3801. else if (h->msi_vector)
  3802. pci_disable_msi(h->pdev);
  3803. #endif /* CONFIG_PCI_MSI */
  3804. }
  3805. static void __devexit hpsa_remove_one(struct pci_dev *pdev)
  3806. {
  3807. struct ctlr_info *h;
  3808. if (pci_get_drvdata(pdev) == NULL) {
  3809. dev_err(&pdev->dev, "unable to remove device \n");
  3810. return;
  3811. }
  3812. h = pci_get_drvdata(pdev);
  3813. hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
  3814. hpsa_shutdown(pdev);
  3815. iounmap(h->vaddr);
  3816. iounmap(h->transtable);
  3817. iounmap(h->cfgtable);
  3818. hpsa_free_sg_chain_blocks(h);
  3819. pci_free_consistent(h->pdev,
  3820. h->nr_cmds * sizeof(struct CommandList),
  3821. h->cmd_pool, h->cmd_pool_dhandle);
  3822. pci_free_consistent(h->pdev,
  3823. h->nr_cmds * sizeof(struct ErrorInfo),
  3824. h->errinfo_pool, h->errinfo_pool_dhandle);
  3825. pci_free_consistent(h->pdev, h->reply_pool_size,
  3826. h->reply_pool, h->reply_pool_dhandle);
  3827. kfree(h->cmd_pool_bits);
  3828. kfree(h->blockFetchTable);
  3829. kfree(h->hba_inquiry_data);
  3830. /*
  3831. * Deliberately omit pci_disable_device(): it does something nasty to
  3832. * Smart Array controllers that pci_enable_device does not undo
  3833. */
  3834. pci_release_regions(pdev);
  3835. pci_set_drvdata(pdev, NULL);
  3836. kfree(h);
  3837. }
  3838. static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
  3839. __attribute__((unused)) pm_message_t state)
  3840. {
  3841. return -ENOSYS;
  3842. }
  3843. static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
  3844. {
  3845. return -ENOSYS;
  3846. }
  3847. static struct pci_driver hpsa_pci_driver = {
  3848. .name = "hpsa",
  3849. .probe = hpsa_init_one,
  3850. .remove = __devexit_p(hpsa_remove_one),
  3851. .id_table = hpsa_pci_device_id, /* id_table */
  3852. .shutdown = hpsa_shutdown,
  3853. .suspend = hpsa_suspend,
  3854. .resume = hpsa_resume,
  3855. };
  3856. /* Fill in bucket_map[], given nsgs (the max number of
  3857. * scatter gather elements supported) and bucket[],
  3858. * which is an array of 8 integers. The bucket[] array
  3859. * contains 8 different DMA transfer sizes (in 16
  3860. * byte increments) which the controller uses to fetch
  3861. * commands. This function fills in bucket_map[], which
  3862. * maps a given number of scatter gather elements to one of
  3863. * the 8 DMA transfer sizes. The point of it is to allow the
  3864. * controller to only do as much DMA as needed to fetch the
  3865. * command, with the DMA transfer size encoded in the lower
  3866. * bits of the command address.
  3867. */
  3868. static void calc_bucket_map(int bucket[], int num_buckets,
  3869. int nsgs, int *bucket_map)
  3870. {
  3871. int i, j, b, size;
  3872. /* even a command with 0 SGs requires 4 blocks */
  3873. #define MINIMUM_TRANSFER_BLOCKS 4
  3874. #define NUM_BUCKETS 8
  3875. /* Note, bucket_map must have nsgs+1 entries. */
  3876. for (i = 0; i <= nsgs; i++) {
  3877. /* Compute size of a command with i SG entries */
  3878. size = i + MINIMUM_TRANSFER_BLOCKS;
  3879. b = num_buckets; /* Assume the biggest bucket */
  3880. /* Find the bucket that is just big enough */
  3881. for (j = 0; j < 8; j++) {
  3882. if (bucket[j] >= size) {
  3883. b = j;
  3884. break;
  3885. }
  3886. }
  3887. /* for a command with i SG entries, use bucket b. */
  3888. bucket_map[i] = b;
  3889. }
  3890. }
  3891. static __devinit void hpsa_enter_performant_mode(struct ctlr_info *h,
  3892. u32 use_short_tags)
  3893. {
  3894. int i;
  3895. unsigned long register_value;
  3896. /* This is a bit complicated. There are 8 registers on
  3897. * the controller which we write to to tell it 8 different
  3898. * sizes of commands which there may be. It's a way of
  3899. * reducing the DMA done to fetch each command. Encoded into
  3900. * each command's tag are 3 bits which communicate to the controller
  3901. * which of the eight sizes that command fits within. The size of
  3902. * each command depends on how many scatter gather entries there are.
  3903. * Each SG entry requires 16 bytes. The eight registers are programmed
  3904. * with the number of 16-byte blocks a command of that size requires.
  3905. * The smallest command possible requires 5 such 16 byte blocks.
  3906. * the largest command possible requires MAXSGENTRIES + 4 16-byte
  3907. * blocks. Note, this only extends to the SG entries contained
  3908. * within the command block, and does not extend to chained blocks
  3909. * of SG elements. bft[] contains the eight values we write to
  3910. * the registers. They are not evenly distributed, but have more
  3911. * sizes for small commands, and fewer sizes for larger commands.
  3912. */
  3913. int bft[8] = {5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
  3914. BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
  3915. /* 5 = 1 s/g entry or 4k
  3916. * 6 = 2 s/g entry or 8k
  3917. * 8 = 4 s/g entry or 16k
  3918. * 10 = 6 s/g entry or 24k
  3919. */
  3920. h->reply_pool_wraparound = 1; /* spec: init to 1 */
  3921. /* Controller spec: zero out this buffer. */
  3922. memset(h->reply_pool, 0, h->reply_pool_size);
  3923. h->reply_pool_head = h->reply_pool;
  3924. bft[7] = h->max_sg_entries + 4;
  3925. calc_bucket_map(bft, ARRAY_SIZE(bft), 32, h->blockFetchTable);
  3926. for (i = 0; i < 8; i++)
  3927. writel(bft[i], &h->transtable->BlockFetch[i]);
  3928. /* size of controller ring buffer */
  3929. writel(h->max_commands, &h->transtable->RepQSize);
  3930. writel(1, &h->transtable->RepQCount);
  3931. writel(0, &h->transtable->RepQCtrAddrLow32);
  3932. writel(0, &h->transtable->RepQCtrAddrHigh32);
  3933. writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
  3934. writel(0, &h->transtable->RepQAddr0High32);
  3935. writel(CFGTBL_Trans_Performant | use_short_tags,
  3936. &(h->cfgtable->HostWrite.TransportRequest));
  3937. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3938. hpsa_wait_for_mode_change_ack(h);
  3939. register_value = readl(&(h->cfgtable->TransportActive));
  3940. if (!(register_value & CFGTBL_Trans_Performant)) {
  3941. dev_warn(&h->pdev->dev, "unable to get board into"
  3942. " performant mode\n");
  3943. return;
  3944. }
  3945. /* Change the access methods to the performant access methods */
  3946. h->access = SA5_performant_access;
  3947. h->transMethod = CFGTBL_Trans_Performant;
  3948. }
  3949. static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
  3950. {
  3951. u32 trans_support;
  3952. if (hpsa_simple_mode)
  3953. return;
  3954. trans_support = readl(&(h->cfgtable->TransportSupport));
  3955. if (!(trans_support & PERFORMANT_MODE))
  3956. return;
  3957. hpsa_get_max_perf_mode_cmds(h);
  3958. h->max_sg_entries = 32;
  3959. /* Performant mode ring buffer and supporting data structures */
  3960. h->reply_pool_size = h->max_commands * sizeof(u64);
  3961. h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
  3962. &(h->reply_pool_dhandle));
  3963. /* Need a block fetch table for performant mode */
  3964. h->blockFetchTable = kmalloc(((h->max_sg_entries+1) *
  3965. sizeof(u32)), GFP_KERNEL);
  3966. if ((h->reply_pool == NULL)
  3967. || (h->blockFetchTable == NULL))
  3968. goto clean_up;
  3969. hpsa_enter_performant_mode(h,
  3970. trans_support & CFGTBL_Trans_use_short_tags);
  3971. return;
  3972. clean_up:
  3973. if (h->reply_pool)
  3974. pci_free_consistent(h->pdev, h->reply_pool_size,
  3975. h->reply_pool, h->reply_pool_dhandle);
  3976. kfree(h->blockFetchTable);
  3977. }
  3978. /*
  3979. * This is it. Register the PCI driver information for the cards we control
  3980. * the OS will call our registered routines when it finds one of our cards.
  3981. */
  3982. static int __init hpsa_init(void)
  3983. {
  3984. return pci_register_driver(&hpsa_pci_driver);
  3985. }
  3986. static void __exit hpsa_cleanup(void)
  3987. {
  3988. pci_unregister_driver(&hpsa_pci_driver);
  3989. }
  3990. module_init(hpsa_init);
  3991. module_exit(hpsa_cleanup);