apply.c 30 KB

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  1. /*
  2. * Copyright (C) 2011 Texas Instruments
  3. * Author: Tomi Valkeinen <tomi.valkeinen@ti.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License version 2 as published by
  7. * the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program. If not, see <http://www.gnu.org/licenses/>.
  16. */
  17. #define DSS_SUBSYS_NAME "APPLY"
  18. #include <linux/kernel.h>
  19. #include <linux/slab.h>
  20. #include <linux/spinlock.h>
  21. #include <linux/jiffies.h>
  22. #include <video/omapdss.h>
  23. #include "dss.h"
  24. #include "dss_features.h"
  25. /*
  26. * We have 4 levels of cache for the dispc settings. First two are in SW and
  27. * the latter two in HW.
  28. *
  29. * set_info()
  30. * v
  31. * +--------------------+
  32. * | user_info |
  33. * +--------------------+
  34. * v
  35. * apply()
  36. * v
  37. * +--------------------+
  38. * | info |
  39. * +--------------------+
  40. * v
  41. * write_regs()
  42. * v
  43. * +--------------------+
  44. * | shadow registers |
  45. * +--------------------+
  46. * v
  47. * VFP or lcd/digit_enable
  48. * v
  49. * +--------------------+
  50. * | registers |
  51. * +--------------------+
  52. */
  53. struct ovl_priv_data {
  54. bool user_info_dirty;
  55. struct omap_overlay_info user_info;
  56. bool info_dirty;
  57. struct omap_overlay_info info;
  58. bool shadow_info_dirty;
  59. bool extra_info_dirty;
  60. bool shadow_extra_info_dirty;
  61. bool enabled;
  62. enum omap_channel channel;
  63. u32 fifo_low, fifo_high;
  64. /*
  65. * True if overlay is to be enabled. Used to check and calculate configs
  66. * for the overlay before it is enabled in the HW.
  67. */
  68. bool enabling;
  69. };
  70. struct mgr_priv_data {
  71. bool user_info_dirty;
  72. struct omap_overlay_manager_info user_info;
  73. bool info_dirty;
  74. struct omap_overlay_manager_info info;
  75. bool shadow_info_dirty;
  76. /* If true, GO bit is up and shadow registers cannot be written.
  77. * Never true for manual update displays */
  78. bool busy;
  79. /* If true, dispc output is enabled */
  80. bool updating;
  81. /* If true, a display is enabled using this manager */
  82. bool enabled;
  83. };
  84. static struct {
  85. struct ovl_priv_data ovl_priv_data_array[MAX_DSS_OVERLAYS];
  86. struct mgr_priv_data mgr_priv_data_array[MAX_DSS_MANAGERS];
  87. bool fifo_merge_dirty;
  88. bool fifo_merge;
  89. bool irq_enabled;
  90. } dss_data;
  91. /* protects dss_data */
  92. static spinlock_t data_lock;
  93. /* lock for blocking functions */
  94. static DEFINE_MUTEX(apply_lock);
  95. static DECLARE_COMPLETION(extra_updated_completion);
  96. static void dss_register_vsync_isr(void);
  97. static struct ovl_priv_data *get_ovl_priv(struct omap_overlay *ovl)
  98. {
  99. return &dss_data.ovl_priv_data_array[ovl->id];
  100. }
  101. static struct mgr_priv_data *get_mgr_priv(struct omap_overlay_manager *mgr)
  102. {
  103. return &dss_data.mgr_priv_data_array[mgr->id];
  104. }
  105. void dss_apply_init(void)
  106. {
  107. const int num_ovls = dss_feat_get_num_ovls();
  108. int i;
  109. spin_lock_init(&data_lock);
  110. for (i = 0; i < num_ovls; ++i) {
  111. struct ovl_priv_data *op;
  112. op = &dss_data.ovl_priv_data_array[i];
  113. op->info.global_alpha = 255;
  114. switch (i) {
  115. case 0:
  116. op->info.zorder = 0;
  117. break;
  118. case 1:
  119. op->info.zorder =
  120. dss_has_feature(FEAT_ALPHA_FREE_ZORDER) ? 3 : 0;
  121. break;
  122. case 2:
  123. op->info.zorder =
  124. dss_has_feature(FEAT_ALPHA_FREE_ZORDER) ? 2 : 0;
  125. break;
  126. case 3:
  127. op->info.zorder =
  128. dss_has_feature(FEAT_ALPHA_FREE_ZORDER) ? 1 : 0;
  129. break;
  130. }
  131. op->user_info = op->info;
  132. }
  133. }
  134. static bool ovl_manual_update(struct omap_overlay *ovl)
  135. {
  136. return ovl->manager->device->caps & OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE;
  137. }
  138. static bool mgr_manual_update(struct omap_overlay_manager *mgr)
  139. {
  140. return mgr->device->caps & OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE;
  141. }
  142. static int dss_check_settings_low(struct omap_overlay_manager *mgr,
  143. struct omap_dss_device *dssdev, bool applying)
  144. {
  145. struct omap_overlay_info *oi;
  146. struct omap_overlay_manager_info *mi;
  147. struct omap_overlay *ovl;
  148. struct omap_overlay_info *ois[MAX_DSS_OVERLAYS];
  149. struct ovl_priv_data *op;
  150. struct mgr_priv_data *mp;
  151. mp = get_mgr_priv(mgr);
  152. if (applying && mp->user_info_dirty)
  153. mi = &mp->user_info;
  154. else
  155. mi = &mp->info;
  156. /* collect the infos to be tested into the array */
  157. list_for_each_entry(ovl, &mgr->overlays, list) {
  158. op = get_ovl_priv(ovl);
  159. if (!op->enabled && !op->enabling)
  160. oi = NULL;
  161. else if (applying && op->user_info_dirty)
  162. oi = &op->user_info;
  163. else
  164. oi = &op->info;
  165. ois[ovl->id] = oi;
  166. }
  167. return dss_mgr_check(mgr, dssdev, mi, ois);
  168. }
  169. /*
  170. * check manager and overlay settings using overlay_info from data->info
  171. */
  172. static int dss_check_settings(struct omap_overlay_manager *mgr,
  173. struct omap_dss_device *dssdev)
  174. {
  175. return dss_check_settings_low(mgr, dssdev, false);
  176. }
  177. /*
  178. * check manager and overlay settings using overlay_info from ovl->info if
  179. * dirty and from data->info otherwise
  180. */
  181. static int dss_check_settings_apply(struct omap_overlay_manager *mgr,
  182. struct omap_dss_device *dssdev)
  183. {
  184. return dss_check_settings_low(mgr, dssdev, true);
  185. }
  186. static bool need_isr(void)
  187. {
  188. const int num_mgrs = dss_feat_get_num_mgrs();
  189. int i;
  190. for (i = 0; i < num_mgrs; ++i) {
  191. struct omap_overlay_manager *mgr;
  192. struct mgr_priv_data *mp;
  193. struct omap_overlay *ovl;
  194. mgr = omap_dss_get_overlay_manager(i);
  195. mp = get_mgr_priv(mgr);
  196. if (!mp->enabled)
  197. continue;
  198. if (mgr_manual_update(mgr)) {
  199. /* to catch FRAMEDONE */
  200. if (mp->updating)
  201. return true;
  202. } else {
  203. /* to catch GO bit going down */
  204. if (mp->busy)
  205. return true;
  206. /* to write new values to registers */
  207. if (mp->info_dirty)
  208. return true;
  209. /* to set GO bit */
  210. if (mp->shadow_info_dirty)
  211. return true;
  212. list_for_each_entry(ovl, &mgr->overlays, list) {
  213. struct ovl_priv_data *op;
  214. op = get_ovl_priv(ovl);
  215. /*
  216. * NOTE: we check extra_info flags even for
  217. * disabled overlays, as extra_infos need to be
  218. * always written.
  219. */
  220. /* to write new values to registers */
  221. if (op->extra_info_dirty)
  222. return true;
  223. /* to set GO bit */
  224. if (op->shadow_extra_info_dirty)
  225. return true;
  226. if (!op->enabled)
  227. continue;
  228. /* to write new values to registers */
  229. if (op->info_dirty)
  230. return true;
  231. /* to set GO bit */
  232. if (op->shadow_info_dirty)
  233. return true;
  234. }
  235. }
  236. }
  237. return false;
  238. }
  239. static bool need_go(struct omap_overlay_manager *mgr)
  240. {
  241. struct omap_overlay *ovl;
  242. struct mgr_priv_data *mp;
  243. struct ovl_priv_data *op;
  244. mp = get_mgr_priv(mgr);
  245. if (mp->shadow_info_dirty)
  246. return true;
  247. list_for_each_entry(ovl, &mgr->overlays, list) {
  248. op = get_ovl_priv(ovl);
  249. if (op->shadow_info_dirty || op->shadow_extra_info_dirty)
  250. return true;
  251. }
  252. return false;
  253. }
  254. /* returns true if an extra_info field is currently being updated */
  255. static bool extra_info_update_ongoing(void)
  256. {
  257. const int num_ovls = omap_dss_get_num_overlays();
  258. struct ovl_priv_data *op;
  259. struct omap_overlay *ovl;
  260. struct mgr_priv_data *mp;
  261. int i;
  262. for (i = 0; i < num_ovls; ++i) {
  263. ovl = omap_dss_get_overlay(i);
  264. op = get_ovl_priv(ovl);
  265. if (!ovl->manager)
  266. continue;
  267. mp = get_mgr_priv(ovl->manager);
  268. if (!mp->enabled)
  269. continue;
  270. if (!mp->updating)
  271. continue;
  272. if (op->extra_info_dirty || op->shadow_extra_info_dirty)
  273. return true;
  274. }
  275. return false;
  276. }
  277. /* wait until no extra_info updates are pending */
  278. static void wait_pending_extra_info_updates(void)
  279. {
  280. bool updating;
  281. unsigned long flags;
  282. unsigned long t;
  283. int r;
  284. spin_lock_irqsave(&data_lock, flags);
  285. updating = extra_info_update_ongoing();
  286. if (!updating) {
  287. spin_unlock_irqrestore(&data_lock, flags);
  288. return;
  289. }
  290. init_completion(&extra_updated_completion);
  291. spin_unlock_irqrestore(&data_lock, flags);
  292. t = msecs_to_jiffies(500);
  293. r = wait_for_completion_timeout(&extra_updated_completion, t);
  294. if (r == 0)
  295. DSSWARN("timeout in wait_pending_extra_info_updates\n");
  296. else if (r < 0)
  297. DSSERR("wait_pending_extra_info_updates failed: %d\n", r);
  298. }
  299. int dss_mgr_wait_for_go(struct omap_overlay_manager *mgr)
  300. {
  301. unsigned long timeout = msecs_to_jiffies(500);
  302. struct mgr_priv_data *mp;
  303. u32 irq;
  304. int r;
  305. int i;
  306. struct omap_dss_device *dssdev = mgr->device;
  307. if (!dssdev || dssdev->state != OMAP_DSS_DISPLAY_ACTIVE)
  308. return 0;
  309. if (mgr_manual_update(mgr))
  310. return 0;
  311. r = dispc_runtime_get();
  312. if (r)
  313. return r;
  314. irq = dispc_mgr_get_vsync_irq(mgr->id);
  315. mp = get_mgr_priv(mgr);
  316. i = 0;
  317. while (1) {
  318. unsigned long flags;
  319. bool shadow_dirty, dirty;
  320. spin_lock_irqsave(&data_lock, flags);
  321. dirty = mp->info_dirty;
  322. shadow_dirty = mp->shadow_info_dirty;
  323. spin_unlock_irqrestore(&data_lock, flags);
  324. if (!dirty && !shadow_dirty) {
  325. r = 0;
  326. break;
  327. }
  328. /* 4 iterations is the worst case:
  329. * 1 - initial iteration, dirty = true (between VFP and VSYNC)
  330. * 2 - first VSYNC, dirty = true
  331. * 3 - dirty = false, shadow_dirty = true
  332. * 4 - shadow_dirty = false */
  333. if (i++ == 3) {
  334. DSSERR("mgr(%d)->wait_for_go() not finishing\n",
  335. mgr->id);
  336. r = 0;
  337. break;
  338. }
  339. r = omap_dispc_wait_for_irq_interruptible_timeout(irq, timeout);
  340. if (r == -ERESTARTSYS)
  341. break;
  342. if (r) {
  343. DSSERR("mgr(%d)->wait_for_go() timeout\n", mgr->id);
  344. break;
  345. }
  346. }
  347. dispc_runtime_put();
  348. return r;
  349. }
  350. int dss_mgr_wait_for_go_ovl(struct omap_overlay *ovl)
  351. {
  352. unsigned long timeout = msecs_to_jiffies(500);
  353. struct ovl_priv_data *op;
  354. struct omap_dss_device *dssdev;
  355. u32 irq;
  356. int r;
  357. int i;
  358. if (!ovl->manager)
  359. return 0;
  360. dssdev = ovl->manager->device;
  361. if (!dssdev || dssdev->state != OMAP_DSS_DISPLAY_ACTIVE)
  362. return 0;
  363. if (ovl_manual_update(ovl))
  364. return 0;
  365. r = dispc_runtime_get();
  366. if (r)
  367. return r;
  368. irq = dispc_mgr_get_vsync_irq(ovl->manager->id);
  369. op = get_ovl_priv(ovl);
  370. i = 0;
  371. while (1) {
  372. unsigned long flags;
  373. bool shadow_dirty, dirty;
  374. spin_lock_irqsave(&data_lock, flags);
  375. dirty = op->info_dirty;
  376. shadow_dirty = op->shadow_info_dirty;
  377. spin_unlock_irqrestore(&data_lock, flags);
  378. if (!dirty && !shadow_dirty) {
  379. r = 0;
  380. break;
  381. }
  382. /* 4 iterations is the worst case:
  383. * 1 - initial iteration, dirty = true (between VFP and VSYNC)
  384. * 2 - first VSYNC, dirty = true
  385. * 3 - dirty = false, shadow_dirty = true
  386. * 4 - shadow_dirty = false */
  387. if (i++ == 3) {
  388. DSSERR("ovl(%d)->wait_for_go() not finishing\n",
  389. ovl->id);
  390. r = 0;
  391. break;
  392. }
  393. r = omap_dispc_wait_for_irq_interruptible_timeout(irq, timeout);
  394. if (r == -ERESTARTSYS)
  395. break;
  396. if (r) {
  397. DSSERR("ovl(%d)->wait_for_go() timeout\n", ovl->id);
  398. break;
  399. }
  400. }
  401. dispc_runtime_put();
  402. return r;
  403. }
  404. static void dss_ovl_write_regs(struct omap_overlay *ovl)
  405. {
  406. struct ovl_priv_data *op = get_ovl_priv(ovl);
  407. struct omap_overlay_info *oi;
  408. bool ilace, replication;
  409. struct mgr_priv_data *mp;
  410. int r;
  411. DSSDBGF("%d", ovl->id);
  412. if (!op->enabled || !op->info_dirty)
  413. return;
  414. oi = &op->info;
  415. replication = dss_use_replication(ovl->manager->device, oi->color_mode);
  416. ilace = ovl->manager->device->type == OMAP_DISPLAY_TYPE_VENC;
  417. r = dispc_ovl_setup(ovl->id, oi, ilace, replication);
  418. if (r) {
  419. /*
  420. * We can't do much here, as this function can be called from
  421. * vsync interrupt.
  422. */
  423. DSSERR("dispc_ovl_setup failed for ovl %d\n", ovl->id);
  424. /* This will leave fifo configurations in a nonoptimal state */
  425. op->enabled = false;
  426. dispc_ovl_enable(ovl->id, false);
  427. return;
  428. }
  429. mp = get_mgr_priv(ovl->manager);
  430. op->info_dirty = false;
  431. if (mp->updating)
  432. op->shadow_info_dirty = true;
  433. }
  434. static void dss_ovl_write_regs_extra(struct omap_overlay *ovl)
  435. {
  436. struct ovl_priv_data *op = get_ovl_priv(ovl);
  437. struct mgr_priv_data *mp;
  438. DSSDBGF("%d", ovl->id);
  439. if (!op->extra_info_dirty)
  440. return;
  441. /* note: write also when op->enabled == false, so that the ovl gets
  442. * disabled */
  443. dispc_ovl_enable(ovl->id, op->enabled);
  444. dispc_ovl_set_channel_out(ovl->id, op->channel);
  445. dispc_ovl_set_fifo_threshold(ovl->id, op->fifo_low, op->fifo_high);
  446. mp = get_mgr_priv(ovl->manager);
  447. op->extra_info_dirty = false;
  448. if (mp->updating)
  449. op->shadow_extra_info_dirty = true;
  450. }
  451. static void dss_mgr_write_regs(struct omap_overlay_manager *mgr)
  452. {
  453. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  454. struct omap_overlay *ovl;
  455. DSSDBGF("%d", mgr->id);
  456. if (!mp->enabled)
  457. return;
  458. WARN_ON(mp->busy);
  459. /* Commit overlay settings */
  460. list_for_each_entry(ovl, &mgr->overlays, list) {
  461. dss_ovl_write_regs(ovl);
  462. dss_ovl_write_regs_extra(ovl);
  463. }
  464. if (mp->info_dirty) {
  465. dispc_mgr_setup(mgr->id, &mp->info);
  466. mp->info_dirty = false;
  467. if (mp->updating)
  468. mp->shadow_info_dirty = true;
  469. }
  470. }
  471. static void dss_write_regs_common(void)
  472. {
  473. const int num_mgrs = omap_dss_get_num_overlay_managers();
  474. int i;
  475. if (!dss_data.fifo_merge_dirty)
  476. return;
  477. for (i = 0; i < num_mgrs; ++i) {
  478. struct omap_overlay_manager *mgr;
  479. struct mgr_priv_data *mp;
  480. mgr = omap_dss_get_overlay_manager(i);
  481. mp = get_mgr_priv(mgr);
  482. if (mp->enabled) {
  483. if (dss_data.fifo_merge_dirty) {
  484. dispc_enable_fifomerge(dss_data.fifo_merge);
  485. dss_data.fifo_merge_dirty = false;
  486. }
  487. if (mp->updating)
  488. mp->shadow_info_dirty = true;
  489. }
  490. }
  491. }
  492. static void dss_write_regs(void)
  493. {
  494. const int num_mgrs = omap_dss_get_num_overlay_managers();
  495. int i;
  496. dss_write_regs_common();
  497. for (i = 0; i < num_mgrs; ++i) {
  498. struct omap_overlay_manager *mgr;
  499. struct mgr_priv_data *mp;
  500. int r;
  501. mgr = omap_dss_get_overlay_manager(i);
  502. mp = get_mgr_priv(mgr);
  503. if (!mp->enabled || mgr_manual_update(mgr) || mp->busy)
  504. continue;
  505. r = dss_check_settings(mgr, mgr->device);
  506. if (r) {
  507. DSSERR("cannot write registers for manager %s: "
  508. "illegal configuration\n", mgr->name);
  509. continue;
  510. }
  511. dss_mgr_write_regs(mgr);
  512. }
  513. }
  514. static void dss_set_go_bits(void)
  515. {
  516. const int num_mgrs = omap_dss_get_num_overlay_managers();
  517. int i;
  518. for (i = 0; i < num_mgrs; ++i) {
  519. struct omap_overlay_manager *mgr;
  520. struct mgr_priv_data *mp;
  521. mgr = omap_dss_get_overlay_manager(i);
  522. mp = get_mgr_priv(mgr);
  523. if (!mp->enabled || mgr_manual_update(mgr) || mp->busy)
  524. continue;
  525. if (!need_go(mgr))
  526. continue;
  527. mp->busy = true;
  528. if (!dss_data.irq_enabled && need_isr())
  529. dss_register_vsync_isr();
  530. dispc_mgr_go(mgr->id);
  531. }
  532. }
  533. void dss_mgr_start_update(struct omap_overlay_manager *mgr)
  534. {
  535. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  536. unsigned long flags;
  537. int r;
  538. spin_lock_irqsave(&data_lock, flags);
  539. WARN_ON(mp->updating);
  540. r = dss_check_settings(mgr, mgr->device);
  541. if (r) {
  542. DSSERR("cannot start manual update: illegal configuration\n");
  543. spin_unlock_irqrestore(&data_lock, flags);
  544. return;
  545. }
  546. dss_mgr_write_regs(mgr);
  547. dss_write_regs_common();
  548. mp->updating = true;
  549. if (!dss_data.irq_enabled && need_isr())
  550. dss_register_vsync_isr();
  551. dispc_mgr_enable(mgr->id, true);
  552. spin_unlock_irqrestore(&data_lock, flags);
  553. }
  554. static void dss_apply_irq_handler(void *data, u32 mask);
  555. static void dss_register_vsync_isr(void)
  556. {
  557. const int num_mgrs = dss_feat_get_num_mgrs();
  558. u32 mask;
  559. int r, i;
  560. mask = 0;
  561. for (i = 0; i < num_mgrs; ++i)
  562. mask |= dispc_mgr_get_vsync_irq(i);
  563. for (i = 0; i < num_mgrs; ++i)
  564. mask |= dispc_mgr_get_framedone_irq(i);
  565. r = omap_dispc_register_isr(dss_apply_irq_handler, NULL, mask);
  566. WARN_ON(r);
  567. dss_data.irq_enabled = true;
  568. }
  569. static void dss_unregister_vsync_isr(void)
  570. {
  571. const int num_mgrs = dss_feat_get_num_mgrs();
  572. u32 mask;
  573. int r, i;
  574. mask = 0;
  575. for (i = 0; i < num_mgrs; ++i)
  576. mask |= dispc_mgr_get_vsync_irq(i);
  577. for (i = 0; i < num_mgrs; ++i)
  578. mask |= dispc_mgr_get_framedone_irq(i);
  579. r = omap_dispc_unregister_isr(dss_apply_irq_handler, NULL, mask);
  580. WARN_ON(r);
  581. dss_data.irq_enabled = false;
  582. }
  583. static void mgr_clear_shadow_dirty(struct omap_overlay_manager *mgr)
  584. {
  585. struct omap_overlay *ovl;
  586. struct mgr_priv_data *mp;
  587. struct ovl_priv_data *op;
  588. mp = get_mgr_priv(mgr);
  589. mp->shadow_info_dirty = false;
  590. list_for_each_entry(ovl, &mgr->overlays, list) {
  591. op = get_ovl_priv(ovl);
  592. op->shadow_info_dirty = false;
  593. op->shadow_extra_info_dirty = false;
  594. }
  595. }
  596. static void dss_apply_irq_handler(void *data, u32 mask)
  597. {
  598. const int num_mgrs = dss_feat_get_num_mgrs();
  599. int i;
  600. bool extra_updating;
  601. spin_lock(&data_lock);
  602. /* clear busy, updating flags, shadow_dirty flags */
  603. for (i = 0; i < num_mgrs; i++) {
  604. struct omap_overlay_manager *mgr;
  605. struct mgr_priv_data *mp;
  606. bool was_updating;
  607. mgr = omap_dss_get_overlay_manager(i);
  608. mp = get_mgr_priv(mgr);
  609. if (!mp->enabled)
  610. continue;
  611. was_updating = mp->updating;
  612. mp->updating = dispc_mgr_is_enabled(i);
  613. if (!mgr_manual_update(mgr)) {
  614. bool was_busy = mp->busy;
  615. mp->busy = dispc_mgr_go_busy(i);
  616. if (was_busy && !mp->busy)
  617. mgr_clear_shadow_dirty(mgr);
  618. } else {
  619. if (was_updating && !mp->updating)
  620. mgr_clear_shadow_dirty(mgr);
  621. }
  622. }
  623. dss_write_regs();
  624. dss_set_go_bits();
  625. extra_updating = extra_info_update_ongoing();
  626. if (!extra_updating)
  627. complete_all(&extra_updated_completion);
  628. if (!need_isr())
  629. dss_unregister_vsync_isr();
  630. spin_unlock(&data_lock);
  631. }
  632. static void omap_dss_mgr_apply_ovl(struct omap_overlay *ovl)
  633. {
  634. struct ovl_priv_data *op;
  635. op = get_ovl_priv(ovl);
  636. if (!op->user_info_dirty)
  637. return;
  638. op->user_info_dirty = false;
  639. op->info_dirty = true;
  640. op->info = op->user_info;
  641. }
  642. static void omap_dss_mgr_apply_mgr(struct omap_overlay_manager *mgr)
  643. {
  644. struct mgr_priv_data *mp;
  645. mp = get_mgr_priv(mgr);
  646. if (!mp->user_info_dirty)
  647. return;
  648. mp->user_info_dirty = false;
  649. mp->info_dirty = true;
  650. mp->info = mp->user_info;
  651. }
  652. int omap_dss_mgr_apply(struct omap_overlay_manager *mgr)
  653. {
  654. unsigned long flags;
  655. struct omap_overlay *ovl;
  656. int r;
  657. DSSDBG("omap_dss_mgr_apply(%s)\n", mgr->name);
  658. spin_lock_irqsave(&data_lock, flags);
  659. r = dss_check_settings_apply(mgr, mgr->device);
  660. if (r) {
  661. spin_unlock_irqrestore(&data_lock, flags);
  662. DSSERR("failed to apply settings: illegal configuration.\n");
  663. return r;
  664. }
  665. /* Configure overlays */
  666. list_for_each_entry(ovl, &mgr->overlays, list)
  667. omap_dss_mgr_apply_ovl(ovl);
  668. /* Configure manager */
  669. omap_dss_mgr_apply_mgr(mgr);
  670. dss_write_regs();
  671. dss_set_go_bits();
  672. spin_unlock_irqrestore(&data_lock, flags);
  673. return 0;
  674. }
  675. static void dss_apply_ovl_enable(struct omap_overlay *ovl, bool enable)
  676. {
  677. struct ovl_priv_data *op;
  678. op = get_ovl_priv(ovl);
  679. if (op->enabled == enable)
  680. return;
  681. op->enabled = enable;
  682. op->extra_info_dirty = true;
  683. }
  684. static void dss_apply_ovl_fifo_thresholds(struct omap_overlay *ovl,
  685. u32 fifo_low, u32 fifo_high)
  686. {
  687. struct ovl_priv_data *op = get_ovl_priv(ovl);
  688. if (op->fifo_low == fifo_low && op->fifo_high == fifo_high)
  689. return;
  690. op->fifo_low = fifo_low;
  691. op->fifo_high = fifo_high;
  692. op->extra_info_dirty = true;
  693. }
  694. static void dss_apply_fifo_merge(bool use_fifo_merge)
  695. {
  696. if (dss_data.fifo_merge == use_fifo_merge)
  697. return;
  698. dss_data.fifo_merge = use_fifo_merge;
  699. dss_data.fifo_merge_dirty = true;
  700. }
  701. static void dss_ovl_setup_fifo(struct omap_overlay *ovl,
  702. bool use_fifo_merge)
  703. {
  704. struct ovl_priv_data *op = get_ovl_priv(ovl);
  705. struct omap_dss_device *dssdev;
  706. u32 fifo_low, fifo_high;
  707. if (!op->enabled && !op->enabling)
  708. return;
  709. dssdev = ovl->manager->device;
  710. dispc_ovl_compute_fifo_thresholds(ovl->id, &fifo_low, &fifo_high,
  711. use_fifo_merge);
  712. dss_apply_ovl_fifo_thresholds(ovl, fifo_low, fifo_high);
  713. }
  714. static void dss_mgr_setup_fifos(struct omap_overlay_manager *mgr,
  715. bool use_fifo_merge)
  716. {
  717. struct omap_overlay *ovl;
  718. struct mgr_priv_data *mp;
  719. mp = get_mgr_priv(mgr);
  720. if (!mp->enabled)
  721. return;
  722. list_for_each_entry(ovl, &mgr->overlays, list)
  723. dss_ovl_setup_fifo(ovl, use_fifo_merge);
  724. }
  725. static void dss_setup_fifos(bool use_fifo_merge)
  726. {
  727. const int num_mgrs = omap_dss_get_num_overlay_managers();
  728. struct omap_overlay_manager *mgr;
  729. int i;
  730. for (i = 0; i < num_mgrs; ++i) {
  731. mgr = omap_dss_get_overlay_manager(i);
  732. dss_mgr_setup_fifos(mgr, use_fifo_merge);
  733. }
  734. }
  735. static int get_num_used_managers(void)
  736. {
  737. const int num_mgrs = omap_dss_get_num_overlay_managers();
  738. struct omap_overlay_manager *mgr;
  739. struct mgr_priv_data *mp;
  740. int i;
  741. int enabled_mgrs;
  742. enabled_mgrs = 0;
  743. for (i = 0; i < num_mgrs; ++i) {
  744. mgr = omap_dss_get_overlay_manager(i);
  745. mp = get_mgr_priv(mgr);
  746. if (!mp->enabled)
  747. continue;
  748. enabled_mgrs++;
  749. }
  750. return enabled_mgrs;
  751. }
  752. static int get_num_used_overlays(void)
  753. {
  754. const int num_ovls = omap_dss_get_num_overlays();
  755. struct omap_overlay *ovl;
  756. struct ovl_priv_data *op;
  757. struct mgr_priv_data *mp;
  758. int i;
  759. int enabled_ovls;
  760. enabled_ovls = 0;
  761. for (i = 0; i < num_ovls; ++i) {
  762. ovl = omap_dss_get_overlay(i);
  763. op = get_ovl_priv(ovl);
  764. if (!op->enabled && !op->enabling)
  765. continue;
  766. mp = get_mgr_priv(ovl->manager);
  767. if (!mp->enabled)
  768. continue;
  769. enabled_ovls++;
  770. }
  771. return enabled_ovls;
  772. }
  773. static bool get_use_fifo_merge(void)
  774. {
  775. int enabled_mgrs = get_num_used_managers();
  776. int enabled_ovls = get_num_used_overlays();
  777. if (!dss_has_feature(FEAT_FIFO_MERGE))
  778. return false;
  779. /*
  780. * In theory the only requirement for fifomerge is enabled_ovls <= 1.
  781. * However, if we have two managers enabled and set/unset the fifomerge,
  782. * we need to set the GO bits in particular sequence for the managers,
  783. * and wait in between.
  784. *
  785. * This is rather difficult as new apply calls can happen at any time,
  786. * so we simplify the problem by requiring also that enabled_mgrs <= 1.
  787. * In practice this shouldn't matter, because when only one overlay is
  788. * enabled, most likely only one output is enabled.
  789. */
  790. return enabled_mgrs <= 1 && enabled_ovls <= 1;
  791. }
  792. int dss_mgr_enable(struct omap_overlay_manager *mgr)
  793. {
  794. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  795. unsigned long flags;
  796. int r;
  797. bool fifo_merge;
  798. mutex_lock(&apply_lock);
  799. if (mp->enabled)
  800. goto out;
  801. spin_lock_irqsave(&data_lock, flags);
  802. mp->enabled = true;
  803. r = dss_check_settings(mgr, mgr->device);
  804. if (r) {
  805. DSSERR("failed to enable manager %d: check_settings failed\n",
  806. mgr->id);
  807. goto err;
  808. }
  809. /* step 1: setup fifos/fifomerge before enabling the manager */
  810. fifo_merge = get_use_fifo_merge();
  811. dss_setup_fifos(fifo_merge);
  812. dss_apply_fifo_merge(fifo_merge);
  813. dss_write_regs();
  814. dss_set_go_bits();
  815. spin_unlock_irqrestore(&data_lock, flags);
  816. /* wait until fifo config is in */
  817. wait_pending_extra_info_updates();
  818. /* step 2: enable the manager */
  819. spin_lock_irqsave(&data_lock, flags);
  820. if (!mgr_manual_update(mgr))
  821. mp->updating = true;
  822. spin_unlock_irqrestore(&data_lock, flags);
  823. if (!mgr_manual_update(mgr))
  824. dispc_mgr_enable(mgr->id, true);
  825. out:
  826. mutex_unlock(&apply_lock);
  827. return 0;
  828. err:
  829. mp->enabled = false;
  830. spin_unlock_irqrestore(&data_lock, flags);
  831. mutex_unlock(&apply_lock);
  832. return r;
  833. }
  834. void dss_mgr_disable(struct omap_overlay_manager *mgr)
  835. {
  836. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  837. unsigned long flags;
  838. bool fifo_merge;
  839. mutex_lock(&apply_lock);
  840. if (!mp->enabled)
  841. goto out;
  842. if (!mgr_manual_update(mgr))
  843. dispc_mgr_enable(mgr->id, false);
  844. spin_lock_irqsave(&data_lock, flags);
  845. mp->updating = false;
  846. mp->enabled = false;
  847. fifo_merge = get_use_fifo_merge();
  848. dss_setup_fifos(fifo_merge);
  849. dss_apply_fifo_merge(fifo_merge);
  850. dss_write_regs();
  851. dss_set_go_bits();
  852. spin_unlock_irqrestore(&data_lock, flags);
  853. wait_pending_extra_info_updates();
  854. out:
  855. mutex_unlock(&apply_lock);
  856. }
  857. int dss_mgr_set_info(struct omap_overlay_manager *mgr,
  858. struct omap_overlay_manager_info *info)
  859. {
  860. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  861. unsigned long flags;
  862. int r;
  863. r = dss_mgr_simple_check(mgr, info);
  864. if (r)
  865. return r;
  866. spin_lock_irqsave(&data_lock, flags);
  867. mp->user_info = *info;
  868. mp->user_info_dirty = true;
  869. spin_unlock_irqrestore(&data_lock, flags);
  870. return 0;
  871. }
  872. void dss_mgr_get_info(struct omap_overlay_manager *mgr,
  873. struct omap_overlay_manager_info *info)
  874. {
  875. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  876. unsigned long flags;
  877. spin_lock_irqsave(&data_lock, flags);
  878. *info = mp->user_info;
  879. spin_unlock_irqrestore(&data_lock, flags);
  880. }
  881. int dss_mgr_set_device(struct omap_overlay_manager *mgr,
  882. struct omap_dss_device *dssdev)
  883. {
  884. int r;
  885. mutex_lock(&apply_lock);
  886. if (dssdev->manager) {
  887. DSSERR("display '%s' already has a manager '%s'\n",
  888. dssdev->name, dssdev->manager->name);
  889. r = -EINVAL;
  890. goto err;
  891. }
  892. if ((mgr->supported_displays & dssdev->type) == 0) {
  893. DSSERR("display '%s' does not support manager '%s'\n",
  894. dssdev->name, mgr->name);
  895. r = -EINVAL;
  896. goto err;
  897. }
  898. dssdev->manager = mgr;
  899. mgr->device = dssdev;
  900. mutex_unlock(&apply_lock);
  901. return 0;
  902. err:
  903. mutex_unlock(&apply_lock);
  904. return r;
  905. }
  906. int dss_mgr_unset_device(struct omap_overlay_manager *mgr)
  907. {
  908. int r;
  909. mutex_lock(&apply_lock);
  910. if (!mgr->device) {
  911. DSSERR("failed to unset display, display not set.\n");
  912. r = -EINVAL;
  913. goto err;
  914. }
  915. /*
  916. * Don't allow currently enabled displays to have the overlay manager
  917. * pulled out from underneath them
  918. */
  919. if (mgr->device->state != OMAP_DSS_DISPLAY_DISABLED) {
  920. r = -EINVAL;
  921. goto err;
  922. }
  923. mgr->device->manager = NULL;
  924. mgr->device = NULL;
  925. mutex_unlock(&apply_lock);
  926. return 0;
  927. err:
  928. mutex_unlock(&apply_lock);
  929. return r;
  930. }
  931. int dss_ovl_set_info(struct omap_overlay *ovl,
  932. struct omap_overlay_info *info)
  933. {
  934. struct ovl_priv_data *op = get_ovl_priv(ovl);
  935. unsigned long flags;
  936. int r;
  937. r = dss_ovl_simple_check(ovl, info);
  938. if (r)
  939. return r;
  940. spin_lock_irqsave(&data_lock, flags);
  941. op->user_info = *info;
  942. op->user_info_dirty = true;
  943. spin_unlock_irqrestore(&data_lock, flags);
  944. return 0;
  945. }
  946. void dss_ovl_get_info(struct omap_overlay *ovl,
  947. struct omap_overlay_info *info)
  948. {
  949. struct ovl_priv_data *op = get_ovl_priv(ovl);
  950. unsigned long flags;
  951. spin_lock_irqsave(&data_lock, flags);
  952. *info = op->user_info;
  953. spin_unlock_irqrestore(&data_lock, flags);
  954. }
  955. int dss_ovl_set_manager(struct omap_overlay *ovl,
  956. struct omap_overlay_manager *mgr)
  957. {
  958. struct ovl_priv_data *op = get_ovl_priv(ovl);
  959. unsigned long flags;
  960. int r;
  961. if (!mgr)
  962. return -EINVAL;
  963. mutex_lock(&apply_lock);
  964. if (ovl->manager) {
  965. DSSERR("overlay '%s' already has a manager '%s'\n",
  966. ovl->name, ovl->manager->name);
  967. r = -EINVAL;
  968. goto err;
  969. }
  970. spin_lock_irqsave(&data_lock, flags);
  971. if (op->enabled) {
  972. spin_unlock_irqrestore(&data_lock, flags);
  973. DSSERR("overlay has to be disabled to change the manager\n");
  974. r = -EINVAL;
  975. goto err;
  976. }
  977. op->channel = mgr->id;
  978. op->extra_info_dirty = true;
  979. ovl->manager = mgr;
  980. list_add_tail(&ovl->list, &mgr->overlays);
  981. spin_unlock_irqrestore(&data_lock, flags);
  982. /* XXX: When there is an overlay on a DSI manual update display, and
  983. * the overlay is first disabled, then moved to tv, and enabled, we
  984. * seem to get SYNC_LOST_DIGIT error.
  985. *
  986. * Waiting doesn't seem to help, but updating the manual update display
  987. * after disabling the overlay seems to fix this. This hints that the
  988. * overlay is perhaps somehow tied to the LCD output until the output
  989. * is updated.
  990. *
  991. * Userspace workaround for this is to update the LCD after disabling
  992. * the overlay, but before moving the overlay to TV.
  993. */
  994. mutex_unlock(&apply_lock);
  995. return 0;
  996. err:
  997. mutex_unlock(&apply_lock);
  998. return r;
  999. }
  1000. int dss_ovl_unset_manager(struct omap_overlay *ovl)
  1001. {
  1002. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1003. unsigned long flags;
  1004. int r;
  1005. mutex_lock(&apply_lock);
  1006. if (!ovl->manager) {
  1007. DSSERR("failed to detach overlay: manager not set\n");
  1008. r = -EINVAL;
  1009. goto err;
  1010. }
  1011. spin_lock_irqsave(&data_lock, flags);
  1012. if (op->enabled) {
  1013. spin_unlock_irqrestore(&data_lock, flags);
  1014. DSSERR("overlay has to be disabled to unset the manager\n");
  1015. r = -EINVAL;
  1016. goto err;
  1017. }
  1018. op->channel = -1;
  1019. ovl->manager = NULL;
  1020. list_del(&ovl->list);
  1021. spin_unlock_irqrestore(&data_lock, flags);
  1022. mutex_unlock(&apply_lock);
  1023. return 0;
  1024. err:
  1025. mutex_unlock(&apply_lock);
  1026. return r;
  1027. }
  1028. bool dss_ovl_is_enabled(struct omap_overlay *ovl)
  1029. {
  1030. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1031. unsigned long flags;
  1032. bool e;
  1033. spin_lock_irqsave(&data_lock, flags);
  1034. e = op->enabled;
  1035. spin_unlock_irqrestore(&data_lock, flags);
  1036. return e;
  1037. }
  1038. int dss_ovl_enable(struct omap_overlay *ovl)
  1039. {
  1040. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1041. unsigned long flags;
  1042. bool fifo_merge;
  1043. int r;
  1044. mutex_lock(&apply_lock);
  1045. if (op->enabled) {
  1046. r = 0;
  1047. goto err1;
  1048. }
  1049. if (ovl->manager == NULL || ovl->manager->device == NULL) {
  1050. r = -EINVAL;
  1051. goto err1;
  1052. }
  1053. spin_lock_irqsave(&data_lock, flags);
  1054. op->enabling = true;
  1055. r = dss_check_settings(ovl->manager, ovl->manager->device);
  1056. if (r) {
  1057. DSSERR("failed to enable overlay %d: check_settings failed\n",
  1058. ovl->id);
  1059. goto err2;
  1060. }
  1061. /* step 1: configure fifos/fifomerge for currently enabled ovls */
  1062. fifo_merge = get_use_fifo_merge();
  1063. dss_setup_fifos(fifo_merge);
  1064. dss_apply_fifo_merge(fifo_merge);
  1065. dss_write_regs();
  1066. dss_set_go_bits();
  1067. spin_unlock_irqrestore(&data_lock, flags);
  1068. /* wait for fifo configs to go in */
  1069. wait_pending_extra_info_updates();
  1070. /* step 2: enable the overlay */
  1071. spin_lock_irqsave(&data_lock, flags);
  1072. op->enabling = false;
  1073. dss_apply_ovl_enable(ovl, true);
  1074. dss_write_regs();
  1075. dss_set_go_bits();
  1076. spin_unlock_irqrestore(&data_lock, flags);
  1077. /* wait for overlay to be enabled */
  1078. wait_pending_extra_info_updates();
  1079. mutex_unlock(&apply_lock);
  1080. return 0;
  1081. err2:
  1082. op->enabling = false;
  1083. spin_unlock_irqrestore(&data_lock, flags);
  1084. err1:
  1085. mutex_unlock(&apply_lock);
  1086. return r;
  1087. }
  1088. int dss_ovl_disable(struct omap_overlay *ovl)
  1089. {
  1090. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1091. unsigned long flags;
  1092. bool fifo_merge;
  1093. int r;
  1094. mutex_lock(&apply_lock);
  1095. if (!op->enabled) {
  1096. r = 0;
  1097. goto err;
  1098. }
  1099. if (ovl->manager == NULL || ovl->manager->device == NULL) {
  1100. r = -EINVAL;
  1101. goto err;
  1102. }
  1103. /* step 1: disable the overlay */
  1104. spin_lock_irqsave(&data_lock, flags);
  1105. dss_apply_ovl_enable(ovl, false);
  1106. dss_write_regs();
  1107. dss_set_go_bits();
  1108. spin_unlock_irqrestore(&data_lock, flags);
  1109. /* wait for the overlay to be disabled */
  1110. wait_pending_extra_info_updates();
  1111. /* step 2: configure fifos/fifomerge */
  1112. spin_lock_irqsave(&data_lock, flags);
  1113. fifo_merge = get_use_fifo_merge();
  1114. dss_setup_fifos(fifo_merge);
  1115. dss_apply_fifo_merge(fifo_merge);
  1116. dss_write_regs();
  1117. dss_set_go_bits();
  1118. spin_unlock_irqrestore(&data_lock, flags);
  1119. /* wait for fifo config to go in */
  1120. wait_pending_extra_info_updates();
  1121. mutex_unlock(&apply_lock);
  1122. return 0;
  1123. err:
  1124. mutex_unlock(&apply_lock);
  1125. return r;
  1126. }