HvCallPci.h 15 KB

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  1. /*
  2. * Provides the Hypervisor PCI calls for iSeries Linux Parition.
  3. * Copyright (C) 2001 <Wayne G Holm> <IBM Corporation>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; either version 2 of the License, or
  8. * (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the:
  17. * Free Software Foundation, Inc.,
  18. * 59 Temple Place, Suite 330,
  19. * Boston, MA 02111-1307 USA
  20. *
  21. * Change Activity:
  22. * Created, Jan 9, 2001
  23. */
  24. #ifndef _HVCALLPCI_H
  25. #define _HVCALLPCI_H
  26. #include <asm/iSeries/HvCallSc.h>
  27. #include <asm/iSeries/HvTypes.h>
  28. /*
  29. * DSA == Direct Select Address
  30. * this struct must be 64 bits in total
  31. */
  32. struct HvCallPci_DsaAddr {
  33. u16 busNumber; /* PHB index? */
  34. u8 subBusNumber; /* PCI bus number? */
  35. u8 deviceId; /* device and function? */
  36. u8 barNumber;
  37. u8 reserved[3];
  38. };
  39. union HvDsaMap {
  40. u64 DsaAddr;
  41. struct HvCallPci_DsaAddr Dsa;
  42. };
  43. struct HvCallPci_LoadReturn {
  44. u64 rc;
  45. u64 value;
  46. };
  47. enum HvCallPci_DeviceType {
  48. HvCallPci_NodeDevice = 1,
  49. HvCallPci_SpDevice = 2,
  50. HvCallPci_IopDevice = 3,
  51. HvCallPci_BridgeDevice = 4,
  52. HvCallPci_MultiFunctionDevice = 5,
  53. HvCallPci_IoaDevice = 6
  54. };
  55. struct HvCallPci_DeviceInfo {
  56. u32 deviceType; /* See DeviceType enum for values */
  57. };
  58. struct HvCallPci_BusUnitInfo {
  59. u32 sizeReturned; /* length of data returned */
  60. u32 deviceType; /* see DeviceType enum for values */
  61. };
  62. struct HvCallPci_BridgeInfo {
  63. struct HvCallPci_BusUnitInfo busUnitInfo; /* Generic bus unit info */
  64. u8 subBusNumber; /* Bus number of secondary bus */
  65. u8 maxAgents; /* Max idsels on secondary bus */
  66. u8 maxSubBusNumber; /* Max Sub Bus */
  67. u8 logicalSlotNumber; /* Logical Slot Number for IOA */
  68. };
  69. /*
  70. * Maximum BusUnitInfo buffer size. Provided for clients so
  71. * they can allocate a buffer big enough for any type of bus
  72. * unit. Increase as needed.
  73. */
  74. enum {HvCallPci_MaxBusUnitInfoSize = 128};
  75. struct HvCallPci_BarParms {
  76. u64 vaddr;
  77. u64 raddr;
  78. u64 size;
  79. u64 protectStart;
  80. u64 protectEnd;
  81. u64 relocationOffset;
  82. u64 pciAddress;
  83. u64 reserved[3];
  84. };
  85. enum HvCallPci_VpdType {
  86. HvCallPci_BusVpd = 1,
  87. HvCallPci_BusAdapterVpd = 2
  88. };
  89. #define HvCallPciConfigLoad8 HvCallPci + 0
  90. #define HvCallPciConfigLoad16 HvCallPci + 1
  91. #define HvCallPciConfigLoad32 HvCallPci + 2
  92. #define HvCallPciConfigStore8 HvCallPci + 3
  93. #define HvCallPciConfigStore16 HvCallPci + 4
  94. #define HvCallPciConfigStore32 HvCallPci + 5
  95. #define HvCallPciEoi HvCallPci + 16
  96. #define HvCallPciGetBarParms HvCallPci + 18
  97. #define HvCallPciMaskFisr HvCallPci + 20
  98. #define HvCallPciUnmaskFisr HvCallPci + 21
  99. #define HvCallPciSetSlotReset HvCallPci + 25
  100. #define HvCallPciGetDeviceInfo HvCallPci + 27
  101. #define HvCallPciGetCardVpd HvCallPci + 28
  102. #define HvCallPciBarLoad8 HvCallPci + 40
  103. #define HvCallPciBarLoad16 HvCallPci + 41
  104. #define HvCallPciBarLoad32 HvCallPci + 42
  105. #define HvCallPciBarLoad64 HvCallPci + 43
  106. #define HvCallPciBarStore8 HvCallPci + 44
  107. #define HvCallPciBarStore16 HvCallPci + 45
  108. #define HvCallPciBarStore32 HvCallPci + 46
  109. #define HvCallPciBarStore64 HvCallPci + 47
  110. #define HvCallPciMaskInterrupts HvCallPci + 48
  111. #define HvCallPciUnmaskInterrupts HvCallPci + 49
  112. #define HvCallPciGetBusUnitInfo HvCallPci + 50
  113. static inline u64 HvCallPci_configLoad8(u16 busNumber, u8 subBusNumber,
  114. u8 deviceId, u32 offset, u8 *value)
  115. {
  116. struct HvCallPci_DsaAddr dsa;
  117. struct HvCallPci_LoadReturn retVal;
  118. *((u64*)&dsa) = 0;
  119. dsa.busNumber = busNumber;
  120. dsa.subBusNumber = subBusNumber;
  121. dsa.deviceId = deviceId;
  122. HvCall3Ret16(HvCallPciConfigLoad8, &retVal, *(u64 *)&dsa, offset, 0);
  123. // getPaca()->adjustHmtForNoOfSpinLocksHeld();
  124. *value = retVal.value;
  125. return retVal.rc;
  126. }
  127. static inline u64 HvCallPci_configLoad16(u16 busNumber, u8 subBusNumber,
  128. u8 deviceId, u32 offset, u16 *value)
  129. {
  130. struct HvCallPci_DsaAddr dsa;
  131. struct HvCallPci_LoadReturn retVal;
  132. *((u64*)&dsa) = 0;
  133. dsa.busNumber = busNumber;
  134. dsa.subBusNumber = subBusNumber;
  135. dsa.deviceId = deviceId;
  136. HvCall3Ret16(HvCallPciConfigLoad16, &retVal, *(u64 *)&dsa, offset, 0);
  137. // getPaca()->adjustHmtForNoOfSpinLocksHeld();
  138. *value = retVal.value;
  139. return retVal.rc;
  140. }
  141. static inline u64 HvCallPci_configLoad32(u16 busNumber, u8 subBusNumber,
  142. u8 deviceId, u32 offset, u32 *value)
  143. {
  144. struct HvCallPci_DsaAddr dsa;
  145. struct HvCallPci_LoadReturn retVal;
  146. *((u64*)&dsa) = 0;
  147. dsa.busNumber = busNumber;
  148. dsa.subBusNumber = subBusNumber;
  149. dsa.deviceId = deviceId;
  150. HvCall3Ret16(HvCallPciConfigLoad32, &retVal, *(u64 *)&dsa, offset, 0);
  151. // getPaca()->adjustHmtForNoOfSpinLocksHeld();
  152. *value = retVal.value;
  153. return retVal.rc;
  154. }
  155. static inline u64 HvCallPci_configStore8(u16 busNumber, u8 subBusNumber,
  156. u8 deviceId, u32 offset, u8 value)
  157. {
  158. struct HvCallPci_DsaAddr dsa;
  159. u64 retVal;
  160. *((u64*)&dsa) = 0;
  161. dsa.busNumber = busNumber;
  162. dsa.subBusNumber = subBusNumber;
  163. dsa.deviceId = deviceId;
  164. retVal = HvCall4(HvCallPciConfigStore8, *(u64 *)&dsa, offset, value, 0);
  165. // getPaca()->adjustHmtForNoOfSpinLocksHeld();
  166. return retVal;
  167. }
  168. static inline u64 HvCallPci_configStore16(u16 busNumber, u8 subBusNumber,
  169. u8 deviceId, u32 offset, u16 value)
  170. {
  171. struct HvCallPci_DsaAddr dsa;
  172. u64 retVal;
  173. *((u64*)&dsa) = 0;
  174. dsa.busNumber = busNumber;
  175. dsa.subBusNumber = subBusNumber;
  176. dsa.deviceId = deviceId;
  177. retVal = HvCall4(HvCallPciConfigStore16, *(u64 *)&dsa, offset, value, 0);
  178. // getPaca()->adjustHmtForNoOfSpinLocksHeld();
  179. return retVal;
  180. }
  181. static inline u64 HvCallPci_configStore32(u16 busNumber, u8 subBusNumber,
  182. u8 deviceId, u32 offset, u32 value)
  183. {
  184. struct HvCallPci_DsaAddr dsa;
  185. u64 retVal;
  186. *((u64*)&dsa) = 0;
  187. dsa.busNumber = busNumber;
  188. dsa.subBusNumber = subBusNumber;
  189. dsa.deviceId = deviceId;
  190. retVal = HvCall4(HvCallPciConfigStore32, *(u64 *)&dsa, offset, value, 0);
  191. // getPaca()->adjustHmtForNoOfSpinLocksHeld();
  192. return retVal;
  193. }
  194. static inline u64 HvCallPci_barLoad8(u16 busNumberParm, u8 subBusParm,
  195. u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
  196. u8 *valueParm)
  197. {
  198. struct HvCallPci_DsaAddr dsa;
  199. struct HvCallPci_LoadReturn retVal;
  200. *((u64*)&dsa) = 0;
  201. dsa.busNumber = busNumberParm;
  202. dsa.subBusNumber = subBusParm;
  203. dsa.deviceId = deviceIdParm;
  204. dsa.barNumber = barNumberParm;
  205. HvCall3Ret16(HvCallPciBarLoad8, &retVal, *(u64 *)&dsa, offsetParm, 0);
  206. // getPaca()->adjustHmtForNoOfSpinLocksHeld();
  207. *valueParm = retVal.value;
  208. return retVal.rc;
  209. }
  210. static inline u64 HvCallPci_barLoad16(u16 busNumberParm, u8 subBusParm,
  211. u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
  212. u16 *valueParm)
  213. {
  214. struct HvCallPci_DsaAddr dsa;
  215. struct HvCallPci_LoadReturn retVal;
  216. *((u64*)&dsa) = 0;
  217. dsa.busNumber = busNumberParm;
  218. dsa.subBusNumber = subBusParm;
  219. dsa.deviceId = deviceIdParm;
  220. dsa.barNumber = barNumberParm;
  221. HvCall3Ret16(HvCallPciBarLoad16, &retVal, *(u64 *)&dsa, offsetParm, 0);
  222. // getPaca()->adjustHmtForNoOfSpinLocksHeld();
  223. *valueParm = retVal.value;
  224. return retVal.rc;
  225. }
  226. static inline u64 HvCallPci_barLoad32(u16 busNumberParm, u8 subBusParm,
  227. u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
  228. u32 *valueParm)
  229. {
  230. struct HvCallPci_DsaAddr dsa;
  231. struct HvCallPci_LoadReturn retVal;
  232. *((u64*)&dsa) = 0;
  233. dsa.busNumber = busNumberParm;
  234. dsa.subBusNumber = subBusParm;
  235. dsa.deviceId = deviceIdParm;
  236. dsa.barNumber = barNumberParm;
  237. HvCall3Ret16(HvCallPciBarLoad32, &retVal, *(u64 *)&dsa, offsetParm, 0);
  238. // getPaca()->adjustHmtForNoOfSpinLocksHeld();
  239. *valueParm = retVal.value;
  240. return retVal.rc;
  241. }
  242. static inline u64 HvCallPci_barLoad64(u16 busNumberParm, u8 subBusParm,
  243. u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
  244. u64 *valueParm)
  245. {
  246. struct HvCallPci_DsaAddr dsa;
  247. struct HvCallPci_LoadReturn retVal;
  248. *((u64*)&dsa) = 0;
  249. dsa.busNumber = busNumberParm;
  250. dsa.subBusNumber = subBusParm;
  251. dsa.deviceId = deviceIdParm;
  252. dsa.barNumber = barNumberParm;
  253. HvCall3Ret16(HvCallPciBarLoad64, &retVal, *(u64 *)&dsa, offsetParm, 0);
  254. // getPaca()->adjustHmtForNoOfSpinLocksHeld();
  255. *valueParm = retVal.value;
  256. return retVal.rc;
  257. }
  258. static inline u64 HvCallPci_barStore8(u16 busNumberParm, u8 subBusParm,
  259. u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
  260. u8 valueParm)
  261. {
  262. struct HvCallPci_DsaAddr dsa;
  263. u64 retVal;
  264. *((u64*)&dsa) = 0;
  265. dsa.busNumber = busNumberParm;
  266. dsa.subBusNumber = subBusParm;
  267. dsa.deviceId = deviceIdParm;
  268. dsa.barNumber = barNumberParm;
  269. retVal = HvCall4(HvCallPciBarStore8, *(u64 *)&dsa, offsetParm, valueParm, 0);
  270. // getPaca()->adjustHmtForNoOfSpinLocksHeld();
  271. return retVal;
  272. }
  273. static inline u64 HvCallPci_barStore16(u16 busNumberParm, u8 subBusParm,
  274. u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
  275. u16 valueParm)
  276. {
  277. struct HvCallPci_DsaAddr dsa;
  278. u64 retVal;
  279. *((u64*)&dsa) = 0;
  280. dsa.busNumber = busNumberParm;
  281. dsa.subBusNumber = subBusParm;
  282. dsa.deviceId = deviceIdParm;
  283. dsa.barNumber = barNumberParm;
  284. retVal = HvCall4(HvCallPciBarStore16, *(u64 *)&dsa, offsetParm, valueParm, 0);
  285. // getPaca()->adjustHmtForNoOfSpinLocksHeld();
  286. return retVal;
  287. }
  288. static inline u64 HvCallPci_barStore32(u16 busNumberParm, u8 subBusParm,
  289. u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
  290. u32 valueParm)
  291. {
  292. struct HvCallPci_DsaAddr dsa;
  293. u64 retVal;
  294. *((u64*)&dsa) = 0;
  295. dsa.busNumber = busNumberParm;
  296. dsa.subBusNumber = subBusParm;
  297. dsa.deviceId = deviceIdParm;
  298. dsa.barNumber = barNumberParm;
  299. retVal = HvCall4(HvCallPciBarStore32, *(u64 *)&dsa, offsetParm, valueParm, 0);
  300. // getPaca()->adjustHmtForNoOfSpinLocksHeld();
  301. return retVal;
  302. }
  303. static inline u64 HvCallPci_barStore64(u16 busNumberParm, u8 subBusParm,
  304. u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
  305. u64 valueParm)
  306. {
  307. struct HvCallPci_DsaAddr dsa;
  308. u64 retVal;
  309. *((u64*)&dsa) = 0;
  310. dsa.busNumber = busNumberParm;
  311. dsa.subBusNumber = subBusParm;
  312. dsa.deviceId = deviceIdParm;
  313. dsa.barNumber = barNumberParm;
  314. retVal = HvCall4(HvCallPciBarStore64, *(u64 *)&dsa, offsetParm, valueParm, 0);
  315. // getPaca()->adjustHmtForNoOfSpinLocksHeld();
  316. return retVal;
  317. }
  318. static inline u64 HvCallPci_eoi(u16 busNumberParm, u8 subBusParm,
  319. u8 deviceIdParm)
  320. {
  321. struct HvCallPci_DsaAddr dsa;
  322. struct HvCallPci_LoadReturn retVal;
  323. *((u64*)&dsa) = 0;
  324. dsa.busNumber = busNumberParm;
  325. dsa.subBusNumber = subBusParm;
  326. dsa.deviceId = deviceIdParm;
  327. HvCall1Ret16(HvCallPciEoi, &retVal, *(u64*)&dsa);
  328. // getPaca()->adjustHmtForNoOfSpinLocksHeld();
  329. return retVal.rc;
  330. }
  331. static inline u64 HvCallPci_getBarParms(u16 busNumberParm, u8 subBusParm,
  332. u8 deviceIdParm, u8 barNumberParm, u64 parms, u32 sizeofParms)
  333. {
  334. struct HvCallPci_DsaAddr dsa;
  335. u64 retVal;
  336. *((u64*)&dsa) = 0;
  337. dsa.busNumber = busNumberParm;
  338. dsa.subBusNumber = subBusParm;
  339. dsa.deviceId = deviceIdParm;
  340. dsa.barNumber = barNumberParm;
  341. retVal = HvCall3(HvCallPciGetBarParms, *(u64*)&dsa, parms, sizeofParms);
  342. // getPaca()->adjustHmtForNoOfSpinLocksHeld();
  343. return retVal;
  344. }
  345. static inline u64 HvCallPci_maskFisr(u16 busNumberParm, u8 subBusParm,
  346. u8 deviceIdParm, u64 fisrMask)
  347. {
  348. struct HvCallPci_DsaAddr dsa;
  349. u64 retVal;
  350. *((u64*)&dsa) = 0;
  351. dsa.busNumber = busNumberParm;
  352. dsa.subBusNumber = subBusParm;
  353. dsa.deviceId = deviceIdParm;
  354. retVal = HvCall2(HvCallPciMaskFisr, *(u64*)&dsa, fisrMask);
  355. // getPaca()->adjustHmtForNoOfSpinLocksHeld();
  356. return retVal;
  357. }
  358. static inline u64 HvCallPci_unmaskFisr(u16 busNumberParm, u8 subBusParm,
  359. u8 deviceIdParm, u64 fisrMask)
  360. {
  361. struct HvCallPci_DsaAddr dsa;
  362. u64 retVal;
  363. *((u64*)&dsa) = 0;
  364. dsa.busNumber = busNumberParm;
  365. dsa.subBusNumber = subBusParm;
  366. dsa.deviceId = deviceIdParm;
  367. retVal = HvCall2(HvCallPciUnmaskFisr, *(u64*)&dsa, fisrMask);
  368. // getPaca()->adjustHmtForNoOfSpinLocksHeld();
  369. return retVal;
  370. }
  371. static inline u64 HvCallPci_setSlotReset(u16 busNumberParm, u8 subBusParm,
  372. u8 deviceIdParm, u64 onNotOff)
  373. {
  374. struct HvCallPci_DsaAddr dsa;
  375. u64 retVal;
  376. *((u64*)&dsa) = 0;
  377. dsa.busNumber = busNumberParm;
  378. dsa.subBusNumber = subBusParm;
  379. dsa.deviceId = deviceIdParm;
  380. retVal = HvCall2(HvCallPciSetSlotReset, *(u64*)&dsa, onNotOff);
  381. // getPaca()->adjustHmtForNoOfSpinLocksHeld();
  382. return retVal;
  383. }
  384. static inline u64 HvCallPci_getDeviceInfo(u16 busNumberParm, u8 subBusParm,
  385. u8 deviceNumberParm, u64 parms, u32 sizeofParms)
  386. {
  387. struct HvCallPci_DsaAddr dsa;
  388. u64 retVal;
  389. *((u64*)&dsa) = 0;
  390. dsa.busNumber = busNumberParm;
  391. dsa.subBusNumber = subBusParm;
  392. dsa.deviceId = deviceNumberParm << 4;
  393. retVal = HvCall3(HvCallPciGetDeviceInfo, *(u64*)&dsa, parms, sizeofParms);
  394. // getPaca()->adjustHmtForNoOfSpinLocksHeld();
  395. return retVal;
  396. }
  397. static inline u64 HvCallPci_maskInterrupts(u16 busNumberParm, u8 subBusParm,
  398. u8 deviceIdParm, u64 interruptMask)
  399. {
  400. struct HvCallPci_DsaAddr dsa;
  401. u64 retVal;
  402. *((u64*)&dsa) = 0;
  403. dsa.busNumber = busNumberParm;
  404. dsa.subBusNumber = subBusParm;
  405. dsa.deviceId = deviceIdParm;
  406. retVal = HvCall2(HvCallPciMaskInterrupts, *(u64*)&dsa, interruptMask);
  407. // getPaca()->adjustHmtForNoOfSpinLocksHeld();
  408. return retVal;
  409. }
  410. static inline u64 HvCallPci_unmaskInterrupts(u16 busNumberParm, u8 subBusParm,
  411. u8 deviceIdParm, u64 interruptMask)
  412. {
  413. struct HvCallPci_DsaAddr dsa;
  414. u64 retVal;
  415. *((u64*)&dsa) = 0;
  416. dsa.busNumber = busNumberParm;
  417. dsa.subBusNumber = subBusParm;
  418. dsa.deviceId = deviceIdParm;
  419. retVal = HvCall2(HvCallPciUnmaskInterrupts, *(u64*)&dsa, interruptMask);
  420. // getPaca()->adjustHmtForNoOfSpinLocksHeld();
  421. return retVal;
  422. }
  423. static inline u64 HvCallPci_getBusUnitInfo(u16 busNumberParm, u8 subBusParm,
  424. u8 deviceIdParm, u64 parms, u32 sizeofParms)
  425. {
  426. struct HvCallPci_DsaAddr dsa;
  427. u64 retVal;
  428. *((u64*)&dsa) = 0;
  429. dsa.busNumber = busNumberParm;
  430. dsa.subBusNumber = subBusParm;
  431. dsa.deviceId = deviceIdParm;
  432. retVal = HvCall3(HvCallPciGetBusUnitInfo, *(u64*)&dsa, parms, sizeofParms);
  433. // getPaca()->adjustHmtForNoOfSpinLocksHeld();
  434. return retVal;
  435. }
  436. static inline int HvCallPci_getBusVpd(u16 busNumParm, u64 destParm,
  437. u16 sizeParm)
  438. {
  439. int xRetSize;
  440. u64 xRc = HvCall4(HvCallPciGetCardVpd, busNumParm, destParm, sizeParm, HvCallPci_BusVpd);
  441. // getPaca()->adjustHmtForNoOfSpinLocksHeld();
  442. if (xRc == -1)
  443. xRetSize = -1;
  444. else
  445. xRetSize = xRc & 0xFFFF;
  446. return xRetSize;
  447. }
  448. static inline int HvCallPci_getBusAdapterVpd(u16 busNumParm, u64 destParm,
  449. u16 sizeParm)
  450. {
  451. int xRetSize;
  452. u64 xRc = HvCall4(HvCallPciGetCardVpd, busNumParm, destParm, sizeParm, HvCallPci_BusAdapterVpd);
  453. // getPaca()->adjustHmtForNoOfSpinLocksHeld();
  454. if (xRc == -1)
  455. xRetSize = -1;
  456. else
  457. xRetSize = xRc & 0xFFFF;
  458. return xRetSize;
  459. }
  460. #endif /* _HVCALLPCI_H */