radeon_gem.c 14 KB

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  1. /*
  2. * Copyright 2008 Advanced Micro Devices, Inc.
  3. * Copyright 2008 Red Hat Inc.
  4. * Copyright 2009 Jerome Glisse.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the "Software"),
  8. * to deal in the Software without restriction, including without limitation
  9. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10. * and/or sell copies of the Software, and to permit persons to whom the
  11. * Software is furnished to do so, subject to the following conditions:
  12. *
  13. * The above copyright notice and this permission notice shall be included in
  14. * all copies or substantial portions of the Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22. * OTHER DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors: Dave Airlie
  25. * Alex Deucher
  26. * Jerome Glisse
  27. */
  28. #include "drmP.h"
  29. #include "drm.h"
  30. #include "radeon_drm.h"
  31. #include "radeon.h"
  32. int radeon_gem_object_init(struct drm_gem_object *obj)
  33. {
  34. BUG();
  35. return 0;
  36. }
  37. void radeon_gem_object_free(struct drm_gem_object *gobj)
  38. {
  39. struct radeon_bo *robj = gem_to_radeon_bo(gobj);
  40. if (robj) {
  41. if (robj->gem_base.import_attach)
  42. drm_prime_gem_destroy(&robj->gem_base, robj->tbo.sg);
  43. radeon_bo_unref(&robj);
  44. }
  45. }
  46. int radeon_gem_object_create(struct radeon_device *rdev, int size,
  47. int alignment, int initial_domain,
  48. bool discardable, bool kernel,
  49. struct drm_gem_object **obj)
  50. {
  51. struct radeon_bo *robj;
  52. int r;
  53. *obj = NULL;
  54. /* At least align on page size */
  55. if (alignment < PAGE_SIZE) {
  56. alignment = PAGE_SIZE;
  57. }
  58. r = radeon_bo_create(rdev, size, alignment, kernel, initial_domain, NULL, &robj);
  59. if (r) {
  60. if (r != -ERESTARTSYS)
  61. DRM_ERROR("Failed to allocate GEM object (%d, %d, %u, %d)\n",
  62. size, initial_domain, alignment, r);
  63. return r;
  64. }
  65. *obj = &robj->gem_base;
  66. mutex_lock(&rdev->gem.mutex);
  67. list_add_tail(&robj->list, &rdev->gem.objects);
  68. mutex_unlock(&rdev->gem.mutex);
  69. return 0;
  70. }
  71. int radeon_gem_set_domain(struct drm_gem_object *gobj,
  72. uint32_t rdomain, uint32_t wdomain)
  73. {
  74. struct radeon_bo *robj;
  75. uint32_t domain;
  76. int r;
  77. /* FIXME: reeimplement */
  78. robj = gem_to_radeon_bo(gobj);
  79. /* work out where to validate the buffer to */
  80. domain = wdomain;
  81. if (!domain) {
  82. domain = rdomain;
  83. }
  84. if (!domain) {
  85. /* Do nothings */
  86. printk(KERN_WARNING "Set domain without domain !\n");
  87. return 0;
  88. }
  89. if (domain == RADEON_GEM_DOMAIN_CPU) {
  90. /* Asking for cpu access wait for object idle */
  91. r = radeon_bo_wait(robj, NULL, false);
  92. if (r) {
  93. printk(KERN_ERR "Failed to wait for object !\n");
  94. return r;
  95. }
  96. }
  97. return 0;
  98. }
  99. int radeon_gem_init(struct radeon_device *rdev)
  100. {
  101. INIT_LIST_HEAD(&rdev->gem.objects);
  102. return 0;
  103. }
  104. void radeon_gem_fini(struct radeon_device *rdev)
  105. {
  106. radeon_bo_force_delete(rdev);
  107. }
  108. /*
  109. * Call from drm_gem_handle_create which appear in both new and open ioctl
  110. * case.
  111. */
  112. int radeon_gem_object_open(struct drm_gem_object *obj, struct drm_file *file_priv)
  113. {
  114. return 0;
  115. }
  116. void radeon_gem_object_close(struct drm_gem_object *obj,
  117. struct drm_file *file_priv)
  118. {
  119. struct radeon_bo *rbo = gem_to_radeon_bo(obj);
  120. struct radeon_device *rdev = rbo->rdev;
  121. struct radeon_fpriv *fpriv = file_priv->driver_priv;
  122. struct radeon_vm *vm = &fpriv->vm;
  123. struct radeon_bo_va *bo_va, *tmp;
  124. if (rdev->family < CHIP_CAYMAN) {
  125. return;
  126. }
  127. if (radeon_bo_reserve(rbo, false)) {
  128. return;
  129. }
  130. list_for_each_entry_safe(bo_va, tmp, &rbo->va, bo_list) {
  131. if (bo_va->vm == vm) {
  132. /* remove from this vm address space */
  133. mutex_lock(&vm->mutex);
  134. list_del(&bo_va->vm_list);
  135. mutex_unlock(&vm->mutex);
  136. list_del(&bo_va->bo_list);
  137. kfree(bo_va);
  138. }
  139. }
  140. radeon_bo_unreserve(rbo);
  141. }
  142. static int radeon_gem_handle_lockup(struct radeon_device *rdev, int r)
  143. {
  144. if (r == -EDEADLK) {
  145. radeon_mutex_lock(&rdev->cs_mutex);
  146. r = radeon_gpu_reset(rdev);
  147. if (!r)
  148. r = -EAGAIN;
  149. radeon_mutex_unlock(&rdev->cs_mutex);
  150. }
  151. return r;
  152. }
  153. /*
  154. * GEM ioctls.
  155. */
  156. int radeon_gem_info_ioctl(struct drm_device *dev, void *data,
  157. struct drm_file *filp)
  158. {
  159. struct radeon_device *rdev = dev->dev_private;
  160. struct drm_radeon_gem_info *args = data;
  161. struct ttm_mem_type_manager *man;
  162. unsigned i;
  163. man = &rdev->mman.bdev.man[TTM_PL_VRAM];
  164. args->vram_size = rdev->mc.real_vram_size;
  165. args->vram_visible = (u64)man->size << PAGE_SHIFT;
  166. if (rdev->stollen_vga_memory)
  167. args->vram_visible -= radeon_bo_size(rdev->stollen_vga_memory);
  168. args->vram_visible -= radeon_fbdev_total_size(rdev);
  169. args->gart_size = rdev->mc.gtt_size - 4096 - RADEON_IB_POOL_SIZE*64*1024;
  170. for(i = 0; i < RADEON_NUM_RINGS; ++i)
  171. args->gart_size -= rdev->ring[i].ring_size;
  172. return 0;
  173. }
  174. int radeon_gem_pread_ioctl(struct drm_device *dev, void *data,
  175. struct drm_file *filp)
  176. {
  177. /* TODO: implement */
  178. DRM_ERROR("unimplemented %s\n", __func__);
  179. return -ENOSYS;
  180. }
  181. int radeon_gem_pwrite_ioctl(struct drm_device *dev, void *data,
  182. struct drm_file *filp)
  183. {
  184. /* TODO: implement */
  185. DRM_ERROR("unimplemented %s\n", __func__);
  186. return -ENOSYS;
  187. }
  188. int radeon_gem_create_ioctl(struct drm_device *dev, void *data,
  189. struct drm_file *filp)
  190. {
  191. struct radeon_device *rdev = dev->dev_private;
  192. struct drm_radeon_gem_create *args = data;
  193. struct drm_gem_object *gobj;
  194. uint32_t handle;
  195. int r;
  196. /* create a gem object to contain this object in */
  197. args->size = roundup(args->size, PAGE_SIZE);
  198. r = radeon_gem_object_create(rdev, args->size, args->alignment,
  199. args->initial_domain, false,
  200. false, &gobj);
  201. if (r) {
  202. r = radeon_gem_handle_lockup(rdev, r);
  203. return r;
  204. }
  205. r = drm_gem_handle_create(filp, gobj, &handle);
  206. /* drop reference from allocate - handle holds it now */
  207. drm_gem_object_unreference_unlocked(gobj);
  208. if (r) {
  209. r = radeon_gem_handle_lockup(rdev, r);
  210. return r;
  211. }
  212. args->handle = handle;
  213. return 0;
  214. }
  215. int radeon_gem_set_domain_ioctl(struct drm_device *dev, void *data,
  216. struct drm_file *filp)
  217. {
  218. /* transition the BO to a domain -
  219. * just validate the BO into a certain domain */
  220. struct drm_radeon_gem_set_domain *args = data;
  221. struct drm_gem_object *gobj;
  222. struct radeon_bo *robj;
  223. int r;
  224. /* for now if someone requests domain CPU -
  225. * just make sure the buffer is finished with */
  226. /* just do a BO wait for now */
  227. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  228. if (gobj == NULL) {
  229. return -ENOENT;
  230. }
  231. robj = gem_to_radeon_bo(gobj);
  232. r = radeon_gem_set_domain(gobj, args->read_domains, args->write_domain);
  233. drm_gem_object_unreference_unlocked(gobj);
  234. r = radeon_gem_handle_lockup(robj->rdev, r);
  235. return r;
  236. }
  237. int radeon_mode_dumb_mmap(struct drm_file *filp,
  238. struct drm_device *dev,
  239. uint32_t handle, uint64_t *offset_p)
  240. {
  241. struct drm_gem_object *gobj;
  242. struct radeon_bo *robj;
  243. gobj = drm_gem_object_lookup(dev, filp, handle);
  244. if (gobj == NULL) {
  245. return -ENOENT;
  246. }
  247. robj = gem_to_radeon_bo(gobj);
  248. *offset_p = radeon_bo_mmap_offset(robj);
  249. drm_gem_object_unreference_unlocked(gobj);
  250. return 0;
  251. }
  252. int radeon_gem_mmap_ioctl(struct drm_device *dev, void *data,
  253. struct drm_file *filp)
  254. {
  255. struct drm_radeon_gem_mmap *args = data;
  256. return radeon_mode_dumb_mmap(filp, dev, args->handle, &args->addr_ptr);
  257. }
  258. int radeon_gem_busy_ioctl(struct drm_device *dev, void *data,
  259. struct drm_file *filp)
  260. {
  261. struct radeon_device *rdev = dev->dev_private;
  262. struct drm_radeon_gem_busy *args = data;
  263. struct drm_gem_object *gobj;
  264. struct radeon_bo *robj;
  265. int r;
  266. uint32_t cur_placement = 0;
  267. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  268. if (gobj == NULL) {
  269. return -ENOENT;
  270. }
  271. robj = gem_to_radeon_bo(gobj);
  272. r = radeon_bo_wait(robj, &cur_placement, true);
  273. switch (cur_placement) {
  274. case TTM_PL_VRAM:
  275. args->domain = RADEON_GEM_DOMAIN_VRAM;
  276. break;
  277. case TTM_PL_TT:
  278. args->domain = RADEON_GEM_DOMAIN_GTT;
  279. break;
  280. case TTM_PL_SYSTEM:
  281. args->domain = RADEON_GEM_DOMAIN_CPU;
  282. default:
  283. break;
  284. }
  285. drm_gem_object_unreference_unlocked(gobj);
  286. r = radeon_gem_handle_lockup(rdev, r);
  287. return r;
  288. }
  289. int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
  290. struct drm_file *filp)
  291. {
  292. struct radeon_device *rdev = dev->dev_private;
  293. struct drm_radeon_gem_wait_idle *args = data;
  294. struct drm_gem_object *gobj;
  295. struct radeon_bo *robj;
  296. int r;
  297. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  298. if (gobj == NULL) {
  299. return -ENOENT;
  300. }
  301. robj = gem_to_radeon_bo(gobj);
  302. r = radeon_bo_wait(robj, NULL, false);
  303. /* callback hw specific functions if any */
  304. if (rdev->asic->ioctl_wait_idle)
  305. robj->rdev->asic->ioctl_wait_idle(rdev, robj);
  306. drm_gem_object_unreference_unlocked(gobj);
  307. r = radeon_gem_handle_lockup(rdev, r);
  308. return r;
  309. }
  310. int radeon_gem_set_tiling_ioctl(struct drm_device *dev, void *data,
  311. struct drm_file *filp)
  312. {
  313. struct drm_radeon_gem_set_tiling *args = data;
  314. struct drm_gem_object *gobj;
  315. struct radeon_bo *robj;
  316. int r = 0;
  317. DRM_DEBUG("%d \n", args->handle);
  318. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  319. if (gobj == NULL)
  320. return -ENOENT;
  321. robj = gem_to_radeon_bo(gobj);
  322. r = radeon_bo_set_tiling_flags(robj, args->tiling_flags, args->pitch);
  323. drm_gem_object_unreference_unlocked(gobj);
  324. return r;
  325. }
  326. int radeon_gem_get_tiling_ioctl(struct drm_device *dev, void *data,
  327. struct drm_file *filp)
  328. {
  329. struct drm_radeon_gem_get_tiling *args = data;
  330. struct drm_gem_object *gobj;
  331. struct radeon_bo *rbo;
  332. int r = 0;
  333. DRM_DEBUG("\n");
  334. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  335. if (gobj == NULL)
  336. return -ENOENT;
  337. rbo = gem_to_radeon_bo(gobj);
  338. r = radeon_bo_reserve(rbo, false);
  339. if (unlikely(r != 0))
  340. goto out;
  341. radeon_bo_get_tiling_flags(rbo, &args->tiling_flags, &args->pitch);
  342. radeon_bo_unreserve(rbo);
  343. out:
  344. drm_gem_object_unreference_unlocked(gobj);
  345. return r;
  346. }
  347. int radeon_gem_va_ioctl(struct drm_device *dev, void *data,
  348. struct drm_file *filp)
  349. {
  350. struct drm_radeon_gem_va *args = data;
  351. struct drm_gem_object *gobj;
  352. struct radeon_device *rdev = dev->dev_private;
  353. struct radeon_fpriv *fpriv = filp->driver_priv;
  354. struct radeon_bo *rbo;
  355. struct radeon_bo_va *bo_va;
  356. u32 invalid_flags;
  357. int r = 0;
  358. if (!rdev->vm_manager.enabled) {
  359. args->operation = RADEON_VA_RESULT_ERROR;
  360. return -ENOTTY;
  361. }
  362. /* !! DONT REMOVE !!
  363. * We don't support vm_id yet, to be sure we don't have have broken
  364. * userspace, reject anyone trying to use non 0 value thus moving
  365. * forward we can use those fields without breaking existant userspace
  366. */
  367. if (args->vm_id) {
  368. args->operation = RADEON_VA_RESULT_ERROR;
  369. return -EINVAL;
  370. }
  371. if (args->offset < RADEON_VA_RESERVED_SIZE) {
  372. dev_err(&dev->pdev->dev,
  373. "offset 0x%lX is in reserved area 0x%X\n",
  374. (unsigned long)args->offset,
  375. RADEON_VA_RESERVED_SIZE);
  376. args->operation = RADEON_VA_RESULT_ERROR;
  377. return -EINVAL;
  378. }
  379. /* don't remove, we need to enforce userspace to set the snooped flag
  380. * otherwise we will endup with broken userspace and we won't be able
  381. * to enable this feature without adding new interface
  382. */
  383. invalid_flags = RADEON_VM_PAGE_VALID | RADEON_VM_PAGE_SYSTEM;
  384. if ((args->flags & invalid_flags)) {
  385. dev_err(&dev->pdev->dev, "invalid flags 0x%08X vs 0x%08X\n",
  386. args->flags, invalid_flags);
  387. args->operation = RADEON_VA_RESULT_ERROR;
  388. return -EINVAL;
  389. }
  390. if (!(args->flags & RADEON_VM_PAGE_SNOOPED)) {
  391. dev_err(&dev->pdev->dev, "only supported snooped mapping for now\n");
  392. args->operation = RADEON_VA_RESULT_ERROR;
  393. return -EINVAL;
  394. }
  395. switch (args->operation) {
  396. case RADEON_VA_MAP:
  397. case RADEON_VA_UNMAP:
  398. break;
  399. default:
  400. dev_err(&dev->pdev->dev, "unsupported operation %d\n",
  401. args->operation);
  402. args->operation = RADEON_VA_RESULT_ERROR;
  403. return -EINVAL;
  404. }
  405. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  406. if (gobj == NULL) {
  407. args->operation = RADEON_VA_RESULT_ERROR;
  408. return -ENOENT;
  409. }
  410. rbo = gem_to_radeon_bo(gobj);
  411. r = radeon_bo_reserve(rbo, false);
  412. if (r) {
  413. args->operation = RADEON_VA_RESULT_ERROR;
  414. drm_gem_object_unreference_unlocked(gobj);
  415. return r;
  416. }
  417. switch (args->operation) {
  418. case RADEON_VA_MAP:
  419. bo_va = radeon_bo_va(rbo, &fpriv->vm);
  420. if (bo_va) {
  421. args->operation = RADEON_VA_RESULT_VA_EXIST;
  422. args->offset = bo_va->soffset;
  423. goto out;
  424. }
  425. r = radeon_vm_bo_add(rdev, &fpriv->vm, rbo,
  426. args->offset, args->flags);
  427. break;
  428. case RADEON_VA_UNMAP:
  429. r = radeon_vm_bo_rmv(rdev, &fpriv->vm, rbo);
  430. break;
  431. default:
  432. break;
  433. }
  434. args->operation = RADEON_VA_RESULT_OK;
  435. if (r) {
  436. args->operation = RADEON_VA_RESULT_ERROR;
  437. }
  438. out:
  439. radeon_bo_unreserve(rbo);
  440. drm_gem_object_unreference_unlocked(gobj);
  441. return r;
  442. }
  443. int radeon_mode_dumb_create(struct drm_file *file_priv,
  444. struct drm_device *dev,
  445. struct drm_mode_create_dumb *args)
  446. {
  447. struct radeon_device *rdev = dev->dev_private;
  448. struct drm_gem_object *gobj;
  449. uint32_t handle;
  450. int r;
  451. args->pitch = radeon_align_pitch(rdev, args->width, args->bpp, 0) * ((args->bpp + 1) / 8);
  452. args->size = args->pitch * args->height;
  453. args->size = ALIGN(args->size, PAGE_SIZE);
  454. r = radeon_gem_object_create(rdev, args->size, 0,
  455. RADEON_GEM_DOMAIN_VRAM,
  456. false, ttm_bo_type_device,
  457. &gobj);
  458. if (r)
  459. return -ENOMEM;
  460. r = drm_gem_handle_create(file_priv, gobj, &handle);
  461. /* drop reference from allocate - handle holds it now */
  462. drm_gem_object_unreference_unlocked(gobj);
  463. if (r) {
  464. return r;
  465. }
  466. args->handle = handle;
  467. return 0;
  468. }
  469. int radeon_mode_dumb_destroy(struct drm_file *file_priv,
  470. struct drm_device *dev,
  471. uint32_t handle)
  472. {
  473. return drm_gem_handle_delete(file_priv, handle);
  474. }