iwl-core.c 81 KB

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  1. /******************************************************************************
  2. *
  3. * GPL LICENSE SUMMARY
  4. *
  5. * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of version 2 of the GNU General Public License as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but
  12. * WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  19. * USA
  20. *
  21. * The full GNU General Public License is included in this distribution
  22. * in the file called LICENSE.GPL.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *****************************************************************************/
  28. #include <linux/kernel.h>
  29. #include <linux/module.h>
  30. #include <linux/etherdevice.h>
  31. #include <linux/sched.h>
  32. #include <net/mac80211.h>
  33. #include "iwl-eeprom.h"
  34. #include "iwl-dev.h" /* FIXME: remove */
  35. #include "iwl-debug.h"
  36. #include "iwl-core.h"
  37. #include "iwl-io.h"
  38. #include "iwl-power.h"
  39. #include "iwl-sta.h"
  40. #include "iwl-helpers.h"
  41. MODULE_DESCRIPTION("iwl core");
  42. MODULE_VERSION(IWLWIFI_VERSION);
  43. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  44. MODULE_LICENSE("GPL");
  45. /*
  46. * set bt_coex_active to true, uCode will do kill/defer
  47. * every time the priority line is asserted (BT is sending signals on the
  48. * priority line in the PCIx).
  49. * set bt_coex_active to false, uCode will ignore the BT activity and
  50. * perform the normal operation
  51. *
  52. * User might experience transmit issue on some platform due to WiFi/BT
  53. * co-exist problem. The possible behaviors are:
  54. * Able to scan and finding all the available AP
  55. * Not able to associate with any AP
  56. * On those platforms, WiFi communication can be restored by set
  57. * "bt_coex_active" module parameter to "false"
  58. *
  59. * default: bt_coex_active = true (BT_COEX_ENABLE)
  60. */
  61. static bool bt_coex_active = true;
  62. module_param(bt_coex_active, bool, S_IRUGO);
  63. MODULE_PARM_DESC(bt_coex_active, "enable wifi/bluetooth co-exist");
  64. #define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
  65. [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
  66. IWL_RATE_SISO_##s##M_PLCP, \
  67. IWL_RATE_MIMO2_##s##M_PLCP,\
  68. IWL_RATE_MIMO3_##s##M_PLCP,\
  69. IWL_RATE_##r##M_IEEE, \
  70. IWL_RATE_##ip##M_INDEX, \
  71. IWL_RATE_##in##M_INDEX, \
  72. IWL_RATE_##rp##M_INDEX, \
  73. IWL_RATE_##rn##M_INDEX, \
  74. IWL_RATE_##pp##M_INDEX, \
  75. IWL_RATE_##np##M_INDEX }
  76. u32 iwl_debug_level;
  77. EXPORT_SYMBOL(iwl_debug_level);
  78. /*
  79. * Parameter order:
  80. * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
  81. *
  82. * If there isn't a valid next or previous rate then INV is used which
  83. * maps to IWL_RATE_INVALID
  84. *
  85. */
  86. const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
  87. IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
  88. IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
  89. IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
  90. IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
  91. IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
  92. IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
  93. IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
  94. IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
  95. IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
  96. IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
  97. IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
  98. IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
  99. IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
  100. /* FIXME:RS: ^^ should be INV (legacy) */
  101. };
  102. EXPORT_SYMBOL(iwl_rates);
  103. int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
  104. {
  105. int idx = 0;
  106. /* HT rate format */
  107. if (rate_n_flags & RATE_MCS_HT_MSK) {
  108. idx = (rate_n_flags & 0xff);
  109. if (idx >= IWL_RATE_MIMO3_6M_PLCP)
  110. idx = idx - IWL_RATE_MIMO3_6M_PLCP;
  111. else if (idx >= IWL_RATE_MIMO2_6M_PLCP)
  112. idx = idx - IWL_RATE_MIMO2_6M_PLCP;
  113. idx += IWL_FIRST_OFDM_RATE;
  114. /* skip 9M not supported in ht*/
  115. if (idx >= IWL_RATE_9M_INDEX)
  116. idx += 1;
  117. if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
  118. return idx;
  119. /* legacy rate format, search for match in table */
  120. } else {
  121. for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
  122. if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
  123. return idx;
  124. }
  125. return -1;
  126. }
  127. EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx);
  128. u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant)
  129. {
  130. int i;
  131. u8 ind = ant;
  132. for (i = 0; i < RATE_ANT_NUM - 1; i++) {
  133. ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0;
  134. if (priv->hw_params.valid_tx_ant & BIT(ind))
  135. return ind;
  136. }
  137. return ant;
  138. }
  139. EXPORT_SYMBOL(iwl_toggle_tx_ant);
  140. const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  141. EXPORT_SYMBOL(iwl_bcast_addr);
  142. /* This function both allocates and initializes hw and priv. */
  143. struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg,
  144. struct ieee80211_ops *hw_ops)
  145. {
  146. struct iwl_priv *priv;
  147. /* mac80211 allocates memory for this device instance, including
  148. * space for this driver's private structure */
  149. struct ieee80211_hw *hw =
  150. ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops);
  151. if (hw == NULL) {
  152. printk(KERN_ERR "%s: Can not allocate network device\n",
  153. cfg->name);
  154. goto out;
  155. }
  156. priv = hw->priv;
  157. priv->hw = hw;
  158. out:
  159. return hw;
  160. }
  161. EXPORT_SYMBOL(iwl_alloc_all);
  162. void iwl_hw_detect(struct iwl_priv *priv)
  163. {
  164. priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
  165. priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
  166. pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
  167. }
  168. EXPORT_SYMBOL(iwl_hw_detect);
  169. /*
  170. * QoS support
  171. */
  172. static void iwl_update_qos(struct iwl_priv *priv)
  173. {
  174. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  175. return;
  176. priv->qos_data.def_qos_parm.qos_flags = 0;
  177. if (priv->qos_data.qos_active)
  178. priv->qos_data.def_qos_parm.qos_flags |=
  179. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  180. if (priv->current_ht_config.is_ht)
  181. priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
  182. IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
  183. priv->qos_data.qos_active,
  184. priv->qos_data.def_qos_parm.qos_flags);
  185. iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
  186. sizeof(struct iwl_qosparam_cmd),
  187. &priv->qos_data.def_qos_parm, NULL);
  188. }
  189. #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
  190. #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
  191. static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
  192. struct ieee80211_sta_ht_cap *ht_info,
  193. enum ieee80211_band band)
  194. {
  195. u16 max_bit_rate = 0;
  196. u8 rx_chains_num = priv->hw_params.rx_chains_num;
  197. u8 tx_chains_num = priv->hw_params.tx_chains_num;
  198. ht_info->cap = 0;
  199. memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
  200. ht_info->ht_supported = true;
  201. if (priv->cfg->ht_greenfield_support)
  202. ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
  203. ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
  204. max_bit_rate = MAX_BIT_RATE_20_MHZ;
  205. if (priv->hw_params.ht40_channel & BIT(band)) {
  206. ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
  207. ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
  208. ht_info->mcs.rx_mask[4] = 0x01;
  209. max_bit_rate = MAX_BIT_RATE_40_MHZ;
  210. }
  211. if (priv->cfg->mod_params->amsdu_size_8K)
  212. ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
  213. ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
  214. ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
  215. ht_info->mcs.rx_mask[0] = 0xFF;
  216. if (rx_chains_num >= 2)
  217. ht_info->mcs.rx_mask[1] = 0xFF;
  218. if (rx_chains_num >= 3)
  219. ht_info->mcs.rx_mask[2] = 0xFF;
  220. /* Highest supported Rx data rate */
  221. max_bit_rate *= rx_chains_num;
  222. WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
  223. ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
  224. /* Tx MCS capabilities */
  225. ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
  226. if (tx_chains_num != rx_chains_num) {
  227. ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
  228. ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
  229. IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
  230. }
  231. }
  232. /**
  233. * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
  234. */
  235. int iwlcore_init_geos(struct iwl_priv *priv)
  236. {
  237. struct iwl_channel_info *ch;
  238. struct ieee80211_supported_band *sband;
  239. struct ieee80211_channel *channels;
  240. struct ieee80211_channel *geo_ch;
  241. struct ieee80211_rate *rates;
  242. int i = 0;
  243. if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
  244. priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
  245. IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
  246. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  247. return 0;
  248. }
  249. channels = kzalloc(sizeof(struct ieee80211_channel) *
  250. priv->channel_count, GFP_KERNEL);
  251. if (!channels)
  252. return -ENOMEM;
  253. rates = kzalloc((sizeof(struct ieee80211_rate) * IWL_RATE_COUNT_LEGACY),
  254. GFP_KERNEL);
  255. if (!rates) {
  256. kfree(channels);
  257. return -ENOMEM;
  258. }
  259. /* 5.2GHz channels start after the 2.4GHz channels */
  260. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  261. sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
  262. /* just OFDM */
  263. sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
  264. sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;
  265. if (priv->cfg->sku & IWL_SKU_N)
  266. iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
  267. IEEE80211_BAND_5GHZ);
  268. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  269. sband->channels = channels;
  270. /* OFDM & CCK */
  271. sband->bitrates = rates;
  272. sband->n_bitrates = IWL_RATE_COUNT_LEGACY;
  273. if (priv->cfg->sku & IWL_SKU_N)
  274. iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
  275. IEEE80211_BAND_2GHZ);
  276. priv->ieee_channels = channels;
  277. priv->ieee_rates = rates;
  278. for (i = 0; i < priv->channel_count; i++) {
  279. ch = &priv->channel_info[i];
  280. /* FIXME: might be removed if scan is OK */
  281. if (!is_channel_valid(ch))
  282. continue;
  283. if (is_channel_a_band(ch))
  284. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  285. else
  286. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  287. geo_ch = &sband->channels[sband->n_channels++];
  288. geo_ch->center_freq =
  289. ieee80211_channel_to_frequency(ch->channel);
  290. geo_ch->max_power = ch->max_power_avg;
  291. geo_ch->max_antenna_gain = 0xff;
  292. geo_ch->hw_value = ch->channel;
  293. if (is_channel_valid(ch)) {
  294. if (!(ch->flags & EEPROM_CHANNEL_IBSS))
  295. geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
  296. if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
  297. geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
  298. if (ch->flags & EEPROM_CHANNEL_RADAR)
  299. geo_ch->flags |= IEEE80211_CHAN_RADAR;
  300. geo_ch->flags |= ch->ht40_extension_channel;
  301. if (ch->max_power_avg > priv->tx_power_device_lmt)
  302. priv->tx_power_device_lmt = ch->max_power_avg;
  303. } else {
  304. geo_ch->flags |= IEEE80211_CHAN_DISABLED;
  305. }
  306. IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
  307. ch->channel, geo_ch->center_freq,
  308. is_channel_a_band(ch) ? "5.2" : "2.4",
  309. geo_ch->flags & IEEE80211_CHAN_DISABLED ?
  310. "restricted" : "valid",
  311. geo_ch->flags);
  312. }
  313. if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
  314. priv->cfg->sku & IWL_SKU_A) {
  315. IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
  316. "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
  317. priv->pci_dev->device,
  318. priv->pci_dev->subsystem_device);
  319. priv->cfg->sku &= ~IWL_SKU_A;
  320. }
  321. IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  322. priv->bands[IEEE80211_BAND_2GHZ].n_channels,
  323. priv->bands[IEEE80211_BAND_5GHZ].n_channels);
  324. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  325. return 0;
  326. }
  327. EXPORT_SYMBOL(iwlcore_init_geos);
  328. /*
  329. * iwlcore_free_geos - undo allocations in iwlcore_init_geos
  330. */
  331. void iwlcore_free_geos(struct iwl_priv *priv)
  332. {
  333. kfree(priv->ieee_channels);
  334. kfree(priv->ieee_rates);
  335. clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
  336. }
  337. EXPORT_SYMBOL(iwlcore_free_geos);
  338. /*
  339. * iwlcore_rts_tx_cmd_flag: Set rts/cts. 3945 and 4965 only share this
  340. * function.
  341. */
  342. void iwlcore_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
  343. __le32 *tx_flags)
  344. {
  345. if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
  346. *tx_flags |= TX_CMD_FLG_RTS_MSK;
  347. *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  348. } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
  349. *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  350. *tx_flags |= TX_CMD_FLG_CTS_MSK;
  351. }
  352. }
  353. EXPORT_SYMBOL(iwlcore_rts_tx_cmd_flag);
  354. static bool is_single_rx_stream(struct iwl_priv *priv)
  355. {
  356. return priv->current_ht_config.smps == IEEE80211_SMPS_STATIC ||
  357. priv->current_ht_config.single_chain_sufficient;
  358. }
  359. static u8 iwl_is_channel_extension(struct iwl_priv *priv,
  360. enum ieee80211_band band,
  361. u16 channel, u8 extension_chan_offset)
  362. {
  363. const struct iwl_channel_info *ch_info;
  364. ch_info = iwl_get_channel_info(priv, band, channel);
  365. if (!is_channel_valid(ch_info))
  366. return 0;
  367. if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
  368. return !(ch_info->ht40_extension_channel &
  369. IEEE80211_CHAN_NO_HT40PLUS);
  370. else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
  371. return !(ch_info->ht40_extension_channel &
  372. IEEE80211_CHAN_NO_HT40MINUS);
  373. return 0;
  374. }
  375. u8 iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
  376. struct ieee80211_sta_ht_cap *sta_ht_inf)
  377. {
  378. struct iwl_ht_config *ht_conf = &priv->current_ht_config;
  379. if (!ht_conf->is_ht || !ht_conf->is_40mhz)
  380. return 0;
  381. /* We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
  382. * the bit will not set if it is pure 40MHz case
  383. */
  384. if (sta_ht_inf) {
  385. if (!sta_ht_inf->ht_supported)
  386. return 0;
  387. }
  388. #ifdef CONFIG_IWLWIFI_DEBUG
  389. if (priv->disable_ht40)
  390. return 0;
  391. #endif
  392. return iwl_is_channel_extension(priv, priv->band,
  393. le16_to_cpu(priv->staging_rxon.channel),
  394. ht_conf->extension_chan_offset);
  395. }
  396. EXPORT_SYMBOL(iwl_is_ht40_tx_allowed);
  397. static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
  398. {
  399. u16 new_val = 0;
  400. u16 beacon_factor = 0;
  401. beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
  402. new_val = beacon_val / beacon_factor;
  403. if (!new_val)
  404. new_val = max_beacon_val;
  405. return new_val;
  406. }
  407. void iwl_setup_rxon_timing(struct iwl_priv *priv)
  408. {
  409. u64 tsf;
  410. s32 interval_tm, rem;
  411. unsigned long flags;
  412. struct ieee80211_conf *conf = NULL;
  413. u16 beacon_int;
  414. conf = ieee80211_get_hw_conf(priv->hw);
  415. spin_lock_irqsave(&priv->lock, flags);
  416. priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
  417. priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
  418. if (priv->iw_mode == NL80211_IFTYPE_STATION) {
  419. beacon_int = priv->beacon_int;
  420. priv->rxon_timing.atim_window = 0;
  421. } else {
  422. beacon_int = priv->vif->bss_conf.beacon_int;
  423. /* TODO: we need to get atim_window from upper stack
  424. * for now we set to 0 */
  425. priv->rxon_timing.atim_window = 0;
  426. }
  427. beacon_int = iwl_adjust_beacon_interval(beacon_int,
  428. priv->hw_params.max_beacon_itrvl * 1024);
  429. priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
  430. tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
  431. interval_tm = beacon_int * 1024;
  432. rem = do_div(tsf, interval_tm);
  433. priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
  434. spin_unlock_irqrestore(&priv->lock, flags);
  435. IWL_DEBUG_ASSOC(priv,
  436. "beacon interval %d beacon timer %d beacon tim %d\n",
  437. le16_to_cpu(priv->rxon_timing.beacon_interval),
  438. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  439. le16_to_cpu(priv->rxon_timing.atim_window));
  440. }
  441. EXPORT_SYMBOL(iwl_setup_rxon_timing);
  442. void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
  443. {
  444. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  445. if (hw_decrypt)
  446. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  447. else
  448. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  449. }
  450. EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
  451. /**
  452. * iwl_check_rxon_cmd - validate RXON structure is valid
  453. *
  454. * NOTE: This is really only useful during development and can eventually
  455. * be #ifdef'd out once the driver is stable and folks aren't actively
  456. * making changes
  457. */
  458. int iwl_check_rxon_cmd(struct iwl_priv *priv)
  459. {
  460. int error = 0;
  461. int counter = 1;
  462. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  463. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  464. error |= le32_to_cpu(rxon->flags &
  465. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  466. RXON_FLG_RADAR_DETECT_MSK));
  467. if (error)
  468. IWL_WARN(priv, "check 24G fields %d | %d\n",
  469. counter++, error);
  470. } else {
  471. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  472. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  473. if (error)
  474. IWL_WARN(priv, "check 52 fields %d | %d\n",
  475. counter++, error);
  476. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  477. if (error)
  478. IWL_WARN(priv, "check 52 CCK %d | %d\n",
  479. counter++, error);
  480. }
  481. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  482. if (error)
  483. IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
  484. /* make sure basic rates 6Mbps and 1Mbps are supported */
  485. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  486. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  487. if (error)
  488. IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
  489. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  490. if (error)
  491. IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
  492. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  493. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  494. if (error)
  495. IWL_WARN(priv, "check CCK and short slot %d | %d\n",
  496. counter++, error);
  497. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  498. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  499. if (error)
  500. IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
  501. counter++, error);
  502. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  503. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  504. if (error)
  505. IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
  506. counter++, error);
  507. if (error)
  508. IWL_WARN(priv, "Tuning to channel %d\n",
  509. le16_to_cpu(rxon->channel));
  510. if (error) {
  511. IWL_ERR(priv, "Not a valid iwl_rxon_assoc_cmd field values\n");
  512. return -1;
  513. }
  514. return 0;
  515. }
  516. EXPORT_SYMBOL(iwl_check_rxon_cmd);
  517. /**
  518. * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  519. * @priv: staging_rxon is compared to active_rxon
  520. *
  521. * If the RXON structure is changing enough to require a new tune,
  522. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  523. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  524. */
  525. int iwl_full_rxon_required(struct iwl_priv *priv)
  526. {
  527. /* These items are only settable from the full RXON command */
  528. if (!(iwl_is_associated(priv)) ||
  529. compare_ether_addr(priv->staging_rxon.bssid_addr,
  530. priv->active_rxon.bssid_addr) ||
  531. compare_ether_addr(priv->staging_rxon.node_addr,
  532. priv->active_rxon.node_addr) ||
  533. compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
  534. priv->active_rxon.wlap_bssid_addr) ||
  535. (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
  536. (priv->staging_rxon.channel != priv->active_rxon.channel) ||
  537. (priv->staging_rxon.air_propagation !=
  538. priv->active_rxon.air_propagation) ||
  539. (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
  540. priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
  541. (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
  542. priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
  543. (priv->staging_rxon.ofdm_ht_triple_stream_basic_rates !=
  544. priv->active_rxon.ofdm_ht_triple_stream_basic_rates) ||
  545. (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
  546. return 1;
  547. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  548. * be updated with the RXON_ASSOC command -- however only some
  549. * flag transitions are allowed using RXON_ASSOC */
  550. /* Check if we are not switching bands */
  551. if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  552. (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
  553. return 1;
  554. /* Check if we are switching association toggle */
  555. if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  556. (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  557. return 1;
  558. return 0;
  559. }
  560. EXPORT_SYMBOL(iwl_full_rxon_required);
  561. u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
  562. {
  563. /*
  564. * Assign the lowest rate -- should really get this from
  565. * the beacon skb from mac80211.
  566. */
  567. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
  568. return IWL_RATE_1M_PLCP;
  569. else
  570. return IWL_RATE_6M_PLCP;
  571. }
  572. EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
  573. void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf)
  574. {
  575. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  576. if (!ht_conf->is_ht) {
  577. rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
  578. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
  579. RXON_FLG_HT40_PROT_MSK |
  580. RXON_FLG_HT_PROT_MSK);
  581. return;
  582. }
  583. /* FIXME: if the definition of ht_protection changed, the "translation"
  584. * will be needed for rxon->flags
  585. */
  586. rxon->flags |= cpu_to_le32(ht_conf->ht_protection << RXON_FLG_HT_OPERATING_MODE_POS);
  587. /* Set up channel bandwidth:
  588. * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
  589. /* clear the HT channel mode before set the mode */
  590. rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
  591. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  592. if (iwl_is_ht40_tx_allowed(priv, NULL)) {
  593. /* pure ht40 */
  594. if (ht_conf->ht_protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
  595. rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
  596. /* Note: control channel is opposite of extension channel */
  597. switch (ht_conf->extension_chan_offset) {
  598. case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
  599. rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  600. break;
  601. case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
  602. rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  603. break;
  604. }
  605. } else {
  606. /* Note: control channel is opposite of extension channel */
  607. switch (ht_conf->extension_chan_offset) {
  608. case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
  609. rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  610. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
  611. break;
  612. case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
  613. rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  614. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
  615. break;
  616. case IEEE80211_HT_PARAM_CHA_SEC_NONE:
  617. default:
  618. /* channel location only valid if in Mixed mode */
  619. IWL_ERR(priv, "invalid extension channel offset\n");
  620. break;
  621. }
  622. }
  623. } else {
  624. rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
  625. }
  626. if (priv->cfg->ops->hcmd->set_rxon_chain)
  627. priv->cfg->ops->hcmd->set_rxon_chain(priv);
  628. IWL_DEBUG_ASSOC(priv, "rxon flags 0x%X operation mode :0x%X "
  629. "extension channel offset 0x%x\n",
  630. le32_to_cpu(rxon->flags), ht_conf->ht_protection,
  631. ht_conf->extension_chan_offset);
  632. return;
  633. }
  634. EXPORT_SYMBOL(iwl_set_rxon_ht);
  635. #define IWL_NUM_RX_CHAINS_MULTIPLE 3
  636. #define IWL_NUM_RX_CHAINS_SINGLE 2
  637. #define IWL_NUM_IDLE_CHAINS_DUAL 2
  638. #define IWL_NUM_IDLE_CHAINS_SINGLE 1
  639. /*
  640. * Determine how many receiver/antenna chains to use.
  641. *
  642. * More provides better reception via diversity. Fewer saves power
  643. * at the expense of throughput, but only when not in powersave to
  644. * start with.
  645. *
  646. * MIMO (dual stream) requires at least 2, but works better with 3.
  647. * This does not determine *which* chains to use, just how many.
  648. */
  649. static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
  650. {
  651. /* # of Rx chains to use when expecting MIMO. */
  652. if (is_single_rx_stream(priv))
  653. return IWL_NUM_RX_CHAINS_SINGLE;
  654. else
  655. return IWL_NUM_RX_CHAINS_MULTIPLE;
  656. }
  657. /*
  658. * When we are in power saving mode, unless device support spatial
  659. * multiplexing power save, use the active count for rx chain count.
  660. */
  661. static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
  662. {
  663. /* # Rx chains when idling, depending on SMPS mode */
  664. switch (priv->current_ht_config.smps) {
  665. case IEEE80211_SMPS_STATIC:
  666. case IEEE80211_SMPS_DYNAMIC:
  667. return IWL_NUM_IDLE_CHAINS_SINGLE;
  668. case IEEE80211_SMPS_OFF:
  669. return active_cnt;
  670. default:
  671. WARN(1, "invalid SMPS mode %d",
  672. priv->current_ht_config.smps);
  673. return active_cnt;
  674. }
  675. }
  676. /* up to 4 chains */
  677. static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
  678. {
  679. u8 res;
  680. res = (chain_bitmap & BIT(0)) >> 0;
  681. res += (chain_bitmap & BIT(1)) >> 1;
  682. res += (chain_bitmap & BIT(2)) >> 2;
  683. res += (chain_bitmap & BIT(3)) >> 3;
  684. return res;
  685. }
  686. /**
  687. * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
  688. *
  689. * Selects how many and which Rx receivers/antennas/chains to use.
  690. * This should not be used for scan command ... it puts data in wrong place.
  691. */
  692. void iwl_set_rxon_chain(struct iwl_priv *priv)
  693. {
  694. bool is_single = is_single_rx_stream(priv);
  695. bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
  696. u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
  697. u32 active_chains;
  698. u16 rx_chain;
  699. /* Tell uCode which antennas are actually connected.
  700. * Before first association, we assume all antennas are connected.
  701. * Just after first association, iwl_chain_noise_calibration()
  702. * checks which antennas actually *are* connected. */
  703. if (priv->chain_noise_data.active_chains)
  704. active_chains = priv->chain_noise_data.active_chains;
  705. else
  706. active_chains = priv->hw_params.valid_rx_ant;
  707. rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
  708. /* How many receivers should we use? */
  709. active_rx_cnt = iwl_get_active_rx_chain_count(priv);
  710. idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
  711. /* correct rx chain count according hw settings
  712. * and chain noise calibration
  713. */
  714. valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
  715. if (valid_rx_cnt < active_rx_cnt)
  716. active_rx_cnt = valid_rx_cnt;
  717. if (valid_rx_cnt < idle_rx_cnt)
  718. idle_rx_cnt = valid_rx_cnt;
  719. rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
  720. rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
  721. priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain);
  722. if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
  723. priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
  724. else
  725. priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
  726. IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
  727. priv->staging_rxon.rx_chain,
  728. active_rx_cnt, idle_rx_cnt);
  729. WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
  730. active_rx_cnt < idle_rx_cnt);
  731. }
  732. EXPORT_SYMBOL(iwl_set_rxon_chain);
  733. /**
  734. * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
  735. * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
  736. * @channel: Any channel valid for the requested phymode
  737. * In addition to setting the staging RXON, priv->phymode is also set.
  738. *
  739. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  740. * in the staging RXON flag structure based on the phymode
  741. */
  742. int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch)
  743. {
  744. enum ieee80211_band band = ch->band;
  745. u16 channel = ieee80211_frequency_to_channel(ch->center_freq);
  746. if (!iwl_get_channel_info(priv, band, channel)) {
  747. IWL_DEBUG_INFO(priv, "Could not set channel to %d [%d]\n",
  748. channel, band);
  749. return -EINVAL;
  750. }
  751. if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
  752. (priv->band == band))
  753. return 0;
  754. priv->staging_rxon.channel = cpu_to_le16(channel);
  755. if (band == IEEE80211_BAND_5GHZ)
  756. priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
  757. else
  758. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  759. priv->band = band;
  760. IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
  761. return 0;
  762. }
  763. EXPORT_SYMBOL(iwl_set_rxon_channel);
  764. void iwl_set_flags_for_band(struct iwl_priv *priv,
  765. enum ieee80211_band band)
  766. {
  767. if (band == IEEE80211_BAND_5GHZ) {
  768. priv->staging_rxon.flags &=
  769. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  770. | RXON_FLG_CCK_MSK);
  771. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  772. } else {
  773. /* Copied from iwl_post_associate() */
  774. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  775. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  776. else
  777. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  778. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  779. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  780. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  781. priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  782. priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
  783. }
  784. }
  785. /*
  786. * initialize rxon structure with default values from eeprom
  787. */
  788. void iwl_connection_init_rx_config(struct iwl_priv *priv, int mode)
  789. {
  790. const struct iwl_channel_info *ch_info;
  791. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  792. switch (mode) {
  793. case NL80211_IFTYPE_AP:
  794. priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
  795. break;
  796. case NL80211_IFTYPE_STATION:
  797. priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
  798. priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  799. break;
  800. case NL80211_IFTYPE_ADHOC:
  801. priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  802. priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  803. priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  804. RXON_FILTER_ACCEPT_GRP_MSK;
  805. break;
  806. default:
  807. IWL_ERR(priv, "Unsupported interface type %d\n", mode);
  808. break;
  809. }
  810. #if 0
  811. /* TODO: Figure out when short_preamble would be set and cache from
  812. * that */
  813. if (!hw_to_local(priv->hw)->short_preamble)
  814. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  815. else
  816. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  817. #endif
  818. ch_info = iwl_get_channel_info(priv, priv->band,
  819. le16_to_cpu(priv->active_rxon.channel));
  820. if (!ch_info)
  821. ch_info = &priv->channel_info[0];
  822. priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
  823. priv->band = ch_info->band;
  824. iwl_set_flags_for_band(priv, priv->band);
  825. priv->staging_rxon.ofdm_basic_rates =
  826. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  827. priv->staging_rxon.cck_basic_rates =
  828. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  829. /* clear both MIX and PURE40 mode flag */
  830. priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
  831. RXON_FLG_CHANNEL_MODE_PURE_40);
  832. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  833. memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
  834. priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
  835. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
  836. priv->staging_rxon.ofdm_ht_triple_stream_basic_rates = 0xff;
  837. }
  838. EXPORT_SYMBOL(iwl_connection_init_rx_config);
  839. static void iwl_set_rate(struct iwl_priv *priv)
  840. {
  841. const struct ieee80211_supported_band *hw = NULL;
  842. struct ieee80211_rate *rate;
  843. int i;
  844. hw = iwl_get_hw_mode(priv, priv->band);
  845. if (!hw) {
  846. IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
  847. return;
  848. }
  849. priv->active_rate = 0;
  850. for (i = 0; i < hw->n_bitrates; i++) {
  851. rate = &(hw->bitrates[i]);
  852. if (rate->hw_value < IWL_RATE_COUNT_LEGACY)
  853. priv->active_rate |= (1 << rate->hw_value);
  854. }
  855. IWL_DEBUG_RATE(priv, "Set active_rate = %0x\n", priv->active_rate);
  856. priv->staging_rxon.cck_basic_rates =
  857. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  858. priv->staging_rxon.ofdm_basic_rates =
  859. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  860. }
  861. void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
  862. {
  863. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  864. struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
  865. struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
  866. if (priv->switch_rxon.switch_in_progress) {
  867. if (!le32_to_cpu(csa->status) &&
  868. (csa->channel == priv->switch_rxon.channel)) {
  869. rxon->channel = csa->channel;
  870. priv->staging_rxon.channel = csa->channel;
  871. IWL_DEBUG_11H(priv, "CSA notif: channel %d\n",
  872. le16_to_cpu(csa->channel));
  873. } else
  874. IWL_ERR(priv, "CSA notif (fail) : channel %d\n",
  875. le16_to_cpu(csa->channel));
  876. priv->switch_rxon.switch_in_progress = false;
  877. }
  878. }
  879. EXPORT_SYMBOL(iwl_rx_csa);
  880. #ifdef CONFIG_IWLWIFI_DEBUG
  881. void iwl_print_rx_config_cmd(struct iwl_priv *priv)
  882. {
  883. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  884. IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
  885. iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  886. IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  887. IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  888. IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
  889. le32_to_cpu(rxon->filter_flags));
  890. IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
  891. IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
  892. rxon->ofdm_basic_rates);
  893. IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  894. IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
  895. IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
  896. IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  897. }
  898. EXPORT_SYMBOL(iwl_print_rx_config_cmd);
  899. #endif
  900. /**
  901. * iwl_irq_handle_error - called for HW or SW error interrupt from card
  902. */
  903. void iwl_irq_handle_error(struct iwl_priv *priv)
  904. {
  905. /* Set the FW error flag -- cleared on iwl_down */
  906. set_bit(STATUS_FW_ERROR, &priv->status);
  907. /* Cancel currently queued command. */
  908. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  909. IWL_ERR(priv, "Loaded firmware version: %s\n",
  910. priv->hw->wiphy->fw_version);
  911. priv->cfg->ops->lib->dump_nic_error_log(priv);
  912. if (priv->cfg->ops->lib->dump_csr)
  913. priv->cfg->ops->lib->dump_csr(priv);
  914. if (priv->cfg->ops->lib->dump_fh)
  915. priv->cfg->ops->lib->dump_fh(priv, NULL, false);
  916. priv->cfg->ops->lib->dump_nic_event_log(priv, false, NULL, false);
  917. #ifdef CONFIG_IWLWIFI_DEBUG
  918. if (iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS)
  919. iwl_print_rx_config_cmd(priv);
  920. #endif
  921. wake_up_interruptible(&priv->wait_command_queue);
  922. /* Keep the restart process from trying to send host
  923. * commands by clearing the INIT status bit */
  924. clear_bit(STATUS_READY, &priv->status);
  925. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  926. IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
  927. "Restarting adapter due to uCode error.\n");
  928. if (priv->cfg->mod_params->restart_fw)
  929. queue_work(priv->workqueue, &priv->restart);
  930. }
  931. }
  932. EXPORT_SYMBOL(iwl_irq_handle_error);
  933. static int iwl_apm_stop_master(struct iwl_priv *priv)
  934. {
  935. int ret = 0;
  936. /* stop device's busmaster DMA activity */
  937. iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
  938. ret = iwl_poll_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
  939. CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
  940. if (ret)
  941. IWL_WARN(priv, "Master Disable Timed Out, 100 usec\n");
  942. IWL_DEBUG_INFO(priv, "stop master\n");
  943. return ret;
  944. }
  945. void iwl_apm_stop(struct iwl_priv *priv)
  946. {
  947. IWL_DEBUG_INFO(priv, "Stop card, put in low power state\n");
  948. /* Stop device's DMA activity */
  949. iwl_apm_stop_master(priv);
  950. /* Reset the entire device */
  951. iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  952. udelay(10);
  953. /*
  954. * Clear "initialization complete" bit to move adapter from
  955. * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
  956. */
  957. iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  958. }
  959. EXPORT_SYMBOL(iwl_apm_stop);
  960. /*
  961. * Start up NIC's basic functionality after it has been reset
  962. * (e.g. after platform boot, or shutdown via iwl_apm_stop())
  963. * NOTE: This does not load uCode nor start the embedded processor
  964. */
  965. int iwl_apm_init(struct iwl_priv *priv)
  966. {
  967. int ret = 0;
  968. u16 lctl;
  969. IWL_DEBUG_INFO(priv, "Init card's basic functions\n");
  970. /*
  971. * Use "set_bit" below rather than "write", to preserve any hardware
  972. * bits already set by default after reset.
  973. */
  974. /* Disable L0S exit timer (platform NMI Work/Around) */
  975. iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
  976. CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
  977. /*
  978. * Disable L0s without affecting L1;
  979. * don't wait for ICH L0s (ICH bug W/A)
  980. */
  981. iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
  982. CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
  983. /* Set FH wait threshold to maximum (HW error during stress W/A) */
  984. iwl_set_bit(priv, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
  985. /*
  986. * Enable HAP INTA (interrupt from management bus) to
  987. * wake device's PCI Express link L1a -> L0s
  988. * NOTE: This is no-op for 3945 (non-existant bit)
  989. */
  990. iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
  991. CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
  992. /*
  993. * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
  994. * Check if BIOS (or OS) enabled L1-ASPM on this device.
  995. * If so (likely), disable L0S, so device moves directly L0->L1;
  996. * costs negligible amount of power savings.
  997. * If not (unlikely), enable L0S, so there is at least some
  998. * power savings, even without L1.
  999. */
  1000. if (priv->cfg->set_l0s) {
  1001. lctl = iwl_pcie_link_ctl(priv);
  1002. if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
  1003. PCI_CFG_LINK_CTRL_VAL_L1_EN) {
  1004. /* L1-ASPM enabled; disable(!) L0S */
  1005. iwl_set_bit(priv, CSR_GIO_REG,
  1006. CSR_GIO_REG_VAL_L0S_ENABLED);
  1007. IWL_DEBUG_POWER(priv, "L1 Enabled; Disabling L0S\n");
  1008. } else {
  1009. /* L1-ASPM disabled; enable(!) L0S */
  1010. iwl_clear_bit(priv, CSR_GIO_REG,
  1011. CSR_GIO_REG_VAL_L0S_ENABLED);
  1012. IWL_DEBUG_POWER(priv, "L1 Disabled; Enabling L0S\n");
  1013. }
  1014. }
  1015. /* Configure analog phase-lock-loop before activating to D0A */
  1016. if (priv->cfg->pll_cfg_val)
  1017. iwl_set_bit(priv, CSR_ANA_PLL_CFG, priv->cfg->pll_cfg_val);
  1018. /*
  1019. * Set "initialization complete" bit to move adapter from
  1020. * D0U* --> D0A* (powered-up active) state.
  1021. */
  1022. iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  1023. /*
  1024. * Wait for clock stabilization; once stabilized, access to
  1025. * device-internal resources is supported, e.g. iwl_write_prph()
  1026. * and accesses to uCode SRAM.
  1027. */
  1028. ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
  1029. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  1030. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
  1031. if (ret < 0) {
  1032. IWL_DEBUG_INFO(priv, "Failed to init the card\n");
  1033. goto out;
  1034. }
  1035. /*
  1036. * Enable DMA and BSM (if used) clocks, wait for them to stabilize.
  1037. * BSM (Boostrap State Machine) is only in 3945 and 4965;
  1038. * later devices (i.e. 5000 and later) have non-volatile SRAM,
  1039. * and don't need BSM to restore data after power-saving sleep.
  1040. *
  1041. * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
  1042. * do not disable clocks. This preserves any hardware bits already
  1043. * set by default in "CLK_CTRL_REG" after reset.
  1044. */
  1045. if (priv->cfg->use_bsm)
  1046. iwl_write_prph(priv, APMG_CLK_EN_REG,
  1047. APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
  1048. else
  1049. iwl_write_prph(priv, APMG_CLK_EN_REG,
  1050. APMG_CLK_VAL_DMA_CLK_RQT);
  1051. udelay(20);
  1052. /* Disable L1-Active */
  1053. iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
  1054. APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
  1055. out:
  1056. return ret;
  1057. }
  1058. EXPORT_SYMBOL(iwl_apm_init);
  1059. void iwl_configure_filter(struct ieee80211_hw *hw,
  1060. unsigned int changed_flags,
  1061. unsigned int *total_flags,
  1062. u64 multicast)
  1063. {
  1064. struct iwl_priv *priv = hw->priv;
  1065. __le32 *filter_flags = &priv->staging_rxon.filter_flags;
  1066. IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
  1067. changed_flags, *total_flags);
  1068. if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
  1069. if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
  1070. *filter_flags |= RXON_FILTER_PROMISC_MSK;
  1071. else
  1072. *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
  1073. }
  1074. if (changed_flags & FIF_ALLMULTI) {
  1075. if (*total_flags & FIF_ALLMULTI)
  1076. *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
  1077. else
  1078. *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
  1079. }
  1080. if (changed_flags & FIF_CONTROL) {
  1081. if (*total_flags & FIF_CONTROL)
  1082. *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
  1083. else
  1084. *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
  1085. }
  1086. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  1087. if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
  1088. *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
  1089. else
  1090. *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
  1091. }
  1092. /* We avoid iwl_commit_rxon here to commit the new filter flags
  1093. * since mac80211 will call ieee80211_hw_config immediately.
  1094. * (mc_list is not supported at this time). Otherwise, we need to
  1095. * queue a background iwl_commit_rxon work.
  1096. */
  1097. *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
  1098. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
  1099. }
  1100. EXPORT_SYMBOL(iwl_configure_filter);
  1101. int iwl_set_hw_params(struct iwl_priv *priv)
  1102. {
  1103. priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
  1104. priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
  1105. if (priv->cfg->mod_params->amsdu_size_8K)
  1106. priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K);
  1107. else
  1108. priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K);
  1109. priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
  1110. if (priv->cfg->mod_params->disable_11n)
  1111. priv->cfg->sku &= ~IWL_SKU_N;
  1112. /* Device-specific setup */
  1113. return priv->cfg->ops->lib->set_hw_params(priv);
  1114. }
  1115. EXPORT_SYMBOL(iwl_set_hw_params);
  1116. int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
  1117. {
  1118. int ret = 0;
  1119. s8 prev_tx_power = priv->tx_power_user_lmt;
  1120. if (tx_power < IWLAGN_TX_POWER_TARGET_POWER_MIN) {
  1121. IWL_WARN(priv,
  1122. "Requested user TXPOWER %d below lower limit %d.\n",
  1123. tx_power,
  1124. IWLAGN_TX_POWER_TARGET_POWER_MIN);
  1125. return -EINVAL;
  1126. }
  1127. if (tx_power > priv->tx_power_device_lmt) {
  1128. IWL_WARN(priv,
  1129. "Requested user TXPOWER %d above upper limit %d.\n",
  1130. tx_power, priv->tx_power_device_lmt);
  1131. return -EINVAL;
  1132. }
  1133. if (priv->tx_power_user_lmt != tx_power)
  1134. force = true;
  1135. /* if nic is not up don't send command */
  1136. if (iwl_is_ready_rf(priv)) {
  1137. priv->tx_power_user_lmt = tx_power;
  1138. if (force && priv->cfg->ops->lib->send_tx_power)
  1139. ret = priv->cfg->ops->lib->send_tx_power(priv);
  1140. else if (!priv->cfg->ops->lib->send_tx_power)
  1141. ret = -EOPNOTSUPP;
  1142. /*
  1143. * if fail to set tx_power, restore the orig. tx power
  1144. */
  1145. if (ret)
  1146. priv->tx_power_user_lmt = prev_tx_power;
  1147. }
  1148. /*
  1149. * Even this is an async host command, the command
  1150. * will always report success from uCode
  1151. * So once driver can placing the command into the queue
  1152. * successfully, driver can use priv->tx_power_user_lmt
  1153. * to reflect the current tx power
  1154. */
  1155. return ret;
  1156. }
  1157. EXPORT_SYMBOL(iwl_set_tx_power);
  1158. irqreturn_t iwl_isr_legacy(int irq, void *data)
  1159. {
  1160. struct iwl_priv *priv = data;
  1161. u32 inta, inta_mask;
  1162. u32 inta_fh;
  1163. unsigned long flags;
  1164. if (!priv)
  1165. return IRQ_NONE;
  1166. spin_lock_irqsave(&priv->lock, flags);
  1167. /* Disable (but don't clear!) interrupts here to avoid
  1168. * back-to-back ISRs and sporadic interrupts from our NIC.
  1169. * If we have something to service, the tasklet will re-enable ints.
  1170. * If we *don't* have something, we'll re-enable before leaving here. */
  1171. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  1172. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  1173. /* Discover which interrupts are active/pending */
  1174. inta = iwl_read32(priv, CSR_INT);
  1175. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1176. /* Ignore interrupt if there's nothing in NIC to service.
  1177. * This may be due to IRQ shared with another device,
  1178. * or due to sporadic interrupts thrown from our NIC. */
  1179. if (!inta && !inta_fh) {
  1180. IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n");
  1181. goto none;
  1182. }
  1183. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  1184. /* Hardware disappeared. It might have already raised
  1185. * an interrupt */
  1186. IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
  1187. goto unplugged;
  1188. }
  1189. IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  1190. inta, inta_mask, inta_fh);
  1191. inta &= ~CSR_INT_BIT_SCD;
  1192. /* iwl_irq_tasklet() will service interrupts and re-enable them */
  1193. if (likely(inta || inta_fh))
  1194. tasklet_schedule(&priv->irq_tasklet);
  1195. unplugged:
  1196. spin_unlock_irqrestore(&priv->lock, flags);
  1197. return IRQ_HANDLED;
  1198. none:
  1199. /* re-enable interrupts here since we don't have anything to service. */
  1200. /* only Re-enable if diabled by irq */
  1201. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  1202. iwl_enable_interrupts(priv);
  1203. spin_unlock_irqrestore(&priv->lock, flags);
  1204. return IRQ_NONE;
  1205. }
  1206. EXPORT_SYMBOL(iwl_isr_legacy);
  1207. void iwl_send_bt_config(struct iwl_priv *priv)
  1208. {
  1209. struct iwl_bt_cmd bt_cmd = {
  1210. .lead_time = BT_LEAD_TIME_DEF,
  1211. .max_kill = BT_MAX_KILL_DEF,
  1212. .kill_ack_mask = 0,
  1213. .kill_cts_mask = 0,
  1214. };
  1215. if (!bt_coex_active)
  1216. bt_cmd.flags = BT_COEX_DISABLE;
  1217. else
  1218. bt_cmd.flags = BT_COEX_ENABLE;
  1219. IWL_DEBUG_INFO(priv, "BT coex %s\n",
  1220. (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
  1221. if (iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  1222. sizeof(struct iwl_bt_cmd), &bt_cmd))
  1223. IWL_ERR(priv, "failed to send BT Coex Config\n");
  1224. }
  1225. EXPORT_SYMBOL(iwl_send_bt_config);
  1226. int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags, bool clear)
  1227. {
  1228. struct iwl_statistics_cmd statistics_cmd = {
  1229. .configuration_flags =
  1230. clear ? IWL_STATS_CONF_CLEAR_STATS : 0,
  1231. };
  1232. if (flags & CMD_ASYNC)
  1233. return iwl_send_cmd_pdu_async(priv, REPLY_STATISTICS_CMD,
  1234. sizeof(struct iwl_statistics_cmd),
  1235. &statistics_cmd, NULL);
  1236. else
  1237. return iwl_send_cmd_pdu(priv, REPLY_STATISTICS_CMD,
  1238. sizeof(struct iwl_statistics_cmd),
  1239. &statistics_cmd);
  1240. }
  1241. EXPORT_SYMBOL(iwl_send_statistics_request);
  1242. /**
  1243. * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
  1244. * using sample data 100 bytes apart. If these sample points are good,
  1245. * it's a pretty good bet that everything between them is good, too.
  1246. */
  1247. static int iwlcore_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  1248. {
  1249. u32 val;
  1250. int ret = 0;
  1251. u32 errcnt = 0;
  1252. u32 i;
  1253. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1254. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  1255. /* read data comes through single port, auto-incr addr */
  1256. /* NOTE: Use the debugless read so we don't flood kernel log
  1257. * if IWL_DL_IO is set */
  1258. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1259. i + IWL49_RTC_INST_LOWER_BOUND);
  1260. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1261. if (val != le32_to_cpu(*image)) {
  1262. ret = -EIO;
  1263. errcnt++;
  1264. if (errcnt >= 3)
  1265. break;
  1266. }
  1267. }
  1268. return ret;
  1269. }
  1270. /**
  1271. * iwlcore_verify_inst_full - verify runtime uCode image in card vs. host,
  1272. * looking at all data.
  1273. */
  1274. static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 *image,
  1275. u32 len)
  1276. {
  1277. u32 val;
  1278. u32 save_len = len;
  1279. int ret = 0;
  1280. u32 errcnt;
  1281. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1282. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1283. IWL49_RTC_INST_LOWER_BOUND);
  1284. errcnt = 0;
  1285. for (; len > 0; len -= sizeof(u32), image++) {
  1286. /* read data comes through single port, auto-incr addr */
  1287. /* NOTE: Use the debugless read so we don't flood kernel log
  1288. * if IWL_DL_IO is set */
  1289. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1290. if (val != le32_to_cpu(*image)) {
  1291. IWL_ERR(priv, "uCode INST section is invalid at "
  1292. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1293. save_len - len, val, le32_to_cpu(*image));
  1294. ret = -EIO;
  1295. errcnt++;
  1296. if (errcnt >= 20)
  1297. break;
  1298. }
  1299. }
  1300. if (!errcnt)
  1301. IWL_DEBUG_INFO(priv,
  1302. "ucode image in INSTRUCTION memory is good\n");
  1303. return ret;
  1304. }
  1305. /**
  1306. * iwl_verify_ucode - determine which instruction image is in SRAM,
  1307. * and verify its contents
  1308. */
  1309. int iwl_verify_ucode(struct iwl_priv *priv)
  1310. {
  1311. __le32 *image;
  1312. u32 len;
  1313. int ret;
  1314. /* Try bootstrap */
  1315. image = (__le32 *)priv->ucode_boot.v_addr;
  1316. len = priv->ucode_boot.len;
  1317. ret = iwlcore_verify_inst_sparse(priv, image, len);
  1318. if (!ret) {
  1319. IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
  1320. return 0;
  1321. }
  1322. /* Try initialize */
  1323. image = (__le32 *)priv->ucode_init.v_addr;
  1324. len = priv->ucode_init.len;
  1325. ret = iwlcore_verify_inst_sparse(priv, image, len);
  1326. if (!ret) {
  1327. IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
  1328. return 0;
  1329. }
  1330. /* Try runtime/protocol */
  1331. image = (__le32 *)priv->ucode_code.v_addr;
  1332. len = priv->ucode_code.len;
  1333. ret = iwlcore_verify_inst_sparse(priv, image, len);
  1334. if (!ret) {
  1335. IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
  1336. return 0;
  1337. }
  1338. IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  1339. /* Since nothing seems to match, show first several data entries in
  1340. * instruction SRAM, so maybe visual inspection will give a clue.
  1341. * Selection of bootstrap image (vs. other images) is arbitrary. */
  1342. image = (__le32 *)priv->ucode_boot.v_addr;
  1343. len = priv->ucode_boot.len;
  1344. ret = iwl_verify_inst_full(priv, image, len);
  1345. return ret;
  1346. }
  1347. EXPORT_SYMBOL(iwl_verify_ucode);
  1348. void iwl_rf_kill_ct_config(struct iwl_priv *priv)
  1349. {
  1350. struct iwl_ct_kill_config cmd;
  1351. struct iwl_ct_kill_throttling_config adv_cmd;
  1352. unsigned long flags;
  1353. int ret = 0;
  1354. spin_lock_irqsave(&priv->lock, flags);
  1355. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  1356. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  1357. spin_unlock_irqrestore(&priv->lock, flags);
  1358. priv->thermal_throttle.ct_kill_toggle = false;
  1359. if (priv->cfg->support_ct_kill_exit) {
  1360. adv_cmd.critical_temperature_enter =
  1361. cpu_to_le32(priv->hw_params.ct_kill_threshold);
  1362. adv_cmd.critical_temperature_exit =
  1363. cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
  1364. ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
  1365. sizeof(adv_cmd), &adv_cmd);
  1366. if (ret)
  1367. IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
  1368. else
  1369. IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
  1370. "succeeded, "
  1371. "critical temperature enter is %d,"
  1372. "exit is %d\n",
  1373. priv->hw_params.ct_kill_threshold,
  1374. priv->hw_params.ct_kill_exit_threshold);
  1375. } else {
  1376. cmd.critical_temperature_R =
  1377. cpu_to_le32(priv->hw_params.ct_kill_threshold);
  1378. ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
  1379. sizeof(cmd), &cmd);
  1380. if (ret)
  1381. IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
  1382. else
  1383. IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
  1384. "succeeded, "
  1385. "critical temperature is %d\n",
  1386. priv->hw_params.ct_kill_threshold);
  1387. }
  1388. }
  1389. EXPORT_SYMBOL(iwl_rf_kill_ct_config);
  1390. /*
  1391. * CARD_STATE_CMD
  1392. *
  1393. * Use: Sets the device's internal card state to enable, disable, or halt
  1394. *
  1395. * When in the 'enable' state the card operates as normal.
  1396. * When in the 'disable' state, the card enters into a low power mode.
  1397. * When in the 'halt' state, the card is shut down and must be fully
  1398. * restarted to come back on.
  1399. */
  1400. int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
  1401. {
  1402. struct iwl_host_cmd cmd = {
  1403. .id = REPLY_CARD_STATE_CMD,
  1404. .len = sizeof(u32),
  1405. .data = &flags,
  1406. .flags = meta_flag,
  1407. };
  1408. return iwl_send_cmd(priv, &cmd);
  1409. }
  1410. void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
  1411. struct iwl_rx_mem_buffer *rxb)
  1412. {
  1413. #ifdef CONFIG_IWLWIFI_DEBUG
  1414. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  1415. struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
  1416. IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
  1417. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  1418. #endif
  1419. }
  1420. EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
  1421. void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
  1422. struct iwl_rx_mem_buffer *rxb)
  1423. {
  1424. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  1425. u32 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
  1426. IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
  1427. "notification for %s:\n", len,
  1428. get_cmd_string(pkt->hdr.cmd));
  1429. iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, len);
  1430. }
  1431. EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
  1432. void iwl_rx_reply_error(struct iwl_priv *priv,
  1433. struct iwl_rx_mem_buffer *rxb)
  1434. {
  1435. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  1436. IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
  1437. "seq 0x%04X ser 0x%08X\n",
  1438. le32_to_cpu(pkt->u.err_resp.error_type),
  1439. get_cmd_string(pkt->u.err_resp.cmd_id),
  1440. pkt->u.err_resp.cmd_id,
  1441. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  1442. le32_to_cpu(pkt->u.err_resp.error_info));
  1443. }
  1444. EXPORT_SYMBOL(iwl_rx_reply_error);
  1445. void iwl_clear_isr_stats(struct iwl_priv *priv)
  1446. {
  1447. memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
  1448. }
  1449. int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
  1450. const struct ieee80211_tx_queue_params *params)
  1451. {
  1452. struct iwl_priv *priv = hw->priv;
  1453. unsigned long flags;
  1454. int q;
  1455. IWL_DEBUG_MAC80211(priv, "enter\n");
  1456. if (!iwl_is_ready_rf(priv)) {
  1457. IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
  1458. return -EIO;
  1459. }
  1460. if (queue >= AC_NUM) {
  1461. IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
  1462. return 0;
  1463. }
  1464. q = AC_NUM - 1 - queue;
  1465. spin_lock_irqsave(&priv->lock, flags);
  1466. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  1467. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  1468. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  1469. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  1470. cpu_to_le16((params->txop * 32));
  1471. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  1472. spin_unlock_irqrestore(&priv->lock, flags);
  1473. IWL_DEBUG_MAC80211(priv, "leave\n");
  1474. return 0;
  1475. }
  1476. EXPORT_SYMBOL(iwl_mac_conf_tx);
  1477. static void iwl_ht_conf(struct iwl_priv *priv,
  1478. struct ieee80211_bss_conf *bss_conf)
  1479. {
  1480. struct iwl_ht_config *ht_conf = &priv->current_ht_config;
  1481. struct ieee80211_sta *sta;
  1482. IWL_DEBUG_MAC80211(priv, "enter:\n");
  1483. if (!ht_conf->is_ht)
  1484. return;
  1485. ht_conf->ht_protection =
  1486. bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
  1487. ht_conf->non_GF_STA_present =
  1488. !!(bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
  1489. ht_conf->single_chain_sufficient = false;
  1490. switch (priv->iw_mode) {
  1491. case NL80211_IFTYPE_STATION:
  1492. rcu_read_lock();
  1493. sta = ieee80211_find_sta(priv->vif, priv->bssid);
  1494. if (sta) {
  1495. struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap;
  1496. int maxstreams;
  1497. maxstreams = (ht_cap->mcs.tx_params &
  1498. IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK)
  1499. >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
  1500. maxstreams += 1;
  1501. if ((ht_cap->mcs.rx_mask[1] == 0) &&
  1502. (ht_cap->mcs.rx_mask[2] == 0))
  1503. ht_conf->single_chain_sufficient = true;
  1504. if (maxstreams <= 1)
  1505. ht_conf->single_chain_sufficient = true;
  1506. } else {
  1507. /*
  1508. * If at all, this can only happen through a race
  1509. * when the AP disconnects us while we're still
  1510. * setting up the connection, in that case mac80211
  1511. * will soon tell us about that.
  1512. */
  1513. ht_conf->single_chain_sufficient = true;
  1514. }
  1515. rcu_read_unlock();
  1516. break;
  1517. case NL80211_IFTYPE_ADHOC:
  1518. ht_conf->single_chain_sufficient = true;
  1519. break;
  1520. default:
  1521. break;
  1522. }
  1523. IWL_DEBUG_MAC80211(priv, "leave\n");
  1524. }
  1525. static inline void iwl_set_no_assoc(struct iwl_priv *priv)
  1526. {
  1527. priv->assoc_id = 0;
  1528. iwl_led_disassociate(priv);
  1529. /*
  1530. * inform the ucode that there is no longer an
  1531. * association and that no more packets should be
  1532. * sent
  1533. */
  1534. priv->staging_rxon.filter_flags &=
  1535. ~RXON_FILTER_ASSOC_MSK;
  1536. priv->staging_rxon.assoc_id = 0;
  1537. iwlcore_commit_rxon(priv);
  1538. }
  1539. void iwl_bss_info_changed(struct ieee80211_hw *hw,
  1540. struct ieee80211_vif *vif,
  1541. struct ieee80211_bss_conf *bss_conf,
  1542. u32 changes)
  1543. {
  1544. struct iwl_priv *priv = hw->priv;
  1545. int ret;
  1546. IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
  1547. if (!iwl_is_alive(priv))
  1548. return;
  1549. mutex_lock(&priv->mutex);
  1550. if (changes & BSS_CHANGED_BEACON && vif->type == NL80211_IFTYPE_AP) {
  1551. dev_kfree_skb(priv->ibss_beacon);
  1552. priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
  1553. }
  1554. if (changes & BSS_CHANGED_BEACON_INT) {
  1555. priv->beacon_int = bss_conf->beacon_int;
  1556. /* TODO: in AP mode, do something to make this take effect */
  1557. }
  1558. if (changes & BSS_CHANGED_BSSID) {
  1559. IWL_DEBUG_MAC80211(priv, "BSSID %pM\n", bss_conf->bssid);
  1560. /*
  1561. * If there is currently a HW scan going on in the
  1562. * background then we need to cancel it else the RXON
  1563. * below/in post_associate will fail.
  1564. */
  1565. if (iwl_scan_cancel_timeout(priv, 100)) {
  1566. IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
  1567. IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
  1568. mutex_unlock(&priv->mutex);
  1569. return;
  1570. }
  1571. /* mac80211 only sets assoc when in STATION mode */
  1572. if (vif->type == NL80211_IFTYPE_ADHOC || bss_conf->assoc) {
  1573. memcpy(priv->staging_rxon.bssid_addr,
  1574. bss_conf->bssid, ETH_ALEN);
  1575. /* currently needed in a few places */
  1576. memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
  1577. } else {
  1578. priv->staging_rxon.filter_flags &=
  1579. ~RXON_FILTER_ASSOC_MSK;
  1580. }
  1581. }
  1582. /*
  1583. * This needs to be after setting the BSSID in case
  1584. * mac80211 decides to do both changes at once because
  1585. * it will invoke post_associate.
  1586. */
  1587. if (vif->type == NL80211_IFTYPE_ADHOC &&
  1588. changes & BSS_CHANGED_BEACON) {
  1589. struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
  1590. if (beacon)
  1591. iwl_mac_beacon_update(hw, beacon);
  1592. }
  1593. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  1594. IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
  1595. bss_conf->use_short_preamble);
  1596. if (bss_conf->use_short_preamble)
  1597. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  1598. else
  1599. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  1600. }
  1601. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  1602. IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
  1603. if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
  1604. priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
  1605. else
  1606. priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  1607. }
  1608. if (changes & BSS_CHANGED_BASIC_RATES) {
  1609. /* XXX use this information
  1610. *
  1611. * To do that, remove code from iwl_set_rate() and put something
  1612. * like this here:
  1613. *
  1614. if (A-band)
  1615. priv->staging_rxon.ofdm_basic_rates =
  1616. bss_conf->basic_rates;
  1617. else
  1618. priv->staging_rxon.ofdm_basic_rates =
  1619. bss_conf->basic_rates >> 4;
  1620. priv->staging_rxon.cck_basic_rates =
  1621. bss_conf->basic_rates & 0xF;
  1622. */
  1623. }
  1624. if (changes & BSS_CHANGED_HT) {
  1625. iwl_ht_conf(priv, bss_conf);
  1626. if (priv->cfg->ops->hcmd->set_rxon_chain)
  1627. priv->cfg->ops->hcmd->set_rxon_chain(priv);
  1628. }
  1629. if (changes & BSS_CHANGED_ASSOC) {
  1630. IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
  1631. if (bss_conf->assoc) {
  1632. priv->assoc_id = bss_conf->aid;
  1633. priv->beacon_int = bss_conf->beacon_int;
  1634. priv->timestamp = bss_conf->timestamp;
  1635. priv->assoc_capability = bss_conf->assoc_capability;
  1636. iwl_led_associate(priv);
  1637. if (!iwl_is_rfkill(priv))
  1638. priv->cfg->ops->lib->post_associate(priv);
  1639. } else
  1640. iwl_set_no_assoc(priv);
  1641. }
  1642. if (changes && iwl_is_associated(priv) && priv->assoc_id) {
  1643. IWL_DEBUG_MAC80211(priv, "Changes (%#x) while associated\n",
  1644. changes);
  1645. ret = iwl_send_rxon_assoc(priv);
  1646. if (!ret) {
  1647. /* Sync active_rxon with latest change. */
  1648. memcpy((void *)&priv->active_rxon,
  1649. &priv->staging_rxon,
  1650. sizeof(struct iwl_rxon_cmd));
  1651. }
  1652. }
  1653. if (changes & BSS_CHANGED_BEACON_ENABLED) {
  1654. if (vif->bss_conf.enable_beacon) {
  1655. memcpy(priv->staging_rxon.bssid_addr,
  1656. bss_conf->bssid, ETH_ALEN);
  1657. memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
  1658. iwlcore_config_ap(priv);
  1659. } else
  1660. iwl_set_no_assoc(priv);
  1661. }
  1662. mutex_unlock(&priv->mutex);
  1663. IWL_DEBUG_MAC80211(priv, "leave\n");
  1664. }
  1665. EXPORT_SYMBOL(iwl_bss_info_changed);
  1666. int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
  1667. {
  1668. struct iwl_priv *priv = hw->priv;
  1669. unsigned long flags;
  1670. __le64 timestamp;
  1671. IWL_DEBUG_MAC80211(priv, "enter\n");
  1672. if (!iwl_is_ready_rf(priv)) {
  1673. IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
  1674. return -EIO;
  1675. }
  1676. spin_lock_irqsave(&priv->lock, flags);
  1677. if (priv->ibss_beacon)
  1678. dev_kfree_skb(priv->ibss_beacon);
  1679. priv->ibss_beacon = skb;
  1680. priv->assoc_id = 0;
  1681. timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
  1682. priv->timestamp = le64_to_cpu(timestamp);
  1683. IWL_DEBUG_MAC80211(priv, "leave\n");
  1684. spin_unlock_irqrestore(&priv->lock, flags);
  1685. priv->cfg->ops->lib->post_associate(priv);
  1686. return 0;
  1687. }
  1688. EXPORT_SYMBOL(iwl_mac_beacon_update);
  1689. static int iwl_set_mode(struct iwl_priv *priv, struct ieee80211_vif *vif)
  1690. {
  1691. iwl_connection_init_rx_config(priv, vif->type);
  1692. if (priv->cfg->ops->hcmd->set_rxon_chain)
  1693. priv->cfg->ops->hcmd->set_rxon_chain(priv);
  1694. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  1695. return iwlcore_commit_rxon(priv);
  1696. }
  1697. int iwl_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
  1698. {
  1699. struct iwl_priv *priv = hw->priv;
  1700. int err = 0;
  1701. IWL_DEBUG_MAC80211(priv, "enter: type %d\n", vif->type);
  1702. mutex_lock(&priv->mutex);
  1703. if (WARN_ON(!iwl_is_ready_rf(priv))) {
  1704. err = -EINVAL;
  1705. goto out;
  1706. }
  1707. if (priv->vif) {
  1708. IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
  1709. err = -EOPNOTSUPP;
  1710. goto out;
  1711. }
  1712. priv->vif = vif;
  1713. priv->iw_mode = vif->type;
  1714. IWL_DEBUG_MAC80211(priv, "Set %pM\n", vif->addr);
  1715. memcpy(priv->mac_addr, vif->addr, ETH_ALEN);
  1716. err = iwl_set_mode(priv, vif);
  1717. if (err)
  1718. goto out_err;
  1719. /* Add the broadcast address so we can send broadcast frames */
  1720. priv->cfg->ops->lib->add_bcast_station(priv);
  1721. goto out;
  1722. out_err:
  1723. priv->vif = NULL;
  1724. priv->iw_mode = NL80211_IFTYPE_STATION;
  1725. out:
  1726. mutex_unlock(&priv->mutex);
  1727. IWL_DEBUG_MAC80211(priv, "leave\n");
  1728. return err;
  1729. }
  1730. EXPORT_SYMBOL(iwl_mac_add_interface);
  1731. void iwl_mac_remove_interface(struct ieee80211_hw *hw,
  1732. struct ieee80211_vif *vif)
  1733. {
  1734. struct iwl_priv *priv = hw->priv;
  1735. IWL_DEBUG_MAC80211(priv, "enter\n");
  1736. mutex_lock(&priv->mutex);
  1737. iwl_clear_ucode_stations(priv, true);
  1738. if (iwl_is_ready_rf(priv)) {
  1739. iwl_scan_cancel_timeout(priv, 100);
  1740. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1741. iwlcore_commit_rxon(priv);
  1742. }
  1743. if (priv->vif == vif) {
  1744. priv->vif = NULL;
  1745. memset(priv->bssid, 0, ETH_ALEN);
  1746. }
  1747. mutex_unlock(&priv->mutex);
  1748. IWL_DEBUG_MAC80211(priv, "leave\n");
  1749. }
  1750. EXPORT_SYMBOL(iwl_mac_remove_interface);
  1751. /**
  1752. * iwl_mac_config - mac80211 config callback
  1753. */
  1754. int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
  1755. {
  1756. struct iwl_priv *priv = hw->priv;
  1757. const struct iwl_channel_info *ch_info;
  1758. struct ieee80211_conf *conf = &hw->conf;
  1759. struct iwl_ht_config *ht_conf = &priv->current_ht_config;
  1760. unsigned long flags = 0;
  1761. int ret = 0;
  1762. u16 ch;
  1763. int scan_active = 0;
  1764. mutex_lock(&priv->mutex);
  1765. IWL_DEBUG_MAC80211(priv, "enter to channel %d changed 0x%X\n",
  1766. conf->channel->hw_value, changed);
  1767. if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
  1768. test_bit(STATUS_SCANNING, &priv->status))) {
  1769. scan_active = 1;
  1770. IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
  1771. }
  1772. if (changed & (IEEE80211_CONF_CHANGE_SMPS |
  1773. IEEE80211_CONF_CHANGE_CHANNEL)) {
  1774. /* mac80211 uses static for non-HT which is what we want */
  1775. priv->current_ht_config.smps = conf->smps_mode;
  1776. /*
  1777. * Recalculate chain counts.
  1778. *
  1779. * If monitor mode is enabled then mac80211 will
  1780. * set up the SM PS mode to OFF if an HT channel is
  1781. * configured.
  1782. */
  1783. if (priv->cfg->ops->hcmd->set_rxon_chain)
  1784. priv->cfg->ops->hcmd->set_rxon_chain(priv);
  1785. }
  1786. /* during scanning mac80211 will delay channel setting until
  1787. * scan finish with changed = 0
  1788. */
  1789. if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
  1790. if (scan_active)
  1791. goto set_ch_out;
  1792. ch = ieee80211_frequency_to_channel(conf->channel->center_freq);
  1793. ch_info = iwl_get_channel_info(priv, conf->channel->band, ch);
  1794. if (!is_channel_valid(ch_info)) {
  1795. IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
  1796. ret = -EINVAL;
  1797. goto set_ch_out;
  1798. }
  1799. spin_lock_irqsave(&priv->lock, flags);
  1800. /* Configure HT40 channels */
  1801. ht_conf->is_ht = conf_is_ht(conf);
  1802. if (ht_conf->is_ht) {
  1803. if (conf_is_ht40_minus(conf)) {
  1804. ht_conf->extension_chan_offset =
  1805. IEEE80211_HT_PARAM_CHA_SEC_BELOW;
  1806. ht_conf->is_40mhz = true;
  1807. } else if (conf_is_ht40_plus(conf)) {
  1808. ht_conf->extension_chan_offset =
  1809. IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
  1810. ht_conf->is_40mhz = true;
  1811. } else {
  1812. ht_conf->extension_chan_offset =
  1813. IEEE80211_HT_PARAM_CHA_SEC_NONE;
  1814. ht_conf->is_40mhz = false;
  1815. }
  1816. } else
  1817. ht_conf->is_40mhz = false;
  1818. /* Default to no protection. Protection mode will later be set
  1819. * from BSS config in iwl_ht_conf */
  1820. ht_conf->ht_protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE;
  1821. /* if we are switching from ht to 2.4 clear flags
  1822. * from any ht related info since 2.4 does not
  1823. * support ht */
  1824. if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
  1825. priv->staging_rxon.flags = 0;
  1826. iwl_set_rxon_channel(priv, conf->channel);
  1827. iwl_set_rxon_ht(priv, ht_conf);
  1828. iwl_set_flags_for_band(priv, conf->channel->band);
  1829. spin_unlock_irqrestore(&priv->lock, flags);
  1830. if (iwl_is_associated(priv) &&
  1831. (le16_to_cpu(priv->active_rxon.channel) != ch) &&
  1832. priv->cfg->ops->lib->set_channel_switch) {
  1833. iwl_set_rate(priv);
  1834. /*
  1835. * at this point, staging_rxon has the
  1836. * configuration for channel switch
  1837. */
  1838. ret = priv->cfg->ops->lib->set_channel_switch(priv,
  1839. ch);
  1840. if (!ret) {
  1841. iwl_print_rx_config_cmd(priv);
  1842. goto out;
  1843. }
  1844. priv->switch_rxon.switch_in_progress = false;
  1845. }
  1846. set_ch_out:
  1847. /* The list of supported rates and rate mask can be different
  1848. * for each band; since the band may have changed, reset
  1849. * the rate mask to what mac80211 lists */
  1850. iwl_set_rate(priv);
  1851. }
  1852. if (changed & (IEEE80211_CONF_CHANGE_PS |
  1853. IEEE80211_CONF_CHANGE_IDLE)) {
  1854. ret = iwl_power_update_mode(priv, false);
  1855. if (ret)
  1856. IWL_DEBUG_MAC80211(priv, "Error setting sleep level\n");
  1857. }
  1858. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  1859. IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
  1860. priv->tx_power_user_lmt, conf->power_level);
  1861. iwl_set_tx_power(priv, conf->power_level, false);
  1862. }
  1863. if (changed & IEEE80211_CONF_CHANGE_QOS) {
  1864. bool qos_active = !!(conf->flags & IEEE80211_CONF_QOS);
  1865. spin_lock_irqsave(&priv->lock, flags);
  1866. priv->qos_data.qos_active = qos_active;
  1867. iwl_update_qos(priv);
  1868. spin_unlock_irqrestore(&priv->lock, flags);
  1869. }
  1870. if (!iwl_is_ready(priv)) {
  1871. IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
  1872. goto out;
  1873. }
  1874. if (scan_active)
  1875. goto out;
  1876. if (memcmp(&priv->active_rxon,
  1877. &priv->staging_rxon, sizeof(priv->staging_rxon)))
  1878. iwlcore_commit_rxon(priv);
  1879. else
  1880. IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration.\n");
  1881. out:
  1882. IWL_DEBUG_MAC80211(priv, "leave\n");
  1883. mutex_unlock(&priv->mutex);
  1884. return ret;
  1885. }
  1886. EXPORT_SYMBOL(iwl_mac_config);
  1887. void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
  1888. {
  1889. struct iwl_priv *priv = hw->priv;
  1890. unsigned long flags;
  1891. mutex_lock(&priv->mutex);
  1892. IWL_DEBUG_MAC80211(priv, "enter\n");
  1893. spin_lock_irqsave(&priv->lock, flags);
  1894. memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_config));
  1895. spin_unlock_irqrestore(&priv->lock, flags);
  1896. spin_lock_irqsave(&priv->lock, flags);
  1897. priv->assoc_id = 0;
  1898. priv->assoc_capability = 0;
  1899. /* new association get rid of ibss beacon skb */
  1900. if (priv->ibss_beacon)
  1901. dev_kfree_skb(priv->ibss_beacon);
  1902. priv->ibss_beacon = NULL;
  1903. priv->beacon_int = priv->vif->bss_conf.beacon_int;
  1904. priv->timestamp = 0;
  1905. spin_unlock_irqrestore(&priv->lock, flags);
  1906. if (!iwl_is_ready_rf(priv)) {
  1907. IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
  1908. mutex_unlock(&priv->mutex);
  1909. return;
  1910. }
  1911. /* we are restarting association process
  1912. * clear RXON_FILTER_ASSOC_MSK bit
  1913. */
  1914. iwl_scan_cancel_timeout(priv, 100);
  1915. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1916. iwlcore_commit_rxon(priv);
  1917. iwl_set_rate(priv);
  1918. mutex_unlock(&priv->mutex);
  1919. IWL_DEBUG_MAC80211(priv, "leave\n");
  1920. }
  1921. EXPORT_SYMBOL(iwl_mac_reset_tsf);
  1922. int iwl_alloc_txq_mem(struct iwl_priv *priv)
  1923. {
  1924. if (!priv->txq)
  1925. priv->txq = kzalloc(
  1926. sizeof(struct iwl_tx_queue) * priv->cfg->num_of_queues,
  1927. GFP_KERNEL);
  1928. if (!priv->txq) {
  1929. IWL_ERR(priv, "Not enough memory for txq\n");
  1930. return -ENOMEM;
  1931. }
  1932. return 0;
  1933. }
  1934. EXPORT_SYMBOL(iwl_alloc_txq_mem);
  1935. void iwl_free_txq_mem(struct iwl_priv *priv)
  1936. {
  1937. kfree(priv->txq);
  1938. priv->txq = NULL;
  1939. }
  1940. EXPORT_SYMBOL(iwl_free_txq_mem);
  1941. #ifdef CONFIG_IWLWIFI_DEBUGFS
  1942. #define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
  1943. void iwl_reset_traffic_log(struct iwl_priv *priv)
  1944. {
  1945. priv->tx_traffic_idx = 0;
  1946. priv->rx_traffic_idx = 0;
  1947. if (priv->tx_traffic)
  1948. memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
  1949. if (priv->rx_traffic)
  1950. memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
  1951. }
  1952. int iwl_alloc_traffic_mem(struct iwl_priv *priv)
  1953. {
  1954. u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;
  1955. if (iwl_debug_level & IWL_DL_TX) {
  1956. if (!priv->tx_traffic) {
  1957. priv->tx_traffic =
  1958. kzalloc(traffic_size, GFP_KERNEL);
  1959. if (!priv->tx_traffic)
  1960. return -ENOMEM;
  1961. }
  1962. }
  1963. if (iwl_debug_level & IWL_DL_RX) {
  1964. if (!priv->rx_traffic) {
  1965. priv->rx_traffic =
  1966. kzalloc(traffic_size, GFP_KERNEL);
  1967. if (!priv->rx_traffic)
  1968. return -ENOMEM;
  1969. }
  1970. }
  1971. iwl_reset_traffic_log(priv);
  1972. return 0;
  1973. }
  1974. EXPORT_SYMBOL(iwl_alloc_traffic_mem);
  1975. void iwl_free_traffic_mem(struct iwl_priv *priv)
  1976. {
  1977. kfree(priv->tx_traffic);
  1978. priv->tx_traffic = NULL;
  1979. kfree(priv->rx_traffic);
  1980. priv->rx_traffic = NULL;
  1981. }
  1982. EXPORT_SYMBOL(iwl_free_traffic_mem);
  1983. void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
  1984. u16 length, struct ieee80211_hdr *header)
  1985. {
  1986. __le16 fc;
  1987. u16 len;
  1988. if (likely(!(iwl_debug_level & IWL_DL_TX)))
  1989. return;
  1990. if (!priv->tx_traffic)
  1991. return;
  1992. fc = header->frame_control;
  1993. if (ieee80211_is_data(fc)) {
  1994. len = (length > IWL_TRAFFIC_ENTRY_SIZE)
  1995. ? IWL_TRAFFIC_ENTRY_SIZE : length;
  1996. memcpy((priv->tx_traffic +
  1997. (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
  1998. header, len);
  1999. priv->tx_traffic_idx =
  2000. (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
  2001. }
  2002. }
  2003. EXPORT_SYMBOL(iwl_dbg_log_tx_data_frame);
  2004. void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
  2005. u16 length, struct ieee80211_hdr *header)
  2006. {
  2007. __le16 fc;
  2008. u16 len;
  2009. if (likely(!(iwl_debug_level & IWL_DL_RX)))
  2010. return;
  2011. if (!priv->rx_traffic)
  2012. return;
  2013. fc = header->frame_control;
  2014. if (ieee80211_is_data(fc)) {
  2015. len = (length > IWL_TRAFFIC_ENTRY_SIZE)
  2016. ? IWL_TRAFFIC_ENTRY_SIZE : length;
  2017. memcpy((priv->rx_traffic +
  2018. (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
  2019. header, len);
  2020. priv->rx_traffic_idx =
  2021. (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
  2022. }
  2023. }
  2024. EXPORT_SYMBOL(iwl_dbg_log_rx_data_frame);
  2025. const char *get_mgmt_string(int cmd)
  2026. {
  2027. switch (cmd) {
  2028. IWL_CMD(MANAGEMENT_ASSOC_REQ);
  2029. IWL_CMD(MANAGEMENT_ASSOC_RESP);
  2030. IWL_CMD(MANAGEMENT_REASSOC_REQ);
  2031. IWL_CMD(MANAGEMENT_REASSOC_RESP);
  2032. IWL_CMD(MANAGEMENT_PROBE_REQ);
  2033. IWL_CMD(MANAGEMENT_PROBE_RESP);
  2034. IWL_CMD(MANAGEMENT_BEACON);
  2035. IWL_CMD(MANAGEMENT_ATIM);
  2036. IWL_CMD(MANAGEMENT_DISASSOC);
  2037. IWL_CMD(MANAGEMENT_AUTH);
  2038. IWL_CMD(MANAGEMENT_DEAUTH);
  2039. IWL_CMD(MANAGEMENT_ACTION);
  2040. default:
  2041. return "UNKNOWN";
  2042. }
  2043. }
  2044. const char *get_ctrl_string(int cmd)
  2045. {
  2046. switch (cmd) {
  2047. IWL_CMD(CONTROL_BACK_REQ);
  2048. IWL_CMD(CONTROL_BACK);
  2049. IWL_CMD(CONTROL_PSPOLL);
  2050. IWL_CMD(CONTROL_RTS);
  2051. IWL_CMD(CONTROL_CTS);
  2052. IWL_CMD(CONTROL_ACK);
  2053. IWL_CMD(CONTROL_CFEND);
  2054. IWL_CMD(CONTROL_CFENDACK);
  2055. default:
  2056. return "UNKNOWN";
  2057. }
  2058. }
  2059. void iwl_clear_traffic_stats(struct iwl_priv *priv)
  2060. {
  2061. memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
  2062. memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
  2063. priv->led_tpt = 0;
  2064. }
  2065. /*
  2066. * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
  2067. * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
  2068. * Use debugFs to display the rx/rx_statistics
  2069. * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
  2070. * information will be recorded, but DATA pkt still will be recorded
  2071. * for the reason of iwl_led.c need to control the led blinking based on
  2072. * number of tx and rx data.
  2073. *
  2074. */
  2075. void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
  2076. {
  2077. struct traffic_stats *stats;
  2078. if (is_tx)
  2079. stats = &priv->tx_stats;
  2080. else
  2081. stats = &priv->rx_stats;
  2082. if (ieee80211_is_mgmt(fc)) {
  2083. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  2084. case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
  2085. stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
  2086. break;
  2087. case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
  2088. stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
  2089. break;
  2090. case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
  2091. stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
  2092. break;
  2093. case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
  2094. stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
  2095. break;
  2096. case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
  2097. stats->mgmt[MANAGEMENT_PROBE_REQ]++;
  2098. break;
  2099. case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
  2100. stats->mgmt[MANAGEMENT_PROBE_RESP]++;
  2101. break;
  2102. case cpu_to_le16(IEEE80211_STYPE_BEACON):
  2103. stats->mgmt[MANAGEMENT_BEACON]++;
  2104. break;
  2105. case cpu_to_le16(IEEE80211_STYPE_ATIM):
  2106. stats->mgmt[MANAGEMENT_ATIM]++;
  2107. break;
  2108. case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
  2109. stats->mgmt[MANAGEMENT_DISASSOC]++;
  2110. break;
  2111. case cpu_to_le16(IEEE80211_STYPE_AUTH):
  2112. stats->mgmt[MANAGEMENT_AUTH]++;
  2113. break;
  2114. case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
  2115. stats->mgmt[MANAGEMENT_DEAUTH]++;
  2116. break;
  2117. case cpu_to_le16(IEEE80211_STYPE_ACTION):
  2118. stats->mgmt[MANAGEMENT_ACTION]++;
  2119. break;
  2120. }
  2121. } else if (ieee80211_is_ctl(fc)) {
  2122. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  2123. case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
  2124. stats->ctrl[CONTROL_BACK_REQ]++;
  2125. break;
  2126. case cpu_to_le16(IEEE80211_STYPE_BACK):
  2127. stats->ctrl[CONTROL_BACK]++;
  2128. break;
  2129. case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
  2130. stats->ctrl[CONTROL_PSPOLL]++;
  2131. break;
  2132. case cpu_to_le16(IEEE80211_STYPE_RTS):
  2133. stats->ctrl[CONTROL_RTS]++;
  2134. break;
  2135. case cpu_to_le16(IEEE80211_STYPE_CTS):
  2136. stats->ctrl[CONTROL_CTS]++;
  2137. break;
  2138. case cpu_to_le16(IEEE80211_STYPE_ACK):
  2139. stats->ctrl[CONTROL_ACK]++;
  2140. break;
  2141. case cpu_to_le16(IEEE80211_STYPE_CFEND):
  2142. stats->ctrl[CONTROL_CFEND]++;
  2143. break;
  2144. case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
  2145. stats->ctrl[CONTROL_CFENDACK]++;
  2146. break;
  2147. }
  2148. } else {
  2149. /* data */
  2150. stats->data_cnt++;
  2151. stats->data_bytes += len;
  2152. }
  2153. iwl_leds_background(priv);
  2154. }
  2155. EXPORT_SYMBOL(iwl_update_stats);
  2156. #endif
  2157. const static char *get_csr_string(int cmd)
  2158. {
  2159. switch (cmd) {
  2160. IWL_CMD(CSR_HW_IF_CONFIG_REG);
  2161. IWL_CMD(CSR_INT_COALESCING);
  2162. IWL_CMD(CSR_INT);
  2163. IWL_CMD(CSR_INT_MASK);
  2164. IWL_CMD(CSR_FH_INT_STATUS);
  2165. IWL_CMD(CSR_GPIO_IN);
  2166. IWL_CMD(CSR_RESET);
  2167. IWL_CMD(CSR_GP_CNTRL);
  2168. IWL_CMD(CSR_HW_REV);
  2169. IWL_CMD(CSR_EEPROM_REG);
  2170. IWL_CMD(CSR_EEPROM_GP);
  2171. IWL_CMD(CSR_OTP_GP_REG);
  2172. IWL_CMD(CSR_GIO_REG);
  2173. IWL_CMD(CSR_GP_UCODE_REG);
  2174. IWL_CMD(CSR_GP_DRIVER_REG);
  2175. IWL_CMD(CSR_UCODE_DRV_GP1);
  2176. IWL_CMD(CSR_UCODE_DRV_GP2);
  2177. IWL_CMD(CSR_LED_REG);
  2178. IWL_CMD(CSR_DRAM_INT_TBL_REG);
  2179. IWL_CMD(CSR_GIO_CHICKEN_BITS);
  2180. IWL_CMD(CSR_ANA_PLL_CFG);
  2181. IWL_CMD(CSR_HW_REV_WA_REG);
  2182. IWL_CMD(CSR_DBG_HPET_MEM_REG);
  2183. default:
  2184. return "UNKNOWN";
  2185. }
  2186. }
  2187. void iwl_dump_csr(struct iwl_priv *priv)
  2188. {
  2189. int i;
  2190. u32 csr_tbl[] = {
  2191. CSR_HW_IF_CONFIG_REG,
  2192. CSR_INT_COALESCING,
  2193. CSR_INT,
  2194. CSR_INT_MASK,
  2195. CSR_FH_INT_STATUS,
  2196. CSR_GPIO_IN,
  2197. CSR_RESET,
  2198. CSR_GP_CNTRL,
  2199. CSR_HW_REV,
  2200. CSR_EEPROM_REG,
  2201. CSR_EEPROM_GP,
  2202. CSR_OTP_GP_REG,
  2203. CSR_GIO_REG,
  2204. CSR_GP_UCODE_REG,
  2205. CSR_GP_DRIVER_REG,
  2206. CSR_UCODE_DRV_GP1,
  2207. CSR_UCODE_DRV_GP2,
  2208. CSR_LED_REG,
  2209. CSR_DRAM_INT_TBL_REG,
  2210. CSR_GIO_CHICKEN_BITS,
  2211. CSR_ANA_PLL_CFG,
  2212. CSR_HW_REV_WA_REG,
  2213. CSR_DBG_HPET_MEM_REG
  2214. };
  2215. IWL_ERR(priv, "CSR values:\n");
  2216. IWL_ERR(priv, "(2nd byte of CSR_INT_COALESCING is "
  2217. "CSR_INT_PERIODIC_REG)\n");
  2218. for (i = 0; i < ARRAY_SIZE(csr_tbl); i++) {
  2219. IWL_ERR(priv, " %25s: 0X%08x\n",
  2220. get_csr_string(csr_tbl[i]),
  2221. iwl_read32(priv, csr_tbl[i]));
  2222. }
  2223. }
  2224. EXPORT_SYMBOL(iwl_dump_csr);
  2225. const static char *get_fh_string(int cmd)
  2226. {
  2227. switch (cmd) {
  2228. IWL_CMD(FH_RSCSR_CHNL0_STTS_WPTR_REG);
  2229. IWL_CMD(FH_RSCSR_CHNL0_RBDCB_BASE_REG);
  2230. IWL_CMD(FH_RSCSR_CHNL0_WPTR);
  2231. IWL_CMD(FH_MEM_RCSR_CHNL0_CONFIG_REG);
  2232. IWL_CMD(FH_MEM_RSSR_SHARED_CTRL_REG);
  2233. IWL_CMD(FH_MEM_RSSR_RX_STATUS_REG);
  2234. IWL_CMD(FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV);
  2235. IWL_CMD(FH_TSSR_TX_STATUS_REG);
  2236. IWL_CMD(FH_TSSR_TX_ERROR_REG);
  2237. default:
  2238. return "UNKNOWN";
  2239. }
  2240. }
  2241. int iwl_dump_fh(struct iwl_priv *priv, char **buf, bool display)
  2242. {
  2243. int i;
  2244. #ifdef CONFIG_IWLWIFI_DEBUG
  2245. int pos = 0;
  2246. size_t bufsz = 0;
  2247. #endif
  2248. u32 fh_tbl[] = {
  2249. FH_RSCSR_CHNL0_STTS_WPTR_REG,
  2250. FH_RSCSR_CHNL0_RBDCB_BASE_REG,
  2251. FH_RSCSR_CHNL0_WPTR,
  2252. FH_MEM_RCSR_CHNL0_CONFIG_REG,
  2253. FH_MEM_RSSR_SHARED_CTRL_REG,
  2254. FH_MEM_RSSR_RX_STATUS_REG,
  2255. FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV,
  2256. FH_TSSR_TX_STATUS_REG,
  2257. FH_TSSR_TX_ERROR_REG
  2258. };
  2259. #ifdef CONFIG_IWLWIFI_DEBUG
  2260. if (display) {
  2261. bufsz = ARRAY_SIZE(fh_tbl) * 48 + 40;
  2262. *buf = kmalloc(bufsz, GFP_KERNEL);
  2263. if (!*buf)
  2264. return -ENOMEM;
  2265. pos += scnprintf(*buf + pos, bufsz - pos,
  2266. "FH register values:\n");
  2267. for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
  2268. pos += scnprintf(*buf + pos, bufsz - pos,
  2269. " %34s: 0X%08x\n",
  2270. get_fh_string(fh_tbl[i]),
  2271. iwl_read_direct32(priv, fh_tbl[i]));
  2272. }
  2273. return pos;
  2274. }
  2275. #endif
  2276. IWL_ERR(priv, "FH register values:\n");
  2277. for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
  2278. IWL_ERR(priv, " %34s: 0X%08x\n",
  2279. get_fh_string(fh_tbl[i]),
  2280. iwl_read_direct32(priv, fh_tbl[i]));
  2281. }
  2282. return 0;
  2283. }
  2284. EXPORT_SYMBOL(iwl_dump_fh);
  2285. static void iwl_force_rf_reset(struct iwl_priv *priv)
  2286. {
  2287. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2288. return;
  2289. if (!iwl_is_associated(priv)) {
  2290. IWL_DEBUG_SCAN(priv, "force reset rejected: not associated\n");
  2291. return;
  2292. }
  2293. /*
  2294. * There is no easy and better way to force reset the radio,
  2295. * the only known method is switching channel which will force to
  2296. * reset and tune the radio.
  2297. * Use internal short scan (single channel) operation to should
  2298. * achieve this objective.
  2299. * Driver should reset the radio when number of consecutive missed
  2300. * beacon, or any other uCode error condition detected.
  2301. */
  2302. IWL_DEBUG_INFO(priv, "perform radio reset.\n");
  2303. iwl_internal_short_hw_scan(priv);
  2304. }
  2305. int iwl_force_reset(struct iwl_priv *priv, int mode)
  2306. {
  2307. struct iwl_force_reset *force_reset;
  2308. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2309. return -EINVAL;
  2310. if (mode >= IWL_MAX_FORCE_RESET) {
  2311. IWL_DEBUG_INFO(priv, "invalid reset request.\n");
  2312. return -EINVAL;
  2313. }
  2314. force_reset = &priv->force_reset[mode];
  2315. force_reset->reset_request_count++;
  2316. if (force_reset->last_force_reset_jiffies &&
  2317. time_after(force_reset->last_force_reset_jiffies +
  2318. force_reset->reset_duration, jiffies)) {
  2319. IWL_DEBUG_INFO(priv, "force reset rejected\n");
  2320. force_reset->reset_reject_count++;
  2321. return -EAGAIN;
  2322. }
  2323. force_reset->reset_success_count++;
  2324. force_reset->last_force_reset_jiffies = jiffies;
  2325. IWL_DEBUG_INFO(priv, "perform force reset (%d)\n", mode);
  2326. switch (mode) {
  2327. case IWL_RF_RESET:
  2328. iwl_force_rf_reset(priv);
  2329. break;
  2330. case IWL_FW_RESET:
  2331. IWL_ERR(priv, "On demand firmware reload\n");
  2332. /* Set the FW error flag -- cleared on iwl_down */
  2333. set_bit(STATUS_FW_ERROR, &priv->status);
  2334. wake_up_interruptible(&priv->wait_command_queue);
  2335. /*
  2336. * Keep the restart process from trying to send host
  2337. * commands by clearing the INIT status bit
  2338. */
  2339. clear_bit(STATUS_READY, &priv->status);
  2340. queue_work(priv->workqueue, &priv->restart);
  2341. break;
  2342. }
  2343. return 0;
  2344. }
  2345. EXPORT_SYMBOL(iwl_force_reset);
  2346. /**
  2347. * iwl_bg_monitor_recover - Timer callback to check for stuck queue and recover
  2348. *
  2349. * During normal condition (no queue is stuck), the timer is continually set to
  2350. * execute every monitor_recover_period milliseconds after the last timer
  2351. * expired. When the queue read_ptr is at the same place, the timer is
  2352. * shorten to 100mSecs. This is
  2353. * 1) to reduce the chance that the read_ptr may wrap around (not stuck)
  2354. * 2) to detect the stuck queues quicker before the station and AP can
  2355. * disassociate each other.
  2356. *
  2357. * This function monitors all the tx queues and recover from it if any
  2358. * of the queues are stuck.
  2359. * 1. It first check the cmd queue for stuck conditions. If it is stuck,
  2360. * it will recover by resetting the firmware and return.
  2361. * 2. Then, it checks for station association. If it associates it will check
  2362. * other queues. If any queue is stuck, it will recover by resetting
  2363. * the firmware.
  2364. * Note: It the number of times the queue read_ptr to be at the same place to
  2365. * be MAX_REPEAT+1 in order to consider to be stuck.
  2366. */
  2367. /*
  2368. * The maximum number of times the read pointer of the tx queue at the
  2369. * same place without considering to be stuck.
  2370. */
  2371. #define MAX_REPEAT (2)
  2372. static int iwl_check_stuck_queue(struct iwl_priv *priv, int cnt)
  2373. {
  2374. struct iwl_tx_queue *txq;
  2375. struct iwl_queue *q;
  2376. txq = &priv->txq[cnt];
  2377. q = &txq->q;
  2378. /* queue is empty, skip */
  2379. if (q->read_ptr != q->write_ptr) {
  2380. if (q->read_ptr == q->last_read_ptr) {
  2381. /* a queue has not been read from last time */
  2382. if (q->repeat_same_read_ptr > MAX_REPEAT) {
  2383. IWL_ERR(priv,
  2384. "queue %d stuck %d time. Fw reload.\n",
  2385. q->id, q->repeat_same_read_ptr);
  2386. q->repeat_same_read_ptr = 0;
  2387. iwl_force_reset(priv, IWL_FW_RESET);
  2388. } else {
  2389. q->repeat_same_read_ptr++;
  2390. IWL_DEBUG_RADIO(priv,
  2391. "queue %d, not read %d time\n",
  2392. q->id,
  2393. q->repeat_same_read_ptr);
  2394. mod_timer(&priv->monitor_recover, jiffies +
  2395. msecs_to_jiffies(IWL_ONE_HUNDRED_MSECS));
  2396. }
  2397. return 1;
  2398. } else {
  2399. q->last_read_ptr = q->read_ptr;
  2400. q->repeat_same_read_ptr = 0;
  2401. }
  2402. }
  2403. return 0;
  2404. }
  2405. void iwl_bg_monitor_recover(unsigned long data)
  2406. {
  2407. struct iwl_priv *priv = (struct iwl_priv *)data;
  2408. int cnt;
  2409. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2410. return;
  2411. /* monitor and check for stuck cmd queue */
  2412. if (iwl_check_stuck_queue(priv, IWL_CMD_QUEUE_NUM))
  2413. return;
  2414. /* monitor and check for other stuck queues */
  2415. if (iwl_is_associated(priv)) {
  2416. for (cnt = 0; cnt < priv->hw_params.max_txq_num; cnt++) {
  2417. /* skip as we already checked the command queue */
  2418. if (cnt == IWL_CMD_QUEUE_NUM)
  2419. continue;
  2420. if (iwl_check_stuck_queue(priv, cnt))
  2421. return;
  2422. }
  2423. }
  2424. /*
  2425. * Reschedule the timer to occur in
  2426. * priv->cfg->monitor_recover_period
  2427. */
  2428. mod_timer(&priv->monitor_recover,
  2429. jiffies + msecs_to_jiffies(priv->cfg->monitor_recover_period));
  2430. }
  2431. EXPORT_SYMBOL(iwl_bg_monitor_recover);
  2432. #ifdef CONFIG_PM
  2433. int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  2434. {
  2435. struct iwl_priv *priv = pci_get_drvdata(pdev);
  2436. /*
  2437. * This function is called when system goes into suspend state
  2438. * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
  2439. * first but since iwl_mac_stop() has no knowledge of who the caller is,
  2440. * it will not call apm_ops.stop() to stop the DMA operation.
  2441. * Calling apm_ops.stop here to make sure we stop the DMA.
  2442. */
  2443. priv->cfg->ops->lib->apm_ops.stop(priv);
  2444. pci_save_state(pdev);
  2445. pci_disable_device(pdev);
  2446. pci_set_power_state(pdev, PCI_D3hot);
  2447. return 0;
  2448. }
  2449. EXPORT_SYMBOL(iwl_pci_suspend);
  2450. int iwl_pci_resume(struct pci_dev *pdev)
  2451. {
  2452. struct iwl_priv *priv = pci_get_drvdata(pdev);
  2453. int ret;
  2454. /*
  2455. * We disable the RETRY_TIMEOUT register (0x41) to keep
  2456. * PCI Tx retries from interfering with C3 CPU state.
  2457. */
  2458. pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
  2459. pci_set_power_state(pdev, PCI_D0);
  2460. ret = pci_enable_device(pdev);
  2461. if (ret)
  2462. return ret;
  2463. pci_restore_state(pdev);
  2464. iwl_enable_interrupts(priv);
  2465. return 0;
  2466. }
  2467. EXPORT_SYMBOL(iwl_pci_resume);
  2468. #endif /* CONFIG_PM */