imx51-babbage.dts 4.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217
  1. /*
  2. * Copyright 2011 Freescale Semiconductor, Inc.
  3. * Copyright 2011 Linaro Ltd.
  4. *
  5. * The code contained herein is licensed under the GNU General Public
  6. * License. You may obtain a copy of the GNU General Public License
  7. * Version 2 or later at the following locations:
  8. *
  9. * http://www.opensource.org/licenses/gpl-license.html
  10. * http://www.gnu.org/copyleft/gpl.html
  11. */
  12. /dts-v1/;
  13. /include/ "imx51.dtsi"
  14. / {
  15. model = "Freescale i.MX51 Babbage Board";
  16. compatible = "fsl,imx51-babbage", "fsl,imx51";
  17. memory {
  18. reg = <0x90000000 0x20000000>;
  19. };
  20. soc {
  21. aips@70000000 { /* aips-1 */
  22. spba@70000000 {
  23. esdhc@70004000 { /* ESDHC1 */
  24. fsl,cd-internal;
  25. fsl,wp-internal;
  26. status = "okay";
  27. };
  28. esdhc@70008000 { /* ESDHC2 */
  29. cd-gpios = <&gpio1 6 0>;
  30. wp-gpios = <&gpio1 5 0>;
  31. status = "okay";
  32. };
  33. uart3: uart@7000c000 {
  34. fsl,uart-has-rtscts;
  35. status = "okay";
  36. };
  37. ecspi@70010000 { /* ECSPI1 */
  38. fsl,spi-num-chipselects = <2>;
  39. cs-gpios = <&gpio4 24 0>, <&gpio4 25 0>;
  40. status = "okay";
  41. pmic: mc13892@0 {
  42. #address-cells = <1>;
  43. #size-cells = <0>;
  44. compatible = "fsl,mc13892";
  45. spi-max-frequency = <6000000>;
  46. reg = <0>;
  47. interrupt-parent = <&gpio1>;
  48. interrupts = <8>;
  49. regulators {
  50. sw1_reg: sw1 {
  51. regulator-min-microvolt = <600000>;
  52. regulator-max-microvolt = <1375000>;
  53. regulator-boot-on;
  54. regulator-always-on;
  55. };
  56. sw2_reg: sw2 {
  57. regulator-min-microvolt = <900000>;
  58. regulator-max-microvolt = <1850000>;
  59. regulator-boot-on;
  60. regulator-always-on;
  61. };
  62. sw3_reg: sw3 {
  63. regulator-min-microvolt = <1100000>;
  64. regulator-max-microvolt = <1850000>;
  65. regulator-boot-on;
  66. regulator-always-on;
  67. };
  68. sw4_reg: sw4 {
  69. regulator-min-microvolt = <1100000>;
  70. regulator-max-microvolt = <1850000>;
  71. regulator-boot-on;
  72. regulator-always-on;
  73. };
  74. vpll_reg: vpll {
  75. regulator-min-microvolt = <1050000>;
  76. regulator-max-microvolt = <1800000>;
  77. regulator-boot-on;
  78. regulator-always-on;
  79. };
  80. vdig_reg: vdig {
  81. regulator-min-microvolt = <1650000>;
  82. regulator-max-microvolt = <1650000>;
  83. regulator-boot-on;
  84. };
  85. vsd_reg: vsd {
  86. regulator-min-microvolt = <1800000>;
  87. regulator-max-microvolt = <3150000>;
  88. };
  89. vusb2_reg: vusb2 {
  90. regulator-min-microvolt = <2400000>;
  91. regulator-max-microvolt = <2775000>;
  92. regulator-boot-on;
  93. regulator-always-on;
  94. };
  95. vvideo_reg: vvideo {
  96. regulator-min-microvolt = <2775000>;
  97. regulator-max-microvolt = <2775000>;
  98. };
  99. vaudio_reg: vaudio {
  100. regulator-min-microvolt = <2300000>;
  101. regulator-max-microvolt = <3000000>;
  102. };
  103. vcam_reg: vcam {
  104. regulator-min-microvolt = <2500000>;
  105. regulator-max-microvolt = <3000000>;
  106. };
  107. vgen1_reg: vgen1 {
  108. regulator-min-microvolt = <1200000>;
  109. regulator-max-microvolt = <1200000>;
  110. };
  111. vgen2_reg: vgen2 {
  112. regulator-min-microvolt = <1200000>;
  113. regulator-max-microvolt = <3150000>;
  114. regulator-always-on;
  115. };
  116. vgen3_reg: vgen3 {
  117. regulator-min-microvolt = <1800000>;
  118. regulator-max-microvolt = <2900000>;
  119. regulator-always-on;
  120. };
  121. };
  122. };
  123. flash: at45db321d@1 {
  124. #address-cells = <1>;
  125. #size-cells = <1>;
  126. compatible = "atmel,at45db321d", "atmel,at45", "atmel,dataflash";
  127. spi-max-frequency = <25000000>;
  128. reg = <1>;
  129. partition@0 {
  130. label = "U-Boot";
  131. reg = <0x0 0x40000>;
  132. read-only;
  133. };
  134. partition@40000 {
  135. label = "Kernel";
  136. reg = <0x40000 0x3c0000>;
  137. };
  138. };
  139. };
  140. };
  141. wdog@73f98000 { /* WDOG1 */
  142. status = "okay";
  143. };
  144. iomuxc@73fa8000 {
  145. compatible = "fsl,imx51-iomuxc-babbage";
  146. reg = <0x73fa8000 0x4000>;
  147. };
  148. uart1: uart@73fbc000 {
  149. fsl,uart-has-rtscts;
  150. status = "okay";
  151. };
  152. uart2: uart@73fc0000 {
  153. status = "okay";
  154. };
  155. };
  156. aips@80000000 { /* aips-2 */
  157. sdma@83fb0000 {
  158. fsl,sdma-ram-script-name = "imx/sdma/sdma-imx51.bin";
  159. };
  160. i2c@83fc4000 { /* I2C2 */
  161. status = "okay";
  162. codec: sgtl5000@0a {
  163. compatible = "fsl,sgtl5000";
  164. reg = <0x0a>;
  165. };
  166. };
  167. fec@83fec000 {
  168. phy-mode = "mii";
  169. status = "okay";
  170. };
  171. };
  172. };
  173. gpio-keys {
  174. compatible = "gpio-keys";
  175. power {
  176. label = "Power Button";
  177. gpios = <&gpio2 21 0>;
  178. linux,code = <116>; /* KEY_POWER */
  179. gpio-key,wakeup;
  180. };
  181. };
  182. };