amba-pl010.c 19 KB

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  1. /*
  2. * linux/drivers/char/amba.c
  3. *
  4. * Driver for AMBA serial ports
  5. *
  6. * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
  7. *
  8. * Copyright 1999 ARM Limited
  9. * Copyright (C) 2000 Deep Blue Solutions Ltd.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or
  14. * (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  24. *
  25. * $Id: amba.c,v 1.41 2002/07/28 10:03:27 rmk Exp $
  26. *
  27. * This is a generic driver for ARM AMBA-type serial ports. They
  28. * have a lot of 16550-like features, but are not register compatible.
  29. * Note that although they do have CTS, DCD and DSR inputs, they do
  30. * not have an RI input, nor do they have DTR or RTS outputs. If
  31. * required, these have to be supplied via some other means (eg, GPIO)
  32. * and hooked into this driver.
  33. */
  34. #include <linux/config.h>
  35. #if defined(CONFIG_SERIAL_AMBA_PL010_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  36. #define SUPPORT_SYSRQ
  37. #endif
  38. #include <linux/module.h>
  39. #include <linux/ioport.h>
  40. #include <linux/init.h>
  41. #include <linux/console.h>
  42. #include <linux/sysrq.h>
  43. #include <linux/device.h>
  44. #include <linux/tty.h>
  45. #include <linux/tty_flip.h>
  46. #include <linux/serial_core.h>
  47. #include <linux/serial.h>
  48. #include <asm/io.h>
  49. #include <asm/irq.h>
  50. #include <asm/hardware/amba.h>
  51. #include <asm/hardware/amba_serial.h>
  52. #define UART_NR 2
  53. #define SERIAL_AMBA_MAJOR 204
  54. #define SERIAL_AMBA_MINOR 16
  55. #define SERIAL_AMBA_NR UART_NR
  56. #define AMBA_ISR_PASS_LIMIT 256
  57. /*
  58. * Access macros for the AMBA UARTs
  59. */
  60. #define UART_GET_INT_STATUS(p) readb((p)->membase + UART010_IIR)
  61. #define UART_PUT_ICR(p, c) writel((c), (p)->membase + UART010_ICR)
  62. #define UART_GET_FR(p) readb((p)->membase + UART01x_FR)
  63. #define UART_GET_CHAR(p) readb((p)->membase + UART01x_DR)
  64. #define UART_PUT_CHAR(p, c) writel((c), (p)->membase + UART01x_DR)
  65. #define UART_GET_RSR(p) readb((p)->membase + UART01x_RSR)
  66. #define UART_GET_CR(p) readb((p)->membase + UART010_CR)
  67. #define UART_PUT_CR(p,c) writel((c), (p)->membase + UART010_CR)
  68. #define UART_GET_LCRL(p) readb((p)->membase + UART010_LCRL)
  69. #define UART_PUT_LCRL(p,c) writel((c), (p)->membase + UART010_LCRL)
  70. #define UART_GET_LCRM(p) readb((p)->membase + UART010_LCRM)
  71. #define UART_PUT_LCRM(p,c) writel((c), (p)->membase + UART010_LCRM)
  72. #define UART_GET_LCRH(p) readb((p)->membase + UART010_LCRH)
  73. #define UART_PUT_LCRH(p,c) writel((c), (p)->membase + UART010_LCRH)
  74. #define UART_RX_DATA(s) (((s) & UART01x_FR_RXFE) == 0)
  75. #define UART_TX_READY(s) (((s) & UART01x_FR_TXFF) == 0)
  76. #define UART_TX_EMPTY(p) ((UART_GET_FR(p) & UART01x_FR_TMSK) == 0)
  77. #define UART_DUMMY_RSR_RX /*256*/0
  78. #define UART_PORT_SIZE 64
  79. /*
  80. * On the Integrator platform, the port RTS and DTR are provided by
  81. * bits in the following SC_CTRLS register bits:
  82. * RTS DTR
  83. * UART0 7 6
  84. * UART1 5 4
  85. */
  86. #define SC_CTRLC (IO_ADDRESS(INTEGRATOR_SC_BASE) + INTEGRATOR_SC_CTRLC_OFFSET)
  87. #define SC_CTRLS (IO_ADDRESS(INTEGRATOR_SC_BASE) + INTEGRATOR_SC_CTRLS_OFFSET)
  88. /*
  89. * We wrap our port structure around the generic uart_port.
  90. */
  91. struct uart_amba_port {
  92. struct uart_port port;
  93. unsigned int dtr_mask;
  94. unsigned int rts_mask;
  95. unsigned int old_status;
  96. };
  97. static void pl010_stop_tx(struct uart_port *port, unsigned int tty_stop)
  98. {
  99. unsigned int cr;
  100. cr = UART_GET_CR(port);
  101. cr &= ~UART010_CR_TIE;
  102. UART_PUT_CR(port, cr);
  103. }
  104. static void pl010_start_tx(struct uart_port *port, unsigned int tty_start)
  105. {
  106. unsigned int cr;
  107. cr = UART_GET_CR(port);
  108. cr |= UART010_CR_TIE;
  109. UART_PUT_CR(port, cr);
  110. }
  111. static void pl010_stop_rx(struct uart_port *port)
  112. {
  113. unsigned int cr;
  114. cr = UART_GET_CR(port);
  115. cr &= ~(UART010_CR_RIE | UART010_CR_RTIE);
  116. UART_PUT_CR(port, cr);
  117. }
  118. static void pl010_enable_ms(struct uart_port *port)
  119. {
  120. unsigned int cr;
  121. cr = UART_GET_CR(port);
  122. cr |= UART010_CR_MSIE;
  123. UART_PUT_CR(port, cr);
  124. }
  125. static void
  126. #ifdef SUPPORT_SYSRQ
  127. pl010_rx_chars(struct uart_port *port, struct pt_regs *regs)
  128. #else
  129. pl010_rx_chars(struct uart_port *port)
  130. #endif
  131. {
  132. struct tty_struct *tty = port->info->tty;
  133. unsigned int status, ch, flag, rsr, max_count = 256;
  134. status = UART_GET_FR(port);
  135. while (UART_RX_DATA(status) && max_count--) {
  136. if (tty->flip.count >= TTY_FLIPBUF_SIZE) {
  137. if (tty->low_latency)
  138. tty_flip_buffer_push(tty);
  139. /*
  140. * If this failed then we will throw away the
  141. * bytes but must do so to clear interrupts.
  142. */
  143. }
  144. ch = UART_GET_CHAR(port);
  145. flag = TTY_NORMAL;
  146. port->icount.rx++;
  147. /*
  148. * Note that the error handling code is
  149. * out of the main execution path
  150. */
  151. rsr = UART_GET_RSR(port) | UART_DUMMY_RSR_RX;
  152. if (unlikely(rsr & UART01x_RSR_ANY)) {
  153. if (rsr & UART01x_RSR_BE) {
  154. rsr &= ~(UART01x_RSR_FE | UART01x_RSR_PE);
  155. port->icount.brk++;
  156. if (uart_handle_break(port))
  157. goto ignore_char;
  158. } else if (rsr & UART01x_RSR_PE)
  159. port->icount.parity++;
  160. else if (rsr & UART01x_RSR_FE)
  161. port->icount.frame++;
  162. if (rsr & UART01x_RSR_OE)
  163. port->icount.overrun++;
  164. rsr &= port->read_status_mask;
  165. if (rsr & UART01x_RSR_BE)
  166. flag = TTY_BREAK;
  167. else if (rsr & UART01x_RSR_PE)
  168. flag = TTY_PARITY;
  169. else if (rsr & UART01x_RSR_FE)
  170. flag = TTY_FRAME;
  171. }
  172. if (uart_handle_sysrq_char(port, ch, regs))
  173. goto ignore_char;
  174. if ((rsr & port->ignore_status_mask) == 0) {
  175. tty_insert_flip_char(tty, ch, flag);
  176. }
  177. if ((rsr & UART01x_RSR_OE) &&
  178. tty->flip.count < TTY_FLIPBUF_SIZE) {
  179. /*
  180. * Overrun is special, since it's reported
  181. * immediately, and doesn't affect the current
  182. * character
  183. */
  184. tty_insert_flip_char(tty, 0, TTY_OVERRUN);
  185. }
  186. ignore_char:
  187. status = UART_GET_FR(port);
  188. }
  189. tty_flip_buffer_push(tty);
  190. return;
  191. }
  192. static void pl010_tx_chars(struct uart_port *port)
  193. {
  194. struct circ_buf *xmit = &port->info->xmit;
  195. int count;
  196. if (port->x_char) {
  197. UART_PUT_CHAR(port, port->x_char);
  198. port->icount.tx++;
  199. port->x_char = 0;
  200. return;
  201. }
  202. if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
  203. pl010_stop_tx(port, 0);
  204. return;
  205. }
  206. count = port->fifosize >> 1;
  207. do {
  208. UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
  209. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  210. port->icount.tx++;
  211. if (uart_circ_empty(xmit))
  212. break;
  213. } while (--count > 0);
  214. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  215. uart_write_wakeup(port);
  216. if (uart_circ_empty(xmit))
  217. pl010_stop_tx(port, 0);
  218. }
  219. static void pl010_modem_status(struct uart_port *port)
  220. {
  221. struct uart_amba_port *uap = (struct uart_amba_port *)port;
  222. unsigned int status, delta;
  223. UART_PUT_ICR(&uap->port, 0);
  224. status = UART_GET_FR(&uap->port) & UART01x_FR_MODEM_ANY;
  225. delta = status ^ uap->old_status;
  226. uap->old_status = status;
  227. if (!delta)
  228. return;
  229. if (delta & UART01x_FR_DCD)
  230. uart_handle_dcd_change(&uap->port, status & UART01x_FR_DCD);
  231. if (delta & UART01x_FR_DSR)
  232. uap->port.icount.dsr++;
  233. if (delta & UART01x_FR_CTS)
  234. uart_handle_cts_change(&uap->port, status & UART01x_FR_CTS);
  235. wake_up_interruptible(&uap->port.info->delta_msr_wait);
  236. }
  237. static irqreturn_t pl010_int(int irq, void *dev_id, struct pt_regs *regs)
  238. {
  239. struct uart_port *port = dev_id;
  240. unsigned int status, pass_counter = AMBA_ISR_PASS_LIMIT;
  241. int handled = 0;
  242. spin_lock(&port->lock);
  243. status = UART_GET_INT_STATUS(port);
  244. if (status) {
  245. do {
  246. if (status & (UART010_IIR_RTIS | UART010_IIR_RIS))
  247. #ifdef SUPPORT_SYSRQ
  248. pl010_rx_chars(port, regs);
  249. #else
  250. pl010_rx_chars(port);
  251. #endif
  252. if (status & UART010_IIR_MIS)
  253. pl010_modem_status(port);
  254. if (status & UART010_IIR_TIS)
  255. pl010_tx_chars(port);
  256. if (pass_counter-- == 0)
  257. break;
  258. status = UART_GET_INT_STATUS(port);
  259. } while (status & (UART010_IIR_RTIS | UART010_IIR_RIS |
  260. UART010_IIR_TIS));
  261. handled = 1;
  262. }
  263. spin_unlock(&port->lock);
  264. return IRQ_RETVAL(handled);
  265. }
  266. static unsigned int pl010_tx_empty(struct uart_port *port)
  267. {
  268. return UART_GET_FR(port) & UART01x_FR_BUSY ? 0 : TIOCSER_TEMT;
  269. }
  270. static unsigned int pl010_get_mctrl(struct uart_port *port)
  271. {
  272. unsigned int result = 0;
  273. unsigned int status;
  274. status = UART_GET_FR(port);
  275. if (status & UART01x_FR_DCD)
  276. result |= TIOCM_CAR;
  277. if (status & UART01x_FR_DSR)
  278. result |= TIOCM_DSR;
  279. if (status & UART01x_FR_CTS)
  280. result |= TIOCM_CTS;
  281. return result;
  282. }
  283. static void pl010_set_mctrl(struct uart_port *port, unsigned int mctrl)
  284. {
  285. struct uart_amba_port *uap = (struct uart_amba_port *)port;
  286. unsigned int ctrls = 0, ctrlc = 0;
  287. if (mctrl & TIOCM_RTS)
  288. ctrlc |= uap->rts_mask;
  289. else
  290. ctrls |= uap->rts_mask;
  291. if (mctrl & TIOCM_DTR)
  292. ctrlc |= uap->dtr_mask;
  293. else
  294. ctrls |= uap->dtr_mask;
  295. __raw_writel(ctrls, SC_CTRLS);
  296. __raw_writel(ctrlc, SC_CTRLC);
  297. }
  298. static void pl010_break_ctl(struct uart_port *port, int break_state)
  299. {
  300. unsigned long flags;
  301. unsigned int lcr_h;
  302. spin_lock_irqsave(&port->lock, flags);
  303. lcr_h = UART_GET_LCRH(port);
  304. if (break_state == -1)
  305. lcr_h |= UART01x_LCRH_BRK;
  306. else
  307. lcr_h &= ~UART01x_LCRH_BRK;
  308. UART_PUT_LCRH(port, lcr_h);
  309. spin_unlock_irqrestore(&port->lock, flags);
  310. }
  311. static int pl010_startup(struct uart_port *port)
  312. {
  313. struct uart_amba_port *uap = (struct uart_amba_port *)port;
  314. int retval;
  315. /*
  316. * Allocate the IRQ
  317. */
  318. retval = request_irq(port->irq, pl010_int, 0, "uart-pl010", port);
  319. if (retval)
  320. return retval;
  321. /*
  322. * initialise the old status of the modem signals
  323. */
  324. uap->old_status = UART_GET_FR(port) & UART01x_FR_MODEM_ANY;
  325. /*
  326. * Finally, enable interrupts
  327. */
  328. UART_PUT_CR(port, UART01x_CR_UARTEN | UART010_CR_RIE |
  329. UART010_CR_RTIE);
  330. return 0;
  331. }
  332. static void pl010_shutdown(struct uart_port *port)
  333. {
  334. /*
  335. * Free the interrupt
  336. */
  337. free_irq(port->irq, port);
  338. /*
  339. * disable all interrupts, disable the port
  340. */
  341. UART_PUT_CR(port, 0);
  342. /* disable break condition and fifos */
  343. UART_PUT_LCRH(port, UART_GET_LCRH(port) &
  344. ~(UART01x_LCRH_BRK | UART01x_LCRH_FEN));
  345. }
  346. static void
  347. pl010_set_termios(struct uart_port *port, struct termios *termios,
  348. struct termios *old)
  349. {
  350. unsigned int lcr_h, old_cr;
  351. unsigned long flags;
  352. unsigned int baud, quot;
  353. /*
  354. * Ask the core to calculate the divisor for us.
  355. */
  356. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  357. quot = uart_get_divisor(port, baud);
  358. switch (termios->c_cflag & CSIZE) {
  359. case CS5:
  360. lcr_h = UART01x_LCRH_WLEN_5;
  361. break;
  362. case CS6:
  363. lcr_h = UART01x_LCRH_WLEN_6;
  364. break;
  365. case CS7:
  366. lcr_h = UART01x_LCRH_WLEN_7;
  367. break;
  368. default: // CS8
  369. lcr_h = UART01x_LCRH_WLEN_8;
  370. break;
  371. }
  372. if (termios->c_cflag & CSTOPB)
  373. lcr_h |= UART01x_LCRH_STP2;
  374. if (termios->c_cflag & PARENB) {
  375. lcr_h |= UART01x_LCRH_PEN;
  376. if (!(termios->c_cflag & PARODD))
  377. lcr_h |= UART01x_LCRH_EPS;
  378. }
  379. if (port->fifosize > 1)
  380. lcr_h |= UART01x_LCRH_FEN;
  381. spin_lock_irqsave(&port->lock, flags);
  382. /*
  383. * Update the per-port timeout.
  384. */
  385. uart_update_timeout(port, termios->c_cflag, baud);
  386. port->read_status_mask = UART01x_RSR_OE;
  387. if (termios->c_iflag & INPCK)
  388. port->read_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE;
  389. if (termios->c_iflag & (BRKINT | PARMRK))
  390. port->read_status_mask |= UART01x_RSR_BE;
  391. /*
  392. * Characters to ignore
  393. */
  394. port->ignore_status_mask = 0;
  395. if (termios->c_iflag & IGNPAR)
  396. port->ignore_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE;
  397. if (termios->c_iflag & IGNBRK) {
  398. port->ignore_status_mask |= UART01x_RSR_BE;
  399. /*
  400. * If we're ignoring parity and break indicators,
  401. * ignore overruns too (for real raw support).
  402. */
  403. if (termios->c_iflag & IGNPAR)
  404. port->ignore_status_mask |= UART01x_RSR_OE;
  405. }
  406. /*
  407. * Ignore all characters if CREAD is not set.
  408. */
  409. if ((termios->c_cflag & CREAD) == 0)
  410. port->ignore_status_mask |= UART_DUMMY_RSR_RX;
  411. /* first, disable everything */
  412. old_cr = UART_GET_CR(port) & ~UART010_CR_MSIE;
  413. if (UART_ENABLE_MS(port, termios->c_cflag))
  414. old_cr |= UART010_CR_MSIE;
  415. UART_PUT_CR(port, 0);
  416. /* Set baud rate */
  417. quot -= 1;
  418. UART_PUT_LCRM(port, ((quot & 0xf00) >> 8));
  419. UART_PUT_LCRL(port, (quot & 0xff));
  420. /*
  421. * ----------v----------v----------v----------v-----
  422. * NOTE: MUST BE WRITTEN AFTER UARTLCR_M & UARTLCR_L
  423. * ----------^----------^----------^----------^-----
  424. */
  425. UART_PUT_LCRH(port, lcr_h);
  426. UART_PUT_CR(port, old_cr);
  427. spin_unlock_irqrestore(&port->lock, flags);
  428. }
  429. static const char *pl010_type(struct uart_port *port)
  430. {
  431. return port->type == PORT_AMBA ? "AMBA" : NULL;
  432. }
  433. /*
  434. * Release the memory region(s) being used by 'port'
  435. */
  436. static void pl010_release_port(struct uart_port *port)
  437. {
  438. release_mem_region(port->mapbase, UART_PORT_SIZE);
  439. }
  440. /*
  441. * Request the memory region(s) being used by 'port'
  442. */
  443. static int pl010_request_port(struct uart_port *port)
  444. {
  445. return request_mem_region(port->mapbase, UART_PORT_SIZE, "uart-pl010")
  446. != NULL ? 0 : -EBUSY;
  447. }
  448. /*
  449. * Configure/autoconfigure the port.
  450. */
  451. static void pl010_config_port(struct uart_port *port, int flags)
  452. {
  453. if (flags & UART_CONFIG_TYPE) {
  454. port->type = PORT_AMBA;
  455. pl010_request_port(port);
  456. }
  457. }
  458. /*
  459. * verify the new serial_struct (for TIOCSSERIAL).
  460. */
  461. static int pl010_verify_port(struct uart_port *port, struct serial_struct *ser)
  462. {
  463. int ret = 0;
  464. if (ser->type != PORT_UNKNOWN && ser->type != PORT_AMBA)
  465. ret = -EINVAL;
  466. if (ser->irq < 0 || ser->irq >= NR_IRQS)
  467. ret = -EINVAL;
  468. if (ser->baud_base < 9600)
  469. ret = -EINVAL;
  470. return ret;
  471. }
  472. static struct uart_ops amba_pl010_pops = {
  473. .tx_empty = pl010_tx_empty,
  474. .set_mctrl = pl010_set_mctrl,
  475. .get_mctrl = pl010_get_mctrl,
  476. .stop_tx = pl010_stop_tx,
  477. .start_tx = pl010_start_tx,
  478. .stop_rx = pl010_stop_rx,
  479. .enable_ms = pl010_enable_ms,
  480. .break_ctl = pl010_break_ctl,
  481. .startup = pl010_startup,
  482. .shutdown = pl010_shutdown,
  483. .set_termios = pl010_set_termios,
  484. .type = pl010_type,
  485. .release_port = pl010_release_port,
  486. .request_port = pl010_request_port,
  487. .config_port = pl010_config_port,
  488. .verify_port = pl010_verify_port,
  489. };
  490. static struct uart_amba_port amba_ports[UART_NR] = {
  491. {
  492. .port = {
  493. .membase = (void *)IO_ADDRESS(INTEGRATOR_UART0_BASE),
  494. .mapbase = INTEGRATOR_UART0_BASE,
  495. .iotype = SERIAL_IO_MEM,
  496. .irq = IRQ_UARTINT0,
  497. .uartclk = 14745600,
  498. .fifosize = 16,
  499. .ops = &amba_pl010_pops,
  500. .flags = ASYNC_BOOT_AUTOCONF,
  501. .line = 0,
  502. },
  503. .dtr_mask = 1 << 5,
  504. .rts_mask = 1 << 4,
  505. },
  506. {
  507. .port = {
  508. .membase = (void *)IO_ADDRESS(INTEGRATOR_UART1_BASE),
  509. .mapbase = INTEGRATOR_UART1_BASE,
  510. .iotype = SERIAL_IO_MEM,
  511. .irq = IRQ_UARTINT1,
  512. .uartclk = 14745600,
  513. .fifosize = 16,
  514. .ops = &amba_pl010_pops,
  515. .flags = ASYNC_BOOT_AUTOCONF,
  516. .line = 1,
  517. },
  518. .dtr_mask = 1 << 7,
  519. .rts_mask = 1 << 6,
  520. }
  521. };
  522. #ifdef CONFIG_SERIAL_AMBA_PL010_CONSOLE
  523. static void
  524. pl010_console_write(struct console *co, const char *s, unsigned int count)
  525. {
  526. struct uart_port *port = &amba_ports[co->index].port;
  527. unsigned int status, old_cr;
  528. int i;
  529. /*
  530. * First save the CR then disable the interrupts
  531. */
  532. old_cr = UART_GET_CR(port);
  533. UART_PUT_CR(port, UART01x_CR_UARTEN);
  534. /*
  535. * Now, do each character
  536. */
  537. for (i = 0; i < count; i++) {
  538. do {
  539. status = UART_GET_FR(port);
  540. } while (!UART_TX_READY(status));
  541. UART_PUT_CHAR(port, s[i]);
  542. if (s[i] == '\n') {
  543. do {
  544. status = UART_GET_FR(port);
  545. } while (!UART_TX_READY(status));
  546. UART_PUT_CHAR(port, '\r');
  547. }
  548. }
  549. /*
  550. * Finally, wait for transmitter to become empty
  551. * and restore the TCR
  552. */
  553. do {
  554. status = UART_GET_FR(port);
  555. } while (status & UART01x_FR_BUSY);
  556. UART_PUT_CR(port, old_cr);
  557. }
  558. static void __init
  559. pl010_console_get_options(struct uart_port *port, int *baud,
  560. int *parity, int *bits)
  561. {
  562. if (UART_GET_CR(port) & UART01x_CR_UARTEN) {
  563. unsigned int lcr_h, quot;
  564. lcr_h = UART_GET_LCRH(port);
  565. *parity = 'n';
  566. if (lcr_h & UART01x_LCRH_PEN) {
  567. if (lcr_h & UART01x_LCRH_EPS)
  568. *parity = 'e';
  569. else
  570. *parity = 'o';
  571. }
  572. if ((lcr_h & 0x60) == UART01x_LCRH_WLEN_7)
  573. *bits = 7;
  574. else
  575. *bits = 8;
  576. quot = UART_GET_LCRL(port) | UART_GET_LCRM(port) << 8;
  577. *baud = port->uartclk / (16 * (quot + 1));
  578. }
  579. }
  580. static int __init pl010_console_setup(struct console *co, char *options)
  581. {
  582. struct uart_port *port;
  583. int baud = 38400;
  584. int bits = 8;
  585. int parity = 'n';
  586. int flow = 'n';
  587. /*
  588. * Check whether an invalid uart number has been specified, and
  589. * if so, search for the first available port that does have
  590. * console support.
  591. */
  592. if (co->index >= UART_NR)
  593. co->index = 0;
  594. port = &amba_ports[co->index].port;
  595. if (options)
  596. uart_parse_options(options, &baud, &parity, &bits, &flow);
  597. else
  598. pl010_console_get_options(port, &baud, &parity, &bits);
  599. return uart_set_options(port, co, baud, parity, bits, flow);
  600. }
  601. extern struct uart_driver amba_reg;
  602. static struct console amba_console = {
  603. .name = "ttyAM",
  604. .write = pl010_console_write,
  605. .device = uart_console_device,
  606. .setup = pl010_console_setup,
  607. .flags = CON_PRINTBUFFER,
  608. .index = -1,
  609. .data = &amba_reg,
  610. };
  611. static int __init amba_console_init(void)
  612. {
  613. /*
  614. * All port initializations are done statically
  615. */
  616. register_console(&amba_console);
  617. return 0;
  618. }
  619. console_initcall(amba_console_init);
  620. static int __init amba_late_console_init(void)
  621. {
  622. if (!(amba_console.flags & CON_ENABLED))
  623. register_console(&amba_console);
  624. return 0;
  625. }
  626. late_initcall(amba_late_console_init);
  627. #define AMBA_CONSOLE &amba_console
  628. #else
  629. #define AMBA_CONSOLE NULL
  630. #endif
  631. static struct uart_driver amba_reg = {
  632. .owner = THIS_MODULE,
  633. .driver_name = "ttyAM",
  634. .dev_name = "ttyAM",
  635. .major = SERIAL_AMBA_MAJOR,
  636. .minor = SERIAL_AMBA_MINOR,
  637. .nr = UART_NR,
  638. .cons = AMBA_CONSOLE,
  639. };
  640. static int pl010_probe(struct amba_device *dev, void *id)
  641. {
  642. int i;
  643. for (i = 0; i < UART_NR; i++) {
  644. if (amba_ports[i].port.mapbase != dev->res.start)
  645. continue;
  646. amba_ports[i].port.dev = &dev->dev;
  647. uart_add_one_port(&amba_reg, &amba_ports[i].port);
  648. amba_set_drvdata(dev, &amba_ports[i]);
  649. break;
  650. }
  651. return 0;
  652. }
  653. static int pl010_remove(struct amba_device *dev)
  654. {
  655. struct uart_amba_port *uap = amba_get_drvdata(dev);
  656. if (uap)
  657. uart_remove_one_port(&amba_reg, &uap->port);
  658. amba_set_drvdata(dev, NULL);
  659. return 0;
  660. }
  661. static int pl010_suspend(struct amba_device *dev, pm_message_t state)
  662. {
  663. struct uart_amba_port *uap = amba_get_drvdata(dev);
  664. if (uap)
  665. uart_suspend_port(&amba_reg, &uap->port);
  666. return 0;
  667. }
  668. static int pl010_resume(struct amba_device *dev)
  669. {
  670. struct uart_amba_port *uap = amba_get_drvdata(dev);
  671. if (uap)
  672. uart_resume_port(&amba_reg, &uap->port);
  673. return 0;
  674. }
  675. static struct amba_id pl010_ids[] __initdata = {
  676. {
  677. .id = 0x00041010,
  678. .mask = 0x000fffff,
  679. },
  680. { 0, 0 },
  681. };
  682. static struct amba_driver pl010_driver = {
  683. .drv = {
  684. .name = "uart-pl010",
  685. },
  686. .id_table = pl010_ids,
  687. .probe = pl010_probe,
  688. .remove = pl010_remove,
  689. .suspend = pl010_suspend,
  690. .resume = pl010_resume,
  691. };
  692. static int __init pl010_init(void)
  693. {
  694. int ret;
  695. printk(KERN_INFO "Serial: AMBA driver $Revision: 1.41 $\n");
  696. ret = uart_register_driver(&amba_reg);
  697. if (ret == 0) {
  698. ret = amba_driver_register(&pl010_driver);
  699. if (ret)
  700. uart_unregister_driver(&amba_reg);
  701. }
  702. return ret;
  703. }
  704. static void __exit pl010_exit(void)
  705. {
  706. amba_driver_unregister(&pl010_driver);
  707. uart_unregister_driver(&amba_reg);
  708. }
  709. module_init(pl010_init);
  710. module_exit(pl010_exit);
  711. MODULE_AUTHOR("ARM Ltd/Deep Blue Solutions Ltd");
  712. MODULE_DESCRIPTION("ARM AMBA serial port driver $Revision: 1.41 $");
  713. MODULE_LICENSE("GPL");