viper.c 22 KB

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  1. /*
  2. * linux/arch/arm/mach-pxa/viper.c
  3. *
  4. * Support for the Arcom VIPER SBC.
  5. *
  6. * Author: Ian Campbell
  7. * Created: Feb 03, 2003
  8. * Copyright: Arcom Control Systems
  9. *
  10. * Maintained by Marc Zyngier <maz@misterjones.org>
  11. * <marc.zyngier@altran.com>
  12. *
  13. * Based on lubbock.c:
  14. * Author: Nicolas Pitre
  15. * Created: Jun 15, 2001
  16. * Copyright: MontaVista Software Inc.
  17. *
  18. * This program is free software; you can redistribute it and/or modify
  19. * it under the terms of the GNU General Public License version 2 as
  20. * published by the Free Software Foundation.
  21. */
  22. #include <linux/types.h>
  23. #include <linux/memory.h>
  24. #include <linux/cpu.h>
  25. #include <linux/cpufreq.h>
  26. #include <linux/delay.h>
  27. #include <linux/fs.h>
  28. #include <linux/init.h>
  29. #include <linux/interrupt.h>
  30. #include <linux/major.h>
  31. #include <linux/module.h>
  32. #include <linux/pm.h>
  33. #include <linux/sched.h>
  34. #include <linux/gpio.h>
  35. #include <linux/i2c-gpio.h>
  36. #include <linux/serial_8250.h>
  37. #include <linux/smc91x.h>
  38. #include <linux/pwm_backlight.h>
  39. #include <linux/usb/isp116x.h>
  40. #include <linux/mtd/mtd.h>
  41. #include <linux/mtd/partitions.h>
  42. #include <linux/mtd/physmap.h>
  43. #include <mach/pxa25x.h>
  44. #include <mach/audio.h>
  45. #include <mach/pxafb.h>
  46. #include <plat/i2c.h>
  47. #include <mach/regs-uart.h>
  48. #include <mach/viper.h>
  49. #include <asm/setup.h>
  50. #include <asm/mach-types.h>
  51. #include <asm/irq.h>
  52. #include <asm/sizes.h>
  53. #include <asm/mach/arch.h>
  54. #include <asm/mach/map.h>
  55. #include <asm/mach/irq.h>
  56. #include "generic.h"
  57. #include "devices.h"
  58. static unsigned int icr;
  59. static void viper_icr_set_bit(unsigned int bit)
  60. {
  61. icr |= bit;
  62. VIPER_ICR = icr;
  63. }
  64. static void viper_icr_clear_bit(unsigned int bit)
  65. {
  66. icr &= ~bit;
  67. VIPER_ICR = icr;
  68. }
  69. /* This function is used from the pcmcia module to reset the CF */
  70. void viper_cf_rst(int state)
  71. {
  72. if (state)
  73. viper_icr_set_bit(VIPER_ICR_CF_RST);
  74. else
  75. viper_icr_clear_bit(VIPER_ICR_CF_RST);
  76. }
  77. EXPORT_SYMBOL(viper_cf_rst);
  78. /*
  79. * The CPLD version register was not present on VIPER boards prior to
  80. * v2i1. On v1 boards where the version register is not present we
  81. * will just read back the previous value from the databus.
  82. *
  83. * Therefore we do two reads. The first time we write 0 to the
  84. * (read-only) register before reading and the second time we write
  85. * 0xff first. If the two reads do not match or they read back as 0xff
  86. * or 0x00 then we have version 1 hardware.
  87. */
  88. static u8 viper_hw_version(void)
  89. {
  90. u8 v1, v2;
  91. unsigned long flags;
  92. local_irq_save(flags);
  93. VIPER_VERSION = 0;
  94. v1 = VIPER_VERSION;
  95. VIPER_VERSION = 0xff;
  96. v2 = VIPER_VERSION;
  97. v1 = (v1 != v2 || v1 == 0xff) ? 0 : v1;
  98. local_irq_restore(flags);
  99. return v1;
  100. }
  101. /* CPU sysdev */
  102. static int viper_cpu_suspend(struct sys_device *sysdev, pm_message_t state)
  103. {
  104. viper_icr_set_bit(VIPER_ICR_R_DIS);
  105. return 0;
  106. }
  107. static int viper_cpu_resume(struct sys_device *sysdev)
  108. {
  109. viper_icr_clear_bit(VIPER_ICR_R_DIS);
  110. return 0;
  111. }
  112. static struct sysdev_driver viper_cpu_sysdev_driver = {
  113. .suspend = viper_cpu_suspend,
  114. .resume = viper_cpu_resume,
  115. };
  116. static unsigned int current_voltage_divisor;
  117. /*
  118. * If force is not true then step from existing to new divisor. If
  119. * force is true then jump straight to the new divisor. Stepping is
  120. * used because if the jump in voltage is too large, the VCC can dip
  121. * too low and the regulator cuts out.
  122. *
  123. * force can be used to initialize the divisor to a know state by
  124. * setting the value for the current clock speed, since we are already
  125. * running at that speed we know the voltage should be pretty close so
  126. * the jump won't be too large
  127. */
  128. static void viper_set_core_cpu_voltage(unsigned long khz, int force)
  129. {
  130. int i = 0;
  131. unsigned int divisor = 0;
  132. const char *v;
  133. if (khz < 200000) {
  134. v = "1.0"; divisor = 0xfff;
  135. } else if (khz < 300000) {
  136. v = "1.1"; divisor = 0xde5;
  137. } else {
  138. v = "1.3"; divisor = 0x325;
  139. }
  140. pr_debug("viper: setting CPU core voltage to %sV at %d.%03dMHz\n",
  141. v, (int)khz / 1000, (int)khz % 1000);
  142. #define STEP 0x100
  143. do {
  144. int step;
  145. if (force)
  146. step = divisor;
  147. else if (current_voltage_divisor < divisor - STEP)
  148. step = current_voltage_divisor + STEP;
  149. else if (current_voltage_divisor > divisor + STEP)
  150. step = current_voltage_divisor - STEP;
  151. else
  152. step = divisor;
  153. force = 0;
  154. gpio_set_value(VIPER_PSU_CLK_GPIO, 0);
  155. gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0);
  156. for (i = 1 << 11 ; i > 0 ; i >>= 1) {
  157. udelay(1);
  158. gpio_set_value(VIPER_PSU_DATA_GPIO, step & i);
  159. udelay(1);
  160. gpio_set_value(VIPER_PSU_CLK_GPIO, 1);
  161. udelay(1);
  162. gpio_set_value(VIPER_PSU_CLK_GPIO, 0);
  163. }
  164. udelay(1);
  165. gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 1);
  166. udelay(1);
  167. gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0);
  168. current_voltage_divisor = step;
  169. } while (current_voltage_divisor != divisor);
  170. }
  171. /* Interrupt handling */
  172. static unsigned long viper_irq_enabled_mask;
  173. static const int viper_isa_irqs[] = { 3, 4, 5, 6, 7, 10, 11, 12, 9, 14, 15 };
  174. static const int viper_isa_irq_map[] = {
  175. 0, /* ISA irq #0, invalid */
  176. 0, /* ISA irq #1, invalid */
  177. 0, /* ISA irq #2, invalid */
  178. 1 << 0, /* ISA irq #3 */
  179. 1 << 1, /* ISA irq #4 */
  180. 1 << 2, /* ISA irq #5 */
  181. 1 << 3, /* ISA irq #6 */
  182. 1 << 4, /* ISA irq #7 */
  183. 0, /* ISA irq #8, invalid */
  184. 1 << 8, /* ISA irq #9 */
  185. 1 << 5, /* ISA irq #10 */
  186. 1 << 6, /* ISA irq #11 */
  187. 1 << 7, /* ISA irq #12 */
  188. 0, /* ISA irq #13, invalid */
  189. 1 << 9, /* ISA irq #14 */
  190. 1 << 10, /* ISA irq #15 */
  191. };
  192. static inline int viper_irq_to_bitmask(unsigned int irq)
  193. {
  194. return viper_isa_irq_map[irq - PXA_ISA_IRQ(0)];
  195. }
  196. static inline int viper_bit_to_irq(int bit)
  197. {
  198. return viper_isa_irqs[bit] + PXA_ISA_IRQ(0);
  199. }
  200. static void viper_ack_irq(unsigned int irq)
  201. {
  202. int viper_irq = viper_irq_to_bitmask(irq);
  203. if (viper_irq & 0xff)
  204. VIPER_LO_IRQ_STATUS = viper_irq;
  205. else
  206. VIPER_HI_IRQ_STATUS = (viper_irq >> 8);
  207. }
  208. static void viper_mask_irq(unsigned int irq)
  209. {
  210. viper_irq_enabled_mask &= ~(viper_irq_to_bitmask(irq));
  211. }
  212. static void viper_unmask_irq(unsigned int irq)
  213. {
  214. viper_irq_enabled_mask |= viper_irq_to_bitmask(irq);
  215. }
  216. static inline unsigned long viper_irq_pending(void)
  217. {
  218. return (VIPER_HI_IRQ_STATUS << 8 | VIPER_LO_IRQ_STATUS) &
  219. viper_irq_enabled_mask;
  220. }
  221. static void viper_irq_handler(unsigned int irq, struct irq_desc *desc)
  222. {
  223. unsigned long pending;
  224. pending = viper_irq_pending();
  225. do {
  226. /* we're in a chained irq handler,
  227. * so ack the interrupt by hand */
  228. GEDR(VIPER_CPLD_GPIO) = GPIO_bit(VIPER_CPLD_GPIO);
  229. if (likely(pending)) {
  230. irq = viper_bit_to_irq(__ffs(pending));
  231. generic_handle_irq(irq);
  232. }
  233. pending = viper_irq_pending();
  234. } while (pending);
  235. }
  236. static struct irq_chip viper_irq_chip = {
  237. .name = "ISA",
  238. .ack = viper_ack_irq,
  239. .mask = viper_mask_irq,
  240. .unmask = viper_unmask_irq
  241. };
  242. static void __init viper_init_irq(void)
  243. {
  244. int level;
  245. int isa_irq;
  246. pxa25x_init_irq();
  247. /* setup ISA IRQs */
  248. for (level = 0; level < ARRAY_SIZE(viper_isa_irqs); level++) {
  249. isa_irq = viper_bit_to_irq(level);
  250. set_irq_chip(isa_irq, &viper_irq_chip);
  251. set_irq_handler(isa_irq, handle_edge_irq);
  252. set_irq_flags(isa_irq, IRQF_VALID | IRQF_PROBE);
  253. }
  254. set_irq_chained_handler(gpio_to_irq(VIPER_CPLD_GPIO),
  255. viper_irq_handler);
  256. set_irq_type(gpio_to_irq(VIPER_CPLD_GPIO), IRQ_TYPE_EDGE_BOTH);
  257. }
  258. /* Flat Panel */
  259. static struct pxafb_mode_info fb_mode_info[] = {
  260. {
  261. .pixclock = 157500,
  262. .xres = 320,
  263. .yres = 240,
  264. .bpp = 16,
  265. .hsync_len = 63,
  266. .left_margin = 7,
  267. .right_margin = 13,
  268. .vsync_len = 20,
  269. .upper_margin = 0,
  270. .lower_margin = 0,
  271. .sync = 0,
  272. },
  273. };
  274. static struct pxafb_mach_info fb_info = {
  275. .modes = fb_mode_info,
  276. .num_modes = 1,
  277. .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
  278. };
  279. static int viper_backlight_init(struct device *dev)
  280. {
  281. int ret;
  282. /* GPIO9 and 10 control FB backlight. Initialise to off */
  283. ret = gpio_request(VIPER_BCKLIGHT_EN_GPIO, "Backlight");
  284. if (ret)
  285. goto err_request_bckl;
  286. ret = gpio_request(VIPER_LCD_EN_GPIO, "LCD");
  287. if (ret)
  288. goto err_request_lcd;
  289. ret = gpio_direction_output(VIPER_BCKLIGHT_EN_GPIO, 0);
  290. if (ret)
  291. goto err_dir;
  292. ret = gpio_direction_output(VIPER_LCD_EN_GPIO, 0);
  293. if (ret)
  294. goto err_dir;
  295. return 0;
  296. err_dir:
  297. gpio_free(VIPER_LCD_EN_GPIO);
  298. err_request_lcd:
  299. gpio_free(VIPER_BCKLIGHT_EN_GPIO);
  300. err_request_bckl:
  301. dev_err(dev, "Failed to setup LCD GPIOs\n");
  302. return ret;
  303. }
  304. static int viper_backlight_notify(int brightness)
  305. {
  306. gpio_set_value(VIPER_LCD_EN_GPIO, !!brightness);
  307. gpio_set_value(VIPER_BCKLIGHT_EN_GPIO, !!brightness);
  308. return brightness;
  309. }
  310. static void viper_backlight_exit(struct device *dev)
  311. {
  312. gpio_free(VIPER_LCD_EN_GPIO);
  313. gpio_free(VIPER_BCKLIGHT_EN_GPIO);
  314. }
  315. static struct platform_pwm_backlight_data viper_backlight_data = {
  316. .pwm_id = 0,
  317. .max_brightness = 100,
  318. .dft_brightness = 100,
  319. .pwm_period_ns = 1000000,
  320. .init = viper_backlight_init,
  321. .notify = viper_backlight_notify,
  322. .exit = viper_backlight_exit,
  323. };
  324. static struct platform_device viper_backlight_device = {
  325. .name = "pwm-backlight",
  326. .dev = {
  327. .parent = &pxa25x_device_pwm0.dev,
  328. .platform_data = &viper_backlight_data,
  329. },
  330. };
  331. /* Ethernet */
  332. static struct resource smc91x_resources[] = {
  333. [0] = {
  334. .name = "smc91x-regs",
  335. .start = VIPER_ETH_PHYS + 0x300,
  336. .end = VIPER_ETH_PHYS + 0x30f,
  337. .flags = IORESOURCE_MEM,
  338. },
  339. [1] = {
  340. .start = gpio_to_irq(VIPER_ETH_GPIO),
  341. .end = gpio_to_irq(VIPER_ETH_GPIO),
  342. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
  343. },
  344. [2] = {
  345. .name = "smc91x-data32",
  346. .start = VIPER_ETH_DATA_PHYS,
  347. .end = VIPER_ETH_DATA_PHYS + 3,
  348. .flags = IORESOURCE_MEM,
  349. },
  350. };
  351. static struct smc91x_platdata viper_smc91x_info = {
  352. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  353. .leda = RPC_LED_100_10,
  354. .ledb = RPC_LED_TX_RX,
  355. };
  356. static struct platform_device smc91x_device = {
  357. .name = "smc91x",
  358. .id = -1,
  359. .num_resources = ARRAY_SIZE(smc91x_resources),
  360. .resource = smc91x_resources,
  361. .dev = {
  362. .platform_data = &viper_smc91x_info,
  363. },
  364. };
  365. /* i2c */
  366. static struct i2c_gpio_platform_data i2c_bus_data = {
  367. .sda_pin = VIPER_RTC_I2C_SDA_GPIO,
  368. .scl_pin = VIPER_RTC_I2C_SCL_GPIO,
  369. .udelay = 10,
  370. .timeout = 100,
  371. };
  372. static struct platform_device i2c_bus_device = {
  373. .name = "i2c-gpio",
  374. .id = 1, /* pxa2xx-i2c is bus 0, so start at 1 */
  375. .dev = {
  376. .platform_data = &i2c_bus_data,
  377. }
  378. };
  379. static struct i2c_board_info __initdata viper_i2c_devices[] = {
  380. {
  381. I2C_BOARD_INFO("ds1338", 0x68),
  382. },
  383. };
  384. /*
  385. * Serial configuration:
  386. * You can either have the standard PXA ports driven by the PXA driver,
  387. * or all the ports (PXA + 16850) driven by the 8250 driver.
  388. * Choose your poison.
  389. */
  390. static struct resource viper_serial_resources[] = {
  391. #ifndef CONFIG_SERIAL_PXA
  392. {
  393. .start = 0x40100000,
  394. .end = 0x4010001f,
  395. .flags = IORESOURCE_MEM,
  396. },
  397. {
  398. .start = 0x40200000,
  399. .end = 0x4020001f,
  400. .flags = IORESOURCE_MEM,
  401. },
  402. {
  403. .start = 0x40700000,
  404. .end = 0x4070001f,
  405. .flags = IORESOURCE_MEM,
  406. },
  407. {
  408. .start = VIPER_UARTA_PHYS,
  409. .end = VIPER_UARTA_PHYS + 0xf,
  410. .flags = IORESOURCE_MEM,
  411. },
  412. {
  413. .start = VIPER_UARTB_PHYS,
  414. .end = VIPER_UARTB_PHYS + 0xf,
  415. .flags = IORESOURCE_MEM,
  416. },
  417. #else
  418. {
  419. 0,
  420. },
  421. #endif
  422. };
  423. static struct plat_serial8250_port serial_platform_data[] = {
  424. #ifndef CONFIG_SERIAL_PXA
  425. /* Internal UARTs */
  426. {
  427. .membase = (void *)&FFUART,
  428. .mapbase = __PREG(FFUART),
  429. .irq = IRQ_FFUART,
  430. .uartclk = 921600 * 16,
  431. .regshift = 2,
  432. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
  433. .iotype = UPIO_MEM,
  434. },
  435. {
  436. .membase = (void *)&BTUART,
  437. .mapbase = __PREG(BTUART),
  438. .irq = IRQ_BTUART,
  439. .uartclk = 921600 * 16,
  440. .regshift = 2,
  441. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
  442. .iotype = UPIO_MEM,
  443. },
  444. {
  445. .membase = (void *)&STUART,
  446. .mapbase = __PREG(STUART),
  447. .irq = IRQ_STUART,
  448. .uartclk = 921600 * 16,
  449. .regshift = 2,
  450. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
  451. .iotype = UPIO_MEM,
  452. },
  453. /* External UARTs */
  454. {
  455. .mapbase = VIPER_UARTA_PHYS,
  456. .irq = gpio_to_irq(VIPER_UARTA_GPIO),
  457. .irqflags = IRQF_TRIGGER_RISING,
  458. .uartclk = 1843200,
  459. .regshift = 1,
  460. .iotype = UPIO_MEM,
  461. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP |
  462. UPF_SKIP_TEST,
  463. },
  464. {
  465. .mapbase = VIPER_UARTB_PHYS,
  466. .irq = gpio_to_irq(VIPER_UARTB_GPIO),
  467. .irqflags = IRQF_TRIGGER_RISING,
  468. .uartclk = 1843200,
  469. .regshift = 1,
  470. .iotype = UPIO_MEM,
  471. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP |
  472. UPF_SKIP_TEST,
  473. },
  474. #endif
  475. { },
  476. };
  477. static struct platform_device serial_device = {
  478. .name = "serial8250",
  479. .id = 0,
  480. .dev = {
  481. .platform_data = serial_platform_data,
  482. },
  483. .num_resources = ARRAY_SIZE(viper_serial_resources),
  484. .resource = viper_serial_resources,
  485. };
  486. /* USB */
  487. static void isp116x_delay(struct device *dev, int delay)
  488. {
  489. ndelay(delay);
  490. }
  491. static struct resource isp116x_resources[] = {
  492. [0] = { /* DATA */
  493. .start = VIPER_USB_PHYS + 0,
  494. .end = VIPER_USB_PHYS + 1,
  495. .flags = IORESOURCE_MEM,
  496. },
  497. [1] = { /* ADDR */
  498. .start = VIPER_USB_PHYS + 2,
  499. .end = VIPER_USB_PHYS + 3,
  500. .flags = IORESOURCE_MEM,
  501. },
  502. [2] = {
  503. .start = gpio_to_irq(VIPER_USB_GPIO),
  504. .end = gpio_to_irq(VIPER_USB_GPIO),
  505. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
  506. },
  507. };
  508. /* (DataBusWidth16|AnalogOCEnable|DREQOutputPolarity|DownstreamPort15KRSel ) */
  509. static struct isp116x_platform_data isp116x_platform_data = {
  510. /* Enable internal resistors on downstream ports */
  511. .sel15Kres = 1,
  512. /* On-chip overcurrent protection */
  513. .oc_enable = 1,
  514. /* INT output polarity */
  515. .int_act_high = 1,
  516. /* INT edge or level triggered */
  517. .int_edge_triggered = 0,
  518. /* WAKEUP pin connected - NOT SUPPORTED */
  519. /* .remote_wakeup_connected = 0, */
  520. /* Wakeup by devices on usb bus enabled */
  521. .remote_wakeup_enable = 0,
  522. .delay = isp116x_delay,
  523. };
  524. static struct platform_device isp116x_device = {
  525. .name = "isp116x-hcd",
  526. .id = -1,
  527. .num_resources = ARRAY_SIZE(isp116x_resources),
  528. .resource = isp116x_resources,
  529. .dev = {
  530. .platform_data = &isp116x_platform_data,
  531. },
  532. };
  533. /* MTD */
  534. static struct resource mtd_resources[] = {
  535. [0] = { /* RedBoot config + filesystem flash */
  536. .start = VIPER_FLASH_PHYS,
  537. .end = VIPER_FLASH_PHYS + SZ_32M - 1,
  538. .flags = IORESOURCE_MEM,
  539. },
  540. [1] = { /* Boot flash */
  541. .start = VIPER_BOOT_PHYS,
  542. .end = VIPER_BOOT_PHYS + SZ_1M - 1,
  543. .flags = IORESOURCE_MEM,
  544. },
  545. [2] = { /*
  546. * SRAM size is actually 256KB, 8bits, with a sparse mapping
  547. * (each byte is on a 16bit boundary).
  548. */
  549. .start = _VIPER_SRAM_BASE,
  550. .end = _VIPER_SRAM_BASE + SZ_512K - 1,
  551. .flags = IORESOURCE_MEM,
  552. },
  553. };
  554. static struct mtd_partition viper_boot_flash_partition = {
  555. .name = "RedBoot",
  556. .size = SZ_1M,
  557. .offset = 0,
  558. .mask_flags = MTD_WRITEABLE, /* force R/O */
  559. };
  560. static struct physmap_flash_data viper_flash_data[] = {
  561. [0] = {
  562. .width = 2,
  563. .parts = NULL,
  564. .nr_parts = 0,
  565. },
  566. [1] = {
  567. .width = 2,
  568. .parts = &viper_boot_flash_partition,
  569. .nr_parts = 1,
  570. },
  571. };
  572. static struct platform_device viper_mtd_devices[] = {
  573. [0] = {
  574. .name = "physmap-flash",
  575. .id = 0,
  576. .dev = {
  577. .platform_data = &viper_flash_data[0],
  578. },
  579. .resource = &mtd_resources[0],
  580. .num_resources = 1,
  581. },
  582. [1] = {
  583. .name = "physmap-flash",
  584. .id = 1,
  585. .dev = {
  586. .platform_data = &viper_flash_data[1],
  587. },
  588. .resource = &mtd_resources[1],
  589. .num_resources = 1,
  590. },
  591. };
  592. static struct platform_device *viper_devs[] __initdata = {
  593. &smc91x_device,
  594. &i2c_bus_device,
  595. &serial_device,
  596. &isp116x_device,
  597. &viper_mtd_devices[0],
  598. &viper_mtd_devices[1],
  599. &viper_backlight_device,
  600. };
  601. static mfp_cfg_t viper_pin_config[] __initdata = {
  602. /* Chip selects */
  603. GPIO15_nCS_1,
  604. GPIO78_nCS_2,
  605. GPIO79_nCS_3,
  606. GPIO80_nCS_4,
  607. GPIO33_nCS_5,
  608. /* FP Backlight */
  609. GPIO9_GPIO, /* VIPER_BCKLIGHT_EN_GPIO */
  610. GPIO10_GPIO, /* VIPER_LCD_EN_GPIO */
  611. GPIO16_PWM0_OUT,
  612. /* Ethernet PHY Ready */
  613. GPIO18_RDY,
  614. /* Serial shutdown */
  615. GPIO12_GPIO | MFP_LPM_DRIVE_HIGH, /* VIPER_UART_SHDN_GPIO */
  616. /* Compact-Flash / PC104 */
  617. GPIO48_nPOE,
  618. GPIO49_nPWE,
  619. GPIO50_nPIOR,
  620. GPIO51_nPIOW,
  621. GPIO52_nPCE_1,
  622. GPIO53_nPCE_2,
  623. GPIO54_nPSKTSEL,
  624. GPIO55_nPREG,
  625. GPIO56_nPWAIT,
  626. GPIO57_nIOIS16,
  627. GPIO8_GPIO, /* VIPER_CF_RDY_GPIO */
  628. GPIO32_GPIO, /* VIPER_CF_CD_GPIO */
  629. GPIO82_GPIO, /* VIPER_CF_POWER_GPIO */
  630. /* Integrated UPS control */
  631. GPIO20_GPIO, /* VIPER_UPS_GPIO */
  632. /* Vcc regulator control */
  633. GPIO6_GPIO, /* VIPER_PSU_DATA_GPIO */
  634. GPIO11_GPIO, /* VIPER_PSU_CLK_GPIO */
  635. GPIO19_GPIO, /* VIPER_PSU_nCS_LD_GPIO */
  636. /* i2c busses */
  637. GPIO26_GPIO, /* VIPER_TPM_I2C_SDA_GPIO */
  638. GPIO27_GPIO, /* VIPER_TPM_I2C_SCL_GPIO */
  639. GPIO83_GPIO, /* VIPER_RTC_I2C_SDA_GPIO */
  640. GPIO84_GPIO, /* VIPER_RTC_I2C_SCL_GPIO */
  641. /* PC/104 Interrupt */
  642. GPIO1_GPIO | WAKEUP_ON_EDGE_RISE, /* VIPER_CPLD_GPIO */
  643. };
  644. static unsigned long viper_tpm;
  645. static int __init viper_tpm_setup(char *str)
  646. {
  647. strict_strtoul(str, 10, &viper_tpm);
  648. return 1;
  649. }
  650. __setup("tpm=", viper_tpm_setup);
  651. static void __init viper_tpm_init(void)
  652. {
  653. struct platform_device *tpm_device;
  654. struct i2c_gpio_platform_data i2c_tpm_data = {
  655. .sda_pin = VIPER_TPM_I2C_SDA_GPIO,
  656. .scl_pin = VIPER_TPM_I2C_SCL_GPIO,
  657. .udelay = 10,
  658. .timeout = 100,
  659. };
  660. char *errstr;
  661. /* Allocate TPM i2c bus if requested */
  662. if (!viper_tpm)
  663. return;
  664. tpm_device = platform_device_alloc("i2c-gpio", 2);
  665. if (tpm_device) {
  666. if (!platform_device_add_data(tpm_device,
  667. &i2c_tpm_data,
  668. sizeof(i2c_tpm_data))) {
  669. if (platform_device_add(tpm_device)) {
  670. errstr = "register TPM i2c bus";
  671. goto error_free_tpm;
  672. }
  673. } else {
  674. errstr = "allocate TPM i2c bus data";
  675. goto error_free_tpm;
  676. }
  677. } else {
  678. errstr = "allocate TPM i2c device";
  679. goto error_tpm;
  680. }
  681. return;
  682. error_free_tpm:
  683. kfree(tpm_device);
  684. error_tpm:
  685. pr_err("viper: Couldn't %s, giving up\n", errstr);
  686. }
  687. static void __init viper_init_vcore_gpios(void)
  688. {
  689. if (gpio_request(VIPER_PSU_DATA_GPIO, "PSU data"))
  690. goto err_request_data;
  691. if (gpio_request(VIPER_PSU_CLK_GPIO, "PSU clock"))
  692. goto err_request_clk;
  693. if (gpio_request(VIPER_PSU_nCS_LD_GPIO, "PSU cs"))
  694. goto err_request_cs;
  695. if (gpio_direction_output(VIPER_PSU_DATA_GPIO, 0) ||
  696. gpio_direction_output(VIPER_PSU_CLK_GPIO, 0) ||
  697. gpio_direction_output(VIPER_PSU_nCS_LD_GPIO, 0))
  698. goto err_dir;
  699. /* c/should assume redboot set the correct level ??? */
  700. viper_set_core_cpu_voltage(get_clk_frequency_khz(0), 1);
  701. return;
  702. err_dir:
  703. gpio_free(VIPER_PSU_nCS_LD_GPIO);
  704. err_request_cs:
  705. gpio_free(VIPER_PSU_CLK_GPIO);
  706. err_request_clk:
  707. gpio_free(VIPER_PSU_DATA_GPIO);
  708. err_request_data:
  709. pr_err("viper: Failed to setup vcore control GPIOs\n");
  710. }
  711. static void __init viper_init_serial_gpio(void)
  712. {
  713. if (gpio_request(VIPER_UART_SHDN_GPIO, "UARTs shutdown"))
  714. goto err_request;
  715. if (gpio_direction_output(VIPER_UART_SHDN_GPIO, 0))
  716. goto err_dir;
  717. return;
  718. err_dir:
  719. gpio_free(VIPER_UART_SHDN_GPIO);
  720. err_request:
  721. pr_err("viper: Failed to setup UART shutdown GPIO\n");
  722. }
  723. #ifdef CONFIG_CPU_FREQ
  724. static int viper_cpufreq_notifier(struct notifier_block *nb,
  725. unsigned long val, void *data)
  726. {
  727. struct cpufreq_freqs *freq = data;
  728. /* TODO: Adjust timings??? */
  729. switch (val) {
  730. case CPUFREQ_PRECHANGE:
  731. if (freq->old < freq->new) {
  732. /* we are getting faster so raise the voltage
  733. * before we change freq */
  734. viper_set_core_cpu_voltage(freq->new, 0);
  735. }
  736. break;
  737. case CPUFREQ_POSTCHANGE:
  738. if (freq->old > freq->new) {
  739. /* we are slowing down so drop the power
  740. * after we change freq */
  741. viper_set_core_cpu_voltage(freq->new, 0);
  742. }
  743. break;
  744. case CPUFREQ_RESUMECHANGE:
  745. viper_set_core_cpu_voltage(freq->new, 0);
  746. break;
  747. default:
  748. /* ignore */
  749. break;
  750. }
  751. return 0;
  752. }
  753. static struct notifier_block viper_cpufreq_notifier_block = {
  754. .notifier_call = viper_cpufreq_notifier
  755. };
  756. static void __init viper_init_cpufreq(void)
  757. {
  758. if (cpufreq_register_notifier(&viper_cpufreq_notifier_block,
  759. CPUFREQ_TRANSITION_NOTIFIER))
  760. pr_err("viper: Failed to setup cpufreq notifier\n");
  761. }
  762. #else
  763. static inline void viper_init_cpufreq(void) {}
  764. #endif
  765. static void viper_power_off(void)
  766. {
  767. pr_notice("Shutting off UPS\n");
  768. gpio_set_value(VIPER_UPS_GPIO, 1);
  769. /* Spin to death... */
  770. while (1);
  771. }
  772. static void __init viper_init(void)
  773. {
  774. u8 version;
  775. pm_power_off = viper_power_off;
  776. pxa2xx_mfp_config(ARRAY_AND_SIZE(viper_pin_config));
  777. pxa_set_ffuart_info(NULL);
  778. pxa_set_btuart_info(NULL);
  779. pxa_set_stuart_info(NULL);
  780. /* Wake-up serial console */
  781. viper_init_serial_gpio();
  782. set_pxa_fb_info(&fb_info);
  783. /* v1 hardware cannot use the datacs line */
  784. version = viper_hw_version();
  785. if (version == 0)
  786. smc91x_device.num_resources--;
  787. pxa_set_i2c_info(NULL);
  788. platform_add_devices(viper_devs, ARRAY_SIZE(viper_devs));
  789. viper_init_vcore_gpios();
  790. viper_init_cpufreq();
  791. sysdev_driver_register(&cpu_sysdev_class, &viper_cpu_sysdev_driver);
  792. if (version) {
  793. pr_info("viper: hardware v%di%d detected. "
  794. "CPLD revision %d.\n",
  795. VIPER_BOARD_VERSION(version),
  796. VIPER_BOARD_ISSUE(version),
  797. VIPER_CPLD_REVISION(version));
  798. system_rev = (VIPER_BOARD_VERSION(version) << 8) |
  799. (VIPER_BOARD_ISSUE(version) << 4) |
  800. VIPER_CPLD_REVISION(version);
  801. } else {
  802. pr_info("viper: No version register.\n");
  803. }
  804. i2c_register_board_info(1, ARRAY_AND_SIZE(viper_i2c_devices));
  805. viper_tpm_init();
  806. pxa_set_ac97_info(NULL);
  807. }
  808. static struct map_desc viper_io_desc[] __initdata = {
  809. {
  810. .virtual = VIPER_CPLD_BASE,
  811. .pfn = __phys_to_pfn(VIPER_CPLD_PHYS),
  812. .length = 0x00300000,
  813. .type = MT_DEVICE,
  814. },
  815. {
  816. .virtual = VIPER_PC104IO_BASE,
  817. .pfn = __phys_to_pfn(0x30000000),
  818. .length = 0x00800000,
  819. .type = MT_DEVICE,
  820. },
  821. };
  822. static void __init viper_map_io(void)
  823. {
  824. pxa_map_io();
  825. iotable_init(viper_io_desc, ARRAY_SIZE(viper_io_desc));
  826. PCFR |= PCFR_OPDE;
  827. }
  828. MACHINE_START(VIPER, "Arcom/Eurotech VIPER SBC")
  829. /* Maintainer: Marc Zyngier <maz@misterjones.org> */
  830. .phys_io = 0x40000000,
  831. .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
  832. .boot_params = 0xa0000100,
  833. .map_io = viper_map_io,
  834. .init_irq = viper_init_irq,
  835. .timer = &pxa_timer,
  836. .init_machine = viper_init,
  837. MACHINE_END