devs.c 38 KB

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  1. /* linux/arch/arm/plat-samsung/devs.c
  2. *
  3. * Copyright (c) 2011 Samsung Electronics Co., Ltd.
  4. * http://www.samsung.com
  5. *
  6. * Base SAMSUNG platform device definitions
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/types.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/list.h>
  16. #include <linux/timer.h>
  17. #include <linux/init.h>
  18. #include <linux/serial_core.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/io.h>
  21. #include <linux/slab.h>
  22. #include <linux/string.h>
  23. #include <linux/dma-mapping.h>
  24. #include <linux/fb.h>
  25. #include <linux/gfp.h>
  26. #include <linux/mtd/mtd.h>
  27. #include <linux/mtd/onenand.h>
  28. #include <linux/mtd/partitions.h>
  29. #include <linux/mmc/host.h>
  30. #include <linux/ioport.h>
  31. #include <asm/irq.h>
  32. #include <asm/pmu.h>
  33. #include <asm/mach/arch.h>
  34. #include <asm/mach/map.h>
  35. #include <asm/mach/irq.h>
  36. #include <mach/hardware.h>
  37. #include <mach/dma.h>
  38. #include <mach/irqs.h>
  39. #include <mach/map.h>
  40. #include <plat/cpu.h>
  41. #include <plat/devs.h>
  42. #include <plat/adc.h>
  43. #include <plat/ata.h>
  44. #include <plat/ehci.h>
  45. #include <plat/fb.h>
  46. #include <plat/fb-s3c2410.h>
  47. #include <plat/hwmon.h>
  48. #include <plat/iic.h>
  49. #include <plat/keypad.h>
  50. #include <plat/mci.h>
  51. #include <plat/nand.h>
  52. #include <plat/sdhci.h>
  53. #include <plat/ts.h>
  54. #include <plat/udc.h>
  55. #include <plat/usb-control.h>
  56. #include <plat/usb-phy.h>
  57. #include <plat/regs-iic.h>
  58. #include <plat/regs-serial.h>
  59. #include <plat/regs-spi.h>
  60. #include <plat/s3c64xx-spi.h>
  61. static u64 samsung_device_dma_mask = DMA_BIT_MASK(32);
  62. /* AC97 */
  63. #ifdef CONFIG_CPU_S3C2440
  64. static struct resource s3c_ac97_resource[] = {
  65. [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97),
  66. [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97),
  67. [2] = DEFINE_RES_DMA_NAMED(DMACH_PCM_OUT, "PCM out"),
  68. [3] = DEFINE_RES_DMA_NAMED(DMACH_PCM_IN, "PCM in"),
  69. [4] = DEFINE_RES_DMA_NAMED(DMACH_MIC_IN, "Mic in"),
  70. };
  71. struct platform_device s3c_device_ac97 = {
  72. .name = "samsung-ac97",
  73. .id = -1,
  74. .num_resources = ARRAY_SIZE(s3c_ac97_resource),
  75. .resource = s3c_ac97_resource,
  76. .dev = {
  77. .dma_mask = &samsung_device_dma_mask,
  78. .coherent_dma_mask = DMA_BIT_MASK(32),
  79. }
  80. };
  81. #endif /* CONFIG_CPU_S3C2440 */
  82. /* ADC */
  83. #ifdef CONFIG_PLAT_S3C24XX
  84. static struct resource s3c_adc_resource[] = {
  85. [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
  86. [1] = DEFINE_RES_IRQ(IRQ_TC),
  87. [2] = DEFINE_RES_IRQ(IRQ_ADC),
  88. };
  89. struct platform_device s3c_device_adc = {
  90. .name = "s3c24xx-adc",
  91. .id = -1,
  92. .num_resources = ARRAY_SIZE(s3c_adc_resource),
  93. .resource = s3c_adc_resource,
  94. };
  95. #endif /* CONFIG_PLAT_S3C24XX */
  96. #if defined(CONFIG_SAMSUNG_DEV_ADC)
  97. static struct resource s3c_adc_resource[] = {
  98. [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
  99. [1] = DEFINE_RES_IRQ(IRQ_TC),
  100. [2] = DEFINE_RES_IRQ(IRQ_ADC),
  101. };
  102. struct platform_device s3c_device_adc = {
  103. .name = "samsung-adc",
  104. .id = -1,
  105. .num_resources = ARRAY_SIZE(s3c_adc_resource),
  106. .resource = s3c_adc_resource,
  107. };
  108. #endif /* CONFIG_SAMSUNG_DEV_ADC */
  109. /* Camif Controller */
  110. #ifdef CONFIG_CPU_S3C2440
  111. static struct resource s3c_camif_resource[] = {
  112. [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF),
  113. [1] = DEFINE_RES_IRQ(IRQ_CAM),
  114. };
  115. struct platform_device s3c_device_camif = {
  116. .name = "s3c2440-camif",
  117. .id = -1,
  118. .num_resources = ARRAY_SIZE(s3c_camif_resource),
  119. .resource = s3c_camif_resource,
  120. .dev = {
  121. .dma_mask = &samsung_device_dma_mask,
  122. .coherent_dma_mask = DMA_BIT_MASK(32),
  123. }
  124. };
  125. #endif /* CONFIG_CPU_S3C2440 */
  126. /* ASOC DMA */
  127. struct platform_device samsung_asoc_dma = {
  128. .name = "samsung-audio",
  129. .id = -1,
  130. .dev = {
  131. .dma_mask = &samsung_device_dma_mask,
  132. .coherent_dma_mask = DMA_BIT_MASK(32),
  133. }
  134. };
  135. struct platform_device samsung_asoc_idma = {
  136. .name = "samsung-idma",
  137. .id = -1,
  138. .dev = {
  139. .dma_mask = &samsung_device_dma_mask,
  140. .coherent_dma_mask = DMA_BIT_MASK(32),
  141. }
  142. };
  143. /* FB */
  144. #ifdef CONFIG_S3C_DEV_FB
  145. static struct resource s3c_fb_resource[] = {
  146. [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K),
  147. [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC),
  148. [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO),
  149. [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM),
  150. };
  151. struct platform_device s3c_device_fb = {
  152. .name = "s3c-fb",
  153. .id = -1,
  154. .num_resources = ARRAY_SIZE(s3c_fb_resource),
  155. .resource = s3c_fb_resource,
  156. .dev = {
  157. .dma_mask = &samsung_device_dma_mask,
  158. .coherent_dma_mask = DMA_BIT_MASK(32),
  159. },
  160. };
  161. void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd)
  162. {
  163. s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
  164. &s3c_device_fb);
  165. }
  166. #endif /* CONFIG_S3C_DEV_FB */
  167. /* FIMC */
  168. #ifdef CONFIG_S5P_DEV_FIMC0
  169. static struct resource s5p_fimc0_resource[] = {
  170. [0] = DEFINE_RES_MEM(S5P_PA_FIMC0, SZ_4K),
  171. [1] = DEFINE_RES_IRQ(IRQ_FIMC0),
  172. };
  173. struct platform_device s5p_device_fimc0 = {
  174. .name = "s5p-fimc",
  175. .id = 0,
  176. .num_resources = ARRAY_SIZE(s5p_fimc0_resource),
  177. .resource = s5p_fimc0_resource,
  178. .dev = {
  179. .dma_mask = &samsung_device_dma_mask,
  180. .coherent_dma_mask = DMA_BIT_MASK(32),
  181. },
  182. };
  183. struct platform_device s5p_device_fimc_md = {
  184. .name = "s5p-fimc-md",
  185. .id = -1,
  186. };
  187. #endif /* CONFIG_S5P_DEV_FIMC0 */
  188. #ifdef CONFIG_S5P_DEV_FIMC1
  189. static struct resource s5p_fimc1_resource[] = {
  190. [0] = DEFINE_RES_MEM(S5P_PA_FIMC1, SZ_4K),
  191. [1] = DEFINE_RES_IRQ(IRQ_FIMC1),
  192. };
  193. struct platform_device s5p_device_fimc1 = {
  194. .name = "s5p-fimc",
  195. .id = 1,
  196. .num_resources = ARRAY_SIZE(s5p_fimc1_resource),
  197. .resource = s5p_fimc1_resource,
  198. .dev = {
  199. .dma_mask = &samsung_device_dma_mask,
  200. .coherent_dma_mask = DMA_BIT_MASK(32),
  201. },
  202. };
  203. #endif /* CONFIG_S5P_DEV_FIMC1 */
  204. #ifdef CONFIG_S5P_DEV_FIMC2
  205. static struct resource s5p_fimc2_resource[] = {
  206. [0] = DEFINE_RES_MEM(S5P_PA_FIMC2, SZ_4K),
  207. [1] = DEFINE_RES_IRQ(IRQ_FIMC2),
  208. };
  209. struct platform_device s5p_device_fimc2 = {
  210. .name = "s5p-fimc",
  211. .id = 2,
  212. .num_resources = ARRAY_SIZE(s5p_fimc2_resource),
  213. .resource = s5p_fimc2_resource,
  214. .dev = {
  215. .dma_mask = &samsung_device_dma_mask,
  216. .coherent_dma_mask = DMA_BIT_MASK(32),
  217. },
  218. };
  219. #endif /* CONFIG_S5P_DEV_FIMC2 */
  220. #ifdef CONFIG_S5P_DEV_FIMC3
  221. static struct resource s5p_fimc3_resource[] = {
  222. [0] = DEFINE_RES_MEM(S5P_PA_FIMC3, SZ_4K),
  223. [1] = DEFINE_RES_IRQ(IRQ_FIMC3),
  224. };
  225. struct platform_device s5p_device_fimc3 = {
  226. .name = "s5p-fimc",
  227. .id = 3,
  228. .num_resources = ARRAY_SIZE(s5p_fimc3_resource),
  229. .resource = s5p_fimc3_resource,
  230. .dev = {
  231. .dma_mask = &samsung_device_dma_mask,
  232. .coherent_dma_mask = DMA_BIT_MASK(32),
  233. },
  234. };
  235. #endif /* CONFIG_S5P_DEV_FIMC3 */
  236. /* FIMD0 */
  237. #ifdef CONFIG_S5P_DEV_FIMD0
  238. static struct resource s5p_fimd0_resource[] = {
  239. [0] = DEFINE_RES_MEM(S5P_PA_FIMD0, SZ_32K),
  240. [1] = DEFINE_RES_IRQ(IRQ_FIMD0_VSYNC),
  241. [2] = DEFINE_RES_IRQ(IRQ_FIMD0_FIFO),
  242. [3] = DEFINE_RES_IRQ(IRQ_FIMD0_SYSTEM),
  243. };
  244. struct platform_device s5p_device_fimd0 = {
  245. .name = "s5p-fb",
  246. .id = 0,
  247. .num_resources = ARRAY_SIZE(s5p_fimd0_resource),
  248. .resource = s5p_fimd0_resource,
  249. .dev = {
  250. .dma_mask = &samsung_device_dma_mask,
  251. .coherent_dma_mask = DMA_BIT_MASK(32),
  252. },
  253. };
  254. void __init s5p_fimd0_set_platdata(struct s3c_fb_platdata *pd)
  255. {
  256. s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
  257. &s5p_device_fimd0);
  258. }
  259. #endif /* CONFIG_S5P_DEV_FIMD0 */
  260. /* HWMON */
  261. #ifdef CONFIG_S3C_DEV_HWMON
  262. struct platform_device s3c_device_hwmon = {
  263. .name = "s3c-hwmon",
  264. .id = -1,
  265. .dev.parent = &s3c_device_adc.dev,
  266. };
  267. void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd)
  268. {
  269. s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata),
  270. &s3c_device_hwmon);
  271. }
  272. #endif /* CONFIG_S3C_DEV_HWMON */
  273. /* HSMMC */
  274. #ifdef CONFIG_S3C_DEV_HSMMC
  275. static struct resource s3c_hsmmc_resource[] = {
  276. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K),
  277. [1] = DEFINE_RES_IRQ(IRQ_HSMMC0),
  278. };
  279. struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = {
  280. .max_width = 4,
  281. .host_caps = (MMC_CAP_4_BIT_DATA |
  282. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  283. .clk_type = S3C_SDHCI_CLK_DIV_INTERNAL,
  284. };
  285. struct platform_device s3c_device_hsmmc0 = {
  286. .name = "s3c-sdhci",
  287. .id = 0,
  288. .num_resources = ARRAY_SIZE(s3c_hsmmc_resource),
  289. .resource = s3c_hsmmc_resource,
  290. .dev = {
  291. .dma_mask = &samsung_device_dma_mask,
  292. .coherent_dma_mask = DMA_BIT_MASK(32),
  293. .platform_data = &s3c_hsmmc0_def_platdata,
  294. },
  295. };
  296. void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
  297. {
  298. s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata);
  299. }
  300. #endif /* CONFIG_S3C_DEV_HSMMC */
  301. #ifdef CONFIG_S3C_DEV_HSMMC1
  302. static struct resource s3c_hsmmc1_resource[] = {
  303. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K),
  304. [1] = DEFINE_RES_IRQ(IRQ_HSMMC1),
  305. };
  306. struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = {
  307. .max_width = 4,
  308. .host_caps = (MMC_CAP_4_BIT_DATA |
  309. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  310. .clk_type = S3C_SDHCI_CLK_DIV_INTERNAL,
  311. };
  312. struct platform_device s3c_device_hsmmc1 = {
  313. .name = "s3c-sdhci",
  314. .id = 1,
  315. .num_resources = ARRAY_SIZE(s3c_hsmmc1_resource),
  316. .resource = s3c_hsmmc1_resource,
  317. .dev = {
  318. .dma_mask = &samsung_device_dma_mask,
  319. .coherent_dma_mask = DMA_BIT_MASK(32),
  320. .platform_data = &s3c_hsmmc1_def_platdata,
  321. },
  322. };
  323. void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
  324. {
  325. s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata);
  326. }
  327. #endif /* CONFIG_S3C_DEV_HSMMC1 */
  328. /* HSMMC2 */
  329. #ifdef CONFIG_S3C_DEV_HSMMC2
  330. static struct resource s3c_hsmmc2_resource[] = {
  331. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K),
  332. [1] = DEFINE_RES_IRQ(IRQ_HSMMC2),
  333. };
  334. struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = {
  335. .max_width = 4,
  336. .host_caps = (MMC_CAP_4_BIT_DATA |
  337. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  338. .clk_type = S3C_SDHCI_CLK_DIV_INTERNAL,
  339. };
  340. struct platform_device s3c_device_hsmmc2 = {
  341. .name = "s3c-sdhci",
  342. .id = 2,
  343. .num_resources = ARRAY_SIZE(s3c_hsmmc2_resource),
  344. .resource = s3c_hsmmc2_resource,
  345. .dev = {
  346. .dma_mask = &samsung_device_dma_mask,
  347. .coherent_dma_mask = DMA_BIT_MASK(32),
  348. .platform_data = &s3c_hsmmc2_def_platdata,
  349. },
  350. };
  351. void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
  352. {
  353. s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata);
  354. }
  355. #endif /* CONFIG_S3C_DEV_HSMMC2 */
  356. #ifdef CONFIG_S3C_DEV_HSMMC3
  357. static struct resource s3c_hsmmc3_resource[] = {
  358. [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K),
  359. [1] = DEFINE_RES_IRQ(IRQ_HSMMC3),
  360. };
  361. struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = {
  362. .max_width = 4,
  363. .host_caps = (MMC_CAP_4_BIT_DATA |
  364. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
  365. .clk_type = S3C_SDHCI_CLK_DIV_INTERNAL,
  366. };
  367. struct platform_device s3c_device_hsmmc3 = {
  368. .name = "s3c-sdhci",
  369. .id = 3,
  370. .num_resources = ARRAY_SIZE(s3c_hsmmc3_resource),
  371. .resource = s3c_hsmmc3_resource,
  372. .dev = {
  373. .dma_mask = &samsung_device_dma_mask,
  374. .coherent_dma_mask = DMA_BIT_MASK(32),
  375. .platform_data = &s3c_hsmmc3_def_platdata,
  376. },
  377. };
  378. void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
  379. {
  380. s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata);
  381. }
  382. #endif /* CONFIG_S3C_DEV_HSMMC3 */
  383. /* I2C */
  384. static struct resource s3c_i2c0_resource[] = {
  385. [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K),
  386. [1] = DEFINE_RES_IRQ(IRQ_IIC),
  387. };
  388. struct platform_device s3c_device_i2c0 = {
  389. .name = "s3c2410-i2c",
  390. #ifdef CONFIG_S3C_DEV_I2C1
  391. .id = 0,
  392. #else
  393. .id = -1,
  394. #endif
  395. .num_resources = ARRAY_SIZE(s3c_i2c0_resource),
  396. .resource = s3c_i2c0_resource,
  397. };
  398. struct s3c2410_platform_i2c default_i2c_data __initdata = {
  399. .flags = 0,
  400. .slave_addr = 0x10,
  401. .frequency = 100*1000,
  402. .sda_delay = 100,
  403. };
  404. void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)
  405. {
  406. struct s3c2410_platform_i2c *npd;
  407. if (!pd)
  408. pd = &default_i2c_data;
  409. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  410. &s3c_device_i2c0);
  411. if (!npd->cfg_gpio)
  412. npd->cfg_gpio = s3c_i2c0_cfg_gpio;
  413. }
  414. #ifdef CONFIG_S3C_DEV_I2C1
  415. static struct resource s3c_i2c1_resource[] = {
  416. [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K),
  417. [1] = DEFINE_RES_IRQ(IRQ_IIC1),
  418. };
  419. struct platform_device s3c_device_i2c1 = {
  420. .name = "s3c2410-i2c",
  421. .id = 1,
  422. .num_resources = ARRAY_SIZE(s3c_i2c1_resource),
  423. .resource = s3c_i2c1_resource,
  424. };
  425. void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd)
  426. {
  427. struct s3c2410_platform_i2c *npd;
  428. if (!pd) {
  429. pd = &default_i2c_data;
  430. pd->bus_num = 1;
  431. }
  432. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  433. &s3c_device_i2c1);
  434. if (!npd->cfg_gpio)
  435. npd->cfg_gpio = s3c_i2c1_cfg_gpio;
  436. }
  437. #endif /* CONFIG_S3C_DEV_I2C1 */
  438. #ifdef CONFIG_S3C_DEV_I2C2
  439. static struct resource s3c_i2c2_resource[] = {
  440. [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K),
  441. [1] = DEFINE_RES_IRQ(IRQ_IIC2),
  442. };
  443. struct platform_device s3c_device_i2c2 = {
  444. .name = "s3c2410-i2c",
  445. .id = 2,
  446. .num_resources = ARRAY_SIZE(s3c_i2c2_resource),
  447. .resource = s3c_i2c2_resource,
  448. };
  449. void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd)
  450. {
  451. struct s3c2410_platform_i2c *npd;
  452. if (!pd) {
  453. pd = &default_i2c_data;
  454. pd->bus_num = 2;
  455. }
  456. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  457. &s3c_device_i2c2);
  458. if (!npd->cfg_gpio)
  459. npd->cfg_gpio = s3c_i2c2_cfg_gpio;
  460. }
  461. #endif /* CONFIG_S3C_DEV_I2C2 */
  462. #ifdef CONFIG_S3C_DEV_I2C3
  463. static struct resource s3c_i2c3_resource[] = {
  464. [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K),
  465. [1] = DEFINE_RES_IRQ(IRQ_IIC3),
  466. };
  467. struct platform_device s3c_device_i2c3 = {
  468. .name = "s3c2440-i2c",
  469. .id = 3,
  470. .num_resources = ARRAY_SIZE(s3c_i2c3_resource),
  471. .resource = s3c_i2c3_resource,
  472. };
  473. void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd)
  474. {
  475. struct s3c2410_platform_i2c *npd;
  476. if (!pd) {
  477. pd = &default_i2c_data;
  478. pd->bus_num = 3;
  479. }
  480. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  481. &s3c_device_i2c3);
  482. if (!npd->cfg_gpio)
  483. npd->cfg_gpio = s3c_i2c3_cfg_gpio;
  484. }
  485. #endif /*CONFIG_S3C_DEV_I2C3 */
  486. #ifdef CONFIG_S3C_DEV_I2C4
  487. static struct resource s3c_i2c4_resource[] = {
  488. [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K),
  489. [1] = DEFINE_RES_IRQ(IRQ_IIC4),
  490. };
  491. struct platform_device s3c_device_i2c4 = {
  492. .name = "s3c2440-i2c",
  493. .id = 4,
  494. .num_resources = ARRAY_SIZE(s3c_i2c4_resource),
  495. .resource = s3c_i2c4_resource,
  496. };
  497. void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd)
  498. {
  499. struct s3c2410_platform_i2c *npd;
  500. if (!pd) {
  501. pd = &default_i2c_data;
  502. pd->bus_num = 4;
  503. }
  504. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  505. &s3c_device_i2c4);
  506. if (!npd->cfg_gpio)
  507. npd->cfg_gpio = s3c_i2c4_cfg_gpio;
  508. }
  509. #endif /*CONFIG_S3C_DEV_I2C4 */
  510. #ifdef CONFIG_S3C_DEV_I2C5
  511. static struct resource s3c_i2c5_resource[] = {
  512. [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K),
  513. [1] = DEFINE_RES_IRQ(IRQ_IIC5),
  514. };
  515. struct platform_device s3c_device_i2c5 = {
  516. .name = "s3c2440-i2c",
  517. .id = 5,
  518. .num_resources = ARRAY_SIZE(s3c_i2c5_resource),
  519. .resource = s3c_i2c5_resource,
  520. };
  521. void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd)
  522. {
  523. struct s3c2410_platform_i2c *npd;
  524. if (!pd) {
  525. pd = &default_i2c_data;
  526. pd->bus_num = 5;
  527. }
  528. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  529. &s3c_device_i2c5);
  530. if (!npd->cfg_gpio)
  531. npd->cfg_gpio = s3c_i2c5_cfg_gpio;
  532. }
  533. #endif /*CONFIG_S3C_DEV_I2C5 */
  534. #ifdef CONFIG_S3C_DEV_I2C6
  535. static struct resource s3c_i2c6_resource[] = {
  536. [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K),
  537. [1] = DEFINE_RES_IRQ(IRQ_IIC6),
  538. };
  539. struct platform_device s3c_device_i2c6 = {
  540. .name = "s3c2440-i2c",
  541. .id = 6,
  542. .num_resources = ARRAY_SIZE(s3c_i2c6_resource),
  543. .resource = s3c_i2c6_resource,
  544. };
  545. void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd)
  546. {
  547. struct s3c2410_platform_i2c *npd;
  548. if (!pd) {
  549. pd = &default_i2c_data;
  550. pd->bus_num = 6;
  551. }
  552. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  553. &s3c_device_i2c6);
  554. if (!npd->cfg_gpio)
  555. npd->cfg_gpio = s3c_i2c6_cfg_gpio;
  556. }
  557. #endif /* CONFIG_S3C_DEV_I2C6 */
  558. #ifdef CONFIG_S3C_DEV_I2C7
  559. static struct resource s3c_i2c7_resource[] = {
  560. [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K),
  561. [1] = DEFINE_RES_IRQ(IRQ_IIC7),
  562. };
  563. struct platform_device s3c_device_i2c7 = {
  564. .name = "s3c2440-i2c",
  565. .id = 7,
  566. .num_resources = ARRAY_SIZE(s3c_i2c7_resource),
  567. .resource = s3c_i2c7_resource,
  568. };
  569. void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd)
  570. {
  571. struct s3c2410_platform_i2c *npd;
  572. if (!pd) {
  573. pd = &default_i2c_data;
  574. pd->bus_num = 7;
  575. }
  576. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  577. &s3c_device_i2c7);
  578. if (!npd->cfg_gpio)
  579. npd->cfg_gpio = s3c_i2c7_cfg_gpio;
  580. }
  581. #endif /* CONFIG_S3C_DEV_I2C7 */
  582. /* I2C HDMIPHY */
  583. #ifdef CONFIG_S5P_DEV_I2C_HDMIPHY
  584. static struct resource s5p_i2c_resource[] = {
  585. [0] = DEFINE_RES_MEM(S5P_PA_IIC_HDMIPHY, SZ_4K),
  586. [1] = DEFINE_RES_IRQ(IRQ_IIC_HDMIPHY),
  587. };
  588. struct platform_device s5p_device_i2c_hdmiphy = {
  589. .name = "s3c2440-hdmiphy-i2c",
  590. .id = -1,
  591. .num_resources = ARRAY_SIZE(s5p_i2c_resource),
  592. .resource = s5p_i2c_resource,
  593. };
  594. void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd)
  595. {
  596. struct s3c2410_platform_i2c *npd;
  597. if (!pd) {
  598. pd = &default_i2c_data;
  599. if (soc_is_exynos4210())
  600. pd->bus_num = 8;
  601. else if (soc_is_s5pv210())
  602. pd->bus_num = 3;
  603. else
  604. pd->bus_num = 0;
  605. }
  606. npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
  607. &s5p_device_i2c_hdmiphy);
  608. }
  609. #endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */
  610. /* I2S */
  611. #ifdef CONFIG_PLAT_S3C24XX
  612. static struct resource s3c_iis_resource[] = {
  613. [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS),
  614. };
  615. struct platform_device s3c_device_iis = {
  616. .name = "s3c24xx-iis",
  617. .id = -1,
  618. .num_resources = ARRAY_SIZE(s3c_iis_resource),
  619. .resource = s3c_iis_resource,
  620. .dev = {
  621. .dma_mask = &samsung_device_dma_mask,
  622. .coherent_dma_mask = DMA_BIT_MASK(32),
  623. }
  624. };
  625. #endif /* CONFIG_PLAT_S3C24XX */
  626. #ifdef CONFIG_CPU_S3C2440
  627. struct platform_device s3c2412_device_iis = {
  628. .name = "s3c2412-iis",
  629. .id = -1,
  630. .dev = {
  631. .dma_mask = &samsung_device_dma_mask,
  632. .coherent_dma_mask = DMA_BIT_MASK(32),
  633. }
  634. };
  635. #endif /* CONFIG_CPU_S3C2440 */
  636. /* IDE CFCON */
  637. #ifdef CONFIG_SAMSUNG_DEV_IDE
  638. static struct resource s3c_cfcon_resource[] = {
  639. [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON, SZ_16K),
  640. [1] = DEFINE_RES_IRQ(IRQ_CFCON),
  641. };
  642. struct platform_device s3c_device_cfcon = {
  643. .id = 0,
  644. .num_resources = ARRAY_SIZE(s3c_cfcon_resource),
  645. .resource = s3c_cfcon_resource,
  646. };
  647. void s3c_ide_set_platdata(struct s3c_ide_platdata *pdata)
  648. {
  649. s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata),
  650. &s3c_device_cfcon);
  651. }
  652. #endif /* CONFIG_SAMSUNG_DEV_IDE */
  653. /* KEYPAD */
  654. #ifdef CONFIG_SAMSUNG_DEV_KEYPAD
  655. static struct resource samsung_keypad_resources[] = {
  656. [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32),
  657. [1] = DEFINE_RES_IRQ(IRQ_KEYPAD),
  658. };
  659. struct platform_device samsung_device_keypad = {
  660. .name = "samsung-keypad",
  661. .id = -1,
  662. .num_resources = ARRAY_SIZE(samsung_keypad_resources),
  663. .resource = samsung_keypad_resources,
  664. };
  665. void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd)
  666. {
  667. struct samsung_keypad_platdata *npd;
  668. npd = s3c_set_platdata(pd, sizeof(struct samsung_keypad_platdata),
  669. &samsung_device_keypad);
  670. if (!npd->cfg_gpio)
  671. npd->cfg_gpio = samsung_keypad_cfg_gpio;
  672. }
  673. #endif /* CONFIG_SAMSUNG_DEV_KEYPAD */
  674. /* LCD Controller */
  675. #ifdef CONFIG_PLAT_S3C24XX
  676. static struct resource s3c_lcd_resource[] = {
  677. [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD, S3C24XX_SZ_LCD),
  678. [1] = DEFINE_RES_IRQ(IRQ_LCD),
  679. };
  680. struct platform_device s3c_device_lcd = {
  681. .name = "s3c2410-lcd",
  682. .id = -1,
  683. .num_resources = ARRAY_SIZE(s3c_lcd_resource),
  684. .resource = s3c_lcd_resource,
  685. .dev = {
  686. .dma_mask = &samsung_device_dma_mask,
  687. .coherent_dma_mask = DMA_BIT_MASK(32),
  688. }
  689. };
  690. void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
  691. {
  692. struct s3c2410fb_mach_info *npd;
  693. npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd);
  694. if (npd) {
  695. npd->displays = kmemdup(pd->displays,
  696. sizeof(struct s3c2410fb_display) * npd->num_displays,
  697. GFP_KERNEL);
  698. if (!npd->displays)
  699. printk(KERN_ERR "no memory for LCD display data\n");
  700. } else {
  701. printk(KERN_ERR "no memory for LCD platform data\n");
  702. }
  703. }
  704. #endif /* CONFIG_PLAT_S3C24XX */
  705. /* MFC */
  706. #ifdef CONFIG_S5P_DEV_MFC
  707. static struct resource s5p_mfc_resource[] = {
  708. [0] = DEFINE_RES_MEM(S5P_PA_MFC, SZ_64K),
  709. [1] = DEFINE_RES_IRQ(IRQ_MFC),
  710. };
  711. struct platform_device s5p_device_mfc = {
  712. .name = "s5p-mfc",
  713. .id = -1,
  714. .num_resources = ARRAY_SIZE(s5p_mfc_resource),
  715. .resource = s5p_mfc_resource,
  716. };
  717. /*
  718. * MFC hardware has 2 memory interfaces which are modelled as two separate
  719. * platform devices to let dma-mapping distinguish between them.
  720. *
  721. * MFC parent device (s5p_device_mfc) must be registered before memory
  722. * interface specific devices (s5p_device_mfc_l and s5p_device_mfc_r).
  723. */
  724. struct platform_device s5p_device_mfc_l = {
  725. .name = "s5p-mfc-l",
  726. .id = -1,
  727. .dev = {
  728. .parent = &s5p_device_mfc.dev,
  729. .dma_mask = &samsung_device_dma_mask,
  730. .coherent_dma_mask = DMA_BIT_MASK(32),
  731. },
  732. };
  733. struct platform_device s5p_device_mfc_r = {
  734. .name = "s5p-mfc-r",
  735. .id = -1,
  736. .dev = {
  737. .parent = &s5p_device_mfc.dev,
  738. .dma_mask = &samsung_device_dma_mask,
  739. .coherent_dma_mask = DMA_BIT_MASK(32),
  740. },
  741. };
  742. #endif /* CONFIG_S5P_DEV_MFC */
  743. /* MIPI CSIS */
  744. #ifdef CONFIG_S5P_DEV_CSIS0
  745. static struct resource s5p_mipi_csis0_resource[] = {
  746. [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS0, SZ_4K),
  747. [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS0),
  748. };
  749. struct platform_device s5p_device_mipi_csis0 = {
  750. .name = "s5p-mipi-csis",
  751. .id = 0,
  752. .num_resources = ARRAY_SIZE(s5p_mipi_csis0_resource),
  753. .resource = s5p_mipi_csis0_resource,
  754. };
  755. #endif /* CONFIG_S5P_DEV_CSIS0 */
  756. #ifdef CONFIG_S5P_DEV_CSIS1
  757. static struct resource s5p_mipi_csis1_resource[] = {
  758. [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS1, SZ_4K),
  759. [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS1),
  760. };
  761. struct platform_device s5p_device_mipi_csis1 = {
  762. .name = "s5p-mipi-csis",
  763. .id = 1,
  764. .num_resources = ARRAY_SIZE(s5p_mipi_csis1_resource),
  765. .resource = s5p_mipi_csis1_resource,
  766. };
  767. #endif
  768. /* NAND */
  769. #ifdef CONFIG_S3C_DEV_NAND
  770. static struct resource s3c_nand_resource[] = {
  771. [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M),
  772. };
  773. struct platform_device s3c_device_nand = {
  774. .name = "s3c2410-nand",
  775. .id = -1,
  776. .num_resources = ARRAY_SIZE(s3c_nand_resource),
  777. .resource = s3c_nand_resource,
  778. };
  779. /*
  780. * s3c_nand_copy_set() - copy nand set data
  781. * @set: The new structure, directly copied from the old.
  782. *
  783. * Copy all the fields from the NAND set field from what is probably __initdata
  784. * to new kernel memory. The code returns 0 if the copy happened correctly or
  785. * an error code for the calling function to display.
  786. *
  787. * Note, we currently do not try and look to see if we've already copied the
  788. * data in a previous set.
  789. */
  790. static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set)
  791. {
  792. void *ptr;
  793. int size;
  794. size = sizeof(struct mtd_partition) * set->nr_partitions;
  795. if (size) {
  796. ptr = kmemdup(set->partitions, size, GFP_KERNEL);
  797. set->partitions = ptr;
  798. if (!ptr)
  799. return -ENOMEM;
  800. }
  801. if (set->nr_map && set->nr_chips) {
  802. size = sizeof(int) * set->nr_chips;
  803. ptr = kmemdup(set->nr_map, size, GFP_KERNEL);
  804. set->nr_map = ptr;
  805. if (!ptr)
  806. return -ENOMEM;
  807. }
  808. if (set->ecc_layout) {
  809. ptr = kmemdup(set->ecc_layout,
  810. sizeof(struct nand_ecclayout), GFP_KERNEL);
  811. set->ecc_layout = ptr;
  812. if (!ptr)
  813. return -ENOMEM;
  814. }
  815. return 0;
  816. }
  817. void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand)
  818. {
  819. struct s3c2410_platform_nand *npd;
  820. int size;
  821. int ret;
  822. /* note, if we get a failure in allocation, we simply drop out of the
  823. * function. If there is so little memory available at initialisation
  824. * time then there is little chance the system is going to run.
  825. */
  826. npd = s3c_set_platdata(nand, sizeof(struct s3c2410_platform_nand),
  827. &s3c_device_nand);
  828. if (!npd)
  829. return;
  830. /* now see if we need to copy any of the nand set data */
  831. size = sizeof(struct s3c2410_nand_set) * npd->nr_sets;
  832. if (size) {
  833. struct s3c2410_nand_set *from = npd->sets;
  834. struct s3c2410_nand_set *to;
  835. int i;
  836. to = kmemdup(from, size, GFP_KERNEL);
  837. npd->sets = to; /* set, even if we failed */
  838. if (!to) {
  839. printk(KERN_ERR "%s: no memory for sets\n", __func__);
  840. return;
  841. }
  842. for (i = 0; i < npd->nr_sets; i++) {
  843. ret = s3c_nand_copy_set(to);
  844. if (ret) {
  845. printk(KERN_ERR "%s: failed to copy set %d\n",
  846. __func__, i);
  847. return;
  848. }
  849. to++;
  850. }
  851. }
  852. }
  853. #endif /* CONFIG_S3C_DEV_NAND */
  854. /* ONENAND */
  855. #ifdef CONFIG_S3C_DEV_ONENAND
  856. static struct resource s3c_onenand_resources[] = {
  857. [0] = DEFINE_RES_MEM(S3C_PA_ONENAND, SZ_1K),
  858. [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF, S3C_SZ_ONENAND_BUF),
  859. [2] = DEFINE_RES_IRQ(IRQ_ONENAND),
  860. };
  861. struct platform_device s3c_device_onenand = {
  862. .name = "samsung-onenand",
  863. .id = 0,
  864. .num_resources = ARRAY_SIZE(s3c_onenand_resources),
  865. .resource = s3c_onenand_resources,
  866. };
  867. #endif /* CONFIG_S3C_DEV_ONENAND */
  868. #ifdef CONFIG_S3C64XX_DEV_ONENAND1
  869. static struct resource s3c64xx_onenand1_resources[] = {
  870. [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1, SZ_1K),
  871. [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF, S3C64XX_SZ_ONENAND1_BUF),
  872. [2] = DEFINE_RES_IRQ(IRQ_ONENAND1),
  873. };
  874. struct platform_device s3c64xx_device_onenand1 = {
  875. .name = "samsung-onenand",
  876. .id = 1,
  877. .num_resources = ARRAY_SIZE(s3c64xx_onenand1_resources),
  878. .resource = s3c64xx_onenand1_resources,
  879. };
  880. void s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata)
  881. {
  882. s3c_set_platdata(pdata, sizeof(struct onenand_platform_data),
  883. &s3c64xx_device_onenand1);
  884. }
  885. #endif /* CONFIG_S3C64XX_DEV_ONENAND1 */
  886. #ifdef CONFIG_S5P_DEV_ONENAND
  887. static struct resource s5p_onenand_resources[] = {
  888. [0] = DEFINE_RES_MEM(S5P_PA_ONENAND, SZ_128K),
  889. [1] = DEFINE_RES_MEM(S5P_PA_ONENAND_DMA, SZ_8K),
  890. [2] = DEFINE_RES_IRQ(IRQ_ONENAND_AUDI),
  891. };
  892. struct platform_device s5p_device_onenand = {
  893. .name = "s5pc110-onenand",
  894. .id = -1,
  895. .num_resources = ARRAY_SIZE(s5p_onenand_resources),
  896. .resource = s5p_onenand_resources,
  897. };
  898. #endif /* CONFIG_S5P_DEV_ONENAND */
  899. /* PMU */
  900. #ifdef CONFIG_PLAT_S5P
  901. static struct resource s5p_pmu_resource[] = {
  902. DEFINE_RES_IRQ(IRQ_PMU)
  903. };
  904. struct platform_device s5p_device_pmu = {
  905. .name = "arm-pmu",
  906. .id = ARM_PMU_DEVICE_CPU,
  907. .num_resources = ARRAY_SIZE(s5p_pmu_resource),
  908. .resource = s5p_pmu_resource,
  909. };
  910. static int __init s5p_pmu_init(void)
  911. {
  912. platform_device_register(&s5p_device_pmu);
  913. return 0;
  914. }
  915. arch_initcall(s5p_pmu_init);
  916. #endif /* CONFIG_PLAT_S5P */
  917. /* PWM Timer */
  918. #ifdef CONFIG_SAMSUNG_DEV_PWM
  919. #define TIMER_RESOURCE_SIZE (1)
  920. #define TIMER_RESOURCE(_tmr, _irq) \
  921. (struct resource [TIMER_RESOURCE_SIZE]) { \
  922. [0] = { \
  923. .start = _irq, \
  924. .end = _irq, \
  925. .flags = IORESOURCE_IRQ \
  926. } \
  927. }
  928. #define DEFINE_S3C_TIMER(_tmr_no, _irq) \
  929. .name = "s3c24xx-pwm", \
  930. .id = _tmr_no, \
  931. .num_resources = TIMER_RESOURCE_SIZE, \
  932. .resource = TIMER_RESOURCE(_tmr_no, _irq), \
  933. /*
  934. * since we already have an static mapping for the timer,
  935. * we do not bother setting any IO resource for the base.
  936. */
  937. struct platform_device s3c_device_timer[] = {
  938. [0] = { DEFINE_S3C_TIMER(0, IRQ_TIMER0) },
  939. [1] = { DEFINE_S3C_TIMER(1, IRQ_TIMER1) },
  940. [2] = { DEFINE_S3C_TIMER(2, IRQ_TIMER2) },
  941. [3] = { DEFINE_S3C_TIMER(3, IRQ_TIMER3) },
  942. [4] = { DEFINE_S3C_TIMER(4, IRQ_TIMER4) },
  943. };
  944. #endif /* CONFIG_SAMSUNG_DEV_PWM */
  945. /* RTC */
  946. #ifdef CONFIG_PLAT_S3C24XX
  947. static struct resource s3c_rtc_resource[] = {
  948. [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256),
  949. [1] = DEFINE_RES_IRQ(IRQ_RTC),
  950. [2] = DEFINE_RES_IRQ(IRQ_TICK),
  951. };
  952. struct platform_device s3c_device_rtc = {
  953. .name = "s3c2410-rtc",
  954. .id = -1,
  955. .num_resources = ARRAY_SIZE(s3c_rtc_resource),
  956. .resource = s3c_rtc_resource,
  957. };
  958. #endif /* CONFIG_PLAT_S3C24XX */
  959. #ifdef CONFIG_S3C_DEV_RTC
  960. static struct resource s3c_rtc_resource[] = {
  961. [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256),
  962. [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM),
  963. [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC),
  964. };
  965. struct platform_device s3c_device_rtc = {
  966. .name = "s3c64xx-rtc",
  967. .id = -1,
  968. .num_resources = ARRAY_SIZE(s3c_rtc_resource),
  969. .resource = s3c_rtc_resource,
  970. };
  971. #endif /* CONFIG_S3C_DEV_RTC */
  972. /* SDI */
  973. #ifdef CONFIG_PLAT_S3C24XX
  974. static struct resource s3c_sdi_resource[] = {
  975. [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI),
  976. [1] = DEFINE_RES_IRQ(IRQ_SDI),
  977. };
  978. struct platform_device s3c_device_sdi = {
  979. .name = "s3c2410-sdi",
  980. .id = -1,
  981. .num_resources = ARRAY_SIZE(s3c_sdi_resource),
  982. .resource = s3c_sdi_resource,
  983. };
  984. void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
  985. {
  986. s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata),
  987. &s3c_device_sdi);
  988. }
  989. #endif /* CONFIG_PLAT_S3C24XX */
  990. /* SPI */
  991. #ifdef CONFIG_PLAT_S3C24XX
  992. static struct resource s3c_spi0_resource[] = {
  993. [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI, SZ_32),
  994. [1] = DEFINE_RES_IRQ(IRQ_SPI0),
  995. };
  996. struct platform_device s3c_device_spi0 = {
  997. .name = "s3c2410-spi",
  998. .id = 0,
  999. .num_resources = ARRAY_SIZE(s3c_spi0_resource),
  1000. .resource = s3c_spi0_resource,
  1001. .dev = {
  1002. .dma_mask = &samsung_device_dma_mask,
  1003. .coherent_dma_mask = DMA_BIT_MASK(32),
  1004. }
  1005. };
  1006. static struct resource s3c_spi1_resource[] = {
  1007. [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1, SZ_32),
  1008. [1] = DEFINE_RES_IRQ(IRQ_SPI1),
  1009. };
  1010. struct platform_device s3c_device_spi1 = {
  1011. .name = "s3c2410-spi",
  1012. .id = 1,
  1013. .num_resources = ARRAY_SIZE(s3c_spi1_resource),
  1014. .resource = s3c_spi1_resource,
  1015. .dev = {
  1016. .dma_mask = &samsung_device_dma_mask,
  1017. .coherent_dma_mask = DMA_BIT_MASK(32),
  1018. }
  1019. };
  1020. #endif /* CONFIG_PLAT_S3C24XX */
  1021. /* Touchscreen */
  1022. #ifdef CONFIG_PLAT_S3C24XX
  1023. static struct resource s3c_ts_resource[] = {
  1024. [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
  1025. [1] = DEFINE_RES_IRQ(IRQ_TC),
  1026. };
  1027. struct platform_device s3c_device_ts = {
  1028. .name = "s3c2410-ts",
  1029. .id = -1,
  1030. .dev.parent = &s3c_device_adc.dev,
  1031. .num_resources = ARRAY_SIZE(s3c_ts_resource),
  1032. .resource = s3c_ts_resource,
  1033. };
  1034. void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
  1035. {
  1036. s3c_set_platdata(hard_s3c2410ts_info,
  1037. sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts);
  1038. }
  1039. #endif /* CONFIG_PLAT_S3C24XX */
  1040. #ifdef CONFIG_SAMSUNG_DEV_TS
  1041. static struct resource s3c_ts_resource[] = {
  1042. [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
  1043. [1] = DEFINE_RES_IRQ(IRQ_TC),
  1044. };
  1045. static struct s3c2410_ts_mach_info default_ts_data __initdata = {
  1046. .delay = 10000,
  1047. .presc = 49,
  1048. .oversampling_shift = 2,
  1049. };
  1050. struct platform_device s3c_device_ts = {
  1051. .name = "s3c64xx-ts",
  1052. .id = -1,
  1053. .num_resources = ARRAY_SIZE(s3c_ts_resource),
  1054. .resource = s3c_ts_resource,
  1055. };
  1056. void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
  1057. {
  1058. if (!pd)
  1059. pd = &default_ts_data;
  1060. s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info),
  1061. &s3c_device_ts);
  1062. }
  1063. #endif /* CONFIG_SAMSUNG_DEV_TS */
  1064. /* TV */
  1065. #ifdef CONFIG_S5P_DEV_TV
  1066. static struct resource s5p_hdmi_resources[] = {
  1067. [0] = DEFINE_RES_MEM(S5P_PA_HDMI, SZ_1M),
  1068. [1] = DEFINE_RES_IRQ(IRQ_HDMI),
  1069. };
  1070. struct platform_device s5p_device_hdmi = {
  1071. .name = "s5p-hdmi",
  1072. .id = -1,
  1073. .num_resources = ARRAY_SIZE(s5p_hdmi_resources),
  1074. .resource = s5p_hdmi_resources,
  1075. };
  1076. static struct resource s5p_sdo_resources[] = {
  1077. [0] = DEFINE_RES_MEM(S5P_PA_SDO, SZ_64K),
  1078. [1] = DEFINE_RES_IRQ(IRQ_SDO),
  1079. };
  1080. struct platform_device s5p_device_sdo = {
  1081. .name = "s5p-sdo",
  1082. .id = -1,
  1083. .num_resources = ARRAY_SIZE(s5p_sdo_resources),
  1084. .resource = s5p_sdo_resources,
  1085. };
  1086. static struct resource s5p_mixer_resources[] = {
  1087. [0] = DEFINE_RES_MEM_NAMED(S5P_PA_MIXER, SZ_64K, "mxr"),
  1088. [1] = DEFINE_RES_MEM_NAMED(S5P_PA_VP, SZ_64K, "vp"),
  1089. [2] = DEFINE_RES_IRQ_NAMED(IRQ_MIXER, "irq"),
  1090. };
  1091. struct platform_device s5p_device_mixer = {
  1092. .name = "s5p-mixer",
  1093. .id = -1,
  1094. .num_resources = ARRAY_SIZE(s5p_mixer_resources),
  1095. .resource = s5p_mixer_resources,
  1096. .dev = {
  1097. .dma_mask = &samsung_device_dma_mask,
  1098. .coherent_dma_mask = DMA_BIT_MASK(32),
  1099. }
  1100. };
  1101. #endif /* CONFIG_S5P_DEV_TV */
  1102. /* USB */
  1103. #ifdef CONFIG_S3C_DEV_USB_HOST
  1104. static struct resource s3c_usb_resource[] = {
  1105. [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256),
  1106. [1] = DEFINE_RES_IRQ(IRQ_USBH),
  1107. };
  1108. struct platform_device s3c_device_ohci = {
  1109. .name = "s3c2410-ohci",
  1110. .id = -1,
  1111. .num_resources = ARRAY_SIZE(s3c_usb_resource),
  1112. .resource = s3c_usb_resource,
  1113. .dev = {
  1114. .dma_mask = &samsung_device_dma_mask,
  1115. .coherent_dma_mask = DMA_BIT_MASK(32),
  1116. }
  1117. };
  1118. /*
  1119. * s3c_ohci_set_platdata - initialise OHCI device platform data
  1120. * @info: The platform data.
  1121. *
  1122. * This call copies the @info passed in and sets the device .platform_data
  1123. * field to that copy. The @info is copied so that the original can be marked
  1124. * __initdata.
  1125. */
  1126. void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info)
  1127. {
  1128. s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info),
  1129. &s3c_device_ohci);
  1130. }
  1131. #endif /* CONFIG_S3C_DEV_USB_HOST */
  1132. /* USB Device (Gadget) */
  1133. #ifdef CONFIG_PLAT_S3C24XX
  1134. static struct resource s3c_usbgadget_resource[] = {
  1135. [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV, S3C24XX_SZ_USBDEV),
  1136. [1] = DEFINE_RES_IRQ(IRQ_USBD),
  1137. };
  1138. struct platform_device s3c_device_usbgadget = {
  1139. .name = "s3c2410-usbgadget",
  1140. .id = -1,
  1141. .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
  1142. .resource = s3c_usbgadget_resource,
  1143. };
  1144. void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
  1145. {
  1146. s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget);
  1147. }
  1148. #endif /* CONFIG_PLAT_S3C24XX */
  1149. /* USB EHCI Host Controller */
  1150. #ifdef CONFIG_S5P_DEV_USB_EHCI
  1151. static struct resource s5p_ehci_resource[] = {
  1152. [0] = DEFINE_RES_MEM(S5P_PA_EHCI, SZ_256),
  1153. [1] = DEFINE_RES_IRQ(IRQ_USB_HOST),
  1154. };
  1155. struct platform_device s5p_device_ehci = {
  1156. .name = "s5p-ehci",
  1157. .id = -1,
  1158. .num_resources = ARRAY_SIZE(s5p_ehci_resource),
  1159. .resource = s5p_ehci_resource,
  1160. .dev = {
  1161. .dma_mask = &samsung_device_dma_mask,
  1162. .coherent_dma_mask = DMA_BIT_MASK(32),
  1163. }
  1164. };
  1165. void __init s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd)
  1166. {
  1167. struct s5p_ehci_platdata *npd;
  1168. npd = s3c_set_platdata(pd, sizeof(struct s5p_ehci_platdata),
  1169. &s5p_device_ehci);
  1170. if (!npd->phy_init)
  1171. npd->phy_init = s5p_usb_phy_init;
  1172. if (!npd->phy_exit)
  1173. npd->phy_exit = s5p_usb_phy_exit;
  1174. }
  1175. #endif /* CONFIG_S5P_DEV_USB_EHCI */
  1176. /* USB HSOTG */
  1177. #ifdef CONFIG_S3C_DEV_USB_HSOTG
  1178. static struct resource s3c_usb_hsotg_resources[] = {
  1179. [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_16K),
  1180. [1] = DEFINE_RES_IRQ(IRQ_OTG),
  1181. };
  1182. struct platform_device s3c_device_usb_hsotg = {
  1183. .name = "s3c-hsotg",
  1184. .id = -1,
  1185. .num_resources = ARRAY_SIZE(s3c_usb_hsotg_resources),
  1186. .resource = s3c_usb_hsotg_resources,
  1187. .dev = {
  1188. .dma_mask = &samsung_device_dma_mask,
  1189. .coherent_dma_mask = DMA_BIT_MASK(32),
  1190. },
  1191. };
  1192. #endif /* CONFIG_S3C_DEV_USB_HSOTG */
  1193. /* USB High Spped 2.0 Device (Gadget) */
  1194. #ifdef CONFIG_PLAT_S3C24XX
  1195. static struct resource s3c_hsudc_resource[] = {
  1196. [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC, S3C2416_SZ_HSUDC),
  1197. [1] = DEFINE_RES_IRQ(IRQ_USBD),
  1198. };
  1199. struct platform_device s3c_device_usb_hsudc = {
  1200. .name = "s3c-hsudc",
  1201. .id = -1,
  1202. .num_resources = ARRAY_SIZE(s3c_hsudc_resource),
  1203. .resource = s3c_hsudc_resource,
  1204. .dev = {
  1205. .dma_mask = &samsung_device_dma_mask,
  1206. .coherent_dma_mask = DMA_BIT_MASK(32),
  1207. },
  1208. };
  1209. void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd)
  1210. {
  1211. s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc);
  1212. }
  1213. #endif /* CONFIG_PLAT_S3C24XX */
  1214. /* WDT */
  1215. #ifdef CONFIG_S3C_DEV_WDT
  1216. static struct resource s3c_wdt_resource[] = {
  1217. [0] = DEFINE_RES_MEM(S3C_PA_WDT, SZ_1K),
  1218. [1] = DEFINE_RES_IRQ(IRQ_WDT),
  1219. };
  1220. struct platform_device s3c_device_wdt = {
  1221. .name = "s3c2410-wdt",
  1222. .id = -1,
  1223. .num_resources = ARRAY_SIZE(s3c_wdt_resource),
  1224. .resource = s3c_wdt_resource,
  1225. };
  1226. #endif /* CONFIG_S3C_DEV_WDT */
  1227. #ifdef CONFIG_S3C64XX_DEV_SPI0
  1228. static struct resource s3c64xx_spi0_resource[] = {
  1229. [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256),
  1230. [1] = DEFINE_RES_DMA(DMACH_SPI0_TX),
  1231. [2] = DEFINE_RES_DMA(DMACH_SPI0_RX),
  1232. [3] = DEFINE_RES_IRQ(IRQ_SPI0),
  1233. };
  1234. struct platform_device s3c64xx_device_spi0 = {
  1235. .name = "s3c64xx-spi",
  1236. .id = 0,
  1237. .num_resources = ARRAY_SIZE(s3c64xx_spi0_resource),
  1238. .resource = s3c64xx_spi0_resource,
  1239. .dev = {
  1240. .dma_mask = &samsung_device_dma_mask,
  1241. .coherent_dma_mask = DMA_BIT_MASK(32),
  1242. },
  1243. };
  1244. void __init s3c64xx_spi0_set_platdata(struct s3c64xx_spi_info *pd,
  1245. int src_clk_nr, int num_cs)
  1246. {
  1247. if (!pd) {
  1248. pr_err("%s:Need to pass platform data\n", __func__);
  1249. return;
  1250. }
  1251. /* Reject invalid configuration */
  1252. if (!num_cs || src_clk_nr < 0) {
  1253. pr_err("%s: Invalid SPI configuration\n", __func__);
  1254. return;
  1255. }
  1256. pd->num_cs = num_cs;
  1257. pd->src_clk_nr = src_clk_nr;
  1258. if (!pd->cfg_gpio)
  1259. pd->cfg_gpio = s3c64xx_spi0_cfg_gpio;
  1260. s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi0);
  1261. }
  1262. #endif /* CONFIG_S3C64XX_DEV_SPI0 */
  1263. #ifdef CONFIG_S3C64XX_DEV_SPI1
  1264. static struct resource s3c64xx_spi1_resource[] = {
  1265. [0] = DEFINE_RES_MEM(S3C_PA_SPI1, SZ_256),
  1266. [1] = DEFINE_RES_DMA(DMACH_SPI1_TX),
  1267. [2] = DEFINE_RES_DMA(DMACH_SPI1_RX),
  1268. [3] = DEFINE_RES_IRQ(IRQ_SPI1),
  1269. };
  1270. struct platform_device s3c64xx_device_spi1 = {
  1271. .name = "s3c64xx-spi",
  1272. .id = 1,
  1273. .num_resources = ARRAY_SIZE(s3c64xx_spi1_resource),
  1274. .resource = s3c64xx_spi1_resource,
  1275. .dev = {
  1276. .dma_mask = &samsung_device_dma_mask,
  1277. .coherent_dma_mask = DMA_BIT_MASK(32),
  1278. },
  1279. };
  1280. void __init s3c64xx_spi1_set_platdata(struct s3c64xx_spi_info *pd,
  1281. int src_clk_nr, int num_cs)
  1282. {
  1283. if (!pd) {
  1284. pr_err("%s:Need to pass platform data\n", __func__);
  1285. return;
  1286. }
  1287. /* Reject invalid configuration */
  1288. if (!num_cs || src_clk_nr < 0) {
  1289. pr_err("%s: Invalid SPI configuration\n", __func__);
  1290. return;
  1291. }
  1292. pd->num_cs = num_cs;
  1293. pd->src_clk_nr = src_clk_nr;
  1294. if (!pd->cfg_gpio)
  1295. pd->cfg_gpio = s3c64xx_spi1_cfg_gpio;
  1296. s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi1);
  1297. }
  1298. #endif /* CONFIG_S3C64XX_DEV_SPI1 */
  1299. #ifdef CONFIG_S3C64XX_DEV_SPI2
  1300. static struct resource s3c64xx_spi2_resource[] = {
  1301. [0] = DEFINE_RES_MEM(S3C_PA_SPI2, SZ_256),
  1302. [1] = DEFINE_RES_DMA(DMACH_SPI2_TX),
  1303. [2] = DEFINE_RES_DMA(DMACH_SPI2_RX),
  1304. [3] = DEFINE_RES_IRQ(IRQ_SPI2),
  1305. };
  1306. struct platform_device s3c64xx_device_spi2 = {
  1307. .name = "s3c64xx-spi",
  1308. .id = 2,
  1309. .num_resources = ARRAY_SIZE(s3c64xx_spi2_resource),
  1310. .resource = s3c64xx_spi2_resource,
  1311. .dev = {
  1312. .dma_mask = &samsung_device_dma_mask,
  1313. .coherent_dma_mask = DMA_BIT_MASK(32),
  1314. },
  1315. };
  1316. void __init s3c64xx_spi2_set_platdata(struct s3c64xx_spi_info *pd,
  1317. int src_clk_nr, int num_cs)
  1318. {
  1319. if (!pd) {
  1320. pr_err("%s:Need to pass platform data\n", __func__);
  1321. return;
  1322. }
  1323. /* Reject invalid configuration */
  1324. if (!num_cs || src_clk_nr < 0) {
  1325. pr_err("%s: Invalid SPI configuration\n", __func__);
  1326. return;
  1327. }
  1328. pd->num_cs = num_cs;
  1329. pd->src_clk_nr = src_clk_nr;
  1330. s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi2);
  1331. }
  1332. #endif /* CONFIG_S3C64XX_DEV_SPI2 */