kirkwood.dtsi 4.2 KB

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  1. /include/ "skeleton.dtsi"
  2. / {
  3. compatible = "marvell,kirkwood";
  4. interrupt-parent = <&intc>;
  5. cpus {
  6. #address-cells = <1>;
  7. #size-cells = <0>;
  8. cpu@0 {
  9. device_type = "cpu";
  10. compatible = "marvell,feroceon";
  11. clocks = <&core_clk 1>, <&core_clk 3>, <&gate_clk 11>;
  12. clock-names = "cpu_clk", "ddrclk", "powersave";
  13. };
  14. };
  15. aliases {
  16. gpio0 = &gpio0;
  17. gpio1 = &gpio1;
  18. };
  19. intc: interrupt-controller {
  20. compatible = "marvell,orion-intc", "marvell,intc";
  21. interrupt-controller;
  22. #interrupt-cells = <1>;
  23. reg = <0xf1020204 0x04>,
  24. <0xf1020214 0x04>;
  25. };
  26. mbus {
  27. compatible = "marvell,kirkwood-mbus", "simple-bus";
  28. controller = <&mbusc>;
  29. };
  30. ocp@f1000000 {
  31. compatible = "simple-bus";
  32. ranges = <0x00000000 0xf1000000 0x0100000
  33. 0xe0000000 0xe0000000 0x8100000 /* PCIE */
  34. 0xf4000000 0xf4000000 0x0000400
  35. 0xf5000000 0xf5000000 0x0000400>;
  36. #address-cells = <1>;
  37. #size-cells = <1>;
  38. mbusc: mbus-controller@20000 {
  39. compatible = "marvell,mbus-controller";
  40. reg = <0x20000 0x80>, <0x1500 0x20>;
  41. };
  42. core_clk: core-clocks@10030 {
  43. compatible = "marvell,kirkwood-core-clock";
  44. reg = <0x10030 0x4>;
  45. #clock-cells = <1>;
  46. };
  47. gpio0: gpio@10100 {
  48. compatible = "marvell,orion-gpio";
  49. #gpio-cells = <2>;
  50. gpio-controller;
  51. reg = <0x10100 0x40>;
  52. ngpios = <32>;
  53. interrupt-controller;
  54. #interrupt-cells = <2>;
  55. interrupts = <35>, <36>, <37>, <38>;
  56. clocks = <&gate_clk 7>;
  57. };
  58. gpio1: gpio@10140 {
  59. compatible = "marvell,orion-gpio";
  60. #gpio-cells = <2>;
  61. gpio-controller;
  62. reg = <0x10140 0x40>;
  63. ngpios = <18>;
  64. interrupt-controller;
  65. #interrupt-cells = <2>;
  66. interrupts = <39>, <40>, <41>;
  67. clocks = <&gate_clk 7>;
  68. };
  69. serial@12000 {
  70. compatible = "ns16550a";
  71. reg = <0x12000 0x100>;
  72. reg-shift = <2>;
  73. interrupts = <33>;
  74. clocks = <&gate_clk 7>;
  75. status = "disabled";
  76. };
  77. serial@12100 {
  78. compatible = "ns16550a";
  79. reg = <0x12100 0x100>;
  80. reg-shift = <2>;
  81. interrupts = <34>;
  82. clocks = <&gate_clk 7>;
  83. status = "disabled";
  84. };
  85. spi@10600 {
  86. compatible = "marvell,orion-spi";
  87. #address-cells = <1>;
  88. #size-cells = <0>;
  89. cell-index = <0>;
  90. interrupts = <23>;
  91. reg = <0x10600 0x28>;
  92. clocks = <&gate_clk 7>;
  93. status = "disabled";
  94. };
  95. gate_clk: clock-gating-control@2011c {
  96. compatible = "marvell,kirkwood-gating-clock";
  97. reg = <0x2011c 0x4>;
  98. clocks = <&core_clk 0>;
  99. #clock-cells = <1>;
  100. };
  101. wdt@20300 {
  102. compatible = "marvell,orion-wdt";
  103. reg = <0x20300 0x28>;
  104. clocks = <&gate_clk 7>;
  105. status = "okay";
  106. };
  107. xor@60800 {
  108. compatible = "marvell,orion-xor";
  109. reg = <0x60800 0x100
  110. 0x60A00 0x100>;
  111. status = "okay";
  112. clocks = <&gate_clk 8>;
  113. xor00 {
  114. interrupts = <5>;
  115. dmacap,memcpy;
  116. dmacap,xor;
  117. };
  118. xor01 {
  119. interrupts = <6>;
  120. dmacap,memcpy;
  121. dmacap,xor;
  122. dmacap,memset;
  123. };
  124. };
  125. xor@60900 {
  126. compatible = "marvell,orion-xor";
  127. reg = <0x60900 0x100
  128. 0xd0B00 0x100>;
  129. status = "okay";
  130. clocks = <&gate_clk 16>;
  131. xor00 {
  132. interrupts = <7>;
  133. dmacap,memcpy;
  134. dmacap,xor;
  135. };
  136. xor01 {
  137. interrupts = <8>;
  138. dmacap,memcpy;
  139. dmacap,xor;
  140. dmacap,memset;
  141. };
  142. };
  143. ehci@50000 {
  144. compatible = "marvell,orion-ehci";
  145. reg = <0x50000 0x1000>;
  146. interrupts = <19>;
  147. clocks = <&gate_clk 3>;
  148. status = "okay";
  149. };
  150. nand@3000000 {
  151. #address-cells = <1>;
  152. #size-cells = <1>;
  153. cle = <0>;
  154. ale = <1>;
  155. bank-width = <1>;
  156. compatible = "marvell,orion-nand";
  157. reg = <0xf4000000 0x400>;
  158. chip-delay = <25>;
  159. /* set partition map and/or chip-delay in board dts */
  160. clocks = <&gate_clk 7>;
  161. status = "disabled";
  162. };
  163. i2c@11000 {
  164. compatible = "marvell,mv64xxx-i2c";
  165. reg = <0x11000 0x20>;
  166. #address-cells = <1>;
  167. #size-cells = <0>;
  168. interrupts = <29>;
  169. clock-frequency = <100000>;
  170. clocks = <&gate_clk 7>;
  171. status = "disabled";
  172. };
  173. crypto@30000 {
  174. compatible = "marvell,orion-crypto";
  175. reg = <0x30000 0x10000>,
  176. <0xf5000000 0x800>;
  177. reg-names = "regs", "sram";
  178. interrupts = <22>;
  179. clocks = <&gate_clk 17>;
  180. status = "okay";
  181. };
  182. };
  183. };