edac_mc_sysfs.c 27 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091
  1. /*
  2. * edac_mc kernel module
  3. * (C) 2005-2007 Linux Networx (http://lnxi.com)
  4. *
  5. * This file may be distributed under the terms of the
  6. * GNU General Public License.
  7. *
  8. * Written Doug Thompson <norsk5@xmission.com> www.softwarebitmaker.com
  9. *
  10. * (c) 2012 - Mauro Carvalho Chehab <mchehab@redhat.com>
  11. * The entire API were re-written, and ported to use struct device
  12. *
  13. */
  14. #include <linux/ctype.h>
  15. #include <linux/slab.h>
  16. #include <linux/edac.h>
  17. #include <linux/bug.h>
  18. #include <linux/pm_runtime.h>
  19. #include <linux/uaccess.h>
  20. #include "edac_core.h"
  21. #include "edac_module.h"
  22. /* MC EDAC Controls, setable by module parameter, and sysfs */
  23. static int edac_mc_log_ue = 1;
  24. static int edac_mc_log_ce = 1;
  25. static int edac_mc_panic_on_ue;
  26. static int edac_mc_poll_msec = 1000;
  27. /* Getter functions for above */
  28. int edac_mc_get_log_ue(void)
  29. {
  30. return edac_mc_log_ue;
  31. }
  32. int edac_mc_get_log_ce(void)
  33. {
  34. return edac_mc_log_ce;
  35. }
  36. int edac_mc_get_panic_on_ue(void)
  37. {
  38. return edac_mc_panic_on_ue;
  39. }
  40. /* this is temporary */
  41. int edac_mc_get_poll_msec(void)
  42. {
  43. return edac_mc_poll_msec;
  44. }
  45. static int edac_set_poll_msec(const char *val, struct kernel_param *kp)
  46. {
  47. long l;
  48. int ret;
  49. if (!val)
  50. return -EINVAL;
  51. ret = strict_strtol(val, 0, &l);
  52. if (ret == -EINVAL || ((int)l != l))
  53. return -EINVAL;
  54. *((int *)kp->arg) = l;
  55. /* notify edac_mc engine to reset the poll period */
  56. edac_mc_reset_delay_period(l);
  57. return 0;
  58. }
  59. /* Parameter declarations for above */
  60. module_param(edac_mc_panic_on_ue, int, 0644);
  61. MODULE_PARM_DESC(edac_mc_panic_on_ue, "Panic on uncorrected error: 0=off 1=on");
  62. module_param(edac_mc_log_ue, int, 0644);
  63. MODULE_PARM_DESC(edac_mc_log_ue,
  64. "Log uncorrectable error to console: 0=off 1=on");
  65. module_param(edac_mc_log_ce, int, 0644);
  66. MODULE_PARM_DESC(edac_mc_log_ce,
  67. "Log correctable error to console: 0=off 1=on");
  68. module_param_call(edac_mc_poll_msec, edac_set_poll_msec, param_get_int,
  69. &edac_mc_poll_msec, 0644);
  70. MODULE_PARM_DESC(edac_mc_poll_msec, "Polling period in milliseconds");
  71. static struct device mci_pdev;
  72. /*
  73. * various constants for Memory Controllers
  74. */
  75. static const char *mem_types[] = {
  76. [MEM_EMPTY] = "Empty",
  77. [MEM_RESERVED] = "Reserved",
  78. [MEM_UNKNOWN] = "Unknown",
  79. [MEM_FPM] = "FPM",
  80. [MEM_EDO] = "EDO",
  81. [MEM_BEDO] = "BEDO",
  82. [MEM_SDR] = "Unbuffered-SDR",
  83. [MEM_RDR] = "Registered-SDR",
  84. [MEM_DDR] = "Unbuffered-DDR",
  85. [MEM_RDDR] = "Registered-DDR",
  86. [MEM_RMBS] = "RMBS",
  87. [MEM_DDR2] = "Unbuffered-DDR2",
  88. [MEM_FB_DDR2] = "FullyBuffered-DDR2",
  89. [MEM_RDDR2] = "Registered-DDR2",
  90. [MEM_XDR] = "XDR",
  91. [MEM_DDR3] = "Unbuffered-DDR3",
  92. [MEM_RDDR3] = "Registered-DDR3"
  93. };
  94. static const char *dev_types[] = {
  95. [DEV_UNKNOWN] = "Unknown",
  96. [DEV_X1] = "x1",
  97. [DEV_X2] = "x2",
  98. [DEV_X4] = "x4",
  99. [DEV_X8] = "x8",
  100. [DEV_X16] = "x16",
  101. [DEV_X32] = "x32",
  102. [DEV_X64] = "x64"
  103. };
  104. static const char *edac_caps[] = {
  105. [EDAC_UNKNOWN] = "Unknown",
  106. [EDAC_NONE] = "None",
  107. [EDAC_RESERVED] = "Reserved",
  108. [EDAC_PARITY] = "PARITY",
  109. [EDAC_EC] = "EC",
  110. [EDAC_SECDED] = "SECDED",
  111. [EDAC_S2ECD2ED] = "S2ECD2ED",
  112. [EDAC_S4ECD4ED] = "S4ECD4ED",
  113. [EDAC_S8ECD8ED] = "S8ECD8ED",
  114. [EDAC_S16ECD16ED] = "S16ECD16ED"
  115. };
  116. #ifdef CONFIG_EDAC_LEGACY_SYSFS
  117. /*
  118. * EDAC sysfs CSROW data structures and methods
  119. */
  120. #define to_csrow(k) container_of(k, struct csrow_info, dev)
  121. /*
  122. * We need it to avoid namespace conflicts between the legacy API
  123. * and the per-dimm/per-rank one
  124. */
  125. #define DEVICE_ATTR_LEGACY(_name, _mode, _show, _store) \
  126. struct device_attribute dev_attr_legacy_##_name = __ATTR(_name, _mode, _show, _store)
  127. struct dev_ch_attribute {
  128. struct device_attribute attr;
  129. int channel;
  130. };
  131. #define DEVICE_CHANNEL(_name, _mode, _show, _store, _var) \
  132. struct dev_ch_attribute dev_attr_legacy_##_name = \
  133. { __ATTR(_name, _mode, _show, _store), (_var) }
  134. #define to_channel(k) (container_of(k, struct dev_ch_attribute, attr)->channel)
  135. /* Set of more default csrow<id> attribute show/store functions */
  136. static ssize_t csrow_ue_count_show(struct device *dev,
  137. struct device_attribute *mattr, char *data)
  138. {
  139. struct csrow_info *csrow = to_csrow(dev);
  140. return sprintf(data, "%u\n", csrow->ue_count);
  141. }
  142. static ssize_t csrow_ce_count_show(struct device *dev,
  143. struct device_attribute *mattr, char *data)
  144. {
  145. struct csrow_info *csrow = to_csrow(dev);
  146. return sprintf(data, "%u\n", csrow->ce_count);
  147. }
  148. static ssize_t csrow_size_show(struct device *dev,
  149. struct device_attribute *mattr, char *data)
  150. {
  151. struct csrow_info *csrow = to_csrow(dev);
  152. int i;
  153. u32 nr_pages = 0;
  154. for (i = 0; i < csrow->nr_channels; i++)
  155. nr_pages += csrow->channels[i].dimm->nr_pages;
  156. return sprintf(data, "%u\n", PAGES_TO_MiB(nr_pages));
  157. }
  158. static ssize_t csrow_mem_type_show(struct device *dev,
  159. struct device_attribute *mattr, char *data)
  160. {
  161. struct csrow_info *csrow = to_csrow(dev);
  162. return sprintf(data, "%s\n", mem_types[csrow->channels[0].dimm->mtype]);
  163. }
  164. static ssize_t csrow_dev_type_show(struct device *dev,
  165. struct device_attribute *mattr, char *data)
  166. {
  167. struct csrow_info *csrow = to_csrow(dev);
  168. return sprintf(data, "%s\n", dev_types[csrow->channels[0].dimm->dtype]);
  169. }
  170. static ssize_t csrow_edac_mode_show(struct device *dev,
  171. struct device_attribute *mattr,
  172. char *data)
  173. {
  174. struct csrow_info *csrow = to_csrow(dev);
  175. return sprintf(data, "%s\n", edac_caps[csrow->channels[0].dimm->edac_mode]);
  176. }
  177. /* show/store functions for DIMM Label attributes */
  178. static ssize_t channel_dimm_label_show(struct device *dev,
  179. struct device_attribute *mattr,
  180. char *data)
  181. {
  182. struct csrow_info *csrow = to_csrow(dev);
  183. unsigned chan = to_channel(mattr);
  184. struct rank_info *rank = &csrow->channels[chan];
  185. /* if field has not been initialized, there is nothing to send */
  186. if (!rank->dimm->label[0])
  187. return 0;
  188. return snprintf(data, EDAC_MC_LABEL_LEN, "%s\n",
  189. rank->dimm->label);
  190. }
  191. static ssize_t channel_dimm_label_store(struct device *dev,
  192. struct device_attribute *mattr,
  193. const char *data, size_t count)
  194. {
  195. struct csrow_info *csrow = to_csrow(dev);
  196. unsigned chan = to_channel(mattr);
  197. struct rank_info *rank = &csrow->channels[chan];
  198. ssize_t max_size = 0;
  199. max_size = min((ssize_t) count, (ssize_t) EDAC_MC_LABEL_LEN - 1);
  200. strncpy(rank->dimm->label, data, max_size);
  201. rank->dimm->label[max_size] = '\0';
  202. return max_size;
  203. }
  204. /* show function for dynamic chX_ce_count attribute */
  205. static ssize_t channel_ce_count_show(struct device *dev,
  206. struct device_attribute *mattr, char *data)
  207. {
  208. struct csrow_info *csrow = to_csrow(dev);
  209. unsigned chan = to_channel(mattr);
  210. struct rank_info *rank = &csrow->channels[chan];
  211. return sprintf(data, "%u\n", rank->ce_count);
  212. }
  213. /* cwrow<id>/attribute files */
  214. DEVICE_ATTR_LEGACY(size_mb, S_IRUGO, csrow_size_show, NULL);
  215. DEVICE_ATTR_LEGACY(dev_type, S_IRUGO, csrow_dev_type_show, NULL);
  216. DEVICE_ATTR_LEGACY(mem_type, S_IRUGO, csrow_mem_type_show, NULL);
  217. DEVICE_ATTR_LEGACY(edac_mode, S_IRUGO, csrow_edac_mode_show, NULL);
  218. DEVICE_ATTR_LEGACY(ue_count, S_IRUGO, csrow_ue_count_show, NULL);
  219. DEVICE_ATTR_LEGACY(ce_count, S_IRUGO, csrow_ce_count_show, NULL);
  220. /* default attributes of the CSROW<id> object */
  221. static struct attribute *csrow_attrs[] = {
  222. &dev_attr_legacy_dev_type.attr,
  223. &dev_attr_legacy_mem_type.attr,
  224. &dev_attr_legacy_edac_mode.attr,
  225. &dev_attr_legacy_size_mb.attr,
  226. &dev_attr_legacy_ue_count.attr,
  227. &dev_attr_legacy_ce_count.attr,
  228. NULL,
  229. };
  230. static struct attribute_group csrow_attr_grp = {
  231. .attrs = csrow_attrs,
  232. };
  233. static const struct attribute_group *csrow_attr_groups[] = {
  234. &csrow_attr_grp,
  235. NULL
  236. };
  237. static void csrow_attr_release(struct device *device)
  238. {
  239. debugf1("Releasing csrow device %s\n", dev_name(device));
  240. }
  241. static struct device_type csrow_attr_type = {
  242. .groups = csrow_attr_groups,
  243. .release = csrow_attr_release,
  244. };
  245. /*
  246. * possible dynamic channel DIMM Label attribute files
  247. *
  248. */
  249. #define EDAC_NR_CHANNELS 6
  250. DEVICE_CHANNEL(ch0_dimm_label, S_IRUGO | S_IWUSR,
  251. channel_dimm_label_show, channel_dimm_label_store, 0);
  252. DEVICE_CHANNEL(ch1_dimm_label, S_IRUGO | S_IWUSR,
  253. channel_dimm_label_show, channel_dimm_label_store, 1);
  254. DEVICE_CHANNEL(ch2_dimm_label, S_IRUGO | S_IWUSR,
  255. channel_dimm_label_show, channel_dimm_label_store, 2);
  256. DEVICE_CHANNEL(ch3_dimm_label, S_IRUGO | S_IWUSR,
  257. channel_dimm_label_show, channel_dimm_label_store, 3);
  258. DEVICE_CHANNEL(ch4_dimm_label, S_IRUGO | S_IWUSR,
  259. channel_dimm_label_show, channel_dimm_label_store, 4);
  260. DEVICE_CHANNEL(ch5_dimm_label, S_IRUGO | S_IWUSR,
  261. channel_dimm_label_show, channel_dimm_label_store, 5);
  262. /* Total possible dynamic DIMM Label attribute file table */
  263. static struct device_attribute *dynamic_csrow_dimm_attr[] = {
  264. &dev_attr_legacy_ch0_dimm_label.attr,
  265. &dev_attr_legacy_ch1_dimm_label.attr,
  266. &dev_attr_legacy_ch2_dimm_label.attr,
  267. &dev_attr_legacy_ch3_dimm_label.attr,
  268. &dev_attr_legacy_ch4_dimm_label.attr,
  269. &dev_attr_legacy_ch5_dimm_label.attr
  270. };
  271. /* possible dynamic channel ce_count attribute files */
  272. DEVICE_CHANNEL(ch0_ce_count, S_IRUGO | S_IWUSR,
  273. channel_ce_count_show, NULL, 0);
  274. DEVICE_CHANNEL(ch1_ce_count, S_IRUGO | S_IWUSR,
  275. channel_ce_count_show, NULL, 1);
  276. DEVICE_CHANNEL(ch2_ce_count, S_IRUGO | S_IWUSR,
  277. channel_ce_count_show, NULL, 2);
  278. DEVICE_CHANNEL(ch3_ce_count, S_IRUGO | S_IWUSR,
  279. channel_ce_count_show, NULL, 3);
  280. DEVICE_CHANNEL(ch4_ce_count, S_IRUGO | S_IWUSR,
  281. channel_ce_count_show, NULL, 4);
  282. DEVICE_CHANNEL(ch5_ce_count, S_IRUGO | S_IWUSR,
  283. channel_ce_count_show, NULL, 5);
  284. /* Total possible dynamic ce_count attribute file table */
  285. static struct device_attribute *dynamic_csrow_ce_count_attr[] = {
  286. &dev_attr_legacy_ch0_ce_count.attr,
  287. &dev_attr_legacy_ch1_ce_count.attr,
  288. &dev_attr_legacy_ch2_ce_count.attr,
  289. &dev_attr_legacy_ch3_ce_count.attr,
  290. &dev_attr_legacy_ch4_ce_count.attr,
  291. &dev_attr_legacy_ch5_ce_count.attr
  292. };
  293. /* Create a CSROW object under specifed edac_mc_device */
  294. static int edac_create_csrow_object(struct mem_ctl_info *mci,
  295. struct csrow_info *csrow, int index)
  296. {
  297. int err, chan;
  298. if (csrow->nr_channels >= EDAC_NR_CHANNELS)
  299. return -ENODEV;
  300. csrow->dev.type = &csrow_attr_type;
  301. csrow->dev.bus = &mci->bus;
  302. device_initialize(&csrow->dev);
  303. csrow->dev.parent = &mci->dev;
  304. dev_set_name(&csrow->dev, "csrow%d", index);
  305. dev_set_drvdata(&csrow->dev, csrow);
  306. debugf0("%s(): creating (virtual) csrow node %s\n", __func__,
  307. dev_name(&csrow->dev));
  308. err = device_add(&csrow->dev);
  309. if (err < 0)
  310. return err;
  311. for (chan = 0; chan < csrow->nr_channels; chan++) {
  312. err = device_create_file(&csrow->dev,
  313. dynamic_csrow_dimm_attr[chan]);
  314. if (err < 0)
  315. goto error;
  316. err = device_create_file(&csrow->dev,
  317. dynamic_csrow_ce_count_attr[chan]);
  318. if (err < 0) {
  319. device_remove_file(&csrow->dev,
  320. dynamic_csrow_dimm_attr[chan]);
  321. goto error;
  322. }
  323. }
  324. return 0;
  325. error:
  326. for (--chan; chan >= 0; chan--) {
  327. device_remove_file(&csrow->dev,
  328. dynamic_csrow_dimm_attr[chan]);
  329. device_remove_file(&csrow->dev,
  330. dynamic_csrow_ce_count_attr[chan]);
  331. }
  332. put_device(&csrow->dev);
  333. return err;
  334. }
  335. /* Create a CSROW object under specifed edac_mc_device */
  336. static int edac_create_csrow_objects(struct mem_ctl_info *mci)
  337. {
  338. int err, i, chan;
  339. struct csrow_info *csrow;
  340. for (i = 0; i < mci->nr_csrows; i++) {
  341. err = edac_create_csrow_object(mci, &mci->csrows[i], i);
  342. if (err < 0)
  343. goto error;
  344. }
  345. return 0;
  346. error:
  347. for (--i; i >= 0; i--) {
  348. csrow = &mci->csrows[i];
  349. for (chan = csrow->nr_channels - 1; chan >= 0; chan--) {
  350. device_remove_file(&csrow->dev,
  351. dynamic_csrow_dimm_attr[chan]);
  352. device_remove_file(&csrow->dev,
  353. dynamic_csrow_ce_count_attr[chan]);
  354. }
  355. put_device(&mci->csrows[i].dev);
  356. }
  357. return err;
  358. }
  359. static void edac_delete_csrow_objects(struct mem_ctl_info *mci)
  360. {
  361. int i, chan;
  362. struct csrow_info *csrow;
  363. for (i = mci->nr_csrows - 1; i >= 0; i--) {
  364. csrow = &mci->csrows[i];
  365. for (chan = csrow->nr_channels - 1; chan >= 0; chan--) {
  366. debugf1("Removing csrow %d channel %d sysfs nodes\n",
  367. i, chan);
  368. device_remove_file(&csrow->dev,
  369. dynamic_csrow_dimm_attr[chan]);
  370. device_remove_file(&csrow->dev,
  371. dynamic_csrow_ce_count_attr[chan]);
  372. }
  373. put_device(&mci->csrows[i].dev);
  374. device_del(&mci->csrows[i].dev);
  375. }
  376. }
  377. #endif
  378. /*
  379. * Per-dimm (or per-rank) devices
  380. */
  381. #define to_dimm(k) container_of(k, struct dimm_info, dev)
  382. /* show/store functions for DIMM Label attributes */
  383. static ssize_t dimmdev_location_show(struct device *dev,
  384. struct device_attribute *mattr, char *data)
  385. {
  386. struct dimm_info *dimm = to_dimm(dev);
  387. struct mem_ctl_info *mci = dimm->mci;
  388. int i;
  389. char *p = data;
  390. for (i = 0; i < mci->n_layers; i++) {
  391. p += sprintf(p, "%s %d ",
  392. edac_layer_name[mci->layers[i].type],
  393. dimm->location[i]);
  394. }
  395. return p - data;
  396. }
  397. static ssize_t dimmdev_label_show(struct device *dev,
  398. struct device_attribute *mattr, char *data)
  399. {
  400. struct dimm_info *dimm = to_dimm(dev);
  401. /* if field has not been initialized, there is nothing to send */
  402. if (!dimm->label[0])
  403. return 0;
  404. return snprintf(data, EDAC_MC_LABEL_LEN, "%s\n", dimm->label);
  405. }
  406. static ssize_t dimmdev_label_store(struct device *dev,
  407. struct device_attribute *mattr,
  408. const char *data,
  409. size_t count)
  410. {
  411. struct dimm_info *dimm = to_dimm(dev);
  412. ssize_t max_size = 0;
  413. max_size = min((ssize_t) count, (ssize_t) EDAC_MC_LABEL_LEN - 1);
  414. strncpy(dimm->label, data, max_size);
  415. dimm->label[max_size] = '\0';
  416. return max_size;
  417. }
  418. static ssize_t dimmdev_size_show(struct device *dev,
  419. struct device_attribute *mattr, char *data)
  420. {
  421. struct dimm_info *dimm = to_dimm(dev);
  422. return sprintf(data, "%u\n", PAGES_TO_MiB(dimm->nr_pages));
  423. }
  424. static ssize_t dimmdev_mem_type_show(struct device *dev,
  425. struct device_attribute *mattr, char *data)
  426. {
  427. struct dimm_info *dimm = to_dimm(dev);
  428. return sprintf(data, "%s\n", mem_types[dimm->mtype]);
  429. }
  430. static ssize_t dimmdev_dev_type_show(struct device *dev,
  431. struct device_attribute *mattr, char *data)
  432. {
  433. struct dimm_info *dimm = to_dimm(dev);
  434. return sprintf(data, "%s\n", dev_types[dimm->dtype]);
  435. }
  436. static ssize_t dimmdev_edac_mode_show(struct device *dev,
  437. struct device_attribute *mattr,
  438. char *data)
  439. {
  440. struct dimm_info *dimm = to_dimm(dev);
  441. return sprintf(data, "%s\n", edac_caps[dimm->edac_mode]);
  442. }
  443. /* dimm/rank attribute files */
  444. static DEVICE_ATTR(dimm_label, S_IRUGO | S_IWUSR,
  445. dimmdev_label_show, dimmdev_label_store);
  446. static DEVICE_ATTR(dimm_location, S_IRUGO, dimmdev_location_show, NULL);
  447. static DEVICE_ATTR(size, S_IRUGO, dimmdev_size_show, NULL);
  448. static DEVICE_ATTR(dimm_mem_type, S_IRUGO, dimmdev_mem_type_show, NULL);
  449. static DEVICE_ATTR(dimm_dev_type, S_IRUGO, dimmdev_dev_type_show, NULL);
  450. static DEVICE_ATTR(dimm_edac_mode, S_IRUGO, dimmdev_edac_mode_show, NULL);
  451. /* attributes of the dimm<id>/rank<id> object */
  452. static struct attribute *dimm_attrs[] = {
  453. &dev_attr_dimm_label.attr,
  454. &dev_attr_dimm_location.attr,
  455. &dev_attr_size.attr,
  456. &dev_attr_dimm_mem_type.attr,
  457. &dev_attr_dimm_dev_type.attr,
  458. &dev_attr_dimm_edac_mode.attr,
  459. NULL,
  460. };
  461. static struct attribute_group dimm_attr_grp = {
  462. .attrs = dimm_attrs,
  463. };
  464. static const struct attribute_group *dimm_attr_groups[] = {
  465. &dimm_attr_grp,
  466. NULL
  467. };
  468. static void dimm_attr_release(struct device *device)
  469. {
  470. debugf1("Releasing dimm device %s\n", dev_name(device));
  471. }
  472. static struct device_type dimm_attr_type = {
  473. .groups = dimm_attr_groups,
  474. .release = dimm_attr_release,
  475. };
  476. /* Create a DIMM object under specifed memory controller device */
  477. static int edac_create_dimm_object(struct mem_ctl_info *mci,
  478. struct dimm_info *dimm,
  479. int index)
  480. {
  481. int err;
  482. dimm->mci = mci;
  483. dimm->dev.type = &dimm_attr_type;
  484. dimm->dev.bus = &mci->bus;
  485. device_initialize(&dimm->dev);
  486. dimm->dev.parent = &mci->dev;
  487. if (mci->mem_is_per_rank)
  488. dev_set_name(&dimm->dev, "rank%d", index);
  489. else
  490. dev_set_name(&dimm->dev, "dimm%d", index);
  491. dev_set_drvdata(&dimm->dev, dimm);
  492. pm_runtime_forbid(&mci->dev);
  493. err = device_add(&dimm->dev);
  494. debugf0("%s(): creating rank/dimm device %s\n", __func__,
  495. dev_name(&dimm->dev));
  496. return err;
  497. }
  498. /*
  499. * Memory controller device
  500. */
  501. #define to_mci(k) container_of(k, struct mem_ctl_info, dev)
  502. static ssize_t mci_reset_counters_store(struct device *dev,
  503. struct device_attribute *mattr,
  504. const char *data, size_t count)
  505. {
  506. struct mem_ctl_info *mci = to_mci(dev);
  507. int cnt, row, chan, i;
  508. mci->ue_mc = 0;
  509. mci->ce_mc = 0;
  510. mci->ue_noinfo_count = 0;
  511. mci->ce_noinfo_count = 0;
  512. for (row = 0; row < mci->nr_csrows; row++) {
  513. struct csrow_info *ri = &mci->csrows[row];
  514. ri->ue_count = 0;
  515. ri->ce_count = 0;
  516. for (chan = 0; chan < ri->nr_channels; chan++)
  517. ri->channels[chan].ce_count = 0;
  518. }
  519. cnt = 1;
  520. for (i = 0; i < mci->n_layers; i++) {
  521. cnt *= mci->layers[i].size;
  522. memset(mci->ce_per_layer[i], 0, cnt * sizeof(u32));
  523. memset(mci->ue_per_layer[i], 0, cnt * sizeof(u32));
  524. }
  525. mci->start_time = jiffies;
  526. return count;
  527. }
  528. /* Memory scrubbing interface:
  529. *
  530. * A MC driver can limit the scrubbing bandwidth based on the CPU type.
  531. * Therefore, ->set_sdram_scrub_rate should be made to return the actual
  532. * bandwidth that is accepted or 0 when scrubbing is to be disabled.
  533. *
  534. * Negative value still means that an error has occurred while setting
  535. * the scrub rate.
  536. */
  537. static ssize_t mci_sdram_scrub_rate_store(struct device *dev,
  538. struct device_attribute *mattr,
  539. const char *data, size_t count)
  540. {
  541. struct mem_ctl_info *mci = to_mci(dev);
  542. unsigned long bandwidth = 0;
  543. int new_bw = 0;
  544. if (!mci->set_sdram_scrub_rate)
  545. return -ENODEV;
  546. if (strict_strtoul(data, 10, &bandwidth) < 0)
  547. return -EINVAL;
  548. new_bw = mci->set_sdram_scrub_rate(mci, bandwidth);
  549. if (new_bw < 0) {
  550. edac_printk(KERN_WARNING, EDAC_MC,
  551. "Error setting scrub rate to: %lu\n", bandwidth);
  552. return -EINVAL;
  553. }
  554. return count;
  555. }
  556. /*
  557. * ->get_sdram_scrub_rate() return value semantics same as above.
  558. */
  559. static ssize_t mci_sdram_scrub_rate_show(struct device *dev,
  560. struct device_attribute *mattr,
  561. char *data)
  562. {
  563. struct mem_ctl_info *mci = to_mci(dev);
  564. int bandwidth = 0;
  565. if (!mci->get_sdram_scrub_rate)
  566. return -ENODEV;
  567. bandwidth = mci->get_sdram_scrub_rate(mci);
  568. if (bandwidth < 0) {
  569. edac_printk(KERN_DEBUG, EDAC_MC, "Error reading scrub rate\n");
  570. return bandwidth;
  571. }
  572. return sprintf(data, "%d\n", bandwidth);
  573. }
  574. /* default attribute files for the MCI object */
  575. static ssize_t mci_ue_count_show(struct device *dev,
  576. struct device_attribute *mattr,
  577. char *data)
  578. {
  579. struct mem_ctl_info *mci = to_mci(dev);
  580. return sprintf(data, "%d\n", mci->ue_mc);
  581. }
  582. static ssize_t mci_ce_count_show(struct device *dev,
  583. struct device_attribute *mattr,
  584. char *data)
  585. {
  586. struct mem_ctl_info *mci = to_mci(dev);
  587. return sprintf(data, "%d\n", mci->ce_mc);
  588. }
  589. static ssize_t mci_ce_noinfo_show(struct device *dev,
  590. struct device_attribute *mattr,
  591. char *data)
  592. {
  593. struct mem_ctl_info *mci = to_mci(dev);
  594. return sprintf(data, "%d\n", mci->ce_noinfo_count);
  595. }
  596. static ssize_t mci_ue_noinfo_show(struct device *dev,
  597. struct device_attribute *mattr,
  598. char *data)
  599. {
  600. struct mem_ctl_info *mci = to_mci(dev);
  601. return sprintf(data, "%d\n", mci->ue_noinfo_count);
  602. }
  603. static ssize_t mci_seconds_show(struct device *dev,
  604. struct device_attribute *mattr,
  605. char *data)
  606. {
  607. struct mem_ctl_info *mci = to_mci(dev);
  608. return sprintf(data, "%ld\n", (jiffies - mci->start_time) / HZ);
  609. }
  610. static ssize_t mci_ctl_name_show(struct device *dev,
  611. struct device_attribute *mattr,
  612. char *data)
  613. {
  614. struct mem_ctl_info *mci = to_mci(dev);
  615. return sprintf(data, "%s\n", mci->ctl_name);
  616. }
  617. static ssize_t mci_size_mb_show(struct device *dev,
  618. struct device_attribute *mattr,
  619. char *data)
  620. {
  621. struct mem_ctl_info *mci = to_mci(dev);
  622. int total_pages = 0, csrow_idx, j;
  623. for (csrow_idx = 0; csrow_idx < mci->nr_csrows; csrow_idx++) {
  624. struct csrow_info *csrow = &mci->csrows[csrow_idx];
  625. for (j = 0; j < csrow->nr_channels; j++) {
  626. struct dimm_info *dimm = csrow->channels[j].dimm;
  627. total_pages += dimm->nr_pages;
  628. }
  629. }
  630. return sprintf(data, "%u\n", PAGES_TO_MiB(total_pages));
  631. }
  632. static ssize_t mci_max_location_show(struct device *dev,
  633. struct device_attribute *mattr,
  634. char *data)
  635. {
  636. struct mem_ctl_info *mci = to_mci(dev);
  637. int i;
  638. char *p = data;
  639. for (i = 0; i < mci->n_layers; i++) {
  640. p += sprintf(p, "%s %d ",
  641. edac_layer_name[mci->layers[i].type],
  642. mci->layers[i].size - 1);
  643. }
  644. return p - data;
  645. }
  646. #ifdef CONFIG_EDAC_DEBUG
  647. static ssize_t edac_fake_inject_write(struct file *file,
  648. const char __user *data,
  649. size_t count, loff_t *ppos)
  650. {
  651. struct device *dev = file->private_data;
  652. struct mem_ctl_info *mci = to_mci(dev);
  653. static enum hw_event_mc_err_type type;
  654. type = mci->fake_inject_ue ? HW_EVENT_ERR_UNCORRECTED
  655. : HW_EVENT_ERR_CORRECTED;
  656. printk(KERN_DEBUG
  657. "Generating a %s fake error to %d.%d.%d to test core handling. NOTE: this won't test the driver-specific decoding logic.\n",
  658. (type == HW_EVENT_ERR_UNCORRECTED) ? "UE" : "CE",
  659. mci->fake_inject_layer[0],
  660. mci->fake_inject_layer[1],
  661. mci->fake_inject_layer[2]
  662. );
  663. edac_mc_handle_error(type, mci, 0, 0, 0,
  664. mci->fake_inject_layer[0],
  665. mci->fake_inject_layer[1],
  666. mci->fake_inject_layer[2],
  667. "FAKE ERROR", "for EDAC testing only", NULL);
  668. return count;
  669. }
  670. static int debugfs_open(struct inode *inode, struct file *file)
  671. {
  672. file->private_data = inode->i_private;
  673. return 0;
  674. }
  675. static const struct file_operations debug_fake_inject_fops = {
  676. .open = debugfs_open,
  677. .write = edac_fake_inject_write,
  678. .llseek = generic_file_llseek,
  679. };
  680. #endif
  681. /* default Control file */
  682. DEVICE_ATTR(reset_counters, S_IWUSR, NULL, mci_reset_counters_store);
  683. /* default Attribute files */
  684. DEVICE_ATTR(mc_name, S_IRUGO, mci_ctl_name_show, NULL);
  685. DEVICE_ATTR(size_mb, S_IRUGO, mci_size_mb_show, NULL);
  686. DEVICE_ATTR(seconds_since_reset, S_IRUGO, mci_seconds_show, NULL);
  687. DEVICE_ATTR(ue_noinfo_count, S_IRUGO, mci_ue_noinfo_show, NULL);
  688. DEVICE_ATTR(ce_noinfo_count, S_IRUGO, mci_ce_noinfo_show, NULL);
  689. DEVICE_ATTR(ue_count, S_IRUGO, mci_ue_count_show, NULL);
  690. DEVICE_ATTR(ce_count, S_IRUGO, mci_ce_count_show, NULL);
  691. DEVICE_ATTR(max_location, S_IRUGO, mci_max_location_show, NULL);
  692. /* memory scrubber attribute file */
  693. DEVICE_ATTR(sdram_scrub_rate, S_IRUGO | S_IWUSR, mci_sdram_scrub_rate_show,
  694. mci_sdram_scrub_rate_store);
  695. static struct attribute *mci_attrs[] = {
  696. &dev_attr_reset_counters.attr,
  697. &dev_attr_mc_name.attr,
  698. &dev_attr_size_mb.attr,
  699. &dev_attr_seconds_since_reset.attr,
  700. &dev_attr_ue_noinfo_count.attr,
  701. &dev_attr_ce_noinfo_count.attr,
  702. &dev_attr_ue_count.attr,
  703. &dev_attr_ce_count.attr,
  704. &dev_attr_sdram_scrub_rate.attr,
  705. &dev_attr_max_location.attr,
  706. NULL
  707. };
  708. static struct attribute_group mci_attr_grp = {
  709. .attrs = mci_attrs,
  710. };
  711. static const struct attribute_group *mci_attr_groups[] = {
  712. &mci_attr_grp,
  713. NULL
  714. };
  715. static void mci_attr_release(struct device *device)
  716. {
  717. debugf1("Releasing mci device %s\n", dev_name(device));
  718. }
  719. static struct device_type mci_attr_type = {
  720. .groups = mci_attr_groups,
  721. .release = mci_attr_release,
  722. };
  723. #ifdef CONFIG_EDAC_DEBUG
  724. int edac_create_debug_nodes(struct mem_ctl_info *mci)
  725. {
  726. struct dentry *d, *parent;
  727. char name[80];
  728. int i;
  729. d = debugfs_create_dir(mci->dev.kobj.name, mci->debugfs);
  730. if (!d)
  731. return -ENOMEM;
  732. parent = d;
  733. for (i = 0; i < mci->n_layers; i++) {
  734. sprintf(name, "fake_inject_%s",
  735. edac_layer_name[mci->layers[i].type]);
  736. d = debugfs_create_u8(name, S_IRUGO | S_IWUSR, parent,
  737. &mci->fake_inject_layer[i]);
  738. if (!d)
  739. goto nomem;
  740. }
  741. d = debugfs_create_bool("fake_inject_ue", S_IRUGO | S_IWUSR, parent,
  742. &mci->fake_inject_ue);
  743. if (!d)
  744. goto nomem;
  745. d = debugfs_create_file("fake_inject", S_IWUSR, parent,
  746. &mci->dev,
  747. &debug_fake_inject_fops);
  748. if (!d)
  749. goto nomem;
  750. return 0;
  751. nomem:
  752. debugfs_remove(mci->debugfs);
  753. return -ENOMEM;
  754. }
  755. #endif
  756. /*
  757. * Create a new Memory Controller kobject instance,
  758. * mc<id> under the 'mc' directory
  759. *
  760. * Return:
  761. * 0 Success
  762. * !0 Failure
  763. */
  764. int edac_create_sysfs_mci_device(struct mem_ctl_info *mci)
  765. {
  766. int i, err;
  767. debugf0("%s() idx=%d\n", __func__, mci->mc_idx);
  768. /* get the /sys/devices/system/edac subsys reference */
  769. mci->dev.type = &mci_attr_type;
  770. device_initialize(&mci->dev);
  771. mci->dev.parent = &mci_pdev;
  772. mci->dev.bus = &mci->bus;
  773. dev_set_name(&mci->dev, "mc%d", mci->mc_idx);
  774. dev_set_drvdata(&mci->dev, mci);
  775. pm_runtime_forbid(&mci->dev);
  776. /*
  777. * The memory controller needs its own bus, in order to avoid
  778. * namespace conflicts at /sys/bus/edac.
  779. */
  780. debugf0("creating bus %s\n",mci->bus.name);
  781. mci->bus.name = kstrdup(dev_name(&mci->dev), GFP_KERNEL);
  782. err = bus_register(&mci->bus);
  783. if (err < 0)
  784. return err;
  785. debugf0("%s(): creating device %s\n", __func__,
  786. dev_name(&mci->dev));
  787. err = device_add(&mci->dev);
  788. if (err < 0) {
  789. bus_unregister(&mci->bus);
  790. kfree(mci->bus.name);
  791. return err;
  792. }
  793. /*
  794. * Create the dimm/rank devices
  795. */
  796. for (i = 0; i < mci->tot_dimms; i++) {
  797. struct dimm_info *dimm = &mci->dimms[i];
  798. /* Only expose populated DIMMs */
  799. if (dimm->nr_pages == 0)
  800. continue;
  801. #ifdef CONFIG_EDAC_DEBUG
  802. debugf1("%s creating dimm%d, located at ",
  803. __func__, i);
  804. if (edac_debug_level >= 1) {
  805. int lay;
  806. for (lay = 0; lay < mci->n_layers; lay++)
  807. printk(KERN_CONT "%s %d ",
  808. edac_layer_name[mci->layers[lay].type],
  809. dimm->location[lay]);
  810. printk(KERN_CONT "\n");
  811. }
  812. #endif
  813. err = edac_create_dimm_object(mci, dimm, i);
  814. if (err) {
  815. debugf1("%s() failure: create dimm %d obj\n",
  816. __func__, i);
  817. goto fail;
  818. }
  819. }
  820. #ifdef CONFIG_EDAC_LEGACY_SYSFS
  821. err = edac_create_csrow_objects(mci);
  822. if (err < 0)
  823. goto fail;
  824. #endif
  825. #ifdef CONFIG_EDAC_DEBUG
  826. edac_create_debug_nodes(mci);
  827. #endif
  828. return 0;
  829. fail:
  830. for (i--; i >= 0; i--) {
  831. struct dimm_info *dimm = &mci->dimms[i];
  832. if (dimm->nr_pages == 0)
  833. continue;
  834. put_device(&dimm->dev);
  835. device_del(&dimm->dev);
  836. }
  837. put_device(&mci->dev);
  838. device_del(&mci->dev);
  839. bus_unregister(&mci->bus);
  840. kfree(mci->bus.name);
  841. return err;
  842. }
  843. /*
  844. * remove a Memory Controller instance
  845. */
  846. void edac_remove_sysfs_mci_device(struct mem_ctl_info *mci)
  847. {
  848. int i;
  849. debugf0("%s()\n", __func__);
  850. #ifdef CONFIG_EDAC_DEBUG
  851. debugfs_remove(mci->debugfs);
  852. #endif
  853. #ifdef CONFIG_EDAC_LEGACY_SYSFS
  854. edac_delete_csrow_objects(mci);
  855. #endif
  856. for (i = 0; i < mci->tot_dimms; i++) {
  857. struct dimm_info *dimm = &mci->dimms[i];
  858. if (dimm->nr_pages == 0)
  859. continue;
  860. debugf0("%s(): removing device %s\n", __func__,
  861. dev_name(&dimm->dev));
  862. put_device(&dimm->dev);
  863. device_del(&dimm->dev);
  864. }
  865. }
  866. void edac_unregister_sysfs(struct mem_ctl_info *mci)
  867. {
  868. debugf1("Unregistering device %s\n", dev_name(&mci->dev));
  869. put_device(&mci->dev);
  870. device_del(&mci->dev);
  871. bus_unregister(&mci->bus);
  872. kfree(mci->bus.name);
  873. }
  874. static void mc_attr_release(struct device *device)
  875. {
  876. debugf1("Releasing device %s\n", dev_name(device));
  877. }
  878. static struct device_type mc_attr_type = {
  879. .release = mc_attr_release,
  880. };
  881. /*
  882. * Init/exit code for the module. Basically, creates/removes /sys/class/rc
  883. */
  884. int __init edac_mc_sysfs_init(void)
  885. {
  886. struct bus_type *edac_subsys;
  887. int err;
  888. /* get the /sys/devices/system/edac subsys reference */
  889. edac_subsys = edac_get_sysfs_subsys();
  890. if (edac_subsys == NULL) {
  891. debugf1("%s() no edac_subsys\n", __func__);
  892. return -EINVAL;
  893. }
  894. mci_pdev.bus = edac_subsys;
  895. mci_pdev.type = &mc_attr_type;
  896. device_initialize(&mci_pdev);
  897. dev_set_name(&mci_pdev, "mc");
  898. err = device_add(&mci_pdev);
  899. if (err < 0)
  900. return err;
  901. return 0;
  902. }
  903. void __exit edac_mc_sysfs_exit(void)
  904. {
  905. put_device(&mci_pdev);
  906. device_del(&mci_pdev);
  907. edac_put_sysfs_subsys();
  908. }