dma-mapping.h 12 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439
  1. /*
  2. * Copyright (C) 2004 IBM
  3. *
  4. * Implements the generic device dma API for powerpc.
  5. * the pci and vio busses
  6. */
  7. #ifndef _ASM_DMA_MAPPING_H
  8. #define _ASM_DMA_MAPPING_H
  9. #ifdef __KERNEL__
  10. #include <linux/types.h>
  11. #include <linux/cache.h>
  12. /* need struct page definitions */
  13. #include <linux/mm.h>
  14. #include <linux/scatterlist.h>
  15. #include <linux/dma-attrs.h>
  16. #include <asm/io.h>
  17. #include <asm/swiotlb.h>
  18. #define DMA_ERROR_CODE (~(dma_addr_t)0x0)
  19. /* Some dma direct funcs must be visible for use in other dma_ops */
  20. extern void *dma_direct_alloc_coherent(struct device *dev, size_t size,
  21. dma_addr_t *dma_handle, gfp_t flag);
  22. extern void dma_direct_free_coherent(struct device *dev, size_t size,
  23. void *vaddr, dma_addr_t dma_handle);
  24. extern unsigned long get_dma_direct_offset(struct device *dev);
  25. #ifdef CONFIG_NOT_COHERENT_CACHE
  26. /*
  27. * DMA-consistent mapping functions for PowerPCs that don't support
  28. * cache snooping. These allocate/free a region of uncached mapped
  29. * memory space for use with DMA devices. Alternatively, you could
  30. * allocate the space "normally" and use the cache management functions
  31. * to ensure it is consistent.
  32. */
  33. struct device;
  34. extern void *__dma_alloc_coherent(struct device *dev, size_t size,
  35. dma_addr_t *handle, gfp_t gfp);
  36. extern void __dma_free_coherent(size_t size, void *vaddr);
  37. extern void __dma_sync(void *vaddr, size_t size, int direction);
  38. extern void __dma_sync_page(struct page *page, unsigned long offset,
  39. size_t size, int direction);
  40. #else /* ! CONFIG_NOT_COHERENT_CACHE */
  41. /*
  42. * Cache coherent cores.
  43. */
  44. #define __dma_alloc_coherent(dev, gfp, size, handle) NULL
  45. #define __dma_free_coherent(size, addr) ((void)0)
  46. #define __dma_sync(addr, size, rw) ((void)0)
  47. #define __dma_sync_page(pg, off, sz, rw) ((void)0)
  48. #endif /* ! CONFIG_NOT_COHERENT_CACHE */
  49. static inline unsigned long device_to_mask(struct device *dev)
  50. {
  51. if (dev->dma_mask && *dev->dma_mask)
  52. return *dev->dma_mask;
  53. /* Assume devices without mask can take 32 bit addresses */
  54. return 0xfffffffful;
  55. }
  56. /*
  57. * Available generic sets of operations
  58. */
  59. #ifdef CONFIG_PPC64
  60. extern struct dma_map_ops dma_iommu_ops;
  61. #endif
  62. extern struct dma_map_ops dma_direct_ops;
  63. static inline struct dma_map_ops *get_dma_ops(struct device *dev)
  64. {
  65. /* We don't handle the NULL dev case for ISA for now. We could
  66. * do it via an out of line call but it is not needed for now. The
  67. * only ISA DMA device we support is the floppy and we have a hack
  68. * in the floppy driver directly to get a device for us.
  69. */
  70. if (unlikely(dev == NULL))
  71. return NULL;
  72. return dev->archdata.dma_ops;
  73. }
  74. static inline void set_dma_ops(struct device *dev, struct dma_map_ops *ops)
  75. {
  76. dev->archdata.dma_ops = ops;
  77. }
  78. static inline int dma_supported(struct device *dev, u64 mask)
  79. {
  80. struct dma_map_ops *dma_ops = get_dma_ops(dev);
  81. if (unlikely(dma_ops == NULL))
  82. return 0;
  83. if (dma_ops->dma_supported == NULL)
  84. return 1;
  85. return dma_ops->dma_supported(dev, mask);
  86. }
  87. /* We have our own implementation of pci_set_dma_mask() */
  88. #define HAVE_ARCH_PCI_SET_DMA_MASK
  89. static inline int dma_set_mask(struct device *dev, u64 dma_mask)
  90. {
  91. struct dma_map_ops *dma_ops = get_dma_ops(dev);
  92. if (unlikely(dma_ops == NULL))
  93. return -EIO;
  94. if (dma_ops->set_dma_mask != NULL)
  95. return dma_ops->set_dma_mask(dev, dma_mask);
  96. if (!dev->dma_mask || !dma_supported(dev, dma_mask))
  97. return -EIO;
  98. *dev->dma_mask = dma_mask;
  99. return 0;
  100. }
  101. /*
  102. * map_/unmap_single actually call through to map/unmap_page now that all the
  103. * dma_map_ops have been converted over. We just have to get the page and
  104. * offset to pass through to map_page
  105. */
  106. static inline dma_addr_t dma_map_single_attrs(struct device *dev,
  107. void *cpu_addr,
  108. size_t size,
  109. enum dma_data_direction direction,
  110. struct dma_attrs *attrs)
  111. {
  112. struct dma_map_ops *dma_ops = get_dma_ops(dev);
  113. BUG_ON(!dma_ops);
  114. return dma_ops->map_page(dev, virt_to_page(cpu_addr),
  115. (unsigned long)cpu_addr % PAGE_SIZE, size,
  116. direction, attrs);
  117. }
  118. static inline void dma_unmap_single_attrs(struct device *dev,
  119. dma_addr_t dma_addr,
  120. size_t size,
  121. enum dma_data_direction direction,
  122. struct dma_attrs *attrs)
  123. {
  124. struct dma_map_ops *dma_ops = get_dma_ops(dev);
  125. BUG_ON(!dma_ops);
  126. dma_ops->unmap_page(dev, dma_addr, size, direction, attrs);
  127. }
  128. static inline dma_addr_t dma_map_page_attrs(struct device *dev,
  129. struct page *page,
  130. unsigned long offset, size_t size,
  131. enum dma_data_direction direction,
  132. struct dma_attrs *attrs)
  133. {
  134. struct dma_map_ops *dma_ops = get_dma_ops(dev);
  135. BUG_ON(!dma_ops);
  136. return dma_ops->map_page(dev, page, offset, size, direction, attrs);
  137. }
  138. static inline void dma_unmap_page_attrs(struct device *dev,
  139. dma_addr_t dma_address,
  140. size_t size,
  141. enum dma_data_direction direction,
  142. struct dma_attrs *attrs)
  143. {
  144. struct dma_map_ops *dma_ops = get_dma_ops(dev);
  145. BUG_ON(!dma_ops);
  146. dma_ops->unmap_page(dev, dma_address, size, direction, attrs);
  147. }
  148. static inline int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg,
  149. int nents, enum dma_data_direction direction,
  150. struct dma_attrs *attrs)
  151. {
  152. struct dma_map_ops *dma_ops = get_dma_ops(dev);
  153. BUG_ON(!dma_ops);
  154. return dma_ops->map_sg(dev, sg, nents, direction, attrs);
  155. }
  156. static inline void dma_unmap_sg_attrs(struct device *dev,
  157. struct scatterlist *sg,
  158. int nhwentries,
  159. enum dma_data_direction direction,
  160. struct dma_attrs *attrs)
  161. {
  162. struct dma_map_ops *dma_ops = get_dma_ops(dev);
  163. BUG_ON(!dma_ops);
  164. dma_ops->unmap_sg(dev, sg, nhwentries, direction, attrs);
  165. }
  166. static inline void *dma_alloc_coherent(struct device *dev, size_t size,
  167. dma_addr_t *dma_handle, gfp_t flag)
  168. {
  169. struct dma_map_ops *dma_ops = get_dma_ops(dev);
  170. BUG_ON(!dma_ops);
  171. return dma_ops->alloc_coherent(dev, size, dma_handle, flag);
  172. }
  173. static inline void dma_free_coherent(struct device *dev, size_t size,
  174. void *cpu_addr, dma_addr_t dma_handle)
  175. {
  176. struct dma_map_ops *dma_ops = get_dma_ops(dev);
  177. BUG_ON(!dma_ops);
  178. dma_ops->free_coherent(dev, size, cpu_addr, dma_handle);
  179. }
  180. static inline dma_addr_t dma_map_single(struct device *dev, void *cpu_addr,
  181. size_t size,
  182. enum dma_data_direction direction)
  183. {
  184. return dma_map_single_attrs(dev, cpu_addr, size, direction, NULL);
  185. }
  186. static inline void dma_unmap_single(struct device *dev, dma_addr_t dma_addr,
  187. size_t size,
  188. enum dma_data_direction direction)
  189. {
  190. dma_unmap_single_attrs(dev, dma_addr, size, direction, NULL);
  191. }
  192. static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
  193. unsigned long offset, size_t size,
  194. enum dma_data_direction direction)
  195. {
  196. return dma_map_page_attrs(dev, page, offset, size, direction, NULL);
  197. }
  198. static inline void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
  199. size_t size,
  200. enum dma_data_direction direction)
  201. {
  202. dma_unmap_page_attrs(dev, dma_address, size, direction, NULL);
  203. }
  204. static inline int dma_map_sg(struct device *dev, struct scatterlist *sg,
  205. int nents, enum dma_data_direction direction)
  206. {
  207. return dma_map_sg_attrs(dev, sg, nents, direction, NULL);
  208. }
  209. static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
  210. int nhwentries,
  211. enum dma_data_direction direction)
  212. {
  213. dma_unmap_sg_attrs(dev, sg, nhwentries, direction, NULL);
  214. }
  215. #ifdef CONFIG_PPC_NEED_DMA_SYNC_OPS
  216. static inline void dma_sync_single_for_cpu(struct device *dev,
  217. dma_addr_t dma_handle, size_t size,
  218. enum dma_data_direction direction)
  219. {
  220. struct dma_map_ops *dma_ops = get_dma_ops(dev);
  221. BUG_ON(!dma_ops);
  222. if (dma_ops->sync_single_range_for_cpu)
  223. dma_ops->sync_single_range_for_cpu(dev, dma_handle, 0,
  224. size, direction);
  225. }
  226. static inline void dma_sync_single_for_device(struct device *dev,
  227. dma_addr_t dma_handle, size_t size,
  228. enum dma_data_direction direction)
  229. {
  230. struct dma_map_ops *dma_ops = get_dma_ops(dev);
  231. BUG_ON(!dma_ops);
  232. if (dma_ops->sync_single_range_for_device)
  233. dma_ops->sync_single_range_for_device(dev, dma_handle,
  234. 0, size, direction);
  235. }
  236. static inline void dma_sync_sg_for_cpu(struct device *dev,
  237. struct scatterlist *sgl, int nents,
  238. enum dma_data_direction direction)
  239. {
  240. struct dma_map_ops *dma_ops = get_dma_ops(dev);
  241. BUG_ON(!dma_ops);
  242. if (dma_ops->sync_sg_for_cpu)
  243. dma_ops->sync_sg_for_cpu(dev, sgl, nents, direction);
  244. }
  245. static inline void dma_sync_sg_for_device(struct device *dev,
  246. struct scatterlist *sgl, int nents,
  247. enum dma_data_direction direction)
  248. {
  249. struct dma_map_ops *dma_ops = get_dma_ops(dev);
  250. BUG_ON(!dma_ops);
  251. if (dma_ops->sync_sg_for_device)
  252. dma_ops->sync_sg_for_device(dev, sgl, nents, direction);
  253. }
  254. static inline void dma_sync_single_range_for_cpu(struct device *dev,
  255. dma_addr_t dma_handle, unsigned long offset, size_t size,
  256. enum dma_data_direction direction)
  257. {
  258. struct dma_map_ops *dma_ops = get_dma_ops(dev);
  259. BUG_ON(!dma_ops);
  260. if (dma_ops->sync_single_range_for_cpu)
  261. dma_ops->sync_single_range_for_cpu(dev, dma_handle,
  262. offset, size, direction);
  263. }
  264. static inline void dma_sync_single_range_for_device(struct device *dev,
  265. dma_addr_t dma_handle, unsigned long offset, size_t size,
  266. enum dma_data_direction direction)
  267. {
  268. struct dma_map_ops *dma_ops = get_dma_ops(dev);
  269. BUG_ON(!dma_ops);
  270. if (dma_ops->sync_single_range_for_device)
  271. dma_ops->sync_single_range_for_device(dev, dma_handle, offset,
  272. size, direction);
  273. }
  274. #else /* CONFIG_PPC_NEED_DMA_SYNC_OPS */
  275. static inline void dma_sync_single_for_cpu(struct device *dev,
  276. dma_addr_t dma_handle, size_t size,
  277. enum dma_data_direction direction)
  278. {
  279. }
  280. static inline void dma_sync_single_for_device(struct device *dev,
  281. dma_addr_t dma_handle, size_t size,
  282. enum dma_data_direction direction)
  283. {
  284. }
  285. static inline void dma_sync_sg_for_cpu(struct device *dev,
  286. struct scatterlist *sgl, int nents,
  287. enum dma_data_direction direction)
  288. {
  289. }
  290. static inline void dma_sync_sg_for_device(struct device *dev,
  291. struct scatterlist *sgl, int nents,
  292. enum dma_data_direction direction)
  293. {
  294. }
  295. static inline void dma_sync_single_range_for_cpu(struct device *dev,
  296. dma_addr_t dma_handle, unsigned long offset, size_t size,
  297. enum dma_data_direction direction)
  298. {
  299. }
  300. static inline void dma_sync_single_range_for_device(struct device *dev,
  301. dma_addr_t dma_handle, unsigned long offset, size_t size,
  302. enum dma_data_direction direction)
  303. {
  304. }
  305. #endif
  306. static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
  307. {
  308. #ifdef CONFIG_PPC64
  309. return (dma_addr == DMA_ERROR_CODE);
  310. #else
  311. return 0;
  312. #endif
  313. }
  314. static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
  315. {
  316. #ifdef CONFIG_SWIOTLB
  317. struct dev_archdata *sd = &dev->archdata;
  318. if (sd->max_direct_dma_addr && addr + size > sd->max_direct_dma_addr)
  319. return 0;
  320. #endif
  321. if (!dev->dma_mask)
  322. return 0;
  323. return addr + size <= *dev->dma_mask;
  324. }
  325. static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
  326. {
  327. return paddr + get_dma_direct_offset(dev);
  328. }
  329. static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr)
  330. {
  331. return daddr - get_dma_direct_offset(dev);
  332. }
  333. #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
  334. #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
  335. #ifdef CONFIG_NOT_COHERENT_CACHE
  336. #define dma_is_consistent(d, h) (0)
  337. #else
  338. #define dma_is_consistent(d, h) (1)
  339. #endif
  340. static inline int dma_get_cache_alignment(void)
  341. {
  342. #ifdef CONFIG_PPC64
  343. /* no easy way to get cache size on all processors, so return
  344. * the maximum possible, to be safe */
  345. return (1 << INTERNODE_CACHE_SHIFT);
  346. #else
  347. /*
  348. * Each processor family will define its own L1_CACHE_SHIFT,
  349. * L1_CACHE_BYTES wraps to this, so this is always safe.
  350. */
  351. return L1_CACHE_BYTES;
  352. #endif
  353. }
  354. static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
  355. enum dma_data_direction direction)
  356. {
  357. BUG_ON(direction == DMA_NONE);
  358. __dma_sync(vaddr, size, (int)direction);
  359. }
  360. #endif /* __KERNEL__ */
  361. #endif /* _ASM_DMA_MAPPING_H */