wl1271.h 10 KB

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  1. /*
  2. * This file is part of wl1271
  3. *
  4. * Copyright (C) 1998-2009 Texas Instruments. All rights reserved.
  5. * Copyright (C) 2008-2009 Nokia Corporation
  6. *
  7. * Contact: Luciano Coelho <luciano.coelho@nokia.com>
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * version 2 as published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful, but
  14. * WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  16. * General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  21. * 02110-1301 USA
  22. *
  23. */
  24. #ifndef __WL1271_H__
  25. #define __WL1271_H__
  26. #include <linux/mutex.h>
  27. #include <linux/completion.h>
  28. #include <linux/spinlock.h>
  29. #include <linux/list.h>
  30. #include <linux/bitops.h>
  31. #include <net/mac80211.h>
  32. #define DRIVER_NAME "wl1271"
  33. #define DRIVER_PREFIX DRIVER_NAME ": "
  34. enum {
  35. DEBUG_NONE = 0,
  36. DEBUG_IRQ = BIT(0),
  37. DEBUG_SPI = BIT(1),
  38. DEBUG_BOOT = BIT(2),
  39. DEBUG_MAILBOX = BIT(3),
  40. DEBUG_NETLINK = BIT(4),
  41. DEBUG_EVENT = BIT(5),
  42. DEBUG_TX = BIT(6),
  43. DEBUG_RX = BIT(7),
  44. DEBUG_SCAN = BIT(8),
  45. DEBUG_CRYPT = BIT(9),
  46. DEBUG_PSM = BIT(10),
  47. DEBUG_MAC80211 = BIT(11),
  48. DEBUG_CMD = BIT(12),
  49. DEBUG_ACX = BIT(13),
  50. DEBUG_ALL = ~0,
  51. };
  52. #define DEBUG_LEVEL (DEBUG_NONE)
  53. #define DEBUG_DUMP_LIMIT 1024
  54. #define wl1271_error(fmt, arg...) \
  55. printk(KERN_ERR DRIVER_PREFIX "ERROR " fmt "\n", ##arg)
  56. #define wl1271_warning(fmt, arg...) \
  57. printk(KERN_WARNING DRIVER_PREFIX "WARNING " fmt "\n", ##arg)
  58. #define wl1271_notice(fmt, arg...) \
  59. printk(KERN_INFO DRIVER_PREFIX fmt "\n", ##arg)
  60. #define wl1271_info(fmt, arg...) \
  61. printk(KERN_DEBUG DRIVER_PREFIX fmt "\n", ##arg)
  62. #define wl1271_debug(level, fmt, arg...) \
  63. do { \
  64. if (level & DEBUG_LEVEL) \
  65. printk(KERN_DEBUG DRIVER_PREFIX fmt "\n", ##arg); \
  66. } while (0)
  67. #define wl1271_dump(level, prefix, buf, len) \
  68. do { \
  69. if (level & DEBUG_LEVEL) \
  70. print_hex_dump(KERN_DEBUG, DRIVER_PREFIX prefix, \
  71. DUMP_PREFIX_OFFSET, 16, 1, \
  72. buf, \
  73. min_t(size_t, len, DEBUG_DUMP_LIMIT), \
  74. 0); \
  75. } while (0)
  76. #define wl1271_dump_ascii(level, prefix, buf, len) \
  77. do { \
  78. if (level & DEBUG_LEVEL) \
  79. print_hex_dump(KERN_DEBUG, DRIVER_PREFIX prefix, \
  80. DUMP_PREFIX_OFFSET, 16, 1, \
  81. buf, \
  82. min_t(size_t, len, DEBUG_DUMP_LIMIT), \
  83. true); \
  84. } while (0)
  85. #define WL1271_DEFAULT_RX_CONFIG (CFG_UNI_FILTER_EN | \
  86. CFG_BSSID_FILTER_EN | \
  87. CFG_MC_FILTER_EN)
  88. #define WL1271_DEFAULT_RX_FILTER (CFG_RX_RCTS_ACK | CFG_RX_PRSP_EN | \
  89. CFG_RX_MGMT_EN | CFG_RX_DATA_EN | \
  90. CFG_RX_CTL_EN | CFG_RX_BCN_EN | \
  91. CFG_RX_AUTH_EN | CFG_RX_ASSOC_EN)
  92. #define WL1271_DEFAULT_BASIC_RATE_SET (ACX_RATE_MASK_ALL)
  93. #define WL1271_FW_NAME "wl1271-fw.bin"
  94. #define WL1271_NVS_NAME "wl1271-nvs.bin"
  95. /*
  96. * FIXME: for the wl1271, a busy word count of 1 here will result in a more
  97. * optimal SPI interface. There is some SPI bug however, causing RXS time outs
  98. * with this mode occasionally on boot, so lets have two for now.
  99. */
  100. #define WL1271_BUSY_WORD_CNT 2
  101. #define WL1271_BUSY_WORD_LEN (WL1271_BUSY_WORD_CNT * sizeof(u32))
  102. #define WL1271_ELP_HW_STATE_ASLEEP 0
  103. #define WL1271_ELP_HW_STATE_IRQ 1
  104. #define WL1271_DEFAULT_BEACON_INT 100
  105. #define WL1271_DEFAULT_DTIM_PERIOD 1
  106. #define ACX_TX_DESCRIPTORS 32
  107. enum wl1271_state {
  108. WL1271_STATE_OFF,
  109. WL1271_STATE_ON,
  110. WL1271_STATE_PLT,
  111. };
  112. enum wl1271_partition_type {
  113. PART_DOWN,
  114. PART_WORK,
  115. PART_DRPW,
  116. PART_TABLE_LEN
  117. };
  118. struct wl1271_partition {
  119. u32 size;
  120. u32 start;
  121. };
  122. struct wl1271_partition_set {
  123. struct wl1271_partition mem;
  124. struct wl1271_partition reg;
  125. struct wl1271_partition mem2;
  126. struct wl1271_partition mem3;
  127. };
  128. struct wl1271;
  129. /* FIXME: I'm not sure about this structure name */
  130. struct wl1271_chip {
  131. u32 id;
  132. char fw_ver[21];
  133. };
  134. struct wl1271_stats {
  135. struct acx_statistics *fw_stats;
  136. unsigned long fw_stats_update;
  137. unsigned int retry_count;
  138. unsigned int excessive_retries;
  139. };
  140. struct wl1271_debugfs {
  141. struct dentry *rootdir;
  142. struct dentry *fw_statistics;
  143. struct dentry *tx_internal_desc_overflow;
  144. struct dentry *rx_out_of_mem;
  145. struct dentry *rx_hdr_overflow;
  146. struct dentry *rx_hw_stuck;
  147. struct dentry *rx_dropped;
  148. struct dentry *rx_fcs_err;
  149. struct dentry *rx_xfr_hint_trig;
  150. struct dentry *rx_path_reset;
  151. struct dentry *rx_reset_counter;
  152. struct dentry *dma_rx_requested;
  153. struct dentry *dma_rx_errors;
  154. struct dentry *dma_tx_requested;
  155. struct dentry *dma_tx_errors;
  156. struct dentry *isr_cmd_cmplt;
  157. struct dentry *isr_fiqs;
  158. struct dentry *isr_rx_headers;
  159. struct dentry *isr_rx_mem_overflow;
  160. struct dentry *isr_rx_rdys;
  161. struct dentry *isr_irqs;
  162. struct dentry *isr_tx_procs;
  163. struct dentry *isr_decrypt_done;
  164. struct dentry *isr_dma0_done;
  165. struct dentry *isr_dma1_done;
  166. struct dentry *isr_tx_exch_complete;
  167. struct dentry *isr_commands;
  168. struct dentry *isr_rx_procs;
  169. struct dentry *isr_hw_pm_mode_changes;
  170. struct dentry *isr_host_acknowledges;
  171. struct dentry *isr_pci_pm;
  172. struct dentry *isr_wakeups;
  173. struct dentry *isr_low_rssi;
  174. struct dentry *wep_addr_key_count;
  175. struct dentry *wep_default_key_count;
  176. /* skipping wep.reserved */
  177. struct dentry *wep_key_not_found;
  178. struct dentry *wep_decrypt_fail;
  179. struct dentry *wep_packets;
  180. struct dentry *wep_interrupt;
  181. struct dentry *pwr_ps_enter;
  182. struct dentry *pwr_elp_enter;
  183. struct dentry *pwr_missing_bcns;
  184. struct dentry *pwr_wake_on_host;
  185. struct dentry *pwr_wake_on_timer_exp;
  186. struct dentry *pwr_tx_with_ps;
  187. struct dentry *pwr_tx_without_ps;
  188. struct dentry *pwr_rcvd_beacons;
  189. struct dentry *pwr_power_save_off;
  190. struct dentry *pwr_enable_ps;
  191. struct dentry *pwr_disable_ps;
  192. struct dentry *pwr_fix_tsf_ps;
  193. /* skipping cont_miss_bcns_spread for now */
  194. struct dentry *pwr_rcvd_awake_beacons;
  195. struct dentry *mic_rx_pkts;
  196. struct dentry *mic_calc_failure;
  197. struct dentry *aes_encrypt_fail;
  198. struct dentry *aes_decrypt_fail;
  199. struct dentry *aes_encrypt_packets;
  200. struct dentry *aes_decrypt_packets;
  201. struct dentry *aes_encrypt_interrupt;
  202. struct dentry *aes_decrypt_interrupt;
  203. struct dentry *event_heart_beat;
  204. struct dentry *event_calibration;
  205. struct dentry *event_rx_mismatch;
  206. struct dentry *event_rx_mem_empty;
  207. struct dentry *event_rx_pool;
  208. struct dentry *event_oom_late;
  209. struct dentry *event_phy_transmit_error;
  210. struct dentry *event_tx_stuck;
  211. struct dentry *ps_pspoll_timeouts;
  212. struct dentry *ps_upsd_timeouts;
  213. struct dentry *ps_upsd_max_sptime;
  214. struct dentry *ps_upsd_max_apturn;
  215. struct dentry *ps_pspoll_max_apturn;
  216. struct dentry *ps_pspoll_utilization;
  217. struct dentry *ps_upsd_utilization;
  218. struct dentry *rxpipe_rx_prep_beacon_drop;
  219. struct dentry *rxpipe_descr_host_int_trig_rx_data;
  220. struct dentry *rxpipe_beacon_buffer_thres_host_int_trig_rx_data;
  221. struct dentry *rxpipe_missed_beacon_host_int_trig_rx_data;
  222. struct dentry *rxpipe_tx_xfr_host_int_trig_rx_data;
  223. struct dentry *tx_queue_len;
  224. struct dentry *retry_count;
  225. struct dentry *excessive_retries;
  226. };
  227. #define NUM_TX_QUEUES 4
  228. #define NUM_RX_PKT_DESC 8
  229. /* FW status registers */
  230. struct wl1271_fw_status {
  231. u32 intr;
  232. u8 fw_rx_counter;
  233. u8 drv_rx_counter;
  234. u8 reserved;
  235. u8 tx_results_counter;
  236. u32 rx_pkt_descs[NUM_RX_PKT_DESC];
  237. u32 tx_released_blks[NUM_TX_QUEUES];
  238. u32 fw_localtime;
  239. u32 padding[2];
  240. } __attribute__ ((packed));
  241. struct wl1271_rx_mem_pool_addr {
  242. u32 addr;
  243. u32 addr_extra;
  244. };
  245. struct wl1271 {
  246. struct ieee80211_hw *hw;
  247. bool mac80211_registered;
  248. struct spi_device *spi;
  249. void (*set_power)(bool enable);
  250. int irq;
  251. spinlock_t wl_lock;
  252. enum wl1271_state state;
  253. struct mutex mutex;
  254. struct wl1271_partition_set part;
  255. struct wl1271_chip chip;
  256. int cmd_box_addr;
  257. int event_box_addr;
  258. u8 *fw;
  259. size_t fw_len;
  260. u8 *nvs;
  261. size_t nvs_len;
  262. u8 bssid[ETH_ALEN];
  263. u8 mac_addr[ETH_ALEN];
  264. u8 bss_type;
  265. u8 ssid[IW_ESSID_MAX_SIZE + 1];
  266. u8 ssid_len;
  267. u8 listen_int;
  268. int channel;
  269. struct wl1271_acx_mem_map *target_mem_map;
  270. /* Accounting for allocated / available TX blocks on HW */
  271. u32 tx_blocks_freed[NUM_TX_QUEUES];
  272. u32 tx_blocks_available;
  273. u8 tx_results_count;
  274. /* Transmitted TX packets counter for chipset interface */
  275. int tx_packets_count;
  276. /* Time-offset between host and chipset clocks */
  277. int time_offset;
  278. /* Session counter for the chipset */
  279. int session_counter;
  280. /* Frames scheduled for transmission, not handled yet */
  281. struct sk_buff_head tx_queue;
  282. bool tx_queue_stopped;
  283. struct work_struct tx_work;
  284. struct work_struct filter_work;
  285. struct wl1271_filter_params *filter_params;
  286. /* Pending TX frames */
  287. struct sk_buff *tx_frames[ACX_TX_DESCRIPTORS];
  288. /* Security sequence number counters */
  289. u8 tx_security_last_seq;
  290. u16 tx_security_seq_16;
  291. u32 tx_security_seq_32;
  292. /* FW Rx counter */
  293. u32 rx_counter;
  294. /* Rx memory pool address */
  295. struct wl1271_rx_mem_pool_addr rx_mem_pool_addr;
  296. /* The target interrupt mask */
  297. struct work_struct irq_work;
  298. /* The mbox event mask */
  299. u32 event_mask;
  300. /* Mailbox pointers */
  301. u32 mbox_ptr[2];
  302. /* Are we currently scanning */
  303. bool scanning;
  304. /* Our association ID */
  305. u16 aid;
  306. /* Beacon parameters */
  307. u16 beacon_int;
  308. u8 dtim_period;
  309. /* currently configured rate set */
  310. u32 basic_rate_set;
  311. /* The current band */
  312. enum ieee80211_band band;
  313. /* Default key (for WEP) */
  314. u32 default_key;
  315. unsigned int rx_config;
  316. unsigned int rx_filter;
  317. /* is firmware in elp mode */
  318. bool elp;
  319. struct completion *elp_compl;
  320. struct delayed_work elp_work;
  321. /* we can be in psm, but not in elp, we have to differentiate */
  322. bool psm;
  323. /* PSM mode requested */
  324. bool psm_requested;
  325. /* in dBm */
  326. int power_level;
  327. struct wl1271_stats stats;
  328. struct wl1271_debugfs debugfs;
  329. u32 buffer_32;
  330. u32 buffer_cmd;
  331. u32 buffer_busyword[WL1271_BUSY_WORD_CNT];
  332. struct wl1271_rx_descriptor *rx_descriptor;
  333. struct wl1271_fw_status *fw_status;
  334. struct wl1271_tx_hw_res_if *tx_res_if;
  335. struct ieee80211_vif *vif;
  336. /* Used for a workaround to send disconnect before rejoining */
  337. bool joined;
  338. };
  339. int wl1271_plt_start(struct wl1271 *wl);
  340. int wl1271_plt_stop(struct wl1271 *wl);
  341. #define JOIN_TIMEOUT 5000 /* 5000 milliseconds to join */
  342. #define SESSION_COUNTER_MAX 7 /* maximum value for the session counter */
  343. #define WL1271_DEFAULT_POWER_LEVEL 0
  344. #define WL1271_TX_QUEUE_MAX_LENGTH 20
  345. /* WL1271 needs a 200ms sleep after power on */
  346. #define WL1271_POWER_ON_SLEEP 200 /* in miliseconds */
  347. #endif