mxser.c 74 KB

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  1. /*
  2. * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
  3. *
  4. * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com).
  5. * Copyright (C) 2006-2008 Jiri Slaby <jirislaby@gmail.com>
  6. *
  7. * This code is loosely based on the 1.8 moxa driver which is based on
  8. * Linux serial driver, written by Linus Torvalds, Theodore T'so and
  9. * others.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or
  14. * (at your option) any later version.
  15. *
  16. * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
  17. * <alan@redhat.com>. The original 1.8 code is available on www.moxa.com.
  18. * - Fixed x86_64 cleanness
  19. * - Fixed sleep with spinlock held in mxser_send_break
  20. */
  21. #include <linux/module.h>
  22. #include <linux/errno.h>
  23. #include <linux/signal.h>
  24. #include <linux/sched.h>
  25. #include <linux/timer.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/tty.h>
  28. #include <linux/tty_flip.h>
  29. #include <linux/serial.h>
  30. #include <linux/serial_reg.h>
  31. #include <linux/major.h>
  32. #include <linux/string.h>
  33. #include <linux/fcntl.h>
  34. #include <linux/ptrace.h>
  35. #include <linux/gfp.h>
  36. #include <linux/ioport.h>
  37. #include <linux/mm.h>
  38. #include <linux/delay.h>
  39. #include <linux/pci.h>
  40. #include <linux/bitops.h>
  41. #include <asm/system.h>
  42. #include <asm/io.h>
  43. #include <asm/irq.h>
  44. #include <asm/uaccess.h>
  45. #include "mxser.h"
  46. #define MXSER_VERSION "2.0.3" /* 1.11 */
  47. #define MXSERMAJOR 174
  48. #define MXSERCUMAJOR 175
  49. #define MXSER_BOARDS 4 /* Max. boards */
  50. #define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
  51. #define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD)
  52. #define MXSER_ISR_PASS_LIMIT 100
  53. #define MXSER_ERR_IOADDR -1
  54. #define MXSER_ERR_IRQ -2
  55. #define MXSER_ERR_IRQ_CONFLIT -3
  56. #define MXSER_ERR_VECTOR -4
  57. /*CheckIsMoxaMust return value*/
  58. #define MOXA_OTHER_UART 0x00
  59. #define MOXA_MUST_MU150_HWID 0x01
  60. #define MOXA_MUST_MU860_HWID 0x02
  61. #define WAKEUP_CHARS 256
  62. #define UART_MCR_AFE 0x20
  63. #define UART_LSR_SPECIAL 0x1E
  64. #define PCI_DEVICE_ID_CB108 0x1080
  65. #define PCI_DEVICE_ID_CB114 0x1142
  66. #define PCI_DEVICE_ID_CP114UL 0x1143
  67. #define PCI_DEVICE_ID_CB134I 0x1341
  68. #define PCI_DEVICE_ID_CP138U 0x1380
  69. #define PCI_DEVICE_ID_POS104UL 0x1044
  70. #define C168_ASIC_ID 1
  71. #define C104_ASIC_ID 2
  72. #define C102_ASIC_ID 0xB
  73. #define CI132_ASIC_ID 4
  74. #define CI134_ASIC_ID 3
  75. #define CI104J_ASIC_ID 5
  76. #define MXSER_HIGHBAUD 1
  77. #define MXSER_HAS2 2
  78. /* This is only for PCI */
  79. static const struct {
  80. int type;
  81. int tx_fifo;
  82. int rx_fifo;
  83. int xmit_fifo_size;
  84. int rx_high_water;
  85. int rx_trigger;
  86. int rx_low_water;
  87. long max_baud;
  88. } Gpci_uart_info[] = {
  89. {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
  90. {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
  91. {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
  92. };
  93. #define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info)
  94. struct mxser_cardinfo {
  95. char *name;
  96. unsigned int nports;
  97. unsigned int flags;
  98. };
  99. static const struct mxser_cardinfo mxser_cards[] = {
  100. /* 0*/ { "C168 series", 8, },
  101. { "C104 series", 4, },
  102. { "CI-104J series", 4, },
  103. { "C168H/PCI series", 8, },
  104. { "C104H/PCI series", 4, },
  105. /* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */
  106. { "CI-132 series", 4, MXSER_HAS2 },
  107. { "CI-134 series", 4, },
  108. { "CP-132 series", 2, },
  109. { "CP-114 series", 4, },
  110. /*10*/ { "CT-114 series", 4, },
  111. { "CP-102 series", 2, MXSER_HIGHBAUD },
  112. { "CP-104U series", 4, },
  113. { "CP-168U series", 8, },
  114. { "CP-132U series", 2, },
  115. /*15*/ { "CP-134U series", 4, },
  116. { "CP-104JU series", 4, },
  117. { "Moxa UC7000 Serial", 8, }, /* RC7000 */
  118. { "CP-118U series", 8, },
  119. { "CP-102UL series", 2, },
  120. /*20*/ { "CP-102U series", 2, },
  121. { "CP-118EL series", 8, },
  122. { "CP-168EL series", 8, },
  123. { "CP-104EL series", 4, },
  124. { "CB-108 series", 8, },
  125. /*25*/ { "CB-114 series", 4, },
  126. { "CB-134I series", 4, },
  127. { "CP-138U series", 8, },
  128. { "POS-104UL series", 4, },
  129. { "CP-114UL series", 4, }
  130. };
  131. /* driver_data correspond to the lines in the structure above
  132. see also ISA probe function before you change something */
  133. static struct pci_device_id mxser_pcibrds[] = {
  134. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 },
  135. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 },
  136. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 },
  137. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 },
  138. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 },
  139. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 },
  140. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 },
  141. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 },
  142. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 },
  143. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 },
  144. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 },
  145. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 },
  146. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 },
  147. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 },
  148. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 },
  149. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 },
  150. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 },
  151. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 },
  152. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 },
  153. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 },
  154. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 },
  155. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 },
  156. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 },
  157. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 },
  158. { }
  159. };
  160. MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
  161. static int ioaddr[MXSER_BOARDS] = { 0, 0, 0, 0 };
  162. static int ttymajor = MXSERMAJOR;
  163. /* Variables for insmod */
  164. MODULE_AUTHOR("Casper Yang");
  165. MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
  166. module_param_array(ioaddr, int, NULL, 0);
  167. module_param(ttymajor, int, 0);
  168. MODULE_LICENSE("GPL");
  169. struct mxser_log {
  170. int tick;
  171. unsigned long rxcnt[MXSER_PORTS];
  172. unsigned long txcnt[MXSER_PORTS];
  173. };
  174. struct mxser_mon {
  175. unsigned long rxcnt;
  176. unsigned long txcnt;
  177. unsigned long up_rxcnt;
  178. unsigned long up_txcnt;
  179. int modem_status;
  180. unsigned char hold_reason;
  181. };
  182. struct mxser_mon_ext {
  183. unsigned long rx_cnt[32];
  184. unsigned long tx_cnt[32];
  185. unsigned long up_rxcnt[32];
  186. unsigned long up_txcnt[32];
  187. int modem_status[32];
  188. long baudrate[32];
  189. int databits[32];
  190. int stopbits[32];
  191. int parity[32];
  192. int flowctrl[32];
  193. int fifo[32];
  194. int iftype[32];
  195. };
  196. struct mxser_board;
  197. struct mxser_port {
  198. struct tty_port port;
  199. struct mxser_board *board;
  200. unsigned long ioaddr;
  201. unsigned long opmode_ioaddr;
  202. int max_baud;
  203. int rx_high_water;
  204. int rx_trigger; /* Rx fifo trigger level */
  205. int rx_low_water;
  206. int baud_base; /* max. speed */
  207. int type; /* UART type */
  208. int x_char; /* xon/xoff character */
  209. int IER; /* Interrupt Enable Register */
  210. int MCR; /* Modem control register */
  211. unsigned char stop_rx;
  212. unsigned char ldisc_stop_rx;
  213. int custom_divisor;
  214. unsigned char err_shadow;
  215. struct async_icount icount; /* kernel counters for 4 input interrupts */
  216. int timeout;
  217. int read_status_mask;
  218. int ignore_status_mask;
  219. int xmit_fifo_size;
  220. int xmit_head;
  221. int xmit_tail;
  222. int xmit_cnt;
  223. struct ktermios normal_termios;
  224. struct mxser_mon mon_data;
  225. spinlock_t slock;
  226. wait_queue_head_t delta_msr_wait;
  227. };
  228. struct mxser_board {
  229. unsigned int idx;
  230. int irq;
  231. const struct mxser_cardinfo *info;
  232. unsigned long vector;
  233. unsigned long vector_mask;
  234. int chip_flag;
  235. int uart_type;
  236. struct mxser_port ports[MXSER_PORTS_PER_BOARD];
  237. };
  238. struct mxser_mstatus {
  239. tcflag_t cflag;
  240. int cts;
  241. int dsr;
  242. int ri;
  243. int dcd;
  244. };
  245. static struct mxser_mstatus GMStatus[MXSER_PORTS];
  246. static int mxserBoardCAP[MXSER_BOARDS] = {
  247. 0, 0, 0, 0
  248. /* 0x180, 0x280, 0x200, 0x320 */
  249. };
  250. static struct mxser_board mxser_boards[MXSER_BOARDS];
  251. static struct tty_driver *mxvar_sdriver;
  252. static struct mxser_log mxvar_log;
  253. static int mxvar_diagflag;
  254. static unsigned char mxser_msr[MXSER_PORTS + 1];
  255. static struct mxser_mon_ext mon_data_ext;
  256. static int mxser_set_baud_method[MXSER_PORTS + 1];
  257. static void mxser_enable_must_enchance_mode(unsigned long baseio)
  258. {
  259. u8 oldlcr;
  260. u8 efr;
  261. oldlcr = inb(baseio + UART_LCR);
  262. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  263. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  264. efr |= MOXA_MUST_EFR_EFRB_ENABLE;
  265. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  266. outb(oldlcr, baseio + UART_LCR);
  267. }
  268. static void mxser_disable_must_enchance_mode(unsigned long baseio)
  269. {
  270. u8 oldlcr;
  271. u8 efr;
  272. oldlcr = inb(baseio + UART_LCR);
  273. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  274. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  275. efr &= ~MOXA_MUST_EFR_EFRB_ENABLE;
  276. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  277. outb(oldlcr, baseio + UART_LCR);
  278. }
  279. static void mxser_set_must_xon1_value(unsigned long baseio, u8 value)
  280. {
  281. u8 oldlcr;
  282. u8 efr;
  283. oldlcr = inb(baseio + UART_LCR);
  284. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  285. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  286. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  287. efr |= MOXA_MUST_EFR_BANK0;
  288. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  289. outb(value, baseio + MOXA_MUST_XON1_REGISTER);
  290. outb(oldlcr, baseio + UART_LCR);
  291. }
  292. static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value)
  293. {
  294. u8 oldlcr;
  295. u8 efr;
  296. oldlcr = inb(baseio + UART_LCR);
  297. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  298. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  299. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  300. efr |= MOXA_MUST_EFR_BANK0;
  301. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  302. outb(value, baseio + MOXA_MUST_XOFF1_REGISTER);
  303. outb(oldlcr, baseio + UART_LCR);
  304. }
  305. static void mxser_set_must_fifo_value(struct mxser_port *info)
  306. {
  307. u8 oldlcr;
  308. u8 efr;
  309. oldlcr = inb(info->ioaddr + UART_LCR);
  310. outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR);
  311. efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER);
  312. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  313. efr |= MOXA_MUST_EFR_BANK1;
  314. outb(efr, info->ioaddr + MOXA_MUST_EFR_REGISTER);
  315. outb((u8)info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTH_REGISTER);
  316. outb((u8)info->rx_trigger, info->ioaddr + MOXA_MUST_RBRTI_REGISTER);
  317. outb((u8)info->rx_low_water, info->ioaddr + MOXA_MUST_RBRTL_REGISTER);
  318. outb(oldlcr, info->ioaddr + UART_LCR);
  319. }
  320. static void mxser_set_must_enum_value(unsigned long baseio, u8 value)
  321. {
  322. u8 oldlcr;
  323. u8 efr;
  324. oldlcr = inb(baseio + UART_LCR);
  325. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  326. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  327. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  328. efr |= MOXA_MUST_EFR_BANK2;
  329. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  330. outb(value, baseio + MOXA_MUST_ENUM_REGISTER);
  331. outb(oldlcr, baseio + UART_LCR);
  332. }
  333. static void mxser_get_must_hardware_id(unsigned long baseio, u8 *pId)
  334. {
  335. u8 oldlcr;
  336. u8 efr;
  337. oldlcr = inb(baseio + UART_LCR);
  338. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  339. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  340. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  341. efr |= MOXA_MUST_EFR_BANK2;
  342. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  343. *pId = inb(baseio + MOXA_MUST_HWID_REGISTER);
  344. outb(oldlcr, baseio + UART_LCR);
  345. }
  346. static void SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(unsigned long baseio)
  347. {
  348. u8 oldlcr;
  349. u8 efr;
  350. oldlcr = inb(baseio + UART_LCR);
  351. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  352. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  353. efr &= ~MOXA_MUST_EFR_SF_MASK;
  354. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  355. outb(oldlcr, baseio + UART_LCR);
  356. }
  357. static void mxser_enable_must_tx_software_flow_control(unsigned long baseio)
  358. {
  359. u8 oldlcr;
  360. u8 efr;
  361. oldlcr = inb(baseio + UART_LCR);
  362. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  363. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  364. efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
  365. efr |= MOXA_MUST_EFR_SF_TX1;
  366. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  367. outb(oldlcr, baseio + UART_LCR);
  368. }
  369. static void mxser_disable_must_tx_software_flow_control(unsigned long baseio)
  370. {
  371. u8 oldlcr;
  372. u8 efr;
  373. oldlcr = inb(baseio + UART_LCR);
  374. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  375. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  376. efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
  377. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  378. outb(oldlcr, baseio + UART_LCR);
  379. }
  380. static void mxser_enable_must_rx_software_flow_control(unsigned long baseio)
  381. {
  382. u8 oldlcr;
  383. u8 efr;
  384. oldlcr = inb(baseio + UART_LCR);
  385. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  386. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  387. efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
  388. efr |= MOXA_MUST_EFR_SF_RX1;
  389. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  390. outb(oldlcr, baseio + UART_LCR);
  391. }
  392. static void mxser_disable_must_rx_software_flow_control(unsigned long baseio)
  393. {
  394. u8 oldlcr;
  395. u8 efr;
  396. oldlcr = inb(baseio + UART_LCR);
  397. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  398. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  399. efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
  400. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  401. outb(oldlcr, baseio + UART_LCR);
  402. }
  403. #ifdef CONFIG_PCI
  404. static int __devinit CheckIsMoxaMust(unsigned long io)
  405. {
  406. u8 oldmcr, hwid;
  407. int i;
  408. outb(0, io + UART_LCR);
  409. mxser_disable_must_enchance_mode(io);
  410. oldmcr = inb(io + UART_MCR);
  411. outb(0, io + UART_MCR);
  412. mxser_set_must_xon1_value(io, 0x11);
  413. if ((hwid = inb(io + UART_MCR)) != 0) {
  414. outb(oldmcr, io + UART_MCR);
  415. return MOXA_OTHER_UART;
  416. }
  417. mxser_get_must_hardware_id(io, &hwid);
  418. for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */
  419. if (hwid == Gpci_uart_info[i].type)
  420. return (int)hwid;
  421. }
  422. return MOXA_OTHER_UART;
  423. }
  424. #endif
  425. static void process_txrx_fifo(struct mxser_port *info)
  426. {
  427. int i;
  428. if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
  429. info->rx_trigger = 1;
  430. info->rx_high_water = 1;
  431. info->rx_low_water = 1;
  432. info->xmit_fifo_size = 1;
  433. } else
  434. for (i = 0; i < UART_INFO_NUM; i++)
  435. if (info->board->chip_flag == Gpci_uart_info[i].type) {
  436. info->rx_trigger = Gpci_uart_info[i].rx_trigger;
  437. info->rx_low_water = Gpci_uart_info[i].rx_low_water;
  438. info->rx_high_water = Gpci_uart_info[i].rx_high_water;
  439. info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
  440. break;
  441. }
  442. }
  443. static unsigned char mxser_get_msr(int baseaddr, int mode, int port)
  444. {
  445. unsigned char status = 0;
  446. status = inb(baseaddr + UART_MSR);
  447. mxser_msr[port] &= 0x0F;
  448. mxser_msr[port] |= status;
  449. status = mxser_msr[port];
  450. if (mode)
  451. mxser_msr[port] = 0;
  452. return status;
  453. }
  454. static int mxser_block_til_ready(struct tty_struct *tty, struct file *filp,
  455. struct mxser_port *port)
  456. {
  457. DECLARE_WAITQUEUE(wait, current);
  458. int retval;
  459. int do_clocal = 0;
  460. unsigned long flags;
  461. /*
  462. * If non-blocking mode is set, or the port is not enabled,
  463. * then make the check up front and then exit.
  464. */
  465. if ((filp->f_flags & O_NONBLOCK) ||
  466. test_bit(TTY_IO_ERROR, &tty->flags)) {
  467. port->port.flags |= ASYNC_NORMAL_ACTIVE;
  468. return 0;
  469. }
  470. if (tty->termios->c_cflag & CLOCAL)
  471. do_clocal = 1;
  472. /*
  473. * Block waiting for the carrier detect and the line to become
  474. * free (i.e., not in use by the callout). While we are in
  475. * this loop, port->port.count is dropped by one, so that
  476. * mxser_close() knows when to free things. We restore it upon
  477. * exit, either normal or abnormal.
  478. */
  479. retval = 0;
  480. add_wait_queue(&port->port.open_wait, &wait);
  481. spin_lock_irqsave(&port->slock, flags);
  482. if (!tty_hung_up_p(filp))
  483. port->port.count--;
  484. spin_unlock_irqrestore(&port->slock, flags);
  485. port->port.blocked_open++;
  486. while (1) {
  487. spin_lock_irqsave(&port->slock, flags);
  488. outb(inb(port->ioaddr + UART_MCR) |
  489. UART_MCR_DTR | UART_MCR_RTS, port->ioaddr + UART_MCR);
  490. spin_unlock_irqrestore(&port->slock, flags);
  491. set_current_state(TASK_INTERRUPTIBLE);
  492. if (tty_hung_up_p(filp) || !(port->port.flags & ASYNC_INITIALIZED)) {
  493. if (port->port.flags & ASYNC_HUP_NOTIFY)
  494. retval = -EAGAIN;
  495. else
  496. retval = -ERESTARTSYS;
  497. break;
  498. }
  499. if (!(port->port.flags & ASYNC_CLOSING) &&
  500. (do_clocal ||
  501. (inb(port->ioaddr + UART_MSR) & UART_MSR_DCD)))
  502. break;
  503. if (signal_pending(current)) {
  504. retval = -ERESTARTSYS;
  505. break;
  506. }
  507. schedule();
  508. }
  509. set_current_state(TASK_RUNNING);
  510. remove_wait_queue(&port->port.open_wait, &wait);
  511. if (!tty_hung_up_p(filp))
  512. port->port.count++;
  513. port->port.blocked_open--;
  514. if (retval)
  515. return retval;
  516. port->port.flags |= ASYNC_NORMAL_ACTIVE;
  517. return 0;
  518. }
  519. static int mxser_set_baud(struct mxser_port *info, long newspd)
  520. {
  521. int quot = 0, baud;
  522. unsigned char cval;
  523. if (!info->port.tty || !info->port.tty->termios)
  524. return -1;
  525. if (!(info->ioaddr))
  526. return -1;
  527. if (newspd > info->max_baud)
  528. return -1;
  529. if (newspd == 134) {
  530. quot = 2 * info->baud_base / 269;
  531. tty_encode_baud_rate(info->port.tty, 134, 134);
  532. } else if (newspd) {
  533. quot = info->baud_base / newspd;
  534. if (quot == 0)
  535. quot = 1;
  536. baud = info->baud_base/quot;
  537. tty_encode_baud_rate(info->port.tty, baud, baud);
  538. } else {
  539. quot = 0;
  540. }
  541. info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
  542. info->timeout += HZ / 50; /* Add .02 seconds of slop */
  543. if (quot) {
  544. info->MCR |= UART_MCR_DTR;
  545. outb(info->MCR, info->ioaddr + UART_MCR);
  546. } else {
  547. info->MCR &= ~UART_MCR_DTR;
  548. outb(info->MCR, info->ioaddr + UART_MCR);
  549. return 0;
  550. }
  551. cval = inb(info->ioaddr + UART_LCR);
  552. outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */
  553. outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */
  554. outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */
  555. outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */
  556. #ifdef BOTHER
  557. if (C_BAUD(info->port.tty) == BOTHER) {
  558. quot = info->baud_base % newspd;
  559. quot *= 8;
  560. if (quot % newspd > newspd / 2) {
  561. quot /= newspd;
  562. quot++;
  563. } else
  564. quot /= newspd;
  565. mxser_set_must_enum_value(info->ioaddr, quot);
  566. } else
  567. #endif
  568. mxser_set_must_enum_value(info->ioaddr, 0);
  569. return 0;
  570. }
  571. /*
  572. * This routine is called to set the UART divisor registers to match
  573. * the specified baud rate for a serial port.
  574. */
  575. static int mxser_change_speed(struct mxser_port *info,
  576. struct ktermios *old_termios)
  577. {
  578. unsigned cflag, cval, fcr;
  579. int ret = 0;
  580. unsigned char status;
  581. if (!info->port.tty || !info->port.tty->termios)
  582. return ret;
  583. cflag = info->port.tty->termios->c_cflag;
  584. if (!(info->ioaddr))
  585. return ret;
  586. if (mxser_set_baud_method[info->port.tty->index] == 0)
  587. mxser_set_baud(info, tty_get_baud_rate(info->port.tty));
  588. /* byte size and parity */
  589. switch (cflag & CSIZE) {
  590. case CS5:
  591. cval = 0x00;
  592. break;
  593. case CS6:
  594. cval = 0x01;
  595. break;
  596. case CS7:
  597. cval = 0x02;
  598. break;
  599. case CS8:
  600. cval = 0x03;
  601. break;
  602. default:
  603. cval = 0x00;
  604. break; /* too keep GCC shut... */
  605. }
  606. if (cflag & CSTOPB)
  607. cval |= 0x04;
  608. if (cflag & PARENB)
  609. cval |= UART_LCR_PARITY;
  610. if (!(cflag & PARODD))
  611. cval |= UART_LCR_EPAR;
  612. if (cflag & CMSPAR)
  613. cval |= UART_LCR_SPAR;
  614. if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
  615. if (info->board->chip_flag) {
  616. fcr = UART_FCR_ENABLE_FIFO;
  617. fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
  618. mxser_set_must_fifo_value(info);
  619. } else
  620. fcr = 0;
  621. } else {
  622. fcr = UART_FCR_ENABLE_FIFO;
  623. if (info->board->chip_flag) {
  624. fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
  625. mxser_set_must_fifo_value(info);
  626. } else {
  627. switch (info->rx_trigger) {
  628. case 1:
  629. fcr |= UART_FCR_TRIGGER_1;
  630. break;
  631. case 4:
  632. fcr |= UART_FCR_TRIGGER_4;
  633. break;
  634. case 8:
  635. fcr |= UART_FCR_TRIGGER_8;
  636. break;
  637. default:
  638. fcr |= UART_FCR_TRIGGER_14;
  639. break;
  640. }
  641. }
  642. }
  643. /* CTS flow control flag and modem status interrupts */
  644. info->IER &= ~UART_IER_MSI;
  645. info->MCR &= ~UART_MCR_AFE;
  646. if (cflag & CRTSCTS) {
  647. info->port.flags |= ASYNC_CTS_FLOW;
  648. info->IER |= UART_IER_MSI;
  649. if ((info->type == PORT_16550A) || (info->board->chip_flag)) {
  650. info->MCR |= UART_MCR_AFE;
  651. } else {
  652. status = inb(info->ioaddr + UART_MSR);
  653. if (info->port.tty->hw_stopped) {
  654. if (status & UART_MSR_CTS) {
  655. info->port.tty->hw_stopped = 0;
  656. if (info->type != PORT_16550A &&
  657. !info->board->chip_flag) {
  658. outb(info->IER & ~UART_IER_THRI,
  659. info->ioaddr +
  660. UART_IER);
  661. info->IER |= UART_IER_THRI;
  662. outb(info->IER, info->ioaddr +
  663. UART_IER);
  664. }
  665. tty_wakeup(info->port.tty);
  666. }
  667. } else {
  668. if (!(status & UART_MSR_CTS)) {
  669. info->port.tty->hw_stopped = 1;
  670. if ((info->type != PORT_16550A) &&
  671. (!info->board->chip_flag)) {
  672. info->IER &= ~UART_IER_THRI;
  673. outb(info->IER, info->ioaddr +
  674. UART_IER);
  675. }
  676. }
  677. }
  678. }
  679. } else {
  680. info->port.flags &= ~ASYNC_CTS_FLOW;
  681. }
  682. outb(info->MCR, info->ioaddr + UART_MCR);
  683. if (cflag & CLOCAL) {
  684. info->port.flags &= ~ASYNC_CHECK_CD;
  685. } else {
  686. info->port.flags |= ASYNC_CHECK_CD;
  687. info->IER |= UART_IER_MSI;
  688. }
  689. outb(info->IER, info->ioaddr + UART_IER);
  690. /*
  691. * Set up parity check flag
  692. */
  693. info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
  694. if (I_INPCK(info->port.tty))
  695. info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
  696. if (I_BRKINT(info->port.tty) || I_PARMRK(info->port.tty))
  697. info->read_status_mask |= UART_LSR_BI;
  698. info->ignore_status_mask = 0;
  699. if (I_IGNBRK(info->port.tty)) {
  700. info->ignore_status_mask |= UART_LSR_BI;
  701. info->read_status_mask |= UART_LSR_BI;
  702. /*
  703. * If we're ignore parity and break indicators, ignore
  704. * overruns too. (For real raw support).
  705. */
  706. if (I_IGNPAR(info->port.tty)) {
  707. info->ignore_status_mask |=
  708. UART_LSR_OE |
  709. UART_LSR_PE |
  710. UART_LSR_FE;
  711. info->read_status_mask |=
  712. UART_LSR_OE |
  713. UART_LSR_PE |
  714. UART_LSR_FE;
  715. }
  716. }
  717. if (info->board->chip_flag) {
  718. mxser_set_must_xon1_value(info->ioaddr, START_CHAR(info->port.tty));
  719. mxser_set_must_xoff1_value(info->ioaddr, STOP_CHAR(info->port.tty));
  720. if (I_IXON(info->port.tty)) {
  721. mxser_enable_must_rx_software_flow_control(
  722. info->ioaddr);
  723. } else {
  724. mxser_disable_must_rx_software_flow_control(
  725. info->ioaddr);
  726. }
  727. if (I_IXOFF(info->port.tty)) {
  728. mxser_enable_must_tx_software_flow_control(
  729. info->ioaddr);
  730. } else {
  731. mxser_disable_must_tx_software_flow_control(
  732. info->ioaddr);
  733. }
  734. }
  735. outb(fcr, info->ioaddr + UART_FCR); /* set fcr */
  736. outb(cval, info->ioaddr + UART_LCR);
  737. return ret;
  738. }
  739. static void mxser_check_modem_status(struct mxser_port *port, int status)
  740. {
  741. /* update input line counters */
  742. if (status & UART_MSR_TERI)
  743. port->icount.rng++;
  744. if (status & UART_MSR_DDSR)
  745. port->icount.dsr++;
  746. if (status & UART_MSR_DDCD)
  747. port->icount.dcd++;
  748. if (status & UART_MSR_DCTS)
  749. port->icount.cts++;
  750. port->mon_data.modem_status = status;
  751. wake_up_interruptible(&port->delta_msr_wait);
  752. if ((port->port.flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
  753. if (status & UART_MSR_DCD)
  754. wake_up_interruptible(&port->port.open_wait);
  755. }
  756. if (port->port.flags & ASYNC_CTS_FLOW) {
  757. if (port->port.tty->hw_stopped) {
  758. if (status & UART_MSR_CTS) {
  759. port->port.tty->hw_stopped = 0;
  760. if ((port->type != PORT_16550A) &&
  761. (!port->board->chip_flag)) {
  762. outb(port->IER & ~UART_IER_THRI,
  763. port->ioaddr + UART_IER);
  764. port->IER |= UART_IER_THRI;
  765. outb(port->IER, port->ioaddr +
  766. UART_IER);
  767. }
  768. tty_wakeup(port->port.tty);
  769. }
  770. } else {
  771. if (!(status & UART_MSR_CTS)) {
  772. port->port.tty->hw_stopped = 1;
  773. if (port->type != PORT_16550A &&
  774. !port->board->chip_flag) {
  775. port->IER &= ~UART_IER_THRI;
  776. outb(port->IER, port->ioaddr +
  777. UART_IER);
  778. }
  779. }
  780. }
  781. }
  782. }
  783. static int mxser_startup(struct mxser_port *info)
  784. {
  785. unsigned long page;
  786. unsigned long flags;
  787. page = __get_free_page(GFP_KERNEL);
  788. if (!page)
  789. return -ENOMEM;
  790. spin_lock_irqsave(&info->slock, flags);
  791. if (info->port.flags & ASYNC_INITIALIZED) {
  792. free_page(page);
  793. spin_unlock_irqrestore(&info->slock, flags);
  794. return 0;
  795. }
  796. if (!info->ioaddr || !info->type) {
  797. if (info->port.tty)
  798. set_bit(TTY_IO_ERROR, &info->port.tty->flags);
  799. free_page(page);
  800. spin_unlock_irqrestore(&info->slock, flags);
  801. return 0;
  802. }
  803. if (info->port.xmit_buf)
  804. free_page(page);
  805. else
  806. info->port.xmit_buf = (unsigned char *) page;
  807. /*
  808. * Clear the FIFO buffers and disable them
  809. * (they will be reenabled in mxser_change_speed())
  810. */
  811. if (info->board->chip_flag)
  812. outb((UART_FCR_CLEAR_RCVR |
  813. UART_FCR_CLEAR_XMIT |
  814. MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR);
  815. else
  816. outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
  817. info->ioaddr + UART_FCR);
  818. /*
  819. * At this point there's no way the LSR could still be 0xFF;
  820. * if it is, then bail out, because there's likely no UART
  821. * here.
  822. */
  823. if (inb(info->ioaddr + UART_LSR) == 0xff) {
  824. spin_unlock_irqrestore(&info->slock, flags);
  825. if (capable(CAP_SYS_ADMIN)) {
  826. if (info->port.tty)
  827. set_bit(TTY_IO_ERROR, &info->port.tty->flags);
  828. return 0;
  829. } else
  830. return -ENODEV;
  831. }
  832. /*
  833. * Clear the interrupt registers.
  834. */
  835. (void) inb(info->ioaddr + UART_LSR);
  836. (void) inb(info->ioaddr + UART_RX);
  837. (void) inb(info->ioaddr + UART_IIR);
  838. (void) inb(info->ioaddr + UART_MSR);
  839. /*
  840. * Now, initialize the UART
  841. */
  842. outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */
  843. info->MCR = UART_MCR_DTR | UART_MCR_RTS;
  844. outb(info->MCR, info->ioaddr + UART_MCR);
  845. /*
  846. * Finally, enable interrupts
  847. */
  848. info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
  849. if (info->board->chip_flag)
  850. info->IER |= MOXA_MUST_IER_EGDAI;
  851. outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */
  852. /*
  853. * And clear the interrupt registers again for luck.
  854. */
  855. (void) inb(info->ioaddr + UART_LSR);
  856. (void) inb(info->ioaddr + UART_RX);
  857. (void) inb(info->ioaddr + UART_IIR);
  858. (void) inb(info->ioaddr + UART_MSR);
  859. if (info->port.tty)
  860. clear_bit(TTY_IO_ERROR, &info->port.tty->flags);
  861. info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
  862. /*
  863. * and set the speed of the serial port
  864. */
  865. mxser_change_speed(info, NULL);
  866. info->port.flags |= ASYNC_INITIALIZED;
  867. spin_unlock_irqrestore(&info->slock, flags);
  868. return 0;
  869. }
  870. /*
  871. * This routine will shutdown a serial port; interrupts maybe disabled, and
  872. * DTR is dropped if the hangup on close termio flag is on.
  873. */
  874. static void mxser_shutdown(struct mxser_port *info)
  875. {
  876. unsigned long flags;
  877. if (!(info->port.flags & ASYNC_INITIALIZED))
  878. return;
  879. spin_lock_irqsave(&info->slock, flags);
  880. /*
  881. * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
  882. * here so the queue might never be waken up
  883. */
  884. wake_up_interruptible(&info->delta_msr_wait);
  885. /*
  886. * Free the IRQ, if necessary
  887. */
  888. if (info->port.xmit_buf) {
  889. free_page((unsigned long) info->port.xmit_buf);
  890. info->port.xmit_buf = NULL;
  891. }
  892. info->IER = 0;
  893. outb(0x00, info->ioaddr + UART_IER);
  894. if (!info->port.tty || (info->port.tty->termios->c_cflag & HUPCL))
  895. info->MCR &= ~(UART_MCR_DTR | UART_MCR_RTS);
  896. outb(info->MCR, info->ioaddr + UART_MCR);
  897. /* clear Rx/Tx FIFO's */
  898. if (info->board->chip_flag)
  899. outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT |
  900. MOXA_MUST_FCR_GDA_MODE_ENABLE,
  901. info->ioaddr + UART_FCR);
  902. else
  903. outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
  904. info->ioaddr + UART_FCR);
  905. /* read data port to reset things */
  906. (void) inb(info->ioaddr + UART_RX);
  907. if (info->port.tty)
  908. set_bit(TTY_IO_ERROR, &info->port.tty->flags);
  909. info->port.flags &= ~ASYNC_INITIALIZED;
  910. if (info->board->chip_flag)
  911. SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr);
  912. spin_unlock_irqrestore(&info->slock, flags);
  913. }
  914. /*
  915. * This routine is called whenever a serial port is opened. It
  916. * enables interrupts for a serial port, linking in its async structure into
  917. * the IRQ chain. It also performs the serial-specific
  918. * initialization for the tty structure.
  919. */
  920. static int mxser_open(struct tty_struct *tty, struct file *filp)
  921. {
  922. struct mxser_port *info;
  923. unsigned long flags;
  924. int retval, line;
  925. line = tty->index;
  926. if (line == MXSER_PORTS)
  927. return 0;
  928. if (line < 0 || line > MXSER_PORTS)
  929. return -ENODEV;
  930. info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD];
  931. if (!info->ioaddr)
  932. return -ENODEV;
  933. tty->driver_data = info;
  934. info->port.tty = tty;
  935. /*
  936. * Start up serial port
  937. */
  938. spin_lock_irqsave(&info->slock, flags);
  939. info->port.count++;
  940. spin_unlock_irqrestore(&info->slock, flags);
  941. retval = mxser_startup(info);
  942. if (retval)
  943. return retval;
  944. retval = mxser_block_til_ready(tty, filp, info);
  945. if (retval)
  946. return retval;
  947. /* unmark here for very high baud rate (ex. 921600 bps) used */
  948. tty->low_latency = 1;
  949. return 0;
  950. }
  951. static void mxser_flush_buffer(struct tty_struct *tty)
  952. {
  953. struct mxser_port *info = tty->driver_data;
  954. char fcr;
  955. unsigned long flags;
  956. spin_lock_irqsave(&info->slock, flags);
  957. info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
  958. fcr = inb(info->ioaddr + UART_FCR);
  959. outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
  960. info->ioaddr + UART_FCR);
  961. outb(fcr, info->ioaddr + UART_FCR);
  962. spin_unlock_irqrestore(&info->slock, flags);
  963. tty_wakeup(tty);
  964. }
  965. /*
  966. * This routine is called when the serial port gets closed. First, we
  967. * wait for the last remaining data to be sent. Then, we unlink its
  968. * async structure from the interrupt chain if necessary, and we free
  969. * that IRQ if nothing is left in the chain.
  970. */
  971. static void mxser_close(struct tty_struct *tty, struct file *filp)
  972. {
  973. struct mxser_port *info = tty->driver_data;
  974. unsigned long timeout;
  975. unsigned long flags;
  976. if (tty->index == MXSER_PORTS)
  977. return;
  978. if (!info)
  979. return;
  980. spin_lock_irqsave(&info->slock, flags);
  981. if (tty_hung_up_p(filp)) {
  982. spin_unlock_irqrestore(&info->slock, flags);
  983. return;
  984. }
  985. if ((tty->count == 1) && (info->port.count != 1)) {
  986. /*
  987. * Uh, oh. tty->count is 1, which means that the tty
  988. * structure will be freed. Info->port.count should always
  989. * be one in these conditions. If it's greater than
  990. * one, we've got real problems, since it means the
  991. * serial port won't be shutdown.
  992. */
  993. printk(KERN_ERR "mxser_close: bad serial port count; "
  994. "tty->count is 1, info->port.count is %d\n", info->port.count);
  995. info->port.count = 1;
  996. }
  997. if (--info->port.count < 0) {
  998. printk(KERN_ERR "mxser_close: bad serial port count for "
  999. "ttys%d: %d\n", tty->index, info->port.count);
  1000. info->port.count = 0;
  1001. }
  1002. if (info->port.count) {
  1003. spin_unlock_irqrestore(&info->slock, flags);
  1004. return;
  1005. }
  1006. info->port.flags |= ASYNC_CLOSING;
  1007. spin_unlock_irqrestore(&info->slock, flags);
  1008. /*
  1009. * Save the termios structure, since this port may have
  1010. * separate termios for callout and dialin.
  1011. */
  1012. if (info->port.flags & ASYNC_NORMAL_ACTIVE)
  1013. info->normal_termios = *tty->termios;
  1014. /*
  1015. * Now we wait for the transmit buffer to clear; and we notify
  1016. * the line discipline to only process XON/XOFF characters.
  1017. */
  1018. tty->closing = 1;
  1019. if (info->port.closing_wait != ASYNC_CLOSING_WAIT_NONE)
  1020. tty_wait_until_sent(tty, info->port.closing_wait);
  1021. /*
  1022. * At this point we stop accepting input. To do this, we
  1023. * disable the receive line status interrupts, and tell the
  1024. * interrupt driver to stop checking the data ready bit in the
  1025. * line status register.
  1026. */
  1027. info->IER &= ~UART_IER_RLSI;
  1028. if (info->board->chip_flag)
  1029. info->IER &= ~MOXA_MUST_RECV_ISR;
  1030. if (info->port.flags & ASYNC_INITIALIZED) {
  1031. outb(info->IER, info->ioaddr + UART_IER);
  1032. /*
  1033. * Before we drop DTR, make sure the UART transmitter
  1034. * has completely drained; this is especially
  1035. * important if there is a transmit FIFO!
  1036. */
  1037. timeout = jiffies + HZ;
  1038. while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) {
  1039. schedule_timeout_interruptible(5);
  1040. if (time_after(jiffies, timeout))
  1041. break;
  1042. }
  1043. }
  1044. mxser_shutdown(info);
  1045. mxser_flush_buffer(tty);
  1046. tty_ldisc_flush(tty);
  1047. tty->closing = 0;
  1048. info->port.tty = NULL;
  1049. if (info->port.blocked_open) {
  1050. if (info->port.close_delay)
  1051. schedule_timeout_interruptible(info->port.close_delay);
  1052. wake_up_interruptible(&info->port.open_wait);
  1053. }
  1054. info->port.flags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING);
  1055. }
  1056. static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
  1057. {
  1058. int c, total = 0;
  1059. struct mxser_port *info = tty->driver_data;
  1060. unsigned long flags;
  1061. if (!info->port.xmit_buf)
  1062. return 0;
  1063. while (1) {
  1064. c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
  1065. SERIAL_XMIT_SIZE - info->xmit_head));
  1066. if (c <= 0)
  1067. break;
  1068. memcpy(info->port.xmit_buf + info->xmit_head, buf, c);
  1069. spin_lock_irqsave(&info->slock, flags);
  1070. info->xmit_head = (info->xmit_head + c) &
  1071. (SERIAL_XMIT_SIZE - 1);
  1072. info->xmit_cnt += c;
  1073. spin_unlock_irqrestore(&info->slock, flags);
  1074. buf += c;
  1075. count -= c;
  1076. total += c;
  1077. }
  1078. if (info->xmit_cnt && !tty->stopped) {
  1079. if (!tty->hw_stopped ||
  1080. (info->type == PORT_16550A) ||
  1081. (info->board->chip_flag)) {
  1082. spin_lock_irqsave(&info->slock, flags);
  1083. outb(info->IER & ~UART_IER_THRI, info->ioaddr +
  1084. UART_IER);
  1085. info->IER |= UART_IER_THRI;
  1086. outb(info->IER, info->ioaddr + UART_IER);
  1087. spin_unlock_irqrestore(&info->slock, flags);
  1088. }
  1089. }
  1090. return total;
  1091. }
  1092. static int mxser_put_char(struct tty_struct *tty, unsigned char ch)
  1093. {
  1094. struct mxser_port *info = tty->driver_data;
  1095. unsigned long flags;
  1096. if (!info->port.xmit_buf)
  1097. return 0;
  1098. if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
  1099. return 0;
  1100. spin_lock_irqsave(&info->slock, flags);
  1101. info->port.xmit_buf[info->xmit_head++] = ch;
  1102. info->xmit_head &= SERIAL_XMIT_SIZE - 1;
  1103. info->xmit_cnt++;
  1104. spin_unlock_irqrestore(&info->slock, flags);
  1105. if (!tty->stopped) {
  1106. if (!tty->hw_stopped ||
  1107. (info->type == PORT_16550A) ||
  1108. info->board->chip_flag) {
  1109. spin_lock_irqsave(&info->slock, flags);
  1110. outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
  1111. info->IER |= UART_IER_THRI;
  1112. outb(info->IER, info->ioaddr + UART_IER);
  1113. spin_unlock_irqrestore(&info->slock, flags);
  1114. }
  1115. }
  1116. return 1;
  1117. }
  1118. static void mxser_flush_chars(struct tty_struct *tty)
  1119. {
  1120. struct mxser_port *info = tty->driver_data;
  1121. unsigned long flags;
  1122. if (info->xmit_cnt <= 0 ||
  1123. tty->stopped ||
  1124. !info->port.xmit_buf ||
  1125. (tty->hw_stopped &&
  1126. (info->type != PORT_16550A) &&
  1127. (!info->board->chip_flag)
  1128. ))
  1129. return;
  1130. spin_lock_irqsave(&info->slock, flags);
  1131. outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
  1132. info->IER |= UART_IER_THRI;
  1133. outb(info->IER, info->ioaddr + UART_IER);
  1134. spin_unlock_irqrestore(&info->slock, flags);
  1135. }
  1136. static int mxser_write_room(struct tty_struct *tty)
  1137. {
  1138. struct mxser_port *info = tty->driver_data;
  1139. int ret;
  1140. ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
  1141. if (ret < 0)
  1142. ret = 0;
  1143. return ret;
  1144. }
  1145. static int mxser_chars_in_buffer(struct tty_struct *tty)
  1146. {
  1147. struct mxser_port *info = tty->driver_data;
  1148. return info->xmit_cnt;
  1149. }
  1150. /*
  1151. * ------------------------------------------------------------
  1152. * friends of mxser_ioctl()
  1153. * ------------------------------------------------------------
  1154. */
  1155. static int mxser_get_serial_info(struct mxser_port *info,
  1156. struct serial_struct __user *retinfo)
  1157. {
  1158. struct serial_struct tmp = {
  1159. .type = info->type,
  1160. .line = info->port.tty->index,
  1161. .port = info->ioaddr,
  1162. .irq = info->board->irq,
  1163. .flags = info->port.flags,
  1164. .baud_base = info->baud_base,
  1165. .close_delay = info->port.close_delay,
  1166. .closing_wait = info->port.closing_wait,
  1167. .custom_divisor = info->custom_divisor,
  1168. .hub6 = 0
  1169. };
  1170. if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
  1171. return -EFAULT;
  1172. return 0;
  1173. }
  1174. static int mxser_set_serial_info(struct mxser_port *info,
  1175. struct serial_struct __user *new_info)
  1176. {
  1177. struct serial_struct new_serial;
  1178. speed_t baud;
  1179. unsigned long sl_flags;
  1180. unsigned int flags;
  1181. int retval = 0;
  1182. if (!new_info || !info->ioaddr)
  1183. return -ENODEV;
  1184. if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
  1185. return -EFAULT;
  1186. if (new_serial.irq != info->board->irq ||
  1187. new_serial.port != info->ioaddr)
  1188. return -EINVAL;
  1189. flags = info->port.flags & ASYNC_SPD_MASK;
  1190. if (!capable(CAP_SYS_ADMIN)) {
  1191. if ((new_serial.baud_base != info->baud_base) ||
  1192. (new_serial.close_delay != info->port.close_delay) ||
  1193. ((new_serial.flags & ~ASYNC_USR_MASK) != (info->port.flags & ~ASYNC_USR_MASK)))
  1194. return -EPERM;
  1195. info->port.flags = ((info->port.flags & ~ASYNC_USR_MASK) |
  1196. (new_serial.flags & ASYNC_USR_MASK));
  1197. } else {
  1198. /*
  1199. * OK, past this point, all the error checking has been done.
  1200. * At this point, we start making changes.....
  1201. */
  1202. info->port.flags = ((info->port.flags & ~ASYNC_FLAGS) |
  1203. (new_serial.flags & ASYNC_FLAGS));
  1204. info->port.close_delay = new_serial.close_delay * HZ / 100;
  1205. info->port.closing_wait = new_serial.closing_wait * HZ / 100;
  1206. info->port.tty->low_latency =
  1207. (info->port.flags & ASYNC_LOW_LATENCY) ? 1 : 0;
  1208. info->port.tty->low_latency = 0;
  1209. if ((info->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST &&
  1210. (new_serial.baud_base != info->baud_base ||
  1211. new_serial.custom_divisor !=
  1212. info->custom_divisor)) {
  1213. baud = new_serial.baud_base / new_serial.custom_divisor;
  1214. tty_encode_baud_rate(info->port.tty, baud, baud);
  1215. }
  1216. }
  1217. info->type = new_serial.type;
  1218. process_txrx_fifo(info);
  1219. if (info->port.flags & ASYNC_INITIALIZED) {
  1220. if (flags != (info->port.flags & ASYNC_SPD_MASK)) {
  1221. spin_lock_irqsave(&info->slock, sl_flags);
  1222. mxser_change_speed(info, NULL);
  1223. spin_unlock_irqrestore(&info->slock, sl_flags);
  1224. }
  1225. } else
  1226. retval = mxser_startup(info);
  1227. return retval;
  1228. }
  1229. /*
  1230. * mxser_get_lsr_info - get line status register info
  1231. *
  1232. * Purpose: Let user call ioctl() to get info when the UART physically
  1233. * is emptied. On bus types like RS485, the transmitter must
  1234. * release the bus after transmitting. This must be done when
  1235. * the transmit shift register is empty, not be done when the
  1236. * transmit holding register is empty. This functionality
  1237. * allows an RS485 driver to be written in user space.
  1238. */
  1239. static int mxser_get_lsr_info(struct mxser_port *info,
  1240. unsigned int __user *value)
  1241. {
  1242. unsigned char status;
  1243. unsigned int result;
  1244. unsigned long flags;
  1245. spin_lock_irqsave(&info->slock, flags);
  1246. status = inb(info->ioaddr + UART_LSR);
  1247. spin_unlock_irqrestore(&info->slock, flags);
  1248. result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
  1249. return put_user(result, value);
  1250. }
  1251. /*
  1252. * This routine sends a break character out the serial port.
  1253. */
  1254. static void mxser_send_break(struct mxser_port *info, int duration)
  1255. {
  1256. unsigned long flags;
  1257. if (!info->ioaddr)
  1258. return;
  1259. set_current_state(TASK_INTERRUPTIBLE);
  1260. spin_lock_irqsave(&info->slock, flags);
  1261. outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
  1262. info->ioaddr + UART_LCR);
  1263. spin_unlock_irqrestore(&info->slock, flags);
  1264. schedule_timeout(duration);
  1265. spin_lock_irqsave(&info->slock, flags);
  1266. outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
  1267. info->ioaddr + UART_LCR);
  1268. spin_unlock_irqrestore(&info->slock, flags);
  1269. }
  1270. static int mxser_tiocmget(struct tty_struct *tty, struct file *file)
  1271. {
  1272. struct mxser_port *info = tty->driver_data;
  1273. unsigned char control, status;
  1274. unsigned long flags;
  1275. if (tty->index == MXSER_PORTS)
  1276. return -ENOIOCTLCMD;
  1277. if (test_bit(TTY_IO_ERROR, &tty->flags))
  1278. return -EIO;
  1279. control = info->MCR;
  1280. spin_lock_irqsave(&info->slock, flags);
  1281. status = inb(info->ioaddr + UART_MSR);
  1282. if (status & UART_MSR_ANY_DELTA)
  1283. mxser_check_modem_status(info, status);
  1284. spin_unlock_irqrestore(&info->slock, flags);
  1285. return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
  1286. ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
  1287. ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
  1288. ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
  1289. ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
  1290. ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
  1291. }
  1292. static int mxser_tiocmset(struct tty_struct *tty, struct file *file,
  1293. unsigned int set, unsigned int clear)
  1294. {
  1295. struct mxser_port *info = tty->driver_data;
  1296. unsigned long flags;
  1297. if (tty->index == MXSER_PORTS)
  1298. return -ENOIOCTLCMD;
  1299. if (test_bit(TTY_IO_ERROR, &tty->flags))
  1300. return -EIO;
  1301. spin_lock_irqsave(&info->slock, flags);
  1302. if (set & TIOCM_RTS)
  1303. info->MCR |= UART_MCR_RTS;
  1304. if (set & TIOCM_DTR)
  1305. info->MCR |= UART_MCR_DTR;
  1306. if (clear & TIOCM_RTS)
  1307. info->MCR &= ~UART_MCR_RTS;
  1308. if (clear & TIOCM_DTR)
  1309. info->MCR &= ~UART_MCR_DTR;
  1310. outb(info->MCR, info->ioaddr + UART_MCR);
  1311. spin_unlock_irqrestore(&info->slock, flags);
  1312. return 0;
  1313. }
  1314. static int __init mxser_program_mode(int port)
  1315. {
  1316. int id, i, j, n;
  1317. outb(0, port);
  1318. outb(0, port);
  1319. outb(0, port);
  1320. (void)inb(port);
  1321. (void)inb(port);
  1322. outb(0, port);
  1323. (void)inb(port);
  1324. id = inb(port + 1) & 0x1F;
  1325. if ((id != C168_ASIC_ID) &&
  1326. (id != C104_ASIC_ID) &&
  1327. (id != C102_ASIC_ID) &&
  1328. (id != CI132_ASIC_ID) &&
  1329. (id != CI134_ASIC_ID) &&
  1330. (id != CI104J_ASIC_ID))
  1331. return -1;
  1332. for (i = 0, j = 0; i < 4; i++) {
  1333. n = inb(port + 2);
  1334. if (n == 'M') {
  1335. j = 1;
  1336. } else if ((j == 1) && (n == 1)) {
  1337. j = 2;
  1338. break;
  1339. } else
  1340. j = 0;
  1341. }
  1342. if (j != 2)
  1343. id = -2;
  1344. return id;
  1345. }
  1346. static void __init mxser_normal_mode(int port)
  1347. {
  1348. int i, n;
  1349. outb(0xA5, port + 1);
  1350. outb(0x80, port + 3);
  1351. outb(12, port + 0); /* 9600 bps */
  1352. outb(0, port + 1);
  1353. outb(0x03, port + 3); /* 8 data bits */
  1354. outb(0x13, port + 4); /* loop back mode */
  1355. for (i = 0; i < 16; i++) {
  1356. n = inb(port + 5);
  1357. if ((n & 0x61) == 0x60)
  1358. break;
  1359. if ((n & 1) == 1)
  1360. (void)inb(port);
  1361. }
  1362. outb(0x00, port + 4);
  1363. }
  1364. #define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
  1365. #define CHIP_DO 0x02 /* Serial Data Output in Eprom */
  1366. #define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
  1367. #define CHIP_DI 0x08 /* Serial Data Input in Eprom */
  1368. #define EN_CCMD 0x000 /* Chip's command register */
  1369. #define EN0_RSARLO 0x008 /* Remote start address reg 0 */
  1370. #define EN0_RSARHI 0x009 /* Remote start address reg 1 */
  1371. #define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
  1372. #define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
  1373. #define EN0_DCFG 0x00E /* Data configuration reg WR */
  1374. #define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
  1375. #define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
  1376. #define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
  1377. static int __init mxser_read_register(int port, unsigned short *regs)
  1378. {
  1379. int i, k, value, id;
  1380. unsigned int j;
  1381. id = mxser_program_mode(port);
  1382. if (id < 0)
  1383. return id;
  1384. for (i = 0; i < 14; i++) {
  1385. k = (i & 0x3F) | 0x180;
  1386. for (j = 0x100; j > 0; j >>= 1) {
  1387. outb(CHIP_CS, port);
  1388. if (k & j) {
  1389. outb(CHIP_CS | CHIP_DO, port);
  1390. outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
  1391. } else {
  1392. outb(CHIP_CS, port);
  1393. outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
  1394. }
  1395. }
  1396. (void)inb(port);
  1397. value = 0;
  1398. for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
  1399. outb(CHIP_CS, port);
  1400. outb(CHIP_CS | CHIP_SK, port);
  1401. if (inb(port) & CHIP_DI)
  1402. value |= j;
  1403. }
  1404. regs[i] = value;
  1405. outb(0, port);
  1406. }
  1407. mxser_normal_mode(port);
  1408. return id;
  1409. }
  1410. static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
  1411. {
  1412. struct mxser_port *port;
  1413. int result, status;
  1414. unsigned int i, j;
  1415. int ret = 0;
  1416. switch (cmd) {
  1417. case MOXA_GET_MAJOR:
  1418. return put_user(ttymajor, (int __user *)argp);
  1419. case MOXA_CHKPORTENABLE:
  1420. result = 0;
  1421. lock_kernel();
  1422. for (i = 0; i < MXSER_BOARDS; i++)
  1423. for (j = 0; j < MXSER_PORTS_PER_BOARD; j++)
  1424. if (mxser_boards[i].ports[j].ioaddr)
  1425. result |= (1 << i);
  1426. unlock_kernel();
  1427. return put_user(result, (unsigned long __user *)argp);
  1428. case MOXA_GETDATACOUNT:
  1429. lock_kernel();
  1430. if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
  1431. ret = -EFAULT;
  1432. unlock_kernel();
  1433. return ret;
  1434. case MOXA_GETMSTATUS:
  1435. lock_kernel();
  1436. for (i = 0; i < MXSER_BOARDS; i++)
  1437. for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
  1438. port = &mxser_boards[i].ports[j];
  1439. GMStatus[i].ri = 0;
  1440. if (!port->ioaddr) {
  1441. GMStatus[i].dcd = 0;
  1442. GMStatus[i].dsr = 0;
  1443. GMStatus[i].cts = 0;
  1444. continue;
  1445. }
  1446. if (!port->port.tty || !port->port.tty->termios)
  1447. GMStatus[i].cflag =
  1448. port->normal_termios.c_cflag;
  1449. else
  1450. GMStatus[i].cflag =
  1451. port->port.tty->termios->c_cflag;
  1452. status = inb(port->ioaddr + UART_MSR);
  1453. if (status & 0x80 /*UART_MSR_DCD */ )
  1454. GMStatus[i].dcd = 1;
  1455. else
  1456. GMStatus[i].dcd = 0;
  1457. if (status & 0x20 /*UART_MSR_DSR */ )
  1458. GMStatus[i].dsr = 1;
  1459. else
  1460. GMStatus[i].dsr = 0;
  1461. if (status & 0x10 /*UART_MSR_CTS */ )
  1462. GMStatus[i].cts = 1;
  1463. else
  1464. GMStatus[i].cts = 0;
  1465. }
  1466. unlock_kernel();
  1467. if (copy_to_user(argp, GMStatus,
  1468. sizeof(struct mxser_mstatus) * MXSER_PORTS))
  1469. return -EFAULT;
  1470. return 0;
  1471. case MOXA_ASPP_MON_EXT: {
  1472. int p, shiftbit;
  1473. unsigned long opmode;
  1474. unsigned cflag, iflag;
  1475. lock_kernel();
  1476. for (i = 0; i < MXSER_BOARDS; i++) {
  1477. for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
  1478. port = &mxser_boards[i].ports[j];
  1479. if (!port->ioaddr)
  1480. continue;
  1481. status = mxser_get_msr(port->ioaddr, 0, i);
  1482. if (status & UART_MSR_TERI)
  1483. port->icount.rng++;
  1484. if (status & UART_MSR_DDSR)
  1485. port->icount.dsr++;
  1486. if (status & UART_MSR_DDCD)
  1487. port->icount.dcd++;
  1488. if (status & UART_MSR_DCTS)
  1489. port->icount.cts++;
  1490. port->mon_data.modem_status = status;
  1491. mon_data_ext.rx_cnt[i] = port->mon_data.rxcnt;
  1492. mon_data_ext.tx_cnt[i] = port->mon_data.txcnt;
  1493. mon_data_ext.up_rxcnt[i] =
  1494. port->mon_data.up_rxcnt;
  1495. mon_data_ext.up_txcnt[i] =
  1496. port->mon_data.up_txcnt;
  1497. mon_data_ext.modem_status[i] =
  1498. port->mon_data.modem_status;
  1499. mon_data_ext.baudrate[i] =
  1500. tty_get_baud_rate(port->port.tty);
  1501. if (!port->port.tty || !port->port.tty->termios) {
  1502. cflag = port->normal_termios.c_cflag;
  1503. iflag = port->normal_termios.c_iflag;
  1504. } else {
  1505. cflag = port->port.tty->termios->c_cflag;
  1506. iflag = port->port.tty->termios->c_iflag;
  1507. }
  1508. mon_data_ext.databits[i] = cflag & CSIZE;
  1509. mon_data_ext.stopbits[i] = cflag & CSTOPB;
  1510. mon_data_ext.parity[i] =
  1511. cflag & (PARENB | PARODD | CMSPAR);
  1512. mon_data_ext.flowctrl[i] = 0x00;
  1513. if (cflag & CRTSCTS)
  1514. mon_data_ext.flowctrl[i] |= 0x03;
  1515. if (iflag & (IXON | IXOFF))
  1516. mon_data_ext.flowctrl[i] |= 0x0C;
  1517. if (port->type == PORT_16550A)
  1518. mon_data_ext.fifo[i] = 1;
  1519. else
  1520. mon_data_ext.fifo[i] = 0;
  1521. p = i % 4;
  1522. shiftbit = p * 2;
  1523. opmode = inb(port->opmode_ioaddr) >> shiftbit;
  1524. opmode &= OP_MODE_MASK;
  1525. mon_data_ext.iftype[i] = opmode;
  1526. }
  1527. }
  1528. unlock_kernel();
  1529. if (copy_to_user(argp, &mon_data_ext,
  1530. sizeof(mon_data_ext)))
  1531. return -EFAULT;
  1532. return 0;
  1533. }
  1534. default:
  1535. return -ENOIOCTLCMD;
  1536. }
  1537. return 0;
  1538. }
  1539. static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg,
  1540. struct async_icount *cprev)
  1541. {
  1542. struct async_icount cnow;
  1543. unsigned long flags;
  1544. int ret;
  1545. spin_lock_irqsave(&info->slock, flags);
  1546. cnow = info->icount; /* atomic copy */
  1547. spin_unlock_irqrestore(&info->slock, flags);
  1548. ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) ||
  1549. ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) ||
  1550. ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) ||
  1551. ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts));
  1552. *cprev = cnow;
  1553. return ret;
  1554. }
  1555. static int mxser_ioctl(struct tty_struct *tty, struct file *file,
  1556. unsigned int cmd, unsigned long arg)
  1557. {
  1558. struct mxser_port *info = tty->driver_data;
  1559. struct async_icount cnow;
  1560. struct serial_icounter_struct __user *p_cuser;
  1561. unsigned long flags;
  1562. void __user *argp = (void __user *)arg;
  1563. int retval;
  1564. if (tty->index == MXSER_PORTS)
  1565. return mxser_ioctl_special(cmd, argp);
  1566. if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
  1567. int p;
  1568. unsigned long opmode;
  1569. static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
  1570. int shiftbit;
  1571. unsigned char val, mask;
  1572. p = tty->index % 4;
  1573. if (cmd == MOXA_SET_OP_MODE) {
  1574. if (get_user(opmode, (int __user *) argp))
  1575. return -EFAULT;
  1576. if (opmode != RS232_MODE &&
  1577. opmode != RS485_2WIRE_MODE &&
  1578. opmode != RS422_MODE &&
  1579. opmode != RS485_4WIRE_MODE)
  1580. return -EFAULT;
  1581. lock_kernel();
  1582. mask = ModeMask[p];
  1583. shiftbit = p * 2;
  1584. val = inb(info->opmode_ioaddr);
  1585. val &= mask;
  1586. val |= (opmode << shiftbit);
  1587. outb(val, info->opmode_ioaddr);
  1588. unlock_kernel();
  1589. } else {
  1590. lock_kernel();
  1591. shiftbit = p * 2;
  1592. opmode = inb(info->opmode_ioaddr) >> shiftbit;
  1593. opmode &= OP_MODE_MASK;
  1594. unlock_kernel();
  1595. if (put_user(opmode, (int __user *)argp))
  1596. return -EFAULT;
  1597. }
  1598. return 0;
  1599. }
  1600. if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT && cmd != TIOCGICOUNT &&
  1601. test_bit(TTY_IO_ERROR, &tty->flags))
  1602. return -EIO;
  1603. switch (cmd) {
  1604. case TCSBRK: /* SVID version: non-zero arg --> no break */
  1605. retval = tty_check_change(tty);
  1606. if (retval)
  1607. return retval;
  1608. tty_wait_until_sent(tty, 0);
  1609. if (!arg)
  1610. mxser_send_break(info, HZ / 4); /* 1/4 second */
  1611. return 0;
  1612. case TCSBRKP: /* support for POSIX tcsendbreak() */
  1613. retval = tty_check_change(tty);
  1614. if (retval)
  1615. return retval;
  1616. tty_wait_until_sent(tty, 0);
  1617. mxser_send_break(info, arg ? arg * (HZ / 10) : HZ / 4);
  1618. return 0;
  1619. case TIOCGSERIAL:
  1620. lock_kernel();
  1621. retval = mxser_get_serial_info(info, argp);
  1622. unlock_kernel();
  1623. return retval;
  1624. case TIOCSSERIAL:
  1625. lock_kernel();
  1626. retval = mxser_set_serial_info(info, argp);
  1627. unlock_kernel();
  1628. return retval;
  1629. case TIOCSERGETLSR: /* Get line status register */
  1630. return mxser_get_lsr_info(info, argp);
  1631. /*
  1632. * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
  1633. * - mask passed in arg for lines of interest
  1634. * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
  1635. * Caller should use TIOCGICOUNT to see which one it was
  1636. */
  1637. case TIOCMIWAIT:
  1638. spin_lock_irqsave(&info->slock, flags);
  1639. cnow = info->icount; /* note the counters on entry */
  1640. spin_unlock_irqrestore(&info->slock, flags);
  1641. return wait_event_interruptible(info->delta_msr_wait,
  1642. mxser_cflags_changed(info, arg, &cnow));
  1643. /*
  1644. * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
  1645. * Return: write counters to the user passed counter struct
  1646. * NB: both 1->0 and 0->1 transitions are counted except for
  1647. * RI where only 0->1 is counted.
  1648. */
  1649. case TIOCGICOUNT:
  1650. spin_lock_irqsave(&info->slock, flags);
  1651. cnow = info->icount;
  1652. spin_unlock_irqrestore(&info->slock, flags);
  1653. p_cuser = argp;
  1654. if (put_user(cnow.frame, &p_cuser->frame))
  1655. return -EFAULT;
  1656. if (put_user(cnow.brk, &p_cuser->brk))
  1657. return -EFAULT;
  1658. if (put_user(cnow.overrun, &p_cuser->overrun))
  1659. return -EFAULT;
  1660. if (put_user(cnow.buf_overrun, &p_cuser->buf_overrun))
  1661. return -EFAULT;
  1662. if (put_user(cnow.parity, &p_cuser->parity))
  1663. return -EFAULT;
  1664. if (put_user(cnow.rx, &p_cuser->rx))
  1665. return -EFAULT;
  1666. if (put_user(cnow.tx, &p_cuser->tx))
  1667. return -EFAULT;
  1668. put_user(cnow.cts, &p_cuser->cts);
  1669. put_user(cnow.dsr, &p_cuser->dsr);
  1670. put_user(cnow.rng, &p_cuser->rng);
  1671. put_user(cnow.dcd, &p_cuser->dcd);
  1672. return 0;
  1673. case MOXA_HighSpeedOn:
  1674. return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
  1675. case MOXA_SDS_RSTICOUNTER:
  1676. lock_kernel();
  1677. info->mon_data.rxcnt = 0;
  1678. info->mon_data.txcnt = 0;
  1679. unlock_kernel();
  1680. return 0;
  1681. case MOXA_ASPP_OQUEUE:{
  1682. int len, lsr;
  1683. lock_kernel();
  1684. len = mxser_chars_in_buffer(tty);
  1685. lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT;
  1686. len += (lsr ? 0 : 1);
  1687. unlock_kernel();
  1688. return put_user(len, (int __user *)argp);
  1689. }
  1690. case MOXA_ASPP_MON: {
  1691. int mcr, status;
  1692. lock_kernel();
  1693. status = mxser_get_msr(info->ioaddr, 1, tty->index);
  1694. mxser_check_modem_status(info, status);
  1695. mcr = inb(info->ioaddr + UART_MCR);
  1696. if (mcr & MOXA_MUST_MCR_XON_FLAG)
  1697. info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
  1698. else
  1699. info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
  1700. if (mcr & MOXA_MUST_MCR_TX_XON)
  1701. info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
  1702. else
  1703. info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
  1704. if (info->port.tty->hw_stopped)
  1705. info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
  1706. else
  1707. info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
  1708. unlock_kernel();
  1709. if (copy_to_user(argp, &info->mon_data,
  1710. sizeof(struct mxser_mon)))
  1711. return -EFAULT;
  1712. return 0;
  1713. }
  1714. case MOXA_ASPP_LSTATUS: {
  1715. if (put_user(info->err_shadow, (unsigned char __user *)argp))
  1716. return -EFAULT;
  1717. info->err_shadow = 0;
  1718. return 0;
  1719. }
  1720. case MOXA_SET_BAUD_METHOD: {
  1721. int method;
  1722. if (get_user(method, (int __user *)argp))
  1723. return -EFAULT;
  1724. mxser_set_baud_method[tty->index] = method;
  1725. return put_user(method, (int __user *)argp);
  1726. }
  1727. default:
  1728. return -ENOIOCTLCMD;
  1729. }
  1730. return 0;
  1731. }
  1732. static void mxser_stoprx(struct tty_struct *tty)
  1733. {
  1734. struct mxser_port *info = tty->driver_data;
  1735. info->ldisc_stop_rx = 1;
  1736. if (I_IXOFF(tty)) {
  1737. if (info->board->chip_flag) {
  1738. info->IER &= ~MOXA_MUST_RECV_ISR;
  1739. outb(info->IER, info->ioaddr + UART_IER);
  1740. } else {
  1741. info->x_char = STOP_CHAR(tty);
  1742. outb(0, info->ioaddr + UART_IER);
  1743. info->IER |= UART_IER_THRI;
  1744. outb(info->IER, info->ioaddr + UART_IER);
  1745. }
  1746. }
  1747. if (info->port.tty->termios->c_cflag & CRTSCTS) {
  1748. info->MCR &= ~UART_MCR_RTS;
  1749. outb(info->MCR, info->ioaddr + UART_MCR);
  1750. }
  1751. }
  1752. /*
  1753. * This routine is called by the upper-layer tty layer to signal that
  1754. * incoming characters should be throttled.
  1755. */
  1756. static void mxser_throttle(struct tty_struct *tty)
  1757. {
  1758. mxser_stoprx(tty);
  1759. }
  1760. static void mxser_unthrottle(struct tty_struct *tty)
  1761. {
  1762. struct mxser_port *info = tty->driver_data;
  1763. /* startrx */
  1764. info->ldisc_stop_rx = 0;
  1765. if (I_IXOFF(tty)) {
  1766. if (info->x_char)
  1767. info->x_char = 0;
  1768. else {
  1769. if (info->board->chip_flag) {
  1770. info->IER |= MOXA_MUST_RECV_ISR;
  1771. outb(info->IER, info->ioaddr + UART_IER);
  1772. } else {
  1773. info->x_char = START_CHAR(tty);
  1774. outb(0, info->ioaddr + UART_IER);
  1775. info->IER |= UART_IER_THRI;
  1776. outb(info->IER, info->ioaddr + UART_IER);
  1777. }
  1778. }
  1779. }
  1780. if (info->port.tty->termios->c_cflag & CRTSCTS) {
  1781. info->MCR |= UART_MCR_RTS;
  1782. outb(info->MCR, info->ioaddr + UART_MCR);
  1783. }
  1784. }
  1785. /*
  1786. * mxser_stop() and mxser_start()
  1787. *
  1788. * This routines are called before setting or resetting tty->stopped.
  1789. * They enable or disable transmitter interrupts, as necessary.
  1790. */
  1791. static void mxser_stop(struct tty_struct *tty)
  1792. {
  1793. struct mxser_port *info = tty->driver_data;
  1794. unsigned long flags;
  1795. spin_lock_irqsave(&info->slock, flags);
  1796. if (info->IER & UART_IER_THRI) {
  1797. info->IER &= ~UART_IER_THRI;
  1798. outb(info->IER, info->ioaddr + UART_IER);
  1799. }
  1800. spin_unlock_irqrestore(&info->slock, flags);
  1801. }
  1802. static void mxser_start(struct tty_struct *tty)
  1803. {
  1804. struct mxser_port *info = tty->driver_data;
  1805. unsigned long flags;
  1806. spin_lock_irqsave(&info->slock, flags);
  1807. if (info->xmit_cnt && info->port.xmit_buf) {
  1808. outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
  1809. info->IER |= UART_IER_THRI;
  1810. outb(info->IER, info->ioaddr + UART_IER);
  1811. }
  1812. spin_unlock_irqrestore(&info->slock, flags);
  1813. }
  1814. static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
  1815. {
  1816. struct mxser_port *info = tty->driver_data;
  1817. unsigned long flags;
  1818. spin_lock_irqsave(&info->slock, flags);
  1819. mxser_change_speed(info, old_termios);
  1820. spin_unlock_irqrestore(&info->slock, flags);
  1821. if ((old_termios->c_cflag & CRTSCTS) &&
  1822. !(tty->termios->c_cflag & CRTSCTS)) {
  1823. tty->hw_stopped = 0;
  1824. mxser_start(tty);
  1825. }
  1826. /* Handle sw stopped */
  1827. if ((old_termios->c_iflag & IXON) &&
  1828. !(tty->termios->c_iflag & IXON)) {
  1829. tty->stopped = 0;
  1830. if (info->board->chip_flag) {
  1831. spin_lock_irqsave(&info->slock, flags);
  1832. mxser_disable_must_rx_software_flow_control(
  1833. info->ioaddr);
  1834. spin_unlock_irqrestore(&info->slock, flags);
  1835. }
  1836. mxser_start(tty);
  1837. }
  1838. }
  1839. /*
  1840. * mxser_wait_until_sent() --- wait until the transmitter is empty
  1841. */
  1842. static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
  1843. {
  1844. struct mxser_port *info = tty->driver_data;
  1845. unsigned long orig_jiffies, char_time;
  1846. int lsr;
  1847. if (info->type == PORT_UNKNOWN)
  1848. return;
  1849. if (info->xmit_fifo_size == 0)
  1850. return; /* Just in case.... */
  1851. orig_jiffies = jiffies;
  1852. /*
  1853. * Set the check interval to be 1/5 of the estimated time to
  1854. * send a single character, and make it at least 1. The check
  1855. * interval should also be less than the timeout.
  1856. *
  1857. * Note: we have to use pretty tight timings here to satisfy
  1858. * the NIST-PCTS.
  1859. */
  1860. char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
  1861. char_time = char_time / 5;
  1862. if (char_time == 0)
  1863. char_time = 1;
  1864. if (timeout && timeout < char_time)
  1865. char_time = timeout;
  1866. /*
  1867. * If the transmitter hasn't cleared in twice the approximate
  1868. * amount of time to send the entire FIFO, it probably won't
  1869. * ever clear. This assumes the UART isn't doing flow
  1870. * control, which is currently the case. Hence, if it ever
  1871. * takes longer than info->timeout, this is probably due to a
  1872. * UART bug of some kind. So, we clamp the timeout parameter at
  1873. * 2*info->timeout.
  1874. */
  1875. if (!timeout || timeout > 2 * info->timeout)
  1876. timeout = 2 * info->timeout;
  1877. #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
  1878. printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...",
  1879. timeout, char_time);
  1880. printk("jiff=%lu...", jiffies);
  1881. #endif
  1882. lock_kernel();
  1883. while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) {
  1884. #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
  1885. printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
  1886. #endif
  1887. schedule_timeout_interruptible(char_time);
  1888. if (signal_pending(current))
  1889. break;
  1890. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  1891. break;
  1892. }
  1893. set_current_state(TASK_RUNNING);
  1894. unlock_kernel();
  1895. #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
  1896. printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
  1897. #endif
  1898. }
  1899. /*
  1900. * This routine is called by tty_hangup() when a hangup is signaled.
  1901. */
  1902. static void mxser_hangup(struct tty_struct *tty)
  1903. {
  1904. struct mxser_port *info = tty->driver_data;
  1905. mxser_flush_buffer(tty);
  1906. mxser_shutdown(info);
  1907. info->port.count = 0;
  1908. info->port.flags &= ~ASYNC_NORMAL_ACTIVE;
  1909. info->port.tty = NULL;
  1910. wake_up_interruptible(&info->port.open_wait);
  1911. }
  1912. /*
  1913. * mxser_rs_break() --- routine which turns the break handling on or off
  1914. */
  1915. static void mxser_rs_break(struct tty_struct *tty, int break_state)
  1916. {
  1917. struct mxser_port *info = tty->driver_data;
  1918. unsigned long flags;
  1919. spin_lock_irqsave(&info->slock, flags);
  1920. if (break_state == -1)
  1921. outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
  1922. info->ioaddr + UART_LCR);
  1923. else
  1924. outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
  1925. info->ioaddr + UART_LCR);
  1926. spin_unlock_irqrestore(&info->slock, flags);
  1927. }
  1928. static void mxser_receive_chars(struct mxser_port *port, int *status)
  1929. {
  1930. struct tty_struct *tty = port->port.tty;
  1931. unsigned char ch, gdl;
  1932. int ignored = 0;
  1933. int cnt = 0;
  1934. int recv_room;
  1935. int max = 256;
  1936. recv_room = tty->receive_room;
  1937. if ((recv_room == 0) && (!port->ldisc_stop_rx))
  1938. mxser_stoprx(tty);
  1939. if (port->board->chip_flag != MOXA_OTHER_UART) {
  1940. if (*status & UART_LSR_SPECIAL)
  1941. goto intr_old;
  1942. if (port->board->chip_flag == MOXA_MUST_MU860_HWID &&
  1943. (*status & MOXA_MUST_LSR_RERR))
  1944. goto intr_old;
  1945. if (*status & MOXA_MUST_LSR_RERR)
  1946. goto intr_old;
  1947. gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER);
  1948. if (port->board->chip_flag == MOXA_MUST_MU150_HWID)
  1949. gdl &= MOXA_MUST_GDL_MASK;
  1950. if (gdl >= recv_room) {
  1951. if (!port->ldisc_stop_rx)
  1952. mxser_stoprx(tty);
  1953. }
  1954. while (gdl--) {
  1955. ch = inb(port->ioaddr + UART_RX);
  1956. tty_insert_flip_char(tty, ch, 0);
  1957. cnt++;
  1958. }
  1959. goto end_intr;
  1960. }
  1961. intr_old:
  1962. do {
  1963. if (max-- < 0)
  1964. break;
  1965. ch = inb(port->ioaddr + UART_RX);
  1966. if (port->board->chip_flag && (*status & UART_LSR_OE))
  1967. outb(0x23, port->ioaddr + UART_FCR);
  1968. *status &= port->read_status_mask;
  1969. if (*status & port->ignore_status_mask) {
  1970. if (++ignored > 100)
  1971. break;
  1972. } else {
  1973. char flag = 0;
  1974. if (*status & UART_LSR_SPECIAL) {
  1975. if (*status & UART_LSR_BI) {
  1976. flag = TTY_BREAK;
  1977. port->icount.brk++;
  1978. if (port->port.flags & ASYNC_SAK)
  1979. do_SAK(tty);
  1980. } else if (*status & UART_LSR_PE) {
  1981. flag = TTY_PARITY;
  1982. port->icount.parity++;
  1983. } else if (*status & UART_LSR_FE) {
  1984. flag = TTY_FRAME;
  1985. port->icount.frame++;
  1986. } else if (*status & UART_LSR_OE) {
  1987. flag = TTY_OVERRUN;
  1988. port->icount.overrun++;
  1989. } else
  1990. flag = TTY_BREAK;
  1991. }
  1992. tty_insert_flip_char(tty, ch, flag);
  1993. cnt++;
  1994. if (cnt >= recv_room) {
  1995. if (!port->ldisc_stop_rx)
  1996. mxser_stoprx(tty);
  1997. break;
  1998. }
  1999. }
  2000. if (port->board->chip_flag)
  2001. break;
  2002. *status = inb(port->ioaddr + UART_LSR);
  2003. } while (*status & UART_LSR_DR);
  2004. end_intr:
  2005. mxvar_log.rxcnt[port->port.tty->index] += cnt;
  2006. port->mon_data.rxcnt += cnt;
  2007. port->mon_data.up_rxcnt += cnt;
  2008. /*
  2009. * We are called from an interrupt context with &port->slock
  2010. * being held. Drop it temporarily in order to prevent
  2011. * recursive locking.
  2012. */
  2013. spin_unlock(&port->slock);
  2014. tty_flip_buffer_push(tty);
  2015. spin_lock(&port->slock);
  2016. }
  2017. static void mxser_transmit_chars(struct mxser_port *port)
  2018. {
  2019. int count, cnt;
  2020. if (port->x_char) {
  2021. outb(port->x_char, port->ioaddr + UART_TX);
  2022. port->x_char = 0;
  2023. mxvar_log.txcnt[port->port.tty->index]++;
  2024. port->mon_data.txcnt++;
  2025. port->mon_data.up_txcnt++;
  2026. port->icount.tx++;
  2027. return;
  2028. }
  2029. if (port->port.xmit_buf == NULL)
  2030. return;
  2031. if ((port->xmit_cnt <= 0) || port->port.tty->stopped ||
  2032. (port->port.tty->hw_stopped &&
  2033. (port->type != PORT_16550A) &&
  2034. (!port->board->chip_flag))) {
  2035. port->IER &= ~UART_IER_THRI;
  2036. outb(port->IER, port->ioaddr + UART_IER);
  2037. return;
  2038. }
  2039. cnt = port->xmit_cnt;
  2040. count = port->xmit_fifo_size;
  2041. do {
  2042. outb(port->port.xmit_buf[port->xmit_tail++],
  2043. port->ioaddr + UART_TX);
  2044. port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1);
  2045. if (--port->xmit_cnt <= 0)
  2046. break;
  2047. } while (--count > 0);
  2048. mxvar_log.txcnt[port->port.tty->index] += (cnt - port->xmit_cnt);
  2049. port->mon_data.txcnt += (cnt - port->xmit_cnt);
  2050. port->mon_data.up_txcnt += (cnt - port->xmit_cnt);
  2051. port->icount.tx += (cnt - port->xmit_cnt);
  2052. if (port->xmit_cnt < WAKEUP_CHARS)
  2053. tty_wakeup(port->port.tty);
  2054. if (port->xmit_cnt <= 0) {
  2055. port->IER &= ~UART_IER_THRI;
  2056. outb(port->IER, port->ioaddr + UART_IER);
  2057. }
  2058. }
  2059. /*
  2060. * This is the serial driver's generic interrupt routine
  2061. */
  2062. static irqreturn_t mxser_interrupt(int irq, void *dev_id)
  2063. {
  2064. int status, iir, i;
  2065. struct mxser_board *brd = NULL;
  2066. struct mxser_port *port;
  2067. int max, irqbits, bits, msr;
  2068. unsigned int int_cnt, pass_counter = 0;
  2069. int handled = IRQ_NONE;
  2070. for (i = 0; i < MXSER_BOARDS; i++)
  2071. if (dev_id == &mxser_boards[i]) {
  2072. brd = dev_id;
  2073. break;
  2074. }
  2075. if (i == MXSER_BOARDS)
  2076. goto irq_stop;
  2077. if (brd == NULL)
  2078. goto irq_stop;
  2079. max = brd->info->nports;
  2080. while (pass_counter++ < MXSER_ISR_PASS_LIMIT) {
  2081. irqbits = inb(brd->vector) & brd->vector_mask;
  2082. if (irqbits == brd->vector_mask)
  2083. break;
  2084. handled = IRQ_HANDLED;
  2085. for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
  2086. if (irqbits == brd->vector_mask)
  2087. break;
  2088. if (bits & irqbits)
  2089. continue;
  2090. port = &brd->ports[i];
  2091. int_cnt = 0;
  2092. spin_lock(&port->slock);
  2093. do {
  2094. iir = inb(port->ioaddr + UART_IIR);
  2095. if (iir & UART_IIR_NO_INT)
  2096. break;
  2097. iir &= MOXA_MUST_IIR_MASK;
  2098. if (!port->port.tty ||
  2099. (port->port.flags & ASYNC_CLOSING) ||
  2100. !(port->port.flags &
  2101. ASYNC_INITIALIZED)) {
  2102. status = inb(port->ioaddr + UART_LSR);
  2103. outb(0x27, port->ioaddr + UART_FCR);
  2104. inb(port->ioaddr + UART_MSR);
  2105. break;
  2106. }
  2107. status = inb(port->ioaddr + UART_LSR);
  2108. if (status & UART_LSR_PE)
  2109. port->err_shadow |= NPPI_NOTIFY_PARITY;
  2110. if (status & UART_LSR_FE)
  2111. port->err_shadow |= NPPI_NOTIFY_FRAMING;
  2112. if (status & UART_LSR_OE)
  2113. port->err_shadow |=
  2114. NPPI_NOTIFY_HW_OVERRUN;
  2115. if (status & UART_LSR_BI)
  2116. port->err_shadow |= NPPI_NOTIFY_BREAK;
  2117. if (port->board->chip_flag) {
  2118. if (iir == MOXA_MUST_IIR_GDA ||
  2119. iir == MOXA_MUST_IIR_RDA ||
  2120. iir == MOXA_MUST_IIR_RTO ||
  2121. iir == MOXA_MUST_IIR_LSR)
  2122. mxser_receive_chars(port,
  2123. &status);
  2124. } else {
  2125. status &= port->read_status_mask;
  2126. if (status & UART_LSR_DR)
  2127. mxser_receive_chars(port,
  2128. &status);
  2129. }
  2130. msr = inb(port->ioaddr + UART_MSR);
  2131. if (msr & UART_MSR_ANY_DELTA)
  2132. mxser_check_modem_status(port, msr);
  2133. if (port->board->chip_flag) {
  2134. if (iir == 0x02 && (status &
  2135. UART_LSR_THRE))
  2136. mxser_transmit_chars(port);
  2137. } else {
  2138. if (status & UART_LSR_THRE)
  2139. mxser_transmit_chars(port);
  2140. }
  2141. } while (int_cnt++ < MXSER_ISR_PASS_LIMIT);
  2142. spin_unlock(&port->slock);
  2143. }
  2144. }
  2145. irq_stop:
  2146. return handled;
  2147. }
  2148. static const struct tty_operations mxser_ops = {
  2149. .open = mxser_open,
  2150. .close = mxser_close,
  2151. .write = mxser_write,
  2152. .put_char = mxser_put_char,
  2153. .flush_chars = mxser_flush_chars,
  2154. .write_room = mxser_write_room,
  2155. .chars_in_buffer = mxser_chars_in_buffer,
  2156. .flush_buffer = mxser_flush_buffer,
  2157. .ioctl = mxser_ioctl,
  2158. .throttle = mxser_throttle,
  2159. .unthrottle = mxser_unthrottle,
  2160. .set_termios = mxser_set_termios,
  2161. .stop = mxser_stop,
  2162. .start = mxser_start,
  2163. .hangup = mxser_hangup,
  2164. .break_ctl = mxser_rs_break,
  2165. .wait_until_sent = mxser_wait_until_sent,
  2166. .tiocmget = mxser_tiocmget,
  2167. .tiocmset = mxser_tiocmset,
  2168. };
  2169. /*
  2170. * The MOXA Smartio/Industio serial driver boot-time initialization code!
  2171. */
  2172. static void mxser_release_res(struct mxser_board *brd, struct pci_dev *pdev,
  2173. unsigned int irq)
  2174. {
  2175. if (irq)
  2176. free_irq(brd->irq, brd);
  2177. if (pdev != NULL) { /* PCI */
  2178. #ifdef CONFIG_PCI
  2179. pci_release_region(pdev, 2);
  2180. pci_release_region(pdev, 3);
  2181. #endif
  2182. } else {
  2183. release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
  2184. release_region(brd->vector, 1);
  2185. }
  2186. }
  2187. static int __devinit mxser_initbrd(struct mxser_board *brd,
  2188. struct pci_dev *pdev)
  2189. {
  2190. struct mxser_port *info;
  2191. unsigned int i;
  2192. int retval;
  2193. printk(KERN_INFO "max. baud rate = %d bps.\n", brd->ports[0].max_baud);
  2194. for (i = 0; i < brd->info->nports; i++) {
  2195. info = &brd->ports[i];
  2196. tty_port_init(&info->port);
  2197. info->board = brd;
  2198. info->stop_rx = 0;
  2199. info->ldisc_stop_rx = 0;
  2200. /* Enhance mode enabled here */
  2201. if (brd->chip_flag != MOXA_OTHER_UART)
  2202. mxser_enable_must_enchance_mode(info->ioaddr);
  2203. info->port.flags = ASYNC_SHARE_IRQ;
  2204. info->type = brd->uart_type;
  2205. process_txrx_fifo(info);
  2206. info->custom_divisor = info->baud_base * 16;
  2207. info->port.close_delay = 5 * HZ / 10;
  2208. info->port.closing_wait = 30 * HZ;
  2209. info->normal_termios = mxvar_sdriver->init_termios;
  2210. init_waitqueue_head(&info->delta_msr_wait);
  2211. memset(&info->mon_data, 0, sizeof(struct mxser_mon));
  2212. info->err_shadow = 0;
  2213. spin_lock_init(&info->slock);
  2214. /* before set INT ISR, disable all int */
  2215. outb(inb(info->ioaddr + UART_IER) & 0xf0,
  2216. info->ioaddr + UART_IER);
  2217. }
  2218. retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser",
  2219. brd);
  2220. if (retval) {
  2221. printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may "
  2222. "conflict with another device.\n",
  2223. brd->info->name, brd->irq);
  2224. /* We hold resources, we need to release them. */
  2225. mxser_release_res(brd, pdev, 0);
  2226. }
  2227. return retval;
  2228. }
  2229. static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd)
  2230. {
  2231. int id, i, bits;
  2232. unsigned short regs[16], irq;
  2233. unsigned char scratch, scratch2;
  2234. brd->chip_flag = MOXA_OTHER_UART;
  2235. id = mxser_read_register(cap, regs);
  2236. switch (id) {
  2237. case C168_ASIC_ID:
  2238. brd->info = &mxser_cards[0];
  2239. break;
  2240. case C104_ASIC_ID:
  2241. brd->info = &mxser_cards[1];
  2242. break;
  2243. case CI104J_ASIC_ID:
  2244. brd->info = &mxser_cards[2];
  2245. break;
  2246. case C102_ASIC_ID:
  2247. brd->info = &mxser_cards[5];
  2248. break;
  2249. case CI132_ASIC_ID:
  2250. brd->info = &mxser_cards[6];
  2251. break;
  2252. case CI134_ASIC_ID:
  2253. brd->info = &mxser_cards[7];
  2254. break;
  2255. default:
  2256. return 0;
  2257. }
  2258. irq = 0;
  2259. /* some ISA cards have 2 ports, but we want to see them as 4-port (why?)
  2260. Flag-hack checks if configuration should be read as 2-port here. */
  2261. if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) {
  2262. irq = regs[9] & 0xF000;
  2263. irq = irq | (irq >> 4);
  2264. if (irq != (regs[9] & 0xFF00))
  2265. return MXSER_ERR_IRQ_CONFLIT;
  2266. } else if (brd->info->nports == 4) {
  2267. irq = regs[9] & 0xF000;
  2268. irq = irq | (irq >> 4);
  2269. irq = irq | (irq >> 8);
  2270. if (irq != regs[9])
  2271. return MXSER_ERR_IRQ_CONFLIT;
  2272. } else if (brd->info->nports == 8) {
  2273. irq = regs[9] & 0xF000;
  2274. irq = irq | (irq >> 4);
  2275. irq = irq | (irq >> 8);
  2276. if ((irq != regs[9]) || (irq != regs[10]))
  2277. return MXSER_ERR_IRQ_CONFLIT;
  2278. }
  2279. if (!irq)
  2280. return MXSER_ERR_IRQ;
  2281. brd->irq = ((int)(irq & 0xF000) >> 12);
  2282. for (i = 0; i < 8; i++)
  2283. brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8;
  2284. if ((regs[12] & 0x80) == 0)
  2285. return MXSER_ERR_VECTOR;
  2286. brd->vector = (int)regs[11]; /* interrupt vector */
  2287. if (id == 1)
  2288. brd->vector_mask = 0x00FF;
  2289. else
  2290. brd->vector_mask = 0x000F;
  2291. for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
  2292. if (regs[12] & bits) {
  2293. brd->ports[i].baud_base = 921600;
  2294. brd->ports[i].max_baud = 921600;
  2295. } else {
  2296. brd->ports[i].baud_base = 115200;
  2297. brd->ports[i].max_baud = 115200;
  2298. }
  2299. }
  2300. scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
  2301. outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
  2302. outb(0, cap + UART_EFR); /* EFR is the same as FCR */
  2303. outb(scratch2, cap + UART_LCR);
  2304. outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
  2305. scratch = inb(cap + UART_IIR);
  2306. if (scratch & 0xC0)
  2307. brd->uart_type = PORT_16550A;
  2308. else
  2309. brd->uart_type = PORT_16450;
  2310. if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports,
  2311. "mxser(IO)"))
  2312. return MXSER_ERR_IOADDR;
  2313. if (!request_region(brd->vector, 1, "mxser(vector)")) {
  2314. release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
  2315. return MXSER_ERR_VECTOR;
  2316. }
  2317. return brd->info->nports;
  2318. }
  2319. static int __devinit mxser_probe(struct pci_dev *pdev,
  2320. const struct pci_device_id *ent)
  2321. {
  2322. #ifdef CONFIG_PCI
  2323. struct mxser_board *brd;
  2324. unsigned int i, j;
  2325. unsigned long ioaddress;
  2326. int retval = -EINVAL;
  2327. for (i = 0; i < MXSER_BOARDS; i++)
  2328. if (mxser_boards[i].info == NULL)
  2329. break;
  2330. if (i >= MXSER_BOARDS) {
  2331. printk(KERN_ERR "Too many Smartio/Industio family boards found "
  2332. "(maximum %d), board not configured\n", MXSER_BOARDS);
  2333. goto err;
  2334. }
  2335. brd = &mxser_boards[i];
  2336. brd->idx = i * MXSER_PORTS_PER_BOARD;
  2337. printk(KERN_INFO "Found MOXA %s board (BusNo=%d, DevNo=%d)\n",
  2338. mxser_cards[ent->driver_data].name,
  2339. pdev->bus->number, PCI_SLOT(pdev->devfn));
  2340. retval = pci_enable_device(pdev);
  2341. if (retval) {
  2342. printk(KERN_ERR "Moxa SmartI/O PCI enable fail !\n");
  2343. goto err;
  2344. }
  2345. /* io address */
  2346. ioaddress = pci_resource_start(pdev, 2);
  2347. retval = pci_request_region(pdev, 2, "mxser(IO)");
  2348. if (retval)
  2349. goto err;
  2350. brd->info = &mxser_cards[ent->driver_data];
  2351. for (i = 0; i < brd->info->nports; i++)
  2352. brd->ports[i].ioaddr = ioaddress + 8 * i;
  2353. /* vector */
  2354. ioaddress = pci_resource_start(pdev, 3);
  2355. retval = pci_request_region(pdev, 3, "mxser(vector)");
  2356. if (retval)
  2357. goto err_relio;
  2358. brd->vector = ioaddress;
  2359. /* irq */
  2360. brd->irq = pdev->irq;
  2361. brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr);
  2362. brd->uart_type = PORT_16550A;
  2363. brd->vector_mask = 0;
  2364. for (i = 0; i < brd->info->nports; i++) {
  2365. for (j = 0; j < UART_INFO_NUM; j++) {
  2366. if (Gpci_uart_info[j].type == brd->chip_flag) {
  2367. brd->ports[i].max_baud =
  2368. Gpci_uart_info[j].max_baud;
  2369. /* exception....CP-102 */
  2370. if (brd->info->flags & MXSER_HIGHBAUD)
  2371. brd->ports[i].max_baud = 921600;
  2372. break;
  2373. }
  2374. }
  2375. }
  2376. if (brd->chip_flag == MOXA_MUST_MU860_HWID) {
  2377. for (i = 0; i < brd->info->nports; i++) {
  2378. if (i < 4)
  2379. brd->ports[i].opmode_ioaddr = ioaddress + 4;
  2380. else
  2381. brd->ports[i].opmode_ioaddr = ioaddress + 0x0c;
  2382. }
  2383. outb(0, ioaddress + 4); /* default set to RS232 mode */
  2384. outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
  2385. }
  2386. for (i = 0; i < brd->info->nports; i++) {
  2387. brd->vector_mask |= (1 << i);
  2388. brd->ports[i].baud_base = 921600;
  2389. }
  2390. /* mxser_initbrd will hook ISR. */
  2391. retval = mxser_initbrd(brd, pdev);
  2392. if (retval)
  2393. goto err_null;
  2394. for (i = 0; i < brd->info->nports; i++)
  2395. tty_register_device(mxvar_sdriver, brd->idx + i, &pdev->dev);
  2396. pci_set_drvdata(pdev, brd);
  2397. return 0;
  2398. err_relio:
  2399. pci_release_region(pdev, 2);
  2400. err_null:
  2401. brd->info = NULL;
  2402. err:
  2403. return retval;
  2404. #else
  2405. return -ENODEV;
  2406. #endif
  2407. }
  2408. static void __devexit mxser_remove(struct pci_dev *pdev)
  2409. {
  2410. struct mxser_board *brd = pci_get_drvdata(pdev);
  2411. unsigned int i;
  2412. for (i = 0; i < brd->info->nports; i++)
  2413. tty_unregister_device(mxvar_sdriver, brd->idx + i);
  2414. mxser_release_res(brd, pdev, 1);
  2415. brd->info = NULL;
  2416. }
  2417. static struct pci_driver mxser_driver = {
  2418. .name = "mxser",
  2419. .id_table = mxser_pcibrds,
  2420. .probe = mxser_probe,
  2421. .remove = __devexit_p(mxser_remove)
  2422. };
  2423. static int __init mxser_module_init(void)
  2424. {
  2425. struct mxser_board *brd;
  2426. unsigned long cap;
  2427. unsigned int i, m, isaloop;
  2428. int retval, b;
  2429. pr_debug("Loading module mxser ...\n");
  2430. mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
  2431. if (!mxvar_sdriver)
  2432. return -ENOMEM;
  2433. printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
  2434. MXSER_VERSION);
  2435. /* Initialize the tty_driver structure */
  2436. mxvar_sdriver->owner = THIS_MODULE;
  2437. mxvar_sdriver->magic = TTY_DRIVER_MAGIC;
  2438. mxvar_sdriver->name = "ttyMI";
  2439. mxvar_sdriver->major = ttymajor;
  2440. mxvar_sdriver->minor_start = 0;
  2441. mxvar_sdriver->num = MXSER_PORTS + 1;
  2442. mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
  2443. mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
  2444. mxvar_sdriver->init_termios = tty_std_termios;
  2445. mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
  2446. mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV;
  2447. tty_set_operations(mxvar_sdriver, &mxser_ops);
  2448. retval = tty_register_driver(mxvar_sdriver);
  2449. if (retval) {
  2450. printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family "
  2451. "tty driver !\n");
  2452. goto err_put;
  2453. }
  2454. mxvar_diagflag = 0;
  2455. m = 0;
  2456. /* Start finding ISA boards here */
  2457. for (isaloop = 0; isaloop < 2; isaloop++)
  2458. for (b = 0; b < MXSER_BOARDS && m < MXSER_BOARDS; b++) {
  2459. if (!isaloop)
  2460. cap = mxserBoardCAP[b]; /* predefined */
  2461. else
  2462. cap = ioaddr[b]; /* module param */
  2463. if (!cap)
  2464. continue;
  2465. brd = &mxser_boards[m];
  2466. retval = mxser_get_ISA_conf(cap, brd);
  2467. if (retval != 0)
  2468. printk(KERN_INFO "Found MOXA %s board "
  2469. "(CAP=0x%x)\n",
  2470. brd->info->name, ioaddr[b]);
  2471. if (retval <= 0) {
  2472. if (retval == MXSER_ERR_IRQ)
  2473. printk(KERN_ERR "Invalid interrupt "
  2474. "number, board not "
  2475. "configured\n");
  2476. else if (retval == MXSER_ERR_IRQ_CONFLIT)
  2477. printk(KERN_ERR "Invalid interrupt "
  2478. "number, board not "
  2479. "configured\n");
  2480. else if (retval == MXSER_ERR_VECTOR)
  2481. printk(KERN_ERR "Invalid interrupt "
  2482. "vector, board not "
  2483. "configured\n");
  2484. else if (retval == MXSER_ERR_IOADDR)
  2485. printk(KERN_ERR "Invalid I/O address, "
  2486. "board not configured\n");
  2487. brd->info = NULL;
  2488. continue;
  2489. }
  2490. /* mxser_initbrd will hook ISR. */
  2491. if (mxser_initbrd(brd, NULL) < 0) {
  2492. brd->info = NULL;
  2493. continue;
  2494. }
  2495. brd->idx = m * MXSER_PORTS_PER_BOARD;
  2496. for (i = 0; i < brd->info->nports; i++)
  2497. tty_register_device(mxvar_sdriver, brd->idx + i,
  2498. NULL);
  2499. m++;
  2500. }
  2501. retval = pci_register_driver(&mxser_driver);
  2502. if (retval) {
  2503. printk(KERN_ERR "Can't register pci driver\n");
  2504. if (!m) {
  2505. retval = -ENODEV;
  2506. goto err_unr;
  2507. } /* else: we have some ISA cards under control */
  2508. }
  2509. pr_debug("Done.\n");
  2510. return 0;
  2511. err_unr:
  2512. tty_unregister_driver(mxvar_sdriver);
  2513. err_put:
  2514. put_tty_driver(mxvar_sdriver);
  2515. return retval;
  2516. }
  2517. static void __exit mxser_module_exit(void)
  2518. {
  2519. unsigned int i, j;
  2520. pr_debug("Unloading module mxser ...\n");
  2521. pci_unregister_driver(&mxser_driver);
  2522. for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */
  2523. if (mxser_boards[i].info != NULL)
  2524. for (j = 0; j < mxser_boards[i].info->nports; j++)
  2525. tty_unregister_device(mxvar_sdriver,
  2526. mxser_boards[i].idx + j);
  2527. tty_unregister_driver(mxvar_sdriver);
  2528. put_tty_driver(mxvar_sdriver);
  2529. for (i = 0; i < MXSER_BOARDS; i++)
  2530. if (mxser_boards[i].info != NULL)
  2531. mxser_release_res(&mxser_boards[i], NULL, 1);
  2532. pr_debug("Done.\n");
  2533. }
  2534. module_init(mxser_module_init);
  2535. module_exit(mxser_module_exit);