netxen_nic_init.c 40 KB

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  1. /*
  2. * Copyright (C) 2003 - 2006 NetXen, Inc.
  3. * All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License
  7. * as published by the Free Software Foundation; either version 2
  8. * of the License, or (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
  18. * MA 02111-1307, USA.
  19. *
  20. * The full GNU General Public License is included in this distribution
  21. * in the file called LICENSE.
  22. *
  23. * Contact Information:
  24. * info@netxen.com
  25. * NetXen,
  26. * 3965 Freedom Circle, Fourth floor,
  27. * Santa Clara, CA 95054
  28. *
  29. *
  30. * Source file for NIC routines to initialize the Phantom Hardware
  31. *
  32. */
  33. #include <linux/netdevice.h>
  34. #include <linux/delay.h>
  35. #include "netxen_nic.h"
  36. #include "netxen_nic_hw.h"
  37. #include "netxen_nic_phan_reg.h"
  38. struct crb_addr_pair {
  39. u32 addr;
  40. u32 data;
  41. };
  42. unsigned long last_schedule_time;
  43. #define NETXEN_MAX_CRB_XFORM 60
  44. static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM];
  45. #define NETXEN_ADDR_ERROR (0xffffffff)
  46. #define crb_addr_transform(name) \
  47. crb_addr_xform[NETXEN_HW_PX_MAP_CRB_##name] = \
  48. NETXEN_HW_CRB_HUB_AGT_ADR_##name << 20
  49. #define NETXEN_NIC_XDMA_RESET 0x8000ff
  50. static void netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
  51. uint32_t ctx, uint32_t ringid);
  52. #if 0
  53. static void netxen_nic_locked_write_reg(struct netxen_adapter *adapter,
  54. unsigned long off, int *data)
  55. {
  56. void __iomem *addr = pci_base_offset(adapter, off);
  57. writel(*data, addr);
  58. }
  59. #endif /* 0 */
  60. static void crb_addr_transform_setup(void)
  61. {
  62. crb_addr_transform(XDMA);
  63. crb_addr_transform(TIMR);
  64. crb_addr_transform(SRE);
  65. crb_addr_transform(SQN3);
  66. crb_addr_transform(SQN2);
  67. crb_addr_transform(SQN1);
  68. crb_addr_transform(SQN0);
  69. crb_addr_transform(SQS3);
  70. crb_addr_transform(SQS2);
  71. crb_addr_transform(SQS1);
  72. crb_addr_transform(SQS0);
  73. crb_addr_transform(RPMX7);
  74. crb_addr_transform(RPMX6);
  75. crb_addr_transform(RPMX5);
  76. crb_addr_transform(RPMX4);
  77. crb_addr_transform(RPMX3);
  78. crb_addr_transform(RPMX2);
  79. crb_addr_transform(RPMX1);
  80. crb_addr_transform(RPMX0);
  81. crb_addr_transform(ROMUSB);
  82. crb_addr_transform(SN);
  83. crb_addr_transform(QMN);
  84. crb_addr_transform(QMS);
  85. crb_addr_transform(PGNI);
  86. crb_addr_transform(PGND);
  87. crb_addr_transform(PGN3);
  88. crb_addr_transform(PGN2);
  89. crb_addr_transform(PGN1);
  90. crb_addr_transform(PGN0);
  91. crb_addr_transform(PGSI);
  92. crb_addr_transform(PGSD);
  93. crb_addr_transform(PGS3);
  94. crb_addr_transform(PGS2);
  95. crb_addr_transform(PGS1);
  96. crb_addr_transform(PGS0);
  97. crb_addr_transform(PS);
  98. crb_addr_transform(PH);
  99. crb_addr_transform(NIU);
  100. crb_addr_transform(I2Q);
  101. crb_addr_transform(EG);
  102. crb_addr_transform(MN);
  103. crb_addr_transform(MS);
  104. crb_addr_transform(CAS2);
  105. crb_addr_transform(CAS1);
  106. crb_addr_transform(CAS0);
  107. crb_addr_transform(CAM);
  108. crb_addr_transform(C2C1);
  109. crb_addr_transform(C2C0);
  110. crb_addr_transform(SMB);
  111. }
  112. int netxen_init_firmware(struct netxen_adapter *adapter)
  113. {
  114. u32 state = 0, loops = 0, err = 0;
  115. /* Window 1 call */
  116. state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
  117. if (state == PHAN_INITIALIZE_ACK)
  118. return 0;
  119. while (state != PHAN_INITIALIZE_COMPLETE && loops < 2000) {
  120. udelay(100);
  121. /* Window 1 call */
  122. state = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
  123. loops++;
  124. }
  125. if (loops >= 2000) {
  126. printk(KERN_ERR "Cmd Peg initialization not complete:%x.\n",
  127. state);
  128. err = -EIO;
  129. return err;
  130. }
  131. /* Window 1 call */
  132. writel(INTR_SCHEME_PERPORT,
  133. NETXEN_CRB_NORMALIZE(adapter, CRB_NIC_CAPABILITIES_HOST));
  134. writel(MSI_MODE_MULTIFUNC,
  135. NETXEN_CRB_NORMALIZE(adapter, CRB_NIC_MSI_MODE_HOST));
  136. writel(MPORT_MULTI_FUNCTION_MODE,
  137. NETXEN_CRB_NORMALIZE(adapter, CRB_MPORT_MODE));
  138. writel(PHAN_INITIALIZE_ACK,
  139. NETXEN_CRB_NORMALIZE(adapter, CRB_CMDPEG_STATE));
  140. return err;
  141. }
  142. #define NETXEN_ADDR_LIMIT 0xffffffffULL
  143. void *netxen_alloc(struct pci_dev *pdev, size_t sz, dma_addr_t * ptr,
  144. struct pci_dev **used_dev)
  145. {
  146. void *addr;
  147. addr = pci_alloc_consistent(pdev, sz, ptr);
  148. if ((unsigned long long)(*ptr) < NETXEN_ADDR_LIMIT) {
  149. *used_dev = pdev;
  150. return addr;
  151. }
  152. pci_free_consistent(pdev, sz, addr, *ptr);
  153. addr = pci_alloc_consistent(NULL, sz, ptr);
  154. *used_dev = NULL;
  155. return addr;
  156. }
  157. void netxen_initialize_adapter_sw(struct netxen_adapter *adapter)
  158. {
  159. int ctxid, ring;
  160. u32 i;
  161. u32 num_rx_bufs = 0;
  162. struct netxen_rcv_desc_ctx *rcv_desc;
  163. DPRINTK(INFO, "initializing some queues: %p\n", adapter);
  164. for (ctxid = 0; ctxid < MAX_RCV_CTX; ++ctxid) {
  165. for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) {
  166. struct netxen_rx_buffer *rx_buf;
  167. rcv_desc = &adapter->recv_ctx[ctxid].rcv_desc[ring];
  168. rcv_desc->rcv_free = rcv_desc->max_rx_desc_count;
  169. rcv_desc->begin_alloc = 0;
  170. rx_buf = rcv_desc->rx_buf_arr;
  171. num_rx_bufs = rcv_desc->max_rx_desc_count;
  172. /*
  173. * Now go through all of them, set reference handles
  174. * and put them in the queues.
  175. */
  176. for (i = 0; i < num_rx_bufs; i++) {
  177. rx_buf->ref_handle = i;
  178. rx_buf->state = NETXEN_BUFFER_FREE;
  179. DPRINTK(INFO, "Rx buf:ctx%d i(%d) rx_buf:"
  180. "%p\n", ctxid, i, rx_buf);
  181. rx_buf++;
  182. }
  183. }
  184. }
  185. }
  186. void netxen_initialize_adapter_hw(struct netxen_adapter *adapter)
  187. {
  188. int ports = 0;
  189. struct netxen_board_info *board_info = &(adapter->ahw.boardcfg);
  190. if (netxen_nic_get_board_info(adapter) != 0)
  191. printk("%s: Error getting board config info.\n",
  192. netxen_nic_driver_name);
  193. get_brd_port_by_type(board_info->board_type, &ports);
  194. if (ports == 0)
  195. printk(KERN_ERR "%s: Unknown board type\n",
  196. netxen_nic_driver_name);
  197. adapter->ahw.max_ports = ports;
  198. }
  199. void netxen_initialize_adapter_ops(struct netxen_adapter *adapter)
  200. {
  201. switch (adapter->ahw.board_type) {
  202. case NETXEN_NIC_GBE:
  203. adapter->enable_phy_interrupts =
  204. netxen_niu_gbe_enable_phy_interrupts;
  205. adapter->disable_phy_interrupts =
  206. netxen_niu_gbe_disable_phy_interrupts;
  207. adapter->handle_phy_intr = netxen_nic_gbe_handle_phy_intr;
  208. adapter->macaddr_set = netxen_niu_macaddr_set;
  209. adapter->set_mtu = netxen_nic_set_mtu_gb;
  210. adapter->set_promisc = netxen_niu_set_promiscuous_mode;
  211. adapter->unset_promisc = netxen_niu_set_promiscuous_mode;
  212. adapter->phy_read = netxen_niu_gbe_phy_read;
  213. adapter->phy_write = netxen_niu_gbe_phy_write;
  214. adapter->init_niu = netxen_nic_init_niu_gb;
  215. adapter->stop_port = netxen_niu_disable_gbe_port;
  216. break;
  217. case NETXEN_NIC_XGBE:
  218. adapter->enable_phy_interrupts =
  219. netxen_niu_xgbe_enable_phy_interrupts;
  220. adapter->disable_phy_interrupts =
  221. netxen_niu_xgbe_disable_phy_interrupts;
  222. adapter->handle_phy_intr = netxen_nic_xgbe_handle_phy_intr;
  223. adapter->macaddr_set = netxen_niu_xg_macaddr_set;
  224. adapter->set_mtu = netxen_nic_set_mtu_xgb;
  225. adapter->init_port = netxen_niu_xg_init_port;
  226. adapter->set_promisc = netxen_niu_xg_set_promiscuous_mode;
  227. adapter->unset_promisc = netxen_niu_xg_set_promiscuous_mode;
  228. adapter->stop_port = netxen_niu_disable_xg_port;
  229. break;
  230. default:
  231. break;
  232. }
  233. }
  234. /*
  235. * netxen_decode_crb_addr(0 - utility to translate from internal Phantom CRB
  236. * address to external PCI CRB address.
  237. */
  238. static u32 netxen_decode_crb_addr(u32 addr)
  239. {
  240. int i;
  241. u32 base_addr, offset, pci_base;
  242. crb_addr_transform_setup();
  243. pci_base = NETXEN_ADDR_ERROR;
  244. base_addr = addr & 0xfff00000;
  245. offset = addr & 0x000fffff;
  246. for (i = 0; i < NETXEN_MAX_CRB_XFORM; i++) {
  247. if (crb_addr_xform[i] == base_addr) {
  248. pci_base = i << 20;
  249. break;
  250. }
  251. }
  252. if (pci_base == NETXEN_ADDR_ERROR)
  253. return pci_base;
  254. else
  255. return (pci_base + offset);
  256. }
  257. static long rom_max_timeout = 100;
  258. static long rom_lock_timeout = 10000;
  259. static long rom_write_timeout = 700;
  260. static int rom_lock(struct netxen_adapter *adapter)
  261. {
  262. int iter;
  263. u32 done = 0;
  264. int timeout = 0;
  265. while (!done) {
  266. /* acquire semaphore2 from PCI HW block */
  267. netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_LOCK),
  268. &done);
  269. if (done == 1)
  270. break;
  271. if (timeout >= rom_lock_timeout)
  272. return -EIO;
  273. timeout++;
  274. /*
  275. * Yield CPU
  276. */
  277. if (!in_atomic())
  278. schedule();
  279. else {
  280. for (iter = 0; iter < 20; iter++)
  281. cpu_relax(); /*This a nop instr on i386 */
  282. }
  283. }
  284. netxen_nic_reg_write(adapter, NETXEN_ROM_LOCK_ID, ROM_LOCK_DRIVER);
  285. return 0;
  286. }
  287. static int netxen_wait_rom_done(struct netxen_adapter *adapter)
  288. {
  289. long timeout = 0;
  290. long done = 0;
  291. while (done == 0) {
  292. done = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_GLB_STATUS);
  293. done &= 2;
  294. timeout++;
  295. if (timeout >= rom_max_timeout) {
  296. printk("Timeout reached waiting for rom done");
  297. return -EIO;
  298. }
  299. }
  300. return 0;
  301. }
  302. static int netxen_rom_wren(struct netxen_adapter *adapter)
  303. {
  304. /* Set write enable latch in ROM status register */
  305. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
  306. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
  307. M25P_INSTR_WREN);
  308. if (netxen_wait_rom_done(adapter)) {
  309. return -1;
  310. }
  311. return 0;
  312. }
  313. static unsigned int netxen_rdcrbreg(struct netxen_adapter *adapter,
  314. unsigned int addr)
  315. {
  316. unsigned int data = 0xdeaddead;
  317. data = netxen_nic_reg_read(adapter, addr);
  318. return data;
  319. }
  320. static int netxen_do_rom_rdsr(struct netxen_adapter *adapter)
  321. {
  322. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
  323. M25P_INSTR_RDSR);
  324. if (netxen_wait_rom_done(adapter)) {
  325. return -1;
  326. }
  327. return netxen_rdcrbreg(adapter, NETXEN_ROMUSB_ROM_RDATA);
  328. }
  329. static void netxen_rom_unlock(struct netxen_adapter *adapter)
  330. {
  331. u32 val;
  332. /* release semaphore2 */
  333. netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_UNLOCK), &val);
  334. }
  335. static int netxen_rom_wip_poll(struct netxen_adapter *adapter)
  336. {
  337. long timeout = 0;
  338. long wip = 1;
  339. int val;
  340. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
  341. while (wip != 0) {
  342. val = netxen_do_rom_rdsr(adapter);
  343. wip = val & 1;
  344. timeout++;
  345. if (timeout > rom_max_timeout) {
  346. return -1;
  347. }
  348. }
  349. return 0;
  350. }
  351. static int do_rom_fast_write(struct netxen_adapter *adapter, int addr,
  352. int data)
  353. {
  354. if (netxen_rom_wren(adapter)) {
  355. return -1;
  356. }
  357. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_WDATA, data);
  358. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
  359. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
  360. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
  361. M25P_INSTR_PP);
  362. if (netxen_wait_rom_done(adapter)) {
  363. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
  364. return -1;
  365. }
  366. return netxen_rom_wip_poll(adapter);
  367. }
  368. static int do_rom_fast_read(struct netxen_adapter *adapter,
  369. int addr, int *valp)
  370. {
  371. cond_resched();
  372. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
  373. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
  374. udelay(100); /* prevent bursting on CRB */
  375. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
  376. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb);
  377. if (netxen_wait_rom_done(adapter)) {
  378. printk("Error waiting for rom done\n");
  379. return -EIO;
  380. }
  381. /* reset abyte_cnt and dummy_byte_cnt */
  382. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
  383. udelay(100); /* prevent bursting on CRB */
  384. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
  385. *valp = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_ROM_RDATA);
  386. return 0;
  387. }
  388. static int do_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
  389. u8 *bytes, size_t size)
  390. {
  391. int addridx;
  392. int ret = 0;
  393. for (addridx = addr; addridx < (addr + size); addridx += 4) {
  394. int v;
  395. ret = do_rom_fast_read(adapter, addridx, &v);
  396. if (ret != 0)
  397. break;
  398. *(__le32 *)bytes = cpu_to_le32(v);
  399. bytes += 4;
  400. }
  401. return ret;
  402. }
  403. int
  404. netxen_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
  405. u8 *bytes, size_t size)
  406. {
  407. int ret;
  408. ret = rom_lock(adapter);
  409. if (ret < 0)
  410. return ret;
  411. ret = do_rom_fast_read_words(adapter, addr, bytes, size);
  412. netxen_rom_unlock(adapter);
  413. return ret;
  414. }
  415. int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp)
  416. {
  417. int ret;
  418. if (rom_lock(adapter) != 0)
  419. return -EIO;
  420. ret = do_rom_fast_read(adapter, addr, valp);
  421. netxen_rom_unlock(adapter);
  422. return ret;
  423. }
  424. #if 0
  425. int netxen_rom_fast_write(struct netxen_adapter *adapter, int addr, int data)
  426. {
  427. int ret = 0;
  428. if (rom_lock(adapter) != 0) {
  429. return -1;
  430. }
  431. ret = do_rom_fast_write(adapter, addr, data);
  432. netxen_rom_unlock(adapter);
  433. return ret;
  434. }
  435. #endif /* 0 */
  436. static int do_rom_fast_write_words(struct netxen_adapter *adapter,
  437. int addr, u8 *bytes, size_t size)
  438. {
  439. int addridx = addr;
  440. int ret = 0;
  441. while (addridx < (addr + size)) {
  442. int last_attempt = 0;
  443. int timeout = 0;
  444. int data;
  445. data = le32_to_cpu((*(__le32*)bytes));
  446. ret = do_rom_fast_write(adapter, addridx, data);
  447. if (ret < 0)
  448. return ret;
  449. while(1) {
  450. int data1;
  451. ret = do_rom_fast_read(adapter, addridx, &data1);
  452. if (ret < 0)
  453. return ret;
  454. if (data1 == data)
  455. break;
  456. if (timeout++ >= rom_write_timeout) {
  457. if (last_attempt++ < 4) {
  458. ret = do_rom_fast_write(adapter,
  459. addridx, data);
  460. if (ret < 0)
  461. return ret;
  462. }
  463. else {
  464. printk(KERN_INFO "Data write did not "
  465. "succeed at address 0x%x\n", addridx);
  466. break;
  467. }
  468. }
  469. }
  470. bytes += 4;
  471. addridx += 4;
  472. }
  473. return ret;
  474. }
  475. int netxen_rom_fast_write_words(struct netxen_adapter *adapter, int addr,
  476. u8 *bytes, size_t size)
  477. {
  478. int ret = 0;
  479. ret = rom_lock(adapter);
  480. if (ret < 0)
  481. return ret;
  482. ret = do_rom_fast_write_words(adapter, addr, bytes, size);
  483. netxen_rom_unlock(adapter);
  484. return ret;
  485. }
  486. static int netxen_rom_wrsr(struct netxen_adapter *adapter, int data)
  487. {
  488. int ret;
  489. ret = netxen_rom_wren(adapter);
  490. if (ret < 0)
  491. return ret;
  492. netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_ROM_WDATA, data);
  493. netxen_crb_writelit_adapter(adapter,
  494. NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0x1);
  495. ret = netxen_wait_rom_done(adapter);
  496. if (ret < 0)
  497. return ret;
  498. return netxen_rom_wip_poll(adapter);
  499. }
  500. static int netxen_rom_rdsr(struct netxen_adapter *adapter)
  501. {
  502. int ret;
  503. ret = rom_lock(adapter);
  504. if (ret < 0)
  505. return ret;
  506. ret = netxen_do_rom_rdsr(adapter);
  507. netxen_rom_unlock(adapter);
  508. return ret;
  509. }
  510. int netxen_backup_crbinit(struct netxen_adapter *adapter)
  511. {
  512. int ret = FLASH_SUCCESS;
  513. int val;
  514. char *buffer = kmalloc(NETXEN_FLASH_SECTOR_SIZE, GFP_KERNEL);
  515. if (!buffer)
  516. return -ENOMEM;
  517. /* unlock sector 63 */
  518. val = netxen_rom_rdsr(adapter);
  519. val = val & 0xe3;
  520. ret = netxen_rom_wrsr(adapter, val);
  521. if (ret != FLASH_SUCCESS)
  522. goto out_kfree;
  523. ret = netxen_rom_wip_poll(adapter);
  524. if (ret != FLASH_SUCCESS)
  525. goto out_kfree;
  526. /* copy sector 0 to sector 63 */
  527. ret = netxen_rom_fast_read_words(adapter, NETXEN_CRBINIT_START,
  528. buffer, NETXEN_FLASH_SECTOR_SIZE);
  529. if (ret != FLASH_SUCCESS)
  530. goto out_kfree;
  531. ret = netxen_rom_fast_write_words(adapter, NETXEN_FIXED_START,
  532. buffer, NETXEN_FLASH_SECTOR_SIZE);
  533. if (ret != FLASH_SUCCESS)
  534. goto out_kfree;
  535. /* lock sector 63 */
  536. val = netxen_rom_rdsr(adapter);
  537. if (!(val & 0x8)) {
  538. val |= (0x1 << 2);
  539. /* lock sector 63 */
  540. if (netxen_rom_wrsr(adapter, val) == 0) {
  541. ret = netxen_rom_wip_poll(adapter);
  542. if (ret != FLASH_SUCCESS)
  543. goto out_kfree;
  544. /* lock SR writes */
  545. ret = netxen_rom_wip_poll(adapter);
  546. if (ret != FLASH_SUCCESS)
  547. goto out_kfree;
  548. }
  549. }
  550. out_kfree:
  551. kfree(buffer);
  552. return ret;
  553. }
  554. static int netxen_do_rom_se(struct netxen_adapter *adapter, int addr)
  555. {
  556. netxen_rom_wren(adapter);
  557. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
  558. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
  559. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
  560. M25P_INSTR_SE);
  561. if (netxen_wait_rom_done(adapter)) {
  562. netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
  563. return -1;
  564. }
  565. return netxen_rom_wip_poll(adapter);
  566. }
  567. static void check_erased_flash(struct netxen_adapter *adapter, int addr)
  568. {
  569. int i;
  570. int val;
  571. int count = 0, erased_errors = 0;
  572. int range;
  573. range = (addr == NETXEN_USER_START) ?
  574. NETXEN_FIXED_START : addr + NETXEN_FLASH_SECTOR_SIZE;
  575. for (i = addr; i < range; i += 4) {
  576. netxen_rom_fast_read(adapter, i, &val);
  577. if (val != 0xffffffff)
  578. erased_errors++;
  579. count++;
  580. }
  581. if (erased_errors)
  582. printk(KERN_INFO "0x%x out of 0x%x words fail to be erased "
  583. "for sector address: %x\n", erased_errors, count, addr);
  584. }
  585. int netxen_rom_se(struct netxen_adapter *adapter, int addr)
  586. {
  587. int ret = 0;
  588. if (rom_lock(adapter) != 0) {
  589. return -1;
  590. }
  591. ret = netxen_do_rom_se(adapter, addr);
  592. netxen_rom_unlock(adapter);
  593. msleep(30);
  594. check_erased_flash(adapter, addr);
  595. return ret;
  596. }
  597. static int netxen_flash_erase_sections(struct netxen_adapter *adapter,
  598. int start, int end)
  599. {
  600. int ret = FLASH_SUCCESS;
  601. int i;
  602. for (i = start; i < end; i++) {
  603. ret = netxen_rom_se(adapter, i * NETXEN_FLASH_SECTOR_SIZE);
  604. if (ret)
  605. break;
  606. ret = netxen_rom_wip_poll(adapter);
  607. if (ret < 0)
  608. return ret;
  609. }
  610. return ret;
  611. }
  612. int
  613. netxen_flash_erase_secondary(struct netxen_adapter *adapter)
  614. {
  615. int ret = FLASH_SUCCESS;
  616. int start, end;
  617. start = NETXEN_SECONDARY_START / NETXEN_FLASH_SECTOR_SIZE;
  618. end = NETXEN_USER_START / NETXEN_FLASH_SECTOR_SIZE;
  619. ret = netxen_flash_erase_sections(adapter, start, end);
  620. return ret;
  621. }
  622. int
  623. netxen_flash_erase_primary(struct netxen_adapter *adapter)
  624. {
  625. int ret = FLASH_SUCCESS;
  626. int start, end;
  627. start = NETXEN_PRIMARY_START / NETXEN_FLASH_SECTOR_SIZE;
  628. end = NETXEN_SECONDARY_START / NETXEN_FLASH_SECTOR_SIZE;
  629. ret = netxen_flash_erase_sections(adapter, start, end);
  630. return ret;
  631. }
  632. void netxen_halt_pegs(struct netxen_adapter *adapter)
  633. {
  634. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0x3c, 1);
  635. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0x3c, 1);
  636. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0x3c, 1);
  637. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0x3c, 1);
  638. }
  639. int netxen_flash_unlock(struct netxen_adapter *adapter)
  640. {
  641. int ret = 0;
  642. ret = netxen_rom_wrsr(adapter, 0);
  643. if (ret < 0)
  644. return ret;
  645. ret = netxen_rom_wren(adapter);
  646. if (ret < 0)
  647. return ret;
  648. return ret;
  649. }
  650. #define NETXEN_BOARDTYPE 0x4008
  651. #define NETXEN_BOARDNUM 0x400c
  652. #define NETXEN_CHIPNUM 0x4010
  653. #define NETXEN_ROMBUS_RESET 0xFFFFFFFF
  654. #define NETXEN_ROM_FIRST_BARRIER 0x800000000ULL
  655. #define NETXEN_ROM_FOUND_INIT 0x400
  656. int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose)
  657. {
  658. int addr, val, status;
  659. int n, i;
  660. int init_delay = 0;
  661. struct crb_addr_pair *buf;
  662. u32 off;
  663. /* resetall */
  664. status = netxen_nic_get_board_info(adapter);
  665. if (status)
  666. printk("%s: netxen_pinit_from_rom: Error getting board info\n",
  667. netxen_nic_driver_name);
  668. netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET,
  669. NETXEN_ROMBUS_RESET);
  670. if (verbose) {
  671. int val;
  672. if (netxen_rom_fast_read(adapter, NETXEN_BOARDTYPE, &val) == 0)
  673. printk("P2 ROM board type: 0x%08x\n", val);
  674. else
  675. printk("Could not read board type\n");
  676. if (netxen_rom_fast_read(adapter, NETXEN_BOARDNUM, &val) == 0)
  677. printk("P2 ROM board num: 0x%08x\n", val);
  678. else
  679. printk("Could not read board number\n");
  680. if (netxen_rom_fast_read(adapter, NETXEN_CHIPNUM, &val) == 0)
  681. printk("P2 ROM chip num: 0x%08x\n", val);
  682. else
  683. printk("Could not read chip number\n");
  684. }
  685. if (netxen_rom_fast_read(adapter, 0, &n) == 0
  686. && (n & NETXEN_ROM_FIRST_BARRIER)) {
  687. n &= ~NETXEN_ROM_ROUNDUP;
  688. if (n < NETXEN_ROM_FOUND_INIT) {
  689. if (verbose)
  690. printk("%s: %d CRB init values found"
  691. " in ROM.\n", netxen_nic_driver_name, n);
  692. } else {
  693. printk("%s:n=0x%x Error! NetXen card flash not"
  694. " initialized.\n", __FUNCTION__, n);
  695. return -EIO;
  696. }
  697. buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
  698. if (buf == NULL) {
  699. printk("%s: netxen_pinit_from_rom: Unable to calloc "
  700. "memory.\n", netxen_nic_driver_name);
  701. return -ENOMEM;
  702. }
  703. for (i = 0; i < n; i++) {
  704. if (netxen_rom_fast_read(adapter, 8 * i + 4, &val) != 0
  705. || netxen_rom_fast_read(adapter, 8 * i + 8,
  706. &addr) != 0)
  707. return -EIO;
  708. buf[i].addr = addr;
  709. buf[i].data = val;
  710. if (verbose)
  711. printk("%s: PCI: 0x%08x == 0x%08x\n",
  712. netxen_nic_driver_name, (unsigned int)
  713. netxen_decode_crb_addr(addr), val);
  714. }
  715. for (i = 0; i < n; i++) {
  716. off = netxen_decode_crb_addr(buf[i].addr);
  717. if (off == NETXEN_ADDR_ERROR) {
  718. printk(KERN_ERR"CRB init value out of range %x\n",
  719. buf[i].addr);
  720. continue;
  721. }
  722. off += NETXEN_PCI_CRBSPACE;
  723. /* skipping cold reboot MAGIC */
  724. if (off == NETXEN_CAM_RAM(0x1fc))
  725. continue;
  726. /* After writing this register, HW needs time for CRB */
  727. /* to quiet down (else crb_window returns 0xffffffff) */
  728. if (off == NETXEN_ROMUSB_GLB_SW_RESET) {
  729. init_delay = 1;
  730. /* hold xdma in reset also */
  731. buf[i].data = NETXEN_NIC_XDMA_RESET;
  732. }
  733. if (ADDR_IN_WINDOW1(off)) {
  734. writel(buf[i].data,
  735. NETXEN_CRB_NORMALIZE(adapter, off));
  736. } else {
  737. netxen_nic_pci_change_crbwindow(adapter, 0);
  738. writel(buf[i].data,
  739. pci_base_offset(adapter, off));
  740. netxen_nic_pci_change_crbwindow(adapter, 1);
  741. }
  742. if (init_delay == 1) {
  743. msleep(2000);
  744. init_delay = 0;
  745. }
  746. msleep(20);
  747. }
  748. kfree(buf);
  749. /* disable_peg_cache_all */
  750. /* unreset_net_cache */
  751. netxen_nic_hw_read_wx(adapter, NETXEN_ROMUSB_GLB_SW_RESET, &val,
  752. 4);
  753. netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET,
  754. (val & 0xffffff0f));
  755. /* p2dn replyCount */
  756. netxen_crb_writelit_adapter(adapter,
  757. NETXEN_CRB_PEG_NET_D + 0xec, 0x1e);
  758. /* disable_peg_cache 0 */
  759. netxen_crb_writelit_adapter(adapter,
  760. NETXEN_CRB_PEG_NET_D + 0x4c, 8);
  761. /* disable_peg_cache 1 */
  762. netxen_crb_writelit_adapter(adapter,
  763. NETXEN_CRB_PEG_NET_I + 0x4c, 8);
  764. /* peg_clr_all */
  765. /* peg_clr 0 */
  766. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0x8,
  767. 0);
  768. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0xc,
  769. 0);
  770. /* peg_clr 1 */
  771. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0x8,
  772. 0);
  773. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0xc,
  774. 0);
  775. /* peg_clr 2 */
  776. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0x8,
  777. 0);
  778. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0xc,
  779. 0);
  780. /* peg_clr 3 */
  781. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0x8,
  782. 0);
  783. netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0xc,
  784. 0);
  785. }
  786. return 0;
  787. }
  788. int netxen_initialize_adapter_offload(struct netxen_adapter *adapter)
  789. {
  790. uint64_t addr;
  791. uint32_t hi;
  792. uint32_t lo;
  793. adapter->dummy_dma.addr =
  794. pci_alloc_consistent(adapter->ahw.pdev,
  795. NETXEN_HOST_DUMMY_DMA_SIZE,
  796. &adapter->dummy_dma.phys_addr);
  797. if (adapter->dummy_dma.addr == NULL) {
  798. printk("%s: ERROR: Could not allocate dummy DMA memory\n",
  799. __FUNCTION__);
  800. return -ENOMEM;
  801. }
  802. addr = (uint64_t) adapter->dummy_dma.phys_addr;
  803. hi = (addr >> 32) & 0xffffffff;
  804. lo = addr & 0xffffffff;
  805. writel(hi, NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_DUMMY_BUF_ADDR_HI));
  806. writel(lo, NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_DUMMY_BUF_ADDR_LO));
  807. return 0;
  808. }
  809. void netxen_free_adapter_offload(struct netxen_adapter *adapter)
  810. {
  811. if (adapter->dummy_dma.addr) {
  812. pci_free_consistent(adapter->ahw.pdev,
  813. NETXEN_HOST_DUMMY_DMA_SIZE,
  814. adapter->dummy_dma.addr,
  815. adapter->dummy_dma.phys_addr);
  816. adapter->dummy_dma.addr = NULL;
  817. }
  818. }
  819. int netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val)
  820. {
  821. u32 val = 0;
  822. int retries = 30;
  823. if (!pegtune_val) {
  824. do {
  825. val = readl(NETXEN_CRB_NORMALIZE
  826. (adapter, CRB_CMDPEG_STATE));
  827. pegtune_val = readl(NETXEN_CRB_NORMALIZE
  828. (adapter, NETXEN_ROMUSB_GLB_PEGTUNE_DONE));
  829. if (val == PHAN_INITIALIZE_COMPLETE ||
  830. val == PHAN_INITIALIZE_ACK)
  831. return 0;
  832. msleep(1000);
  833. } while (--retries);
  834. if (!retries) {
  835. printk(KERN_WARNING "netxen_phantom_init: init failed, "
  836. "pegtune_val=%x\n", pegtune_val);
  837. return -1;
  838. }
  839. }
  840. return 0;
  841. }
  842. int netxen_nic_rx_has_work(struct netxen_adapter *adapter)
  843. {
  844. int ctx;
  845. for (ctx = 0; ctx < MAX_RCV_CTX; ++ctx) {
  846. struct netxen_recv_context *recv_ctx =
  847. &(adapter->recv_ctx[ctx]);
  848. u32 consumer;
  849. struct status_desc *desc_head;
  850. struct status_desc *desc;
  851. consumer = recv_ctx->status_rx_consumer;
  852. desc_head = recv_ctx->rcv_status_desc_head;
  853. desc = &desc_head[consumer];
  854. if (netxen_get_sts_owner(desc) & STATUS_OWNER_HOST)
  855. return 1;
  856. }
  857. return 0;
  858. }
  859. static int netxen_nic_check_temp(struct netxen_adapter *adapter)
  860. {
  861. struct net_device *netdev = adapter->netdev;
  862. uint32_t temp, temp_state, temp_val;
  863. int rv = 0;
  864. temp = readl(NETXEN_CRB_NORMALIZE(adapter, CRB_TEMP_STATE));
  865. temp_state = nx_get_temp_state(temp);
  866. temp_val = nx_get_temp_val(temp);
  867. if (temp_state == NX_TEMP_PANIC) {
  868. printk(KERN_ALERT
  869. "%s: Device temperature %d degrees C exceeds"
  870. " maximum allowed. Hardware has been shut down.\n",
  871. netxen_nic_driver_name, temp_val);
  872. netif_carrier_off(netdev);
  873. netif_stop_queue(netdev);
  874. rv = 1;
  875. } else if (temp_state == NX_TEMP_WARN) {
  876. if (adapter->temp == NX_TEMP_NORMAL) {
  877. printk(KERN_ALERT
  878. "%s: Device temperature %d degrees C "
  879. "exceeds operating range."
  880. " Immediate action needed.\n",
  881. netxen_nic_driver_name, temp_val);
  882. }
  883. } else {
  884. if (adapter->temp == NX_TEMP_WARN) {
  885. printk(KERN_INFO
  886. "%s: Device temperature is now %d degrees C"
  887. " in normal range.\n", netxen_nic_driver_name,
  888. temp_val);
  889. }
  890. }
  891. adapter->temp = temp_state;
  892. return rv;
  893. }
  894. void netxen_watchdog_task(struct work_struct *work)
  895. {
  896. struct net_device *netdev;
  897. struct netxen_adapter *adapter =
  898. container_of(work, struct netxen_adapter, watchdog_task);
  899. if ((adapter->portnum == 0) && netxen_nic_check_temp(adapter))
  900. return;
  901. if (adapter->handle_phy_intr)
  902. adapter->handle_phy_intr(adapter);
  903. netdev = adapter->netdev;
  904. if ((netif_running(netdev)) && !netif_carrier_ok(netdev) &&
  905. netxen_nic_link_ok(adapter) ) {
  906. printk(KERN_INFO "%s %s (port %d), Link is up\n",
  907. netxen_nic_driver_name, netdev->name, adapter->portnum);
  908. netif_carrier_on(netdev);
  909. netif_wake_queue(netdev);
  910. } else if(!(netif_running(netdev)) && netif_carrier_ok(netdev)) {
  911. printk(KERN_ERR "%s %s Link is Down\n",
  912. netxen_nic_driver_name, netdev->name);
  913. netif_carrier_off(netdev);
  914. netif_stop_queue(netdev);
  915. }
  916. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  917. }
  918. /*
  919. * netxen_process_rcv() send the received packet to the protocol stack.
  920. * and if the number of receives exceeds RX_BUFFERS_REFILL, then we
  921. * invoke the routine to send more rx buffers to the Phantom...
  922. */
  923. static void netxen_process_rcv(struct netxen_adapter *adapter, int ctxid,
  924. struct status_desc *desc)
  925. {
  926. struct pci_dev *pdev = adapter->pdev;
  927. struct net_device *netdev = adapter->netdev;
  928. u64 sts_data = le64_to_cpu(desc->status_desc_data);
  929. int index = netxen_get_sts_refhandle(sts_data);
  930. struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]);
  931. struct netxen_rx_buffer *buffer;
  932. struct sk_buff *skb;
  933. u32 length = netxen_get_sts_totallength(sts_data);
  934. u32 desc_ctx;
  935. struct netxen_rcv_desc_ctx *rcv_desc;
  936. int ret;
  937. desc_ctx = netxen_get_sts_type(sts_data);
  938. if (unlikely(desc_ctx >= NUM_RCV_DESC_RINGS)) {
  939. printk("%s: %s Bad Rcv descriptor ring\n",
  940. netxen_nic_driver_name, netdev->name);
  941. return;
  942. }
  943. rcv_desc = &recv_ctx->rcv_desc[desc_ctx];
  944. if (unlikely(index > rcv_desc->max_rx_desc_count)) {
  945. DPRINTK(ERR, "Got a buffer index:%x Max is %x\n",
  946. index, rcv_desc->max_rx_desc_count);
  947. return;
  948. }
  949. buffer = &rcv_desc->rx_buf_arr[index];
  950. if (desc_ctx == RCV_DESC_LRO_CTXID) {
  951. buffer->lro_current_frags++;
  952. if (netxen_get_sts_desc_lro_last_frag(desc)) {
  953. buffer->lro_expected_frags =
  954. netxen_get_sts_desc_lro_cnt(desc);
  955. buffer->lro_length = length;
  956. }
  957. if (buffer->lro_current_frags != buffer->lro_expected_frags) {
  958. if (buffer->lro_expected_frags != 0) {
  959. printk("LRO: (refhandle:%x) recv frag. "
  960. "wait for last. flags: %x expected:%d "
  961. "have:%d\n", index,
  962. netxen_get_sts_desc_lro_last_frag(desc),
  963. buffer->lro_expected_frags,
  964. buffer->lro_current_frags);
  965. }
  966. return;
  967. }
  968. }
  969. pci_unmap_single(pdev, buffer->dma, rcv_desc->dma_size,
  970. PCI_DMA_FROMDEVICE);
  971. skb = (struct sk_buff *)buffer->skb;
  972. if (likely(adapter->rx_csum &&
  973. netxen_get_sts_status(sts_data) == STATUS_CKSUM_OK)) {
  974. adapter->stats.csummed++;
  975. skb->ip_summed = CHECKSUM_UNNECESSARY;
  976. } else
  977. skb->ip_summed = CHECKSUM_NONE;
  978. skb->dev = netdev;
  979. if (desc_ctx == RCV_DESC_LRO_CTXID) {
  980. /* True length was only available on the last pkt */
  981. skb_put(skb, buffer->lro_length);
  982. } else {
  983. skb_put(skb, length);
  984. }
  985. skb->protocol = eth_type_trans(skb, netdev);
  986. ret = netif_receive_skb(skb);
  987. /*
  988. * RH: Do we need these stats on a regular basis. Can we get it from
  989. * Linux stats.
  990. */
  991. switch (ret) {
  992. case NET_RX_SUCCESS:
  993. adapter->stats.uphappy++;
  994. break;
  995. case NET_RX_CN_LOW:
  996. adapter->stats.uplcong++;
  997. break;
  998. case NET_RX_CN_MOD:
  999. adapter->stats.upmcong++;
  1000. break;
  1001. case NET_RX_CN_HIGH:
  1002. adapter->stats.uphcong++;
  1003. break;
  1004. case NET_RX_DROP:
  1005. adapter->stats.updropped++;
  1006. break;
  1007. default:
  1008. adapter->stats.updunno++;
  1009. break;
  1010. }
  1011. netdev->last_rx = jiffies;
  1012. rcv_desc->rcv_free++;
  1013. rcv_desc->rcv_pending--;
  1014. /*
  1015. * We just consumed one buffer so post a buffer.
  1016. */
  1017. buffer->skb = NULL;
  1018. buffer->state = NETXEN_BUFFER_FREE;
  1019. buffer->lro_current_frags = 0;
  1020. buffer->lro_expected_frags = 0;
  1021. adapter->stats.no_rcv++;
  1022. adapter->stats.rxbytes += length;
  1023. }
  1024. /* Process Receive status ring */
  1025. u32 netxen_process_rcv_ring(struct netxen_adapter *adapter, int ctxid, int max)
  1026. {
  1027. struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]);
  1028. struct status_desc *desc_head = recv_ctx->rcv_status_desc_head;
  1029. struct status_desc *desc; /* used to read status desc here */
  1030. u32 consumer = recv_ctx->status_rx_consumer;
  1031. u32 producer = 0;
  1032. int count = 0, ring;
  1033. DPRINTK(INFO, "procesing receive\n");
  1034. /*
  1035. * we assume in this case that there is only one port and that is
  1036. * port #1...changes need to be done in firmware to indicate port
  1037. * number as part of the descriptor. This way we will be able to get
  1038. * the netdev which is associated with that device.
  1039. */
  1040. while (count < max) {
  1041. desc = &desc_head[consumer];
  1042. if (!(netxen_get_sts_owner(desc) & STATUS_OWNER_HOST)) {
  1043. DPRINTK(ERR, "desc %p ownedby %x\n", desc,
  1044. netxen_get_sts_owner(desc));
  1045. break;
  1046. }
  1047. netxen_process_rcv(adapter, ctxid, desc);
  1048. netxen_set_sts_owner(desc, STATUS_OWNER_PHANTOM);
  1049. consumer = (consumer + 1) & (adapter->max_rx_desc_count - 1);
  1050. count++;
  1051. }
  1052. if (count) {
  1053. for (ring = 0; ring < NUM_RCV_DESC_RINGS; ring++) {
  1054. netxen_post_rx_buffers_nodb(adapter, ctxid, ring);
  1055. }
  1056. }
  1057. /* update the consumer index in phantom */
  1058. if (count) {
  1059. recv_ctx->status_rx_consumer = consumer;
  1060. recv_ctx->status_rx_producer = producer;
  1061. /* Window = 1 */
  1062. writel(consumer,
  1063. NETXEN_CRB_NORMALIZE(adapter,
  1064. recv_crb_registers[adapter->portnum].
  1065. crb_rcv_status_consumer));
  1066. wmb();
  1067. }
  1068. return count;
  1069. }
  1070. /* Process Command status ring */
  1071. int netxen_process_cmd_ring(unsigned long data)
  1072. {
  1073. u32 last_consumer;
  1074. u32 consumer;
  1075. struct netxen_adapter *adapter = (struct netxen_adapter *)data;
  1076. int count1 = 0;
  1077. int count2 = 0;
  1078. struct netxen_cmd_buffer *buffer;
  1079. struct pci_dev *pdev;
  1080. struct netxen_skb_frag *frag;
  1081. u32 i;
  1082. int done;
  1083. spin_lock(&adapter->tx_lock);
  1084. last_consumer = adapter->last_cmd_consumer;
  1085. DPRINTK(INFO, "procesing xmit complete\n");
  1086. /* we assume in this case that there is only one port and that is
  1087. * port #1...changes need to be done in firmware to indicate port
  1088. * number as part of the descriptor. This way we will be able to get
  1089. * the netdev which is associated with that device.
  1090. */
  1091. consumer = le32_to_cpu(*(adapter->cmd_consumer));
  1092. if (last_consumer == consumer) { /* Ring is empty */
  1093. DPRINTK(INFO, "last_consumer %d == consumer %d\n",
  1094. last_consumer, consumer);
  1095. spin_unlock(&adapter->tx_lock);
  1096. return 1;
  1097. }
  1098. adapter->proc_cmd_buf_counter++;
  1099. /*
  1100. * Not needed - does not seem to be used anywhere.
  1101. * adapter->cmd_consumer = consumer;
  1102. */
  1103. spin_unlock(&adapter->tx_lock);
  1104. while ((last_consumer != consumer) && (count1 < MAX_STATUS_HANDLE)) {
  1105. buffer = &adapter->cmd_buf_arr[last_consumer];
  1106. pdev = adapter->pdev;
  1107. if (buffer->skb) {
  1108. frag = &buffer->frag_array[0];
  1109. pci_unmap_single(pdev, frag->dma, frag->length,
  1110. PCI_DMA_TODEVICE);
  1111. frag->dma = 0ULL;
  1112. for (i = 1; i < buffer->frag_count; i++) {
  1113. DPRINTK(INFO, "getting fragment no %d\n", i);
  1114. frag++; /* Get the next frag */
  1115. pci_unmap_page(pdev, frag->dma, frag->length,
  1116. PCI_DMA_TODEVICE);
  1117. frag->dma = 0ULL;
  1118. }
  1119. adapter->stats.skbfreed++;
  1120. dev_kfree_skb_any(buffer->skb);
  1121. buffer->skb = NULL;
  1122. } else if (adapter->proc_cmd_buf_counter == 1) {
  1123. adapter->stats.txnullskb++;
  1124. }
  1125. if (unlikely(netif_queue_stopped(adapter->netdev)
  1126. && netif_carrier_ok(adapter->netdev))
  1127. && ((jiffies - adapter->netdev->trans_start) >
  1128. adapter->netdev->watchdog_timeo)) {
  1129. SCHEDULE_WORK(&adapter->tx_timeout_task);
  1130. }
  1131. last_consumer = get_next_index(last_consumer,
  1132. adapter->max_tx_desc_count);
  1133. count1++;
  1134. }
  1135. count2 = 0;
  1136. spin_lock(&adapter->tx_lock);
  1137. if ((--adapter->proc_cmd_buf_counter) == 0) {
  1138. adapter->last_cmd_consumer = last_consumer;
  1139. while ((adapter->last_cmd_consumer != consumer)
  1140. && (count2 < MAX_STATUS_HANDLE)) {
  1141. buffer =
  1142. &adapter->cmd_buf_arr[adapter->last_cmd_consumer];
  1143. count2++;
  1144. if (buffer->skb)
  1145. break;
  1146. else
  1147. adapter->last_cmd_consumer =
  1148. get_next_index(adapter->last_cmd_consumer,
  1149. adapter->max_tx_desc_count);
  1150. }
  1151. }
  1152. if (count1 || count2) {
  1153. if (netif_queue_stopped(adapter->netdev)
  1154. && (adapter->flags & NETXEN_NETDEV_STATUS)) {
  1155. netif_wake_queue(adapter->netdev);
  1156. adapter->flags &= ~NETXEN_NETDEV_STATUS;
  1157. }
  1158. }
  1159. /*
  1160. * If everything is freed up to consumer then check if the ring is full
  1161. * If the ring is full then check if more needs to be freed and
  1162. * schedule the call back again.
  1163. *
  1164. * This happens when there are 2 CPUs. One could be freeing and the
  1165. * other filling it. If the ring is full when we get out of here and
  1166. * the card has already interrupted the host then the host can miss the
  1167. * interrupt.
  1168. *
  1169. * There is still a possible race condition and the host could miss an
  1170. * interrupt. The card has to take care of this.
  1171. */
  1172. if (adapter->last_cmd_consumer == consumer &&
  1173. (((adapter->cmd_producer + 1) %
  1174. adapter->max_tx_desc_count) == adapter->last_cmd_consumer)) {
  1175. consumer = le32_to_cpu(*(adapter->cmd_consumer));
  1176. }
  1177. done = (adapter->last_cmd_consumer == consumer);
  1178. spin_unlock(&adapter->tx_lock);
  1179. DPRINTK(INFO, "last consumer is %d in %s\n", last_consumer,
  1180. __FUNCTION__);
  1181. return (done);
  1182. }
  1183. /*
  1184. * netxen_post_rx_buffers puts buffer in the Phantom memory
  1185. */
  1186. void netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ctx, u32 ringid)
  1187. {
  1188. struct pci_dev *pdev = adapter->ahw.pdev;
  1189. struct sk_buff *skb;
  1190. struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]);
  1191. struct netxen_rcv_desc_ctx *rcv_desc = NULL;
  1192. uint producer;
  1193. struct rcv_desc *pdesc;
  1194. struct netxen_rx_buffer *buffer;
  1195. int count = 0;
  1196. int index = 0;
  1197. netxen_ctx_msg msg = 0;
  1198. dma_addr_t dma;
  1199. rcv_desc = &recv_ctx->rcv_desc[ringid];
  1200. producer = rcv_desc->producer;
  1201. index = rcv_desc->begin_alloc;
  1202. buffer = &rcv_desc->rx_buf_arr[index];
  1203. /* We can start writing rx descriptors into the phantom memory. */
  1204. while (buffer->state == NETXEN_BUFFER_FREE) {
  1205. skb = dev_alloc_skb(rcv_desc->skb_size);
  1206. if (unlikely(!skb)) {
  1207. /*
  1208. * TODO
  1209. * We need to schedule the posting of buffers to the pegs.
  1210. */
  1211. rcv_desc->begin_alloc = index;
  1212. DPRINTK(ERR, "netxen_post_rx_buffers: "
  1213. " allocated only %d buffers\n", count);
  1214. break;
  1215. }
  1216. count++; /* now there should be no failure */
  1217. pdesc = &rcv_desc->desc_head[producer];
  1218. #if defined(XGB_DEBUG)
  1219. *(unsigned long *)(skb->head) = 0xc0debabe;
  1220. if (skb_is_nonlinear(skb)) {
  1221. printk("Allocated SKB @%p is nonlinear\n");
  1222. }
  1223. #endif
  1224. skb_reserve(skb, 2);
  1225. /* This will be setup when we receive the
  1226. * buffer after it has been filled FSL TBD TBD
  1227. * skb->dev = netdev;
  1228. */
  1229. dma = pci_map_single(pdev, skb->data, rcv_desc->dma_size,
  1230. PCI_DMA_FROMDEVICE);
  1231. pdesc->addr_buffer = cpu_to_le64(dma);
  1232. buffer->skb = skb;
  1233. buffer->state = NETXEN_BUFFER_BUSY;
  1234. buffer->dma = dma;
  1235. /* make a rcv descriptor */
  1236. pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
  1237. pdesc->buffer_length = cpu_to_le32(rcv_desc->dma_size);
  1238. DPRINTK(INFO, "done writing descripter\n");
  1239. producer =
  1240. get_next_index(producer, rcv_desc->max_rx_desc_count);
  1241. index = get_next_index(index, rcv_desc->max_rx_desc_count);
  1242. buffer = &rcv_desc->rx_buf_arr[index];
  1243. }
  1244. /* if we did allocate buffers, then write the count to Phantom */
  1245. if (count) {
  1246. rcv_desc->begin_alloc = index;
  1247. rcv_desc->rcv_pending += count;
  1248. rcv_desc->producer = producer;
  1249. if (rcv_desc->rcv_free >= 32) {
  1250. rcv_desc->rcv_free = 0;
  1251. /* Window = 1 */
  1252. writel((producer - 1) &
  1253. (rcv_desc->max_rx_desc_count - 1),
  1254. NETXEN_CRB_NORMALIZE(adapter,
  1255. recv_crb_registers[
  1256. adapter->portnum].
  1257. rcv_desc_crb[ringid].
  1258. crb_rcv_producer_offset));
  1259. /*
  1260. * Write a doorbell msg to tell phanmon of change in
  1261. * receive ring producer
  1262. */
  1263. netxen_set_msg_peg_id(msg, NETXEN_RCV_PEG_DB_ID);
  1264. netxen_set_msg_privid(msg);
  1265. netxen_set_msg_count(msg,
  1266. ((producer -
  1267. 1) & (rcv_desc->
  1268. max_rx_desc_count - 1)));
  1269. netxen_set_msg_ctxid(msg, adapter->portnum);
  1270. netxen_set_msg_opcode(msg, NETXEN_RCV_PRODUCER(ringid));
  1271. writel(msg,
  1272. DB_NORMALIZE(adapter,
  1273. NETXEN_RCV_PRODUCER_OFFSET));
  1274. wmb();
  1275. }
  1276. }
  1277. }
  1278. static void netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
  1279. uint32_t ctx, uint32_t ringid)
  1280. {
  1281. struct pci_dev *pdev = adapter->ahw.pdev;
  1282. struct sk_buff *skb;
  1283. struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]);
  1284. struct netxen_rcv_desc_ctx *rcv_desc = NULL;
  1285. u32 producer;
  1286. struct rcv_desc *pdesc;
  1287. struct netxen_rx_buffer *buffer;
  1288. int count = 0;
  1289. int index = 0;
  1290. rcv_desc = &recv_ctx->rcv_desc[ringid];
  1291. producer = rcv_desc->producer;
  1292. index = rcv_desc->begin_alloc;
  1293. buffer = &rcv_desc->rx_buf_arr[index];
  1294. /* We can start writing rx descriptors into the phantom memory. */
  1295. while (buffer->state == NETXEN_BUFFER_FREE) {
  1296. skb = dev_alloc_skb(rcv_desc->skb_size);
  1297. if (unlikely(!skb)) {
  1298. /*
  1299. * We need to schedule the posting of buffers to the pegs.
  1300. */
  1301. rcv_desc->begin_alloc = index;
  1302. DPRINTK(ERR, "netxen_post_rx_buffers_nodb: "
  1303. " allocated only %d buffers\n", count);
  1304. break;
  1305. }
  1306. count++; /* now there should be no failure */
  1307. pdesc = &rcv_desc->desc_head[producer];
  1308. skb_reserve(skb, 2);
  1309. /*
  1310. * This will be setup when we receive the
  1311. * buffer after it has been filled
  1312. * skb->dev = netdev;
  1313. */
  1314. buffer->skb = skb;
  1315. buffer->state = NETXEN_BUFFER_BUSY;
  1316. buffer->dma = pci_map_single(pdev, skb->data,
  1317. rcv_desc->dma_size,
  1318. PCI_DMA_FROMDEVICE);
  1319. /* make a rcv descriptor */
  1320. pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
  1321. pdesc->buffer_length = cpu_to_le32(rcv_desc->dma_size);
  1322. pdesc->addr_buffer = cpu_to_le64(buffer->dma);
  1323. DPRINTK(INFO, "done writing descripter\n");
  1324. producer =
  1325. get_next_index(producer, rcv_desc->max_rx_desc_count);
  1326. index = get_next_index(index, rcv_desc->max_rx_desc_count);
  1327. buffer = &rcv_desc->rx_buf_arr[index];
  1328. }
  1329. /* if we did allocate buffers, then write the count to Phantom */
  1330. if (count) {
  1331. rcv_desc->begin_alloc = index;
  1332. rcv_desc->rcv_pending += count;
  1333. rcv_desc->producer = producer;
  1334. if (rcv_desc->rcv_free >= 32) {
  1335. rcv_desc->rcv_free = 0;
  1336. /* Window = 1 */
  1337. writel((producer - 1) &
  1338. (rcv_desc->max_rx_desc_count - 1),
  1339. NETXEN_CRB_NORMALIZE(adapter,
  1340. recv_crb_registers[
  1341. adapter->portnum].
  1342. rcv_desc_crb[ringid].
  1343. crb_rcv_producer_offset));
  1344. wmb();
  1345. }
  1346. }
  1347. }
  1348. int netxen_nic_tx_has_work(struct netxen_adapter *adapter)
  1349. {
  1350. if (find_diff_among(adapter->last_cmd_consumer,
  1351. adapter->cmd_producer,
  1352. adapter->max_tx_desc_count) > 0)
  1353. return 1;
  1354. return 0;
  1355. }
  1356. void netxen_nic_clear_stats(struct netxen_adapter *adapter)
  1357. {
  1358. memset(&adapter->stats, 0, sizeof(adapter->stats));
  1359. return;
  1360. }