fimc-capture.c 50 KB

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  1. /*
  2. * Samsung S5P/EXYNOS4 SoC series camera interface (camera capture) driver
  3. *
  4. * Copyright (C) 2010 - 2012 Samsung Electronics Co., Ltd.
  5. * Sylwester Nawrocki <s.nawrocki@samsung.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/module.h>
  12. #include <linux/kernel.h>
  13. #include <linux/types.h>
  14. #include <linux/errno.h>
  15. #include <linux/bug.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/device.h>
  18. #include <linux/pm_runtime.h>
  19. #include <linux/list.h>
  20. #include <linux/slab.h>
  21. #include <linux/videodev2.h>
  22. #include <media/v4l2-device.h>
  23. #include <media/v4l2-ioctl.h>
  24. #include <media/v4l2-mem2mem.h>
  25. #include <media/videobuf2-core.h>
  26. #include <media/videobuf2-dma-contig.h>
  27. #include "common.h"
  28. #include "fimc-core.h"
  29. #include "fimc-reg.h"
  30. #include "media-dev.h"
  31. static int fimc_capture_hw_init(struct fimc_dev *fimc)
  32. {
  33. struct fimc_source_info *si = &fimc->vid_cap.source_config;
  34. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  35. int ret;
  36. unsigned long flags;
  37. if (ctx == NULL || ctx->s_frame.fmt == NULL)
  38. return -EINVAL;
  39. if (si->fimc_bus_type == FIMC_BUS_TYPE_ISP_WRITEBACK) {
  40. ret = fimc_hw_camblk_cfg_writeback(fimc);
  41. if (ret < 0)
  42. return ret;
  43. }
  44. spin_lock_irqsave(&fimc->slock, flags);
  45. fimc_prepare_dma_offset(ctx, &ctx->d_frame);
  46. fimc_set_yuv_order(ctx);
  47. fimc_hw_set_camera_polarity(fimc, si);
  48. fimc_hw_set_camera_type(fimc, si);
  49. fimc_hw_set_camera_source(fimc, si);
  50. fimc_hw_set_camera_offset(fimc, &ctx->s_frame);
  51. ret = fimc_set_scaler_info(ctx);
  52. if (!ret) {
  53. fimc_hw_set_input_path(ctx);
  54. fimc_hw_set_prescaler(ctx);
  55. fimc_hw_set_mainscaler(ctx);
  56. fimc_hw_set_target_format(ctx);
  57. fimc_hw_set_rotation(ctx);
  58. fimc_hw_set_effect(ctx);
  59. fimc_hw_set_output_path(ctx);
  60. fimc_hw_set_out_dma(ctx);
  61. if (fimc->drv_data->alpha_color)
  62. fimc_hw_set_rgb_alpha(ctx);
  63. clear_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  64. }
  65. spin_unlock_irqrestore(&fimc->slock, flags);
  66. return ret;
  67. }
  68. /*
  69. * Reinitialize the driver so it is ready to start the streaming again.
  70. * Set fimc->state to indicate stream off and the hardware shut down state.
  71. * If not suspending (@suspend is false), return any buffers to videobuf2.
  72. * Otherwise put any owned buffers onto the pending buffers queue, so they
  73. * can be re-spun when the device is being resumed. Also perform FIMC
  74. * software reset and disable streaming on the whole pipeline if required.
  75. */
  76. static int fimc_capture_state_cleanup(struct fimc_dev *fimc, bool suspend)
  77. {
  78. struct fimc_vid_cap *cap = &fimc->vid_cap;
  79. struct fimc_vid_buffer *buf;
  80. unsigned long flags;
  81. bool streaming;
  82. spin_lock_irqsave(&fimc->slock, flags);
  83. streaming = fimc->state & (1 << ST_CAPT_ISP_STREAM);
  84. fimc->state &= ~(1 << ST_CAPT_RUN | 1 << ST_CAPT_SHUT |
  85. 1 << ST_CAPT_STREAM | 1 << ST_CAPT_ISP_STREAM);
  86. if (suspend)
  87. fimc->state |= (1 << ST_CAPT_SUSPENDED);
  88. else
  89. fimc->state &= ~(1 << ST_CAPT_PEND | 1 << ST_CAPT_SUSPENDED);
  90. /* Release unused buffers */
  91. while (!suspend && !list_empty(&cap->pending_buf_q)) {
  92. buf = fimc_pending_queue_pop(cap);
  93. vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
  94. }
  95. /* If suspending put unused buffers onto pending queue */
  96. while (!list_empty(&cap->active_buf_q)) {
  97. buf = fimc_active_queue_pop(cap);
  98. if (suspend)
  99. fimc_pending_queue_add(cap, buf);
  100. else
  101. vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
  102. }
  103. fimc_hw_reset(fimc);
  104. cap->buf_index = 0;
  105. spin_unlock_irqrestore(&fimc->slock, flags);
  106. if (streaming)
  107. return fimc_pipeline_call(fimc, set_stream,
  108. &fimc->pipeline, 0);
  109. else
  110. return 0;
  111. }
  112. static int fimc_stop_capture(struct fimc_dev *fimc, bool suspend)
  113. {
  114. unsigned long flags;
  115. if (!fimc_capture_active(fimc))
  116. return 0;
  117. spin_lock_irqsave(&fimc->slock, flags);
  118. set_bit(ST_CAPT_SHUT, &fimc->state);
  119. fimc_deactivate_capture(fimc);
  120. spin_unlock_irqrestore(&fimc->slock, flags);
  121. wait_event_timeout(fimc->irq_queue,
  122. !test_bit(ST_CAPT_SHUT, &fimc->state),
  123. (2*HZ/10)); /* 200 ms */
  124. return fimc_capture_state_cleanup(fimc, suspend);
  125. }
  126. /**
  127. * fimc_capture_config_update - apply the camera interface configuration
  128. *
  129. * To be called from within the interrupt handler with fimc.slock
  130. * spinlock held. It updates the camera pixel crop, rotation and
  131. * image flip in H/W.
  132. */
  133. static int fimc_capture_config_update(struct fimc_ctx *ctx)
  134. {
  135. struct fimc_dev *fimc = ctx->fimc_dev;
  136. int ret;
  137. fimc_hw_set_camera_offset(fimc, &ctx->s_frame);
  138. ret = fimc_set_scaler_info(ctx);
  139. if (ret)
  140. return ret;
  141. fimc_hw_set_prescaler(ctx);
  142. fimc_hw_set_mainscaler(ctx);
  143. fimc_hw_set_target_format(ctx);
  144. fimc_hw_set_rotation(ctx);
  145. fimc_hw_set_effect(ctx);
  146. fimc_prepare_dma_offset(ctx, &ctx->d_frame);
  147. fimc_hw_set_out_dma(ctx);
  148. if (fimc->drv_data->alpha_color)
  149. fimc_hw_set_rgb_alpha(ctx);
  150. clear_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  151. return ret;
  152. }
  153. void fimc_capture_irq_handler(struct fimc_dev *fimc, int deq_buf)
  154. {
  155. struct v4l2_subdev *csis = fimc->pipeline.subdevs[IDX_CSIS];
  156. struct fimc_vid_cap *cap = &fimc->vid_cap;
  157. struct fimc_frame *f = &cap->ctx->d_frame;
  158. struct fimc_vid_buffer *v_buf;
  159. struct timeval *tv;
  160. struct timespec ts;
  161. if (test_and_clear_bit(ST_CAPT_SHUT, &fimc->state)) {
  162. wake_up(&fimc->irq_queue);
  163. goto done;
  164. }
  165. if (!list_empty(&cap->active_buf_q) &&
  166. test_bit(ST_CAPT_RUN, &fimc->state) && deq_buf) {
  167. ktime_get_real_ts(&ts);
  168. v_buf = fimc_active_queue_pop(cap);
  169. tv = &v_buf->vb.v4l2_buf.timestamp;
  170. tv->tv_sec = ts.tv_sec;
  171. tv->tv_usec = ts.tv_nsec / NSEC_PER_USEC;
  172. v_buf->vb.v4l2_buf.sequence = cap->frame_count++;
  173. vb2_buffer_done(&v_buf->vb, VB2_BUF_STATE_DONE);
  174. }
  175. if (!list_empty(&cap->pending_buf_q)) {
  176. v_buf = fimc_pending_queue_pop(cap);
  177. fimc_hw_set_output_addr(fimc, &v_buf->paddr, cap->buf_index);
  178. v_buf->index = cap->buf_index;
  179. /* Move the buffer to the capture active queue */
  180. fimc_active_queue_add(cap, v_buf);
  181. dbg("next frame: %d, done frame: %d",
  182. fimc_hw_get_frame_index(fimc), v_buf->index);
  183. if (++cap->buf_index >= FIMC_MAX_OUT_BUFS)
  184. cap->buf_index = 0;
  185. }
  186. /*
  187. * Set up a buffer at MIPI-CSIS if current image format
  188. * requires the frame embedded data capture.
  189. */
  190. if (f->fmt->mdataplanes && !list_empty(&cap->active_buf_q)) {
  191. unsigned int plane = ffs(f->fmt->mdataplanes) - 1;
  192. unsigned int size = f->payload[plane];
  193. s32 index = fimc_hw_get_frame_index(fimc);
  194. void *vaddr;
  195. list_for_each_entry(v_buf, &cap->active_buf_q, list) {
  196. if (v_buf->index != index)
  197. continue;
  198. vaddr = vb2_plane_vaddr(&v_buf->vb, plane);
  199. v4l2_subdev_call(csis, video, s_rx_buffer,
  200. vaddr, &size);
  201. break;
  202. }
  203. }
  204. if (cap->active_buf_cnt == 0) {
  205. if (deq_buf)
  206. clear_bit(ST_CAPT_RUN, &fimc->state);
  207. if (++cap->buf_index >= FIMC_MAX_OUT_BUFS)
  208. cap->buf_index = 0;
  209. } else {
  210. set_bit(ST_CAPT_RUN, &fimc->state);
  211. }
  212. if (test_bit(ST_CAPT_APPLY_CFG, &fimc->state))
  213. fimc_capture_config_update(cap->ctx);
  214. done:
  215. if (cap->active_buf_cnt == 1) {
  216. fimc_deactivate_capture(fimc);
  217. clear_bit(ST_CAPT_STREAM, &fimc->state);
  218. }
  219. dbg("frame: %d, active_buf_cnt: %d",
  220. fimc_hw_get_frame_index(fimc), cap->active_buf_cnt);
  221. }
  222. static int start_streaming(struct vb2_queue *q, unsigned int count)
  223. {
  224. struct fimc_ctx *ctx = q->drv_priv;
  225. struct fimc_dev *fimc = ctx->fimc_dev;
  226. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  227. int min_bufs;
  228. int ret;
  229. vid_cap->frame_count = 0;
  230. ret = fimc_capture_hw_init(fimc);
  231. if (ret) {
  232. fimc_capture_state_cleanup(fimc, false);
  233. return ret;
  234. }
  235. set_bit(ST_CAPT_PEND, &fimc->state);
  236. min_bufs = fimc->vid_cap.reqbufs_count > 1 ? 2 : 1;
  237. if (vid_cap->active_buf_cnt >= min_bufs &&
  238. !test_and_set_bit(ST_CAPT_STREAM, &fimc->state)) {
  239. fimc_activate_capture(ctx);
  240. if (!test_and_set_bit(ST_CAPT_ISP_STREAM, &fimc->state))
  241. return fimc_pipeline_call(fimc, set_stream,
  242. &fimc->pipeline, 1);
  243. }
  244. return 0;
  245. }
  246. static int stop_streaming(struct vb2_queue *q)
  247. {
  248. struct fimc_ctx *ctx = q->drv_priv;
  249. struct fimc_dev *fimc = ctx->fimc_dev;
  250. if (!fimc_capture_active(fimc))
  251. return -EINVAL;
  252. return fimc_stop_capture(fimc, false);
  253. }
  254. int fimc_capture_suspend(struct fimc_dev *fimc)
  255. {
  256. bool suspend = fimc_capture_busy(fimc);
  257. int ret = fimc_stop_capture(fimc, suspend);
  258. if (ret)
  259. return ret;
  260. return fimc_pipeline_call(fimc, close, &fimc->pipeline);
  261. }
  262. static void buffer_queue(struct vb2_buffer *vb);
  263. int fimc_capture_resume(struct fimc_dev *fimc)
  264. {
  265. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  266. struct exynos_video_entity *ve = &vid_cap->ve;
  267. struct fimc_vid_buffer *buf;
  268. int i;
  269. if (!test_and_clear_bit(ST_CAPT_SUSPENDED, &fimc->state))
  270. return 0;
  271. INIT_LIST_HEAD(&fimc->vid_cap.active_buf_q);
  272. vid_cap->buf_index = 0;
  273. fimc_pipeline_call(fimc, open, &fimc->pipeline,
  274. &ve->vdev.entity, false);
  275. fimc_capture_hw_init(fimc);
  276. clear_bit(ST_CAPT_SUSPENDED, &fimc->state);
  277. for (i = 0; i < vid_cap->reqbufs_count; i++) {
  278. if (list_empty(&vid_cap->pending_buf_q))
  279. break;
  280. buf = fimc_pending_queue_pop(vid_cap);
  281. buffer_queue(&buf->vb);
  282. }
  283. return 0;
  284. }
  285. static int queue_setup(struct vb2_queue *vq, const struct v4l2_format *pfmt,
  286. unsigned int *num_buffers, unsigned int *num_planes,
  287. unsigned int sizes[], void *allocators[])
  288. {
  289. const struct v4l2_pix_format_mplane *pixm = NULL;
  290. struct fimc_ctx *ctx = vq->drv_priv;
  291. struct fimc_frame *frame = &ctx->d_frame;
  292. struct fimc_fmt *fmt = frame->fmt;
  293. unsigned long wh;
  294. int i;
  295. if (pfmt) {
  296. pixm = &pfmt->fmt.pix_mp;
  297. fmt = fimc_find_format(&pixm->pixelformat, NULL,
  298. FMT_FLAGS_CAM | FMT_FLAGS_M2M, -1);
  299. wh = pixm->width * pixm->height;
  300. } else {
  301. wh = frame->f_width * frame->f_height;
  302. }
  303. if (fmt == NULL)
  304. return -EINVAL;
  305. *num_planes = fmt->memplanes;
  306. for (i = 0; i < fmt->memplanes; i++) {
  307. unsigned int size = (wh * fmt->depth[i]) / 8;
  308. if (pixm)
  309. sizes[i] = max(size, pixm->plane_fmt[i].sizeimage);
  310. else if (fimc_fmt_is_user_defined(fmt->color))
  311. sizes[i] = frame->payload[i];
  312. else
  313. sizes[i] = max_t(u32, size, frame->payload[i]);
  314. allocators[i] = ctx->fimc_dev->alloc_ctx;
  315. }
  316. return 0;
  317. }
  318. static int buffer_prepare(struct vb2_buffer *vb)
  319. {
  320. struct vb2_queue *vq = vb->vb2_queue;
  321. struct fimc_ctx *ctx = vq->drv_priv;
  322. int i;
  323. if (ctx->d_frame.fmt == NULL)
  324. return -EINVAL;
  325. for (i = 0; i < ctx->d_frame.fmt->memplanes; i++) {
  326. unsigned long size = ctx->d_frame.payload[i];
  327. if (vb2_plane_size(vb, i) < size) {
  328. v4l2_err(&ctx->fimc_dev->vid_cap.ve.vdev,
  329. "User buffer too small (%ld < %ld)\n",
  330. vb2_plane_size(vb, i), size);
  331. return -EINVAL;
  332. }
  333. vb2_set_plane_payload(vb, i, size);
  334. }
  335. return 0;
  336. }
  337. static void buffer_queue(struct vb2_buffer *vb)
  338. {
  339. struct fimc_vid_buffer *buf
  340. = container_of(vb, struct fimc_vid_buffer, vb);
  341. struct fimc_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
  342. struct fimc_dev *fimc = ctx->fimc_dev;
  343. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  344. struct exynos_video_entity *ve = &vid_cap->ve;
  345. unsigned long flags;
  346. int min_bufs;
  347. spin_lock_irqsave(&fimc->slock, flags);
  348. fimc_prepare_addr(ctx, &buf->vb, &ctx->d_frame, &buf->paddr);
  349. if (!test_bit(ST_CAPT_SUSPENDED, &fimc->state) &&
  350. !test_bit(ST_CAPT_STREAM, &fimc->state) &&
  351. vid_cap->active_buf_cnt < FIMC_MAX_OUT_BUFS) {
  352. /* Setup the buffer directly for processing. */
  353. int buf_id = (vid_cap->reqbufs_count == 1) ? -1 :
  354. vid_cap->buf_index;
  355. fimc_hw_set_output_addr(fimc, &buf->paddr, buf_id);
  356. buf->index = vid_cap->buf_index;
  357. fimc_active_queue_add(vid_cap, buf);
  358. if (++vid_cap->buf_index >= FIMC_MAX_OUT_BUFS)
  359. vid_cap->buf_index = 0;
  360. } else {
  361. fimc_pending_queue_add(vid_cap, buf);
  362. }
  363. min_bufs = vid_cap->reqbufs_count > 1 ? 2 : 1;
  364. if (vb2_is_streaming(&vid_cap->vbq) &&
  365. vid_cap->active_buf_cnt >= min_bufs &&
  366. !test_and_set_bit(ST_CAPT_STREAM, &fimc->state)) {
  367. int ret;
  368. fimc_activate_capture(ctx);
  369. spin_unlock_irqrestore(&fimc->slock, flags);
  370. if (test_and_set_bit(ST_CAPT_ISP_STREAM, &fimc->state))
  371. return;
  372. ret = fimc_pipeline_call(fimc, set_stream, &fimc->pipeline, 1);
  373. if (ret < 0)
  374. v4l2_err(&ve->vdev, "stream on failed: %d\n", ret);
  375. return;
  376. }
  377. spin_unlock_irqrestore(&fimc->slock, flags);
  378. }
  379. static struct vb2_ops fimc_capture_qops = {
  380. .queue_setup = queue_setup,
  381. .buf_prepare = buffer_prepare,
  382. .buf_queue = buffer_queue,
  383. .wait_prepare = vb2_ops_wait_prepare,
  384. .wait_finish = vb2_ops_wait_finish,
  385. .start_streaming = start_streaming,
  386. .stop_streaming = stop_streaming,
  387. };
  388. static int fimc_capture_set_default_format(struct fimc_dev *fimc);
  389. static int fimc_capture_open(struct file *file)
  390. {
  391. struct fimc_dev *fimc = video_drvdata(file);
  392. struct fimc_vid_cap *vc = &fimc->vid_cap;
  393. struct exynos_video_entity *ve = &vc->ve;
  394. int ret = -EBUSY;
  395. dbg("pid: %d, state: 0x%lx", task_pid_nr(current), fimc->state);
  396. fimc_md_graph_lock(ve);
  397. mutex_lock(&fimc->lock);
  398. if (fimc_m2m_active(fimc))
  399. goto unlock;
  400. set_bit(ST_CAPT_BUSY, &fimc->state);
  401. ret = pm_runtime_get_sync(&fimc->pdev->dev);
  402. if (ret < 0)
  403. goto unlock;
  404. ret = v4l2_fh_open(file);
  405. if (ret) {
  406. pm_runtime_put(&fimc->pdev->dev);
  407. goto unlock;
  408. }
  409. if (v4l2_fh_is_singular_file(file)) {
  410. ret = fimc_pipeline_call(fimc, open, &fimc->pipeline,
  411. &fimc->vid_cap.ve.vdev.entity, true);
  412. if (ret == 0)
  413. ret = fimc_capture_set_default_format(fimc);
  414. if (ret == 0 && vc->user_subdev_api && vc->inh_sensor_ctrls) {
  415. /*
  416. * Recreate controls of the the video node to drop
  417. * any controls inherited from the sensor subdev.
  418. */
  419. fimc_ctrls_delete(vc->ctx);
  420. ret = fimc_ctrls_create(vc->ctx);
  421. if (ret == 0)
  422. vc->inh_sensor_ctrls = false;
  423. }
  424. if (ret < 0) {
  425. clear_bit(ST_CAPT_BUSY, &fimc->state);
  426. pm_runtime_put_sync(&fimc->pdev->dev);
  427. v4l2_fh_release(file);
  428. } else {
  429. fimc->vid_cap.refcnt++;
  430. }
  431. }
  432. unlock:
  433. mutex_unlock(&fimc->lock);
  434. fimc_md_graph_unlock(ve);
  435. return ret;
  436. }
  437. static int fimc_capture_release(struct file *file)
  438. {
  439. struct fimc_dev *fimc = video_drvdata(file);
  440. struct fimc_vid_cap *vc = &fimc->vid_cap;
  441. int ret;
  442. dbg("pid: %d, state: 0x%lx", task_pid_nr(current), fimc->state);
  443. mutex_lock(&fimc->lock);
  444. if (v4l2_fh_is_singular_file(file)) {
  445. if (vc->streaming) {
  446. media_entity_pipeline_stop(&vc->ve.vdev.entity);
  447. vc->streaming = false;
  448. }
  449. clear_bit(ST_CAPT_BUSY, &fimc->state);
  450. fimc_stop_capture(fimc, false);
  451. fimc_pipeline_call(fimc, close, &fimc->pipeline);
  452. clear_bit(ST_CAPT_SUSPENDED, &fimc->state);
  453. fimc->vid_cap.refcnt--;
  454. }
  455. pm_runtime_put(&fimc->pdev->dev);
  456. ret = vb2_fop_release(file);
  457. mutex_unlock(&fimc->lock);
  458. return ret;
  459. }
  460. static const struct v4l2_file_operations fimc_capture_fops = {
  461. .owner = THIS_MODULE,
  462. .open = fimc_capture_open,
  463. .release = fimc_capture_release,
  464. .poll = vb2_fop_poll,
  465. .unlocked_ioctl = video_ioctl2,
  466. .mmap = vb2_fop_mmap,
  467. };
  468. /*
  469. * Format and crop negotiation helpers
  470. */
  471. static struct fimc_fmt *fimc_capture_try_format(struct fimc_ctx *ctx,
  472. u32 *width, u32 *height,
  473. u32 *code, u32 *fourcc, int pad)
  474. {
  475. bool rotation = ctx->rotation == 90 || ctx->rotation == 270;
  476. struct fimc_dev *fimc = ctx->fimc_dev;
  477. const struct fimc_variant *var = fimc->variant;
  478. const struct fimc_pix_limit *pl = var->pix_limit;
  479. struct fimc_frame *dst = &ctx->d_frame;
  480. u32 depth, min_w, max_w, min_h, align_h = 3;
  481. u32 mask = FMT_FLAGS_CAM;
  482. struct fimc_fmt *ffmt;
  483. /* Conversion from/to JPEG or User Defined format is not supported */
  484. if (code && ctx->s_frame.fmt && pad == FIMC_SD_PAD_SOURCE &&
  485. fimc_fmt_is_user_defined(ctx->s_frame.fmt->color))
  486. *code = ctx->s_frame.fmt->mbus_code;
  487. if (fourcc && *fourcc != V4L2_PIX_FMT_JPEG && pad == FIMC_SD_PAD_SOURCE)
  488. mask |= FMT_FLAGS_M2M;
  489. if (pad == FIMC_SD_PAD_SINK_FIFO)
  490. mask = FMT_FLAGS_WRITEBACK;
  491. ffmt = fimc_find_format(fourcc, code, mask, 0);
  492. if (WARN_ON(!ffmt))
  493. return NULL;
  494. if (code)
  495. *code = ffmt->mbus_code;
  496. if (fourcc)
  497. *fourcc = ffmt->fourcc;
  498. if (pad != FIMC_SD_PAD_SOURCE) {
  499. max_w = fimc_fmt_is_user_defined(ffmt->color) ?
  500. pl->scaler_dis_w : pl->scaler_en_w;
  501. /* Apply the camera input interface pixel constraints */
  502. v4l_bound_align_image(width, max_t(u32, *width, 32), max_w, 4,
  503. height, max_t(u32, *height, 32),
  504. FIMC_CAMIF_MAX_HEIGHT,
  505. fimc_fmt_is_user_defined(ffmt->color) ?
  506. 3 : 1,
  507. 0);
  508. return ffmt;
  509. }
  510. /* Can't scale or crop in transparent (JPEG) transfer mode */
  511. if (fimc_fmt_is_user_defined(ffmt->color)) {
  512. *width = ctx->s_frame.f_width;
  513. *height = ctx->s_frame.f_height;
  514. return ffmt;
  515. }
  516. /* Apply the scaler and the output DMA constraints */
  517. max_w = rotation ? pl->out_rot_en_w : pl->out_rot_dis_w;
  518. if (ctx->state & FIMC_COMPOSE) {
  519. min_w = dst->offs_h + dst->width;
  520. min_h = dst->offs_v + dst->height;
  521. } else {
  522. min_w = var->min_out_pixsize;
  523. min_h = var->min_out_pixsize;
  524. }
  525. if (var->min_vsize_align == 1 && !rotation)
  526. align_h = fimc_fmt_is_rgb(ffmt->color) ? 0 : 1;
  527. depth = fimc_get_format_depth(ffmt);
  528. v4l_bound_align_image(width, min_w, max_w,
  529. ffs(var->min_out_pixsize) - 1,
  530. height, min_h, FIMC_CAMIF_MAX_HEIGHT,
  531. align_h,
  532. 64/(ALIGN(depth, 8)));
  533. dbg("pad%d: code: 0x%x, %dx%d. dst fmt: %dx%d",
  534. pad, code ? *code : 0, *width, *height,
  535. dst->f_width, dst->f_height);
  536. return ffmt;
  537. }
  538. static void fimc_capture_try_selection(struct fimc_ctx *ctx,
  539. struct v4l2_rect *r,
  540. int target)
  541. {
  542. bool rotate = ctx->rotation == 90 || ctx->rotation == 270;
  543. struct fimc_dev *fimc = ctx->fimc_dev;
  544. const struct fimc_variant *var = fimc->variant;
  545. const struct fimc_pix_limit *pl = var->pix_limit;
  546. struct fimc_frame *sink = &ctx->s_frame;
  547. u32 max_w, max_h, min_w = 0, min_h = 0, min_sz;
  548. u32 align_sz = 0, align_h = 4;
  549. u32 max_sc_h, max_sc_v;
  550. /* In JPEG transparent transfer mode cropping is not supported */
  551. if (fimc_fmt_is_user_defined(ctx->d_frame.fmt->color)) {
  552. r->width = sink->f_width;
  553. r->height = sink->f_height;
  554. r->left = r->top = 0;
  555. return;
  556. }
  557. if (target == V4L2_SEL_TGT_COMPOSE) {
  558. if (ctx->rotation != 90 && ctx->rotation != 270)
  559. align_h = 1;
  560. max_sc_h = min(SCALER_MAX_HRATIO, 1 << (ffs(sink->width) - 3));
  561. max_sc_v = min(SCALER_MAX_VRATIO, 1 << (ffs(sink->height) - 1));
  562. min_sz = var->min_out_pixsize;
  563. } else {
  564. u32 depth = fimc_get_format_depth(sink->fmt);
  565. align_sz = 64/ALIGN(depth, 8);
  566. min_sz = var->min_inp_pixsize;
  567. min_w = min_h = min_sz;
  568. max_sc_h = max_sc_v = 1;
  569. }
  570. /*
  571. * For the compose rectangle the following constraints must be met:
  572. * - it must fit in the sink pad format rectangle (f_width/f_height);
  573. * - maximum downscaling ratio is 64;
  574. * - maximum crop size depends if the rotator is used or not;
  575. * - the sink pad format width/height must be 4 multiple of the
  576. * prescaler ratios determined by sink pad size and source pad crop,
  577. * the prescaler ratio is returned by fimc_get_scaler_factor().
  578. */
  579. max_w = min_t(u32,
  580. rotate ? pl->out_rot_en_w : pl->out_rot_dis_w,
  581. rotate ? sink->f_height : sink->f_width);
  582. max_h = min_t(u32, FIMC_CAMIF_MAX_HEIGHT, sink->f_height);
  583. if (target == V4L2_SEL_TGT_COMPOSE) {
  584. min_w = min_t(u32, max_w, sink->f_width / max_sc_h);
  585. min_h = min_t(u32, max_h, sink->f_height / max_sc_v);
  586. if (rotate) {
  587. swap(max_sc_h, max_sc_v);
  588. swap(min_w, min_h);
  589. }
  590. }
  591. v4l_bound_align_image(&r->width, min_w, max_w, ffs(min_sz) - 1,
  592. &r->height, min_h, max_h, align_h,
  593. align_sz);
  594. /* Adjust left/top if crop/compose rectangle is out of bounds */
  595. r->left = clamp_t(u32, r->left, 0, sink->f_width - r->width);
  596. r->top = clamp_t(u32, r->top, 0, sink->f_height - r->height);
  597. r->left = round_down(r->left, var->hor_offs_align);
  598. dbg("target %#x: (%d,%d)/%dx%d, sink fmt: %dx%d",
  599. target, r->left, r->top, r->width, r->height,
  600. sink->f_width, sink->f_height);
  601. }
  602. /*
  603. * The video node ioctl operations
  604. */
  605. static int fimc_cap_querycap(struct file *file, void *priv,
  606. struct v4l2_capability *cap)
  607. {
  608. struct fimc_dev *fimc = video_drvdata(file);
  609. __fimc_vidioc_querycap(&fimc->pdev->dev, cap, V4L2_CAP_STREAMING |
  610. V4L2_CAP_VIDEO_CAPTURE_MPLANE);
  611. return 0;
  612. }
  613. static int fimc_cap_enum_fmt_mplane(struct file *file, void *priv,
  614. struct v4l2_fmtdesc *f)
  615. {
  616. struct fimc_fmt *fmt;
  617. fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM | FMT_FLAGS_M2M,
  618. f->index);
  619. if (!fmt)
  620. return -EINVAL;
  621. strncpy(f->description, fmt->name, sizeof(f->description) - 1);
  622. f->pixelformat = fmt->fourcc;
  623. if (fmt->fourcc == V4L2_MBUS_FMT_JPEG_1X8)
  624. f->flags |= V4L2_FMT_FLAG_COMPRESSED;
  625. return 0;
  626. }
  627. static struct media_entity *fimc_pipeline_get_head(struct media_entity *me)
  628. {
  629. struct media_pad *pad = &me->pads[0];
  630. while (!(pad->flags & MEDIA_PAD_FL_SOURCE)) {
  631. pad = media_entity_remote_pad(pad);
  632. if (!pad)
  633. break;
  634. me = pad->entity;
  635. pad = &me->pads[0];
  636. }
  637. return me;
  638. }
  639. /**
  640. * fimc_pipeline_try_format - negotiate and/or set formats at pipeline
  641. * elements
  642. * @ctx: FIMC capture context
  643. * @tfmt: media bus format to try/set on subdevs
  644. * @fmt_id: fimc pixel format id corresponding to returned @tfmt (output)
  645. * @set: true to set format on subdevs, false to try only
  646. */
  647. static int fimc_pipeline_try_format(struct fimc_ctx *ctx,
  648. struct v4l2_mbus_framefmt *tfmt,
  649. struct fimc_fmt **fmt_id,
  650. bool set)
  651. {
  652. struct fimc_dev *fimc = ctx->fimc_dev;
  653. struct v4l2_subdev *sd = fimc->pipeline.subdevs[IDX_SENSOR];
  654. struct v4l2_subdev_format sfmt;
  655. struct v4l2_mbus_framefmt *mf = &sfmt.format;
  656. struct media_entity *me;
  657. struct fimc_fmt *ffmt;
  658. struct media_pad *pad;
  659. int ret, i = 1;
  660. u32 fcc;
  661. if (WARN_ON(!sd || !tfmt))
  662. return -EINVAL;
  663. memset(&sfmt, 0, sizeof(sfmt));
  664. sfmt.format = *tfmt;
  665. sfmt.which = set ? V4L2_SUBDEV_FORMAT_ACTIVE : V4L2_SUBDEV_FORMAT_TRY;
  666. me = fimc_pipeline_get_head(&sd->entity);
  667. while (1) {
  668. ffmt = fimc_find_format(NULL, mf->code != 0 ? &mf->code : NULL,
  669. FMT_FLAGS_CAM, i++);
  670. if (ffmt == NULL) {
  671. /*
  672. * Notify user-space if common pixel code for
  673. * host and sensor does not exist.
  674. */
  675. return -EINVAL;
  676. }
  677. mf->code = tfmt->code = ffmt->mbus_code;
  678. /* set format on all pipeline subdevs */
  679. while (me != &fimc->vid_cap.subdev.entity) {
  680. sd = media_entity_to_v4l2_subdev(me);
  681. sfmt.pad = 0;
  682. ret = v4l2_subdev_call(sd, pad, set_fmt, NULL, &sfmt);
  683. if (ret)
  684. return ret;
  685. if (me->pads[0].flags & MEDIA_PAD_FL_SINK) {
  686. sfmt.pad = me->num_pads - 1;
  687. mf->code = tfmt->code;
  688. ret = v4l2_subdev_call(sd, pad, set_fmt, NULL,
  689. &sfmt);
  690. if (ret)
  691. return ret;
  692. }
  693. pad = media_entity_remote_pad(&me->pads[sfmt.pad]);
  694. if (!pad)
  695. return -EINVAL;
  696. me = pad->entity;
  697. }
  698. if (mf->code != tfmt->code)
  699. continue;
  700. fcc = ffmt->fourcc;
  701. tfmt->width = mf->width;
  702. tfmt->height = mf->height;
  703. ffmt = fimc_capture_try_format(ctx, &tfmt->width, &tfmt->height,
  704. NULL, &fcc, FIMC_SD_PAD_SINK_CAM);
  705. ffmt = fimc_capture_try_format(ctx, &tfmt->width, &tfmt->height,
  706. NULL, &fcc, FIMC_SD_PAD_SOURCE);
  707. if (ffmt && ffmt->mbus_code)
  708. mf->code = ffmt->mbus_code;
  709. if (mf->width != tfmt->width || mf->height != tfmt->height)
  710. continue;
  711. tfmt->code = mf->code;
  712. break;
  713. }
  714. if (fmt_id && ffmt)
  715. *fmt_id = ffmt;
  716. *tfmt = *mf;
  717. return 0;
  718. }
  719. /**
  720. * fimc_get_sensor_frame_desc - query the sensor for media bus frame parameters
  721. * @sensor: pointer to the sensor subdev
  722. * @plane_fmt: provides plane sizes corresponding to the frame layout entries
  723. * @try: true to set the frame parameters, false to query only
  724. *
  725. * This function is used by this driver only for compressed/blob data formats.
  726. */
  727. static int fimc_get_sensor_frame_desc(struct v4l2_subdev *sensor,
  728. struct v4l2_plane_pix_format *plane_fmt,
  729. unsigned int num_planes, bool try)
  730. {
  731. struct v4l2_mbus_frame_desc fd;
  732. int i, ret;
  733. int pad;
  734. for (i = 0; i < num_planes; i++)
  735. fd.entry[i].length = plane_fmt[i].sizeimage;
  736. pad = sensor->entity.num_pads - 1;
  737. if (try)
  738. ret = v4l2_subdev_call(sensor, pad, set_frame_desc, pad, &fd);
  739. else
  740. ret = v4l2_subdev_call(sensor, pad, get_frame_desc, pad, &fd);
  741. if (ret < 0)
  742. return ret;
  743. if (num_planes != fd.num_entries)
  744. return -EINVAL;
  745. for (i = 0; i < num_planes; i++)
  746. plane_fmt[i].sizeimage = fd.entry[i].length;
  747. if (fd.entry[0].length > FIMC_MAX_JPEG_BUF_SIZE) {
  748. v4l2_err(sensor->v4l2_dev, "Unsupported buffer size: %u\n",
  749. fd.entry[0].length);
  750. return -EINVAL;
  751. }
  752. return 0;
  753. }
  754. static int fimc_cap_g_fmt_mplane(struct file *file, void *fh,
  755. struct v4l2_format *f)
  756. {
  757. struct fimc_dev *fimc = video_drvdata(file);
  758. __fimc_get_format(&fimc->vid_cap.ctx->d_frame, f);
  759. return 0;
  760. }
  761. static int fimc_cap_try_fmt_mplane(struct file *file, void *fh,
  762. struct v4l2_format *f)
  763. {
  764. struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp;
  765. struct fimc_dev *fimc = video_drvdata(file);
  766. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  767. struct exynos_video_entity *ve = &fimc->vid_cap.ve;
  768. struct v4l2_mbus_framefmt mf;
  769. struct fimc_fmt *ffmt = NULL;
  770. int ret = 0;
  771. fimc_md_graph_lock(ve);
  772. mutex_lock(&fimc->lock);
  773. if (fimc_jpeg_fourcc(pix->pixelformat)) {
  774. fimc_capture_try_format(ctx, &pix->width, &pix->height,
  775. NULL, &pix->pixelformat,
  776. FIMC_SD_PAD_SINK_CAM);
  777. ctx->s_frame.f_width = pix->width;
  778. ctx->s_frame.f_height = pix->height;
  779. }
  780. ffmt = fimc_capture_try_format(ctx, &pix->width, &pix->height,
  781. NULL, &pix->pixelformat,
  782. FIMC_SD_PAD_SOURCE);
  783. if (!ffmt) {
  784. ret = -EINVAL;
  785. goto unlock;
  786. }
  787. if (!fimc->vid_cap.user_subdev_api) {
  788. mf.width = pix->width;
  789. mf.height = pix->height;
  790. mf.code = ffmt->mbus_code;
  791. fimc_pipeline_try_format(ctx, &mf, &ffmt, false);
  792. pix->width = mf.width;
  793. pix->height = mf.height;
  794. if (ffmt)
  795. pix->pixelformat = ffmt->fourcc;
  796. }
  797. fimc_adjust_mplane_format(ffmt, pix->width, pix->height, pix);
  798. if (ffmt->flags & FMT_FLAGS_COMPRESSED)
  799. fimc_get_sensor_frame_desc(fimc->pipeline.subdevs[IDX_SENSOR],
  800. pix->plane_fmt, ffmt->memplanes, true);
  801. unlock:
  802. mutex_unlock(&fimc->lock);
  803. fimc_md_graph_unlock(ve);
  804. return ret;
  805. }
  806. static void fimc_capture_mark_jpeg_xfer(struct fimc_ctx *ctx,
  807. enum fimc_color_fmt color)
  808. {
  809. bool jpeg = fimc_fmt_is_user_defined(color);
  810. ctx->scaler.enabled = !jpeg;
  811. fimc_ctrls_activate(ctx, !jpeg);
  812. if (jpeg)
  813. set_bit(ST_CAPT_JPEG, &ctx->fimc_dev->state);
  814. else
  815. clear_bit(ST_CAPT_JPEG, &ctx->fimc_dev->state);
  816. }
  817. static int __fimc_capture_set_format(struct fimc_dev *fimc,
  818. struct v4l2_format *f)
  819. {
  820. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  821. struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp;
  822. struct v4l2_mbus_framefmt *mf = &fimc->vid_cap.ci_fmt;
  823. struct fimc_frame *ff = &ctx->d_frame;
  824. struct fimc_fmt *s_fmt = NULL;
  825. int ret, i;
  826. if (vb2_is_busy(&fimc->vid_cap.vbq))
  827. return -EBUSY;
  828. /* Pre-configure format at camera interface input, for JPEG only */
  829. if (fimc_jpeg_fourcc(pix->pixelformat)) {
  830. fimc_capture_try_format(ctx, &pix->width, &pix->height,
  831. NULL, &pix->pixelformat,
  832. FIMC_SD_PAD_SINK_CAM);
  833. ctx->s_frame.f_width = pix->width;
  834. ctx->s_frame.f_height = pix->height;
  835. }
  836. /* Try the format at the scaler and the DMA output */
  837. ff->fmt = fimc_capture_try_format(ctx, &pix->width, &pix->height,
  838. NULL, &pix->pixelformat,
  839. FIMC_SD_PAD_SOURCE);
  840. if (!ff->fmt)
  841. return -EINVAL;
  842. /* Update RGB Alpha control state and value range */
  843. fimc_alpha_ctrl_update(ctx);
  844. /* Try to match format at the host and the sensor */
  845. if (!fimc->vid_cap.user_subdev_api) {
  846. mf->code = ff->fmt->mbus_code;
  847. mf->width = pix->width;
  848. mf->height = pix->height;
  849. ret = fimc_pipeline_try_format(ctx, mf, &s_fmt, true);
  850. if (ret)
  851. return ret;
  852. pix->width = mf->width;
  853. pix->height = mf->height;
  854. }
  855. fimc_adjust_mplane_format(ff->fmt, pix->width, pix->height, pix);
  856. if (ff->fmt->flags & FMT_FLAGS_COMPRESSED) {
  857. ret = fimc_get_sensor_frame_desc(fimc->pipeline.subdevs[IDX_SENSOR],
  858. pix->plane_fmt, ff->fmt->memplanes,
  859. true);
  860. if (ret < 0)
  861. return ret;
  862. }
  863. for (i = 0; i < ff->fmt->memplanes; i++) {
  864. ff->bytesperline[i] = pix->plane_fmt[i].bytesperline;
  865. ff->payload[i] = pix->plane_fmt[i].sizeimage;
  866. }
  867. set_frame_bounds(ff, pix->width, pix->height);
  868. /* Reset the composition rectangle if not yet configured */
  869. if (!(ctx->state & FIMC_COMPOSE))
  870. set_frame_crop(ff, 0, 0, pix->width, pix->height);
  871. fimc_capture_mark_jpeg_xfer(ctx, ff->fmt->color);
  872. /* Reset cropping and set format at the camera interface input */
  873. if (!fimc->vid_cap.user_subdev_api) {
  874. ctx->s_frame.fmt = s_fmt;
  875. set_frame_bounds(&ctx->s_frame, pix->width, pix->height);
  876. set_frame_crop(&ctx->s_frame, 0, 0, pix->width, pix->height);
  877. }
  878. return ret;
  879. }
  880. static int fimc_cap_s_fmt_mplane(struct file *file, void *priv,
  881. struct v4l2_format *f)
  882. {
  883. struct fimc_dev *fimc = video_drvdata(file);
  884. int ret;
  885. fimc_md_graph_lock(&fimc->vid_cap.ve);
  886. mutex_lock(&fimc->lock);
  887. /*
  888. * The graph is walked within __fimc_capture_set_format() to set
  889. * the format at subdevs thus the graph mutex needs to be held at
  890. * this point and acquired before the video mutex, to avoid AB-BA
  891. * deadlock when fimc_md_link_notify() is called by other thread.
  892. * Ideally the graph walking and setting format at the whole pipeline
  893. * should be removed from this driver and handled in userspace only.
  894. */
  895. ret = __fimc_capture_set_format(fimc, f);
  896. fimc_md_graph_unlock(&fimc->vid_cap.ve);
  897. mutex_unlock(&fimc->lock);
  898. return ret;
  899. }
  900. static int fimc_cap_enum_input(struct file *file, void *priv,
  901. struct v4l2_input *i)
  902. {
  903. struct fimc_dev *fimc = video_drvdata(file);
  904. struct v4l2_subdev *sd = fimc->pipeline.subdevs[IDX_SENSOR];
  905. if (i->index != 0)
  906. return -EINVAL;
  907. i->type = V4L2_INPUT_TYPE_CAMERA;
  908. if (sd)
  909. strlcpy(i->name, sd->name, sizeof(i->name));
  910. return 0;
  911. }
  912. static int fimc_cap_s_input(struct file *file, void *priv, unsigned int i)
  913. {
  914. return i == 0 ? i : -EINVAL;
  915. }
  916. static int fimc_cap_g_input(struct file *file, void *priv, unsigned int *i)
  917. {
  918. *i = 0;
  919. return 0;
  920. }
  921. /**
  922. * fimc_pipeline_validate - check for formats inconsistencies
  923. * between source and sink pad of each link
  924. *
  925. * Return 0 if all formats match or -EPIPE otherwise.
  926. */
  927. static int fimc_pipeline_validate(struct fimc_dev *fimc)
  928. {
  929. struct v4l2_subdev_format sink_fmt, src_fmt;
  930. struct fimc_vid_cap *vc = &fimc->vid_cap;
  931. struct v4l2_subdev *sd = &vc->subdev;
  932. struct media_pad *sink_pad, *src_pad;
  933. int i, ret;
  934. while (1) {
  935. /*
  936. * Find current entity sink pad and any remote sink pad linked
  937. * to it. We stop if there is no sink pad in current entity or
  938. * it is not linked to any other remote entity.
  939. */
  940. src_pad = NULL;
  941. for (i = 0; i < sd->entity.num_pads; i++) {
  942. struct media_pad *p = &sd->entity.pads[i];
  943. if (p->flags & MEDIA_PAD_FL_SINK) {
  944. sink_pad = p;
  945. src_pad = media_entity_remote_pad(sink_pad);
  946. if (src_pad)
  947. break;
  948. }
  949. }
  950. if (src_pad == NULL ||
  951. media_entity_type(src_pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
  952. break;
  953. /* Don't call FIMC subdev operation to avoid nested locking */
  954. if (sd == &vc->subdev) {
  955. struct fimc_frame *ff = &vc->ctx->s_frame;
  956. sink_fmt.format.width = ff->f_width;
  957. sink_fmt.format.height = ff->f_height;
  958. sink_fmt.format.code = ff->fmt ? ff->fmt->mbus_code : 0;
  959. } else {
  960. sink_fmt.pad = sink_pad->index;
  961. sink_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  962. ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &sink_fmt);
  963. if (ret < 0 && ret != -ENOIOCTLCMD)
  964. return -EPIPE;
  965. }
  966. /* Retrieve format at the source pad */
  967. sd = media_entity_to_v4l2_subdev(src_pad->entity);
  968. src_fmt.pad = src_pad->index;
  969. src_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  970. ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &src_fmt);
  971. if (ret < 0 && ret != -ENOIOCTLCMD)
  972. return -EPIPE;
  973. if (src_fmt.format.width != sink_fmt.format.width ||
  974. src_fmt.format.height != sink_fmt.format.height ||
  975. src_fmt.format.code != sink_fmt.format.code)
  976. return -EPIPE;
  977. if (sd == fimc->pipeline.subdevs[IDX_SENSOR] &&
  978. fimc_user_defined_mbus_fmt(src_fmt.format.code)) {
  979. struct v4l2_plane_pix_format plane_fmt[FIMC_MAX_PLANES];
  980. struct fimc_frame *frame = &vc->ctx->d_frame;
  981. unsigned int i;
  982. ret = fimc_get_sensor_frame_desc(sd, plane_fmt,
  983. frame->fmt->memplanes,
  984. false);
  985. if (ret < 0)
  986. return -EPIPE;
  987. for (i = 0; i < frame->fmt->memplanes; i++)
  988. if (frame->payload[i] < plane_fmt[i].sizeimage)
  989. return -EPIPE;
  990. }
  991. }
  992. return 0;
  993. }
  994. static int fimc_cap_streamon(struct file *file, void *priv,
  995. enum v4l2_buf_type type)
  996. {
  997. struct fimc_dev *fimc = video_drvdata(file);
  998. struct fimc_pipeline *p = &fimc->pipeline;
  999. struct fimc_vid_cap *vc = &fimc->vid_cap;
  1000. struct media_entity *entity = &vc->ve.vdev.entity;
  1001. struct fimc_source_info *si = NULL;
  1002. struct v4l2_subdev *sd;
  1003. int ret;
  1004. if (fimc_capture_active(fimc))
  1005. return -EBUSY;
  1006. ret = media_entity_pipeline_start(entity, p->m_pipeline);
  1007. if (ret < 0)
  1008. return ret;
  1009. sd = p->subdevs[IDX_SENSOR];
  1010. if (sd)
  1011. si = v4l2_get_subdev_hostdata(sd);
  1012. if (si == NULL) {
  1013. ret = -EPIPE;
  1014. goto err_p_stop;
  1015. }
  1016. /*
  1017. * Save configuration data related to currently attached image
  1018. * sensor or other data source, e.g. FIMC-IS.
  1019. */
  1020. vc->source_config = *si;
  1021. if (vc->input == GRP_ID_FIMC_IS)
  1022. vc->source_config.fimc_bus_type = FIMC_BUS_TYPE_ISP_WRITEBACK;
  1023. if (vc->user_subdev_api) {
  1024. ret = fimc_pipeline_validate(fimc);
  1025. if (ret < 0)
  1026. goto err_p_stop;
  1027. }
  1028. ret = vb2_ioctl_streamon(file, priv, type);
  1029. if (!ret) {
  1030. vc->streaming = true;
  1031. return ret;
  1032. }
  1033. err_p_stop:
  1034. media_entity_pipeline_stop(entity);
  1035. return ret;
  1036. }
  1037. static int fimc_cap_streamoff(struct file *file, void *priv,
  1038. enum v4l2_buf_type type)
  1039. {
  1040. struct fimc_dev *fimc = video_drvdata(file);
  1041. struct fimc_vid_cap *vc = &fimc->vid_cap;
  1042. int ret;
  1043. ret = vb2_ioctl_streamoff(file, priv, type);
  1044. if (ret < 0)
  1045. return ret;
  1046. media_entity_pipeline_stop(&vc->ve.vdev.entity);
  1047. vc->streaming = false;
  1048. return 0;
  1049. }
  1050. static int fimc_cap_reqbufs(struct file *file, void *priv,
  1051. struct v4l2_requestbuffers *reqbufs)
  1052. {
  1053. struct fimc_dev *fimc = video_drvdata(file);
  1054. int ret;
  1055. ret = vb2_ioctl_reqbufs(file, priv, reqbufs);
  1056. if (!ret)
  1057. fimc->vid_cap.reqbufs_count = reqbufs->count;
  1058. return ret;
  1059. }
  1060. static int fimc_cap_g_selection(struct file *file, void *fh,
  1061. struct v4l2_selection *s)
  1062. {
  1063. struct fimc_dev *fimc = video_drvdata(file);
  1064. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1065. struct fimc_frame *f = &ctx->s_frame;
  1066. if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
  1067. return -EINVAL;
  1068. switch (s->target) {
  1069. case V4L2_SEL_TGT_COMPOSE_DEFAULT:
  1070. case V4L2_SEL_TGT_COMPOSE_BOUNDS:
  1071. f = &ctx->d_frame;
  1072. case V4L2_SEL_TGT_CROP_BOUNDS:
  1073. case V4L2_SEL_TGT_CROP_DEFAULT:
  1074. s->r.left = 0;
  1075. s->r.top = 0;
  1076. s->r.width = f->o_width;
  1077. s->r.height = f->o_height;
  1078. return 0;
  1079. case V4L2_SEL_TGT_COMPOSE:
  1080. f = &ctx->d_frame;
  1081. case V4L2_SEL_TGT_CROP:
  1082. s->r.left = f->offs_h;
  1083. s->r.top = f->offs_v;
  1084. s->r.width = f->width;
  1085. s->r.height = f->height;
  1086. return 0;
  1087. }
  1088. return -EINVAL;
  1089. }
  1090. /* Return 1 if rectangle a is enclosed in rectangle b, or 0 otherwise. */
  1091. static int enclosed_rectangle(struct v4l2_rect *a, struct v4l2_rect *b)
  1092. {
  1093. if (a->left < b->left || a->top < b->top)
  1094. return 0;
  1095. if (a->left + a->width > b->left + b->width)
  1096. return 0;
  1097. if (a->top + a->height > b->top + b->height)
  1098. return 0;
  1099. return 1;
  1100. }
  1101. static int fimc_cap_s_selection(struct file *file, void *fh,
  1102. struct v4l2_selection *s)
  1103. {
  1104. struct fimc_dev *fimc = video_drvdata(file);
  1105. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1106. struct v4l2_rect rect = s->r;
  1107. struct fimc_frame *f;
  1108. unsigned long flags;
  1109. if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
  1110. return -EINVAL;
  1111. if (s->target == V4L2_SEL_TGT_COMPOSE)
  1112. f = &ctx->d_frame;
  1113. else if (s->target == V4L2_SEL_TGT_CROP)
  1114. f = &ctx->s_frame;
  1115. else
  1116. return -EINVAL;
  1117. fimc_capture_try_selection(ctx, &rect, s->target);
  1118. if (s->flags & V4L2_SEL_FLAG_LE &&
  1119. !enclosed_rectangle(&rect, &s->r))
  1120. return -ERANGE;
  1121. if (s->flags & V4L2_SEL_FLAG_GE &&
  1122. !enclosed_rectangle(&s->r, &rect))
  1123. return -ERANGE;
  1124. s->r = rect;
  1125. spin_lock_irqsave(&fimc->slock, flags);
  1126. set_frame_crop(f, s->r.left, s->r.top, s->r.width,
  1127. s->r.height);
  1128. spin_unlock_irqrestore(&fimc->slock, flags);
  1129. set_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  1130. return 0;
  1131. }
  1132. static const struct v4l2_ioctl_ops fimc_capture_ioctl_ops = {
  1133. .vidioc_querycap = fimc_cap_querycap,
  1134. .vidioc_enum_fmt_vid_cap_mplane = fimc_cap_enum_fmt_mplane,
  1135. .vidioc_try_fmt_vid_cap_mplane = fimc_cap_try_fmt_mplane,
  1136. .vidioc_s_fmt_vid_cap_mplane = fimc_cap_s_fmt_mplane,
  1137. .vidioc_g_fmt_vid_cap_mplane = fimc_cap_g_fmt_mplane,
  1138. .vidioc_reqbufs = fimc_cap_reqbufs,
  1139. .vidioc_querybuf = vb2_ioctl_querybuf,
  1140. .vidioc_qbuf = vb2_ioctl_qbuf,
  1141. .vidioc_dqbuf = vb2_ioctl_dqbuf,
  1142. .vidioc_expbuf = vb2_ioctl_expbuf,
  1143. .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
  1144. .vidioc_create_bufs = vb2_ioctl_create_bufs,
  1145. .vidioc_streamon = fimc_cap_streamon,
  1146. .vidioc_streamoff = fimc_cap_streamoff,
  1147. .vidioc_g_selection = fimc_cap_g_selection,
  1148. .vidioc_s_selection = fimc_cap_s_selection,
  1149. .vidioc_enum_input = fimc_cap_enum_input,
  1150. .vidioc_s_input = fimc_cap_s_input,
  1151. .vidioc_g_input = fimc_cap_g_input,
  1152. };
  1153. /* Capture subdev media entity operations */
  1154. static int fimc_link_setup(struct media_entity *entity,
  1155. const struct media_pad *local,
  1156. const struct media_pad *remote, u32 flags)
  1157. {
  1158. struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
  1159. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1160. struct fimc_vid_cap *vc = &fimc->vid_cap;
  1161. struct v4l2_subdev *sensor;
  1162. if (media_entity_type(remote->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
  1163. return -EINVAL;
  1164. if (WARN_ON(fimc == NULL))
  1165. return 0;
  1166. dbg("%s --> %s, flags: 0x%x. input: 0x%x",
  1167. local->entity->name, remote->entity->name, flags,
  1168. fimc->vid_cap.input);
  1169. if (!(flags & MEDIA_LNK_FL_ENABLED)) {
  1170. fimc->vid_cap.input = 0;
  1171. return 0;
  1172. }
  1173. if (vc->input != 0)
  1174. return -EBUSY;
  1175. vc->input = sd->grp_id;
  1176. if (vc->user_subdev_api || vc->inh_sensor_ctrls)
  1177. return 0;
  1178. /* Inherit V4L2 controls from the image sensor subdev. */
  1179. sensor = fimc_find_remote_sensor(&vc->subdev.entity);
  1180. if (sensor == NULL)
  1181. return 0;
  1182. return v4l2_ctrl_add_handler(&vc->ctx->ctrls.handler,
  1183. sensor->ctrl_handler, NULL);
  1184. }
  1185. static const struct media_entity_operations fimc_sd_media_ops = {
  1186. .link_setup = fimc_link_setup,
  1187. };
  1188. /**
  1189. * fimc_sensor_notify - v4l2_device notification from a sensor subdev
  1190. * @sd: pointer to a subdev generating the notification
  1191. * @notification: the notification type, must be S5P_FIMC_TX_END_NOTIFY
  1192. * @arg: pointer to an u32 type integer that stores the frame payload value
  1193. *
  1194. * The End Of Frame notification sent by sensor subdev in its still capture
  1195. * mode. If there is only a single VSYNC generated by the sensor at the
  1196. * beginning of a frame transmission, FIMC does not issue the LastIrq
  1197. * (end of frame) interrupt. And this notification is used to complete the
  1198. * frame capture and returning a buffer to user-space. Subdev drivers should
  1199. * call this notification from their last 'End of frame capture' interrupt.
  1200. */
  1201. void fimc_sensor_notify(struct v4l2_subdev *sd, unsigned int notification,
  1202. void *arg)
  1203. {
  1204. struct fimc_source_info *si;
  1205. struct fimc_vid_buffer *buf;
  1206. struct fimc_md *fmd;
  1207. struct fimc_dev *fimc;
  1208. unsigned long flags;
  1209. if (sd == NULL)
  1210. return;
  1211. si = v4l2_get_subdev_hostdata(sd);
  1212. fmd = entity_to_fimc_mdev(&sd->entity);
  1213. spin_lock_irqsave(&fmd->slock, flags);
  1214. fimc = si ? source_to_sensor_info(si)->host : NULL;
  1215. if (fimc && arg && notification == S5P_FIMC_TX_END_NOTIFY &&
  1216. test_bit(ST_CAPT_PEND, &fimc->state)) {
  1217. unsigned long irq_flags;
  1218. spin_lock_irqsave(&fimc->slock, irq_flags);
  1219. if (!list_empty(&fimc->vid_cap.active_buf_q)) {
  1220. buf = list_entry(fimc->vid_cap.active_buf_q.next,
  1221. struct fimc_vid_buffer, list);
  1222. vb2_set_plane_payload(&buf->vb, 0, *((u32 *)arg));
  1223. }
  1224. fimc_capture_irq_handler(fimc, 1);
  1225. fimc_deactivate_capture(fimc);
  1226. spin_unlock_irqrestore(&fimc->slock, irq_flags);
  1227. }
  1228. spin_unlock_irqrestore(&fmd->slock, flags);
  1229. }
  1230. static int fimc_subdev_enum_mbus_code(struct v4l2_subdev *sd,
  1231. struct v4l2_subdev_fh *fh,
  1232. struct v4l2_subdev_mbus_code_enum *code)
  1233. {
  1234. struct fimc_fmt *fmt;
  1235. fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, code->index);
  1236. if (!fmt)
  1237. return -EINVAL;
  1238. code->code = fmt->mbus_code;
  1239. return 0;
  1240. }
  1241. static int fimc_subdev_get_fmt(struct v4l2_subdev *sd,
  1242. struct v4l2_subdev_fh *fh,
  1243. struct v4l2_subdev_format *fmt)
  1244. {
  1245. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1246. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1247. struct fimc_frame *ff = &ctx->s_frame;
  1248. struct v4l2_mbus_framefmt *mf;
  1249. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  1250. mf = v4l2_subdev_get_try_format(fh, fmt->pad);
  1251. fmt->format = *mf;
  1252. return 0;
  1253. }
  1254. mf = &fmt->format;
  1255. mutex_lock(&fimc->lock);
  1256. switch (fmt->pad) {
  1257. case FIMC_SD_PAD_SOURCE:
  1258. if (!WARN_ON(ff->fmt == NULL))
  1259. mf->code = ff->fmt->mbus_code;
  1260. /* Sink pads crop rectangle size */
  1261. mf->width = ff->width;
  1262. mf->height = ff->height;
  1263. break;
  1264. case FIMC_SD_PAD_SINK_FIFO:
  1265. *mf = fimc->vid_cap.wb_fmt;
  1266. break;
  1267. case FIMC_SD_PAD_SINK_CAM:
  1268. default:
  1269. *mf = fimc->vid_cap.ci_fmt;
  1270. break;
  1271. }
  1272. mutex_unlock(&fimc->lock);
  1273. mf->colorspace = V4L2_COLORSPACE_JPEG;
  1274. return 0;
  1275. }
  1276. static int fimc_subdev_set_fmt(struct v4l2_subdev *sd,
  1277. struct v4l2_subdev_fh *fh,
  1278. struct v4l2_subdev_format *fmt)
  1279. {
  1280. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1281. struct v4l2_mbus_framefmt *mf = &fmt->format;
  1282. struct fimc_vid_cap *vc = &fimc->vid_cap;
  1283. struct fimc_ctx *ctx = vc->ctx;
  1284. struct fimc_frame *ff;
  1285. struct fimc_fmt *ffmt;
  1286. dbg("pad%d: code: 0x%x, %dx%d",
  1287. fmt->pad, mf->code, mf->width, mf->height);
  1288. if (fmt->pad == FIMC_SD_PAD_SOURCE && vb2_is_busy(&vc->vbq))
  1289. return -EBUSY;
  1290. mutex_lock(&fimc->lock);
  1291. ffmt = fimc_capture_try_format(ctx, &mf->width, &mf->height,
  1292. &mf->code, NULL, fmt->pad);
  1293. mutex_unlock(&fimc->lock);
  1294. mf->colorspace = V4L2_COLORSPACE_JPEG;
  1295. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  1296. mf = v4l2_subdev_get_try_format(fh, fmt->pad);
  1297. *mf = fmt->format;
  1298. return 0;
  1299. }
  1300. /* There must be a bug in the driver if this happens */
  1301. if (WARN_ON(ffmt == NULL))
  1302. return -EINVAL;
  1303. /* Update RGB Alpha control state and value range */
  1304. fimc_alpha_ctrl_update(ctx);
  1305. fimc_capture_mark_jpeg_xfer(ctx, ffmt->color);
  1306. if (fmt->pad == FIMC_SD_PAD_SOURCE) {
  1307. ff = &ctx->d_frame;
  1308. /* Sink pads crop rectangle size */
  1309. mf->width = ctx->s_frame.width;
  1310. mf->height = ctx->s_frame.height;
  1311. } else {
  1312. ff = &ctx->s_frame;
  1313. }
  1314. mutex_lock(&fimc->lock);
  1315. set_frame_bounds(ff, mf->width, mf->height);
  1316. if (fmt->pad == FIMC_SD_PAD_SINK_FIFO)
  1317. vc->wb_fmt = *mf;
  1318. else if (fmt->pad == FIMC_SD_PAD_SINK_CAM)
  1319. vc->ci_fmt = *mf;
  1320. ff->fmt = ffmt;
  1321. /* Reset the crop rectangle if required. */
  1322. if (!(fmt->pad == FIMC_SD_PAD_SOURCE && (ctx->state & FIMC_COMPOSE)))
  1323. set_frame_crop(ff, 0, 0, mf->width, mf->height);
  1324. if (fmt->pad != FIMC_SD_PAD_SOURCE)
  1325. ctx->state &= ~FIMC_COMPOSE;
  1326. mutex_unlock(&fimc->lock);
  1327. return 0;
  1328. }
  1329. static int fimc_subdev_get_selection(struct v4l2_subdev *sd,
  1330. struct v4l2_subdev_fh *fh,
  1331. struct v4l2_subdev_selection *sel)
  1332. {
  1333. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1334. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1335. struct fimc_frame *f = &ctx->s_frame;
  1336. struct v4l2_rect *r = &sel->r;
  1337. struct v4l2_rect *try_sel;
  1338. if (sel->pad == FIMC_SD_PAD_SOURCE)
  1339. return -EINVAL;
  1340. mutex_lock(&fimc->lock);
  1341. switch (sel->target) {
  1342. case V4L2_SEL_TGT_COMPOSE_BOUNDS:
  1343. f = &ctx->d_frame;
  1344. case V4L2_SEL_TGT_CROP_BOUNDS:
  1345. r->width = f->o_width;
  1346. r->height = f->o_height;
  1347. r->left = 0;
  1348. r->top = 0;
  1349. mutex_unlock(&fimc->lock);
  1350. return 0;
  1351. case V4L2_SEL_TGT_CROP:
  1352. try_sel = v4l2_subdev_get_try_crop(fh, sel->pad);
  1353. break;
  1354. case V4L2_SEL_TGT_COMPOSE:
  1355. try_sel = v4l2_subdev_get_try_compose(fh, sel->pad);
  1356. f = &ctx->d_frame;
  1357. break;
  1358. default:
  1359. mutex_unlock(&fimc->lock);
  1360. return -EINVAL;
  1361. }
  1362. if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
  1363. sel->r = *try_sel;
  1364. } else {
  1365. r->left = f->offs_h;
  1366. r->top = f->offs_v;
  1367. r->width = f->width;
  1368. r->height = f->height;
  1369. }
  1370. dbg("target %#x: l:%d, t:%d, %dx%d, f_w: %d, f_h: %d",
  1371. sel->pad, r->left, r->top, r->width, r->height,
  1372. f->f_width, f->f_height);
  1373. mutex_unlock(&fimc->lock);
  1374. return 0;
  1375. }
  1376. static int fimc_subdev_set_selection(struct v4l2_subdev *sd,
  1377. struct v4l2_subdev_fh *fh,
  1378. struct v4l2_subdev_selection *sel)
  1379. {
  1380. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1381. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1382. struct fimc_frame *f = &ctx->s_frame;
  1383. struct v4l2_rect *r = &sel->r;
  1384. struct v4l2_rect *try_sel;
  1385. unsigned long flags;
  1386. if (sel->pad == FIMC_SD_PAD_SOURCE)
  1387. return -EINVAL;
  1388. mutex_lock(&fimc->lock);
  1389. fimc_capture_try_selection(ctx, r, V4L2_SEL_TGT_CROP);
  1390. switch (sel->target) {
  1391. case V4L2_SEL_TGT_CROP:
  1392. try_sel = v4l2_subdev_get_try_crop(fh, sel->pad);
  1393. break;
  1394. case V4L2_SEL_TGT_COMPOSE:
  1395. try_sel = v4l2_subdev_get_try_compose(fh, sel->pad);
  1396. f = &ctx->d_frame;
  1397. break;
  1398. default:
  1399. mutex_unlock(&fimc->lock);
  1400. return -EINVAL;
  1401. }
  1402. if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
  1403. *try_sel = sel->r;
  1404. } else {
  1405. spin_lock_irqsave(&fimc->slock, flags);
  1406. set_frame_crop(f, r->left, r->top, r->width, r->height);
  1407. set_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  1408. if (sel->target == V4L2_SEL_TGT_COMPOSE)
  1409. ctx->state |= FIMC_COMPOSE;
  1410. spin_unlock_irqrestore(&fimc->slock, flags);
  1411. }
  1412. dbg("target %#x: (%d,%d)/%dx%d", sel->target, r->left, r->top,
  1413. r->width, r->height);
  1414. mutex_unlock(&fimc->lock);
  1415. return 0;
  1416. }
  1417. static struct v4l2_subdev_pad_ops fimc_subdev_pad_ops = {
  1418. .enum_mbus_code = fimc_subdev_enum_mbus_code,
  1419. .get_selection = fimc_subdev_get_selection,
  1420. .set_selection = fimc_subdev_set_selection,
  1421. .get_fmt = fimc_subdev_get_fmt,
  1422. .set_fmt = fimc_subdev_set_fmt,
  1423. };
  1424. static struct v4l2_subdev_ops fimc_subdev_ops = {
  1425. .pad = &fimc_subdev_pad_ops,
  1426. };
  1427. /* Set default format at the sensor and host interface */
  1428. static int fimc_capture_set_default_format(struct fimc_dev *fimc)
  1429. {
  1430. struct v4l2_format fmt = {
  1431. .type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE,
  1432. .fmt.pix_mp = {
  1433. .width = 640,
  1434. .height = 480,
  1435. .pixelformat = V4L2_PIX_FMT_YUYV,
  1436. .field = V4L2_FIELD_NONE,
  1437. .colorspace = V4L2_COLORSPACE_JPEG,
  1438. },
  1439. };
  1440. return __fimc_capture_set_format(fimc, &fmt);
  1441. }
  1442. /* fimc->lock must be already initialized */
  1443. static int fimc_register_capture_device(struct fimc_dev *fimc,
  1444. struct v4l2_device *v4l2_dev)
  1445. {
  1446. struct video_device *vfd = &fimc->vid_cap.ve.vdev;
  1447. struct vb2_queue *q = &fimc->vid_cap.vbq;
  1448. struct fimc_ctx *ctx;
  1449. struct fimc_vid_cap *vid_cap;
  1450. int ret = -ENOMEM;
  1451. ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
  1452. if (!ctx)
  1453. return -ENOMEM;
  1454. ctx->fimc_dev = fimc;
  1455. ctx->in_path = FIMC_IO_CAMERA;
  1456. ctx->out_path = FIMC_IO_DMA;
  1457. ctx->state = FIMC_CTX_CAP;
  1458. ctx->s_frame.fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, 0);
  1459. ctx->d_frame.fmt = ctx->s_frame.fmt;
  1460. memset(vfd, 0, sizeof(*vfd));
  1461. snprintf(vfd->name, sizeof(vfd->name), "fimc.%d.capture", fimc->id);
  1462. vfd->fops = &fimc_capture_fops;
  1463. vfd->ioctl_ops = &fimc_capture_ioctl_ops;
  1464. vfd->v4l2_dev = v4l2_dev;
  1465. vfd->minor = -1;
  1466. vfd->release = video_device_release_empty;
  1467. vfd->queue = q;
  1468. vfd->lock = &fimc->lock;
  1469. video_set_drvdata(vfd, fimc);
  1470. vid_cap = &fimc->vid_cap;
  1471. vid_cap->active_buf_cnt = 0;
  1472. vid_cap->reqbufs_count = 0;
  1473. vid_cap->ctx = ctx;
  1474. INIT_LIST_HEAD(&vid_cap->pending_buf_q);
  1475. INIT_LIST_HEAD(&vid_cap->active_buf_q);
  1476. memset(q, 0, sizeof(*q));
  1477. q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
  1478. q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF;
  1479. q->drv_priv = ctx;
  1480. q->ops = &fimc_capture_qops;
  1481. q->mem_ops = &vb2_dma_contig_memops;
  1482. q->buf_struct_size = sizeof(struct fimc_vid_buffer);
  1483. q->timestamp_type = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
  1484. q->lock = &fimc->lock;
  1485. ret = vb2_queue_init(q);
  1486. if (ret)
  1487. goto err_free_ctx;
  1488. vid_cap->vd_pad.flags = MEDIA_PAD_FL_SINK;
  1489. ret = media_entity_init(&vfd->entity, 1, &vid_cap->vd_pad, 0);
  1490. if (ret)
  1491. goto err_free_ctx;
  1492. ret = fimc_ctrls_create(ctx);
  1493. if (ret)
  1494. goto err_me_cleanup;
  1495. /*
  1496. * For proper order of acquiring/releasing the video
  1497. * and the graph mutex.
  1498. */
  1499. v4l2_disable_ioctl_locking(vfd, VIDIOC_TRY_FMT);
  1500. v4l2_disable_ioctl_locking(vfd, VIDIOC_S_FMT);
  1501. ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);
  1502. if (ret)
  1503. goto err_ctrl_free;
  1504. v4l2_info(v4l2_dev, "Registered %s as /dev/%s\n",
  1505. vfd->name, video_device_node_name(vfd));
  1506. vfd->ctrl_handler = &ctx->ctrls.handler;
  1507. return 0;
  1508. err_ctrl_free:
  1509. fimc_ctrls_delete(ctx);
  1510. err_me_cleanup:
  1511. media_entity_cleanup(&vfd->entity);
  1512. err_free_ctx:
  1513. kfree(ctx);
  1514. return ret;
  1515. }
  1516. static int fimc_capture_subdev_registered(struct v4l2_subdev *sd)
  1517. {
  1518. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1519. int ret;
  1520. if (fimc == NULL)
  1521. return -ENXIO;
  1522. ret = fimc_register_m2m_device(fimc, sd->v4l2_dev);
  1523. if (ret)
  1524. return ret;
  1525. fimc->pipeline_ops = v4l2_get_subdev_hostdata(sd);
  1526. ret = fimc_register_capture_device(fimc, sd->v4l2_dev);
  1527. if (ret) {
  1528. fimc_unregister_m2m_device(fimc);
  1529. fimc->pipeline_ops = NULL;
  1530. }
  1531. return ret;
  1532. }
  1533. static void fimc_capture_subdev_unregistered(struct v4l2_subdev *sd)
  1534. {
  1535. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1536. struct video_device *vdev;
  1537. if (fimc == NULL)
  1538. return;
  1539. fimc_unregister_m2m_device(fimc);
  1540. vdev = &fimc->vid_cap.ve.vdev;
  1541. if (video_is_registered(vdev)) {
  1542. video_unregister_device(vdev);
  1543. media_entity_cleanup(&vdev->entity);
  1544. fimc_ctrls_delete(fimc->vid_cap.ctx);
  1545. fimc->pipeline_ops = NULL;
  1546. }
  1547. kfree(fimc->vid_cap.ctx);
  1548. fimc->vid_cap.ctx = NULL;
  1549. }
  1550. static const struct v4l2_subdev_internal_ops fimc_capture_sd_internal_ops = {
  1551. .registered = fimc_capture_subdev_registered,
  1552. .unregistered = fimc_capture_subdev_unregistered,
  1553. };
  1554. int fimc_initialize_capture_subdev(struct fimc_dev *fimc)
  1555. {
  1556. struct v4l2_subdev *sd = &fimc->vid_cap.subdev;
  1557. int ret;
  1558. v4l2_subdev_init(sd, &fimc_subdev_ops);
  1559. sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
  1560. snprintf(sd->name, sizeof(sd->name), "FIMC.%d", fimc->id);
  1561. fimc->vid_cap.sd_pads[FIMC_SD_PAD_SINK_CAM].flags = MEDIA_PAD_FL_SINK;
  1562. fimc->vid_cap.sd_pads[FIMC_SD_PAD_SINK_FIFO].flags = MEDIA_PAD_FL_SINK;
  1563. fimc->vid_cap.sd_pads[FIMC_SD_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
  1564. ret = media_entity_init(&sd->entity, FIMC_SD_PADS_NUM,
  1565. fimc->vid_cap.sd_pads, 0);
  1566. if (ret)
  1567. return ret;
  1568. sd->entity.ops = &fimc_sd_media_ops;
  1569. sd->internal_ops = &fimc_capture_sd_internal_ops;
  1570. v4l2_set_subdevdata(sd, fimc);
  1571. return 0;
  1572. }
  1573. void fimc_unregister_capture_subdev(struct fimc_dev *fimc)
  1574. {
  1575. struct v4l2_subdev *sd = &fimc->vid_cap.subdev;
  1576. v4l2_device_unregister_subdev(sd);
  1577. media_entity_cleanup(&sd->entity);
  1578. v4l2_set_subdevdata(sd, NULL);
  1579. }