entry64.S 30 KB

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  1. /*
  2. * arch/s390/kernel/entry64.S
  3. * S390 low-level entry points.
  4. *
  5. * Copyright (C) IBM Corp. 1999,2006
  6. * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
  7. * Hartmut Penner (hp@de.ibm.com),
  8. * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
  9. * Heiko Carstens <heiko.carstens@de.ibm.com>
  10. */
  11. #include <linux/linkage.h>
  12. #include <linux/init.h>
  13. #include <asm/cache.h>
  14. #include <asm/errno.h>
  15. #include <asm/ptrace.h>
  16. #include <asm/thread_info.h>
  17. #include <asm/asm-offsets.h>
  18. #include <asm/unistd.h>
  19. #include <asm/page.h>
  20. /*
  21. * Stack layout for the system_call stack entry.
  22. * The first few entries are identical to the user_regs_struct.
  23. */
  24. SP_PTREGS = STACK_FRAME_OVERHEAD
  25. SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS
  26. SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW
  27. SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS
  28. SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8
  29. SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16
  30. SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24
  31. SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32
  32. SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40
  33. SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48
  34. SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56
  35. SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 64
  36. SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 72
  37. SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 80
  38. SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 88
  39. SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 96
  40. SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 104
  41. SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 112
  42. SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 120
  43. SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2
  44. SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC
  45. SP_SVCNR = STACK_FRAME_OVERHEAD + __PT_SVCNR
  46. SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE
  47. STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
  48. STACK_SIZE = 1 << STACK_SHIFT
  49. _TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
  50. _TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_SINGLE_STEP )
  51. _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
  52. _TIF_MCCK_PENDING)
  53. _TIF_SYSCALL = (_TIF_SYSCALL_TRACE>>8 | _TIF_SYSCALL_AUDIT>>8 | \
  54. _TIF_SECCOMP>>8 | _TIF_SYSCALL_TRACEPOINT>>8)
  55. #define BASED(name) name-system_call(%r13)
  56. #ifdef CONFIG_TRACE_IRQFLAGS
  57. .macro TRACE_IRQS_ON
  58. basr %r2,%r0
  59. brasl %r14,trace_hardirqs_on_caller
  60. .endm
  61. .macro TRACE_IRQS_OFF
  62. basr %r2,%r0
  63. brasl %r14,trace_hardirqs_off_caller
  64. .endm
  65. .macro TRACE_IRQS_CHECK
  66. basr %r2,%r0
  67. tm SP_PSW(%r15),0x03 # irqs enabled?
  68. jz 0f
  69. brasl %r14,trace_hardirqs_on_caller
  70. j 1f
  71. 0: brasl %r14,trace_hardirqs_off_caller
  72. 1:
  73. .endm
  74. #else
  75. #define TRACE_IRQS_ON
  76. #define TRACE_IRQS_OFF
  77. #define TRACE_IRQS_CHECK
  78. #endif
  79. #ifdef CONFIG_LOCKDEP
  80. .macro LOCKDEP_SYS_EXIT
  81. tm SP_PSW+1(%r15),0x01 # returning to user ?
  82. jz 0f
  83. brasl %r14,lockdep_sys_exit
  84. 0:
  85. .endm
  86. #else
  87. #define LOCKDEP_SYS_EXIT
  88. #endif
  89. .macro UPDATE_VTIME lc_from,lc_to,lc_sum
  90. lg %r10,\lc_from
  91. slg %r10,\lc_to
  92. alg %r10,\lc_sum
  93. stg %r10,\lc_sum
  94. .endm
  95. /*
  96. * Register usage in interrupt handlers:
  97. * R9 - pointer to current task structure
  98. * R13 - pointer to literal pool
  99. * R14 - return register for function calls
  100. * R15 - kernel stack pointer
  101. */
  102. .macro SAVE_ALL_BASE savearea
  103. stmg %r12,%r15,\savearea
  104. larl %r13,system_call
  105. .endm
  106. .macro SAVE_ALL_SVC psworg,savearea
  107. la %r12,\psworg
  108. lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
  109. .endm
  110. .macro SAVE_ALL_SYNC psworg,savearea
  111. la %r12,\psworg
  112. tm \psworg+1,0x01 # test problem state bit
  113. jz 2f # skip stack setup save
  114. lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
  115. #ifdef CONFIG_CHECK_STACK
  116. j 3f
  117. 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
  118. jz stack_overflow
  119. 3:
  120. #endif
  121. 2:
  122. .endm
  123. .macro SAVE_ALL_ASYNC psworg,savearea
  124. la %r12,\psworg
  125. tm \psworg+1,0x01 # test problem state bit
  126. jnz 1f # from user -> load kernel stack
  127. clc \psworg+8(8),BASED(.Lcritical_end)
  128. jhe 0f
  129. clc \psworg+8(8),BASED(.Lcritical_start)
  130. jl 0f
  131. brasl %r14,cleanup_critical
  132. tm 1(%r12),0x01 # retest problem state after cleanup
  133. jnz 1f
  134. 0: lg %r14,__LC_ASYNC_STACK # are we already on the async. stack ?
  135. slgr %r14,%r15
  136. srag %r14,%r14,STACK_SHIFT
  137. jz 2f
  138. 1: lg %r15,__LC_ASYNC_STACK # load async stack
  139. #ifdef CONFIG_CHECK_STACK
  140. j 3f
  141. 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
  142. jz stack_overflow
  143. 3:
  144. #endif
  145. 2:
  146. .endm
  147. .macro CREATE_STACK_FRAME psworg,savearea
  148. aghi %r15,-SP_SIZE # make room for registers & psw
  149. mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
  150. stg %r2,SP_ORIG_R2(%r15) # store original content of gpr 2
  151. icm %r12,3,__LC_SVC_ILC
  152. stmg %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
  153. st %r12,SP_SVCNR(%r15)
  154. mvc SP_R12(32,%r15),\savearea # move %r12-%r15 to stack
  155. la %r12,0
  156. stg %r12,__SF_BACKCHAIN(%r15)
  157. .endm
  158. .macro RESTORE_ALL psworg,sync
  159. mvc \psworg(16),SP_PSW(%r15) # move user PSW to lowcore
  160. .if !\sync
  161. ni \psworg+1,0xfd # clear wait state bit
  162. .endif
  163. lg %r14,__LC_VDSO_PER_CPU
  164. lmg %r0,%r13,SP_R0(%r15) # load gprs 0-13 of user
  165. stpt __LC_EXIT_TIMER
  166. mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
  167. lmg %r14,%r15,SP_R14(%r15) # load grps 14-15 of user
  168. lpswe \psworg # back to caller
  169. .endm
  170. /*
  171. * Scheduler resume function, called by switch_to
  172. * gpr2 = (task_struct *) prev
  173. * gpr3 = (task_struct *) next
  174. * Returns:
  175. * gpr2 = prev
  176. */
  177. .globl __switch_to
  178. __switch_to:
  179. tm __THREAD_per+4(%r3),0xe8 # is the new process using per ?
  180. jz __switch_to_noper # if not we're fine
  181. stctg %c9,%c11,__SF_EMPTY(%r15)# We are using per stuff
  182. clc __THREAD_per(24,%r3),__SF_EMPTY(%r15)
  183. je __switch_to_noper # we got away without bashing TLB's
  184. lctlg %c9,%c11,__THREAD_per(%r3) # Nope we didn't
  185. __switch_to_noper:
  186. lg %r4,__THREAD_info(%r2) # get thread_info of prev
  187. tm __TI_flags+7(%r4),_TIF_MCCK_PENDING # machine check pending?
  188. jz __switch_to_no_mcck
  189. ni __TI_flags+7(%r4),255-_TIF_MCCK_PENDING # clear flag in prev
  190. lg %r4,__THREAD_info(%r3) # get thread_info of next
  191. oi __TI_flags+7(%r4),_TIF_MCCK_PENDING # set it in next
  192. __switch_to_no_mcck:
  193. stmg %r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task
  194. stg %r15,__THREAD_ksp(%r2) # store kernel stack to prev->tss.ksp
  195. lg %r15,__THREAD_ksp(%r3) # load kernel stack from next->tss.ksp
  196. lmg %r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task
  197. stg %r3,__LC_CURRENT # __LC_CURRENT = current task struct
  198. lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4
  199. lg %r3,__THREAD_info(%r3) # load thread_info from task struct
  200. stg %r3,__LC_THREAD_INFO
  201. aghi %r3,STACK_SIZE
  202. stg %r3,__LC_KERNEL_STACK # __LC_KERNEL_STACK = new kernel stack
  203. br %r14
  204. __critical_start:
  205. /*
  206. * SVC interrupt handler routine. System calls are synchronous events and
  207. * are executed with interrupts enabled.
  208. */
  209. .globl system_call
  210. system_call:
  211. stpt __LC_SYNC_ENTER_TIMER
  212. sysc_saveall:
  213. SAVE_ALL_BASE __LC_SAVE_AREA
  214. SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
  215. CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
  216. llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore
  217. sysc_vtime:
  218. UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
  219. sysc_stime:
  220. UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
  221. sysc_update:
  222. mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
  223. sysc_do_svc:
  224. lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
  225. ltgr %r7,%r7 # test for svc 0
  226. jnz sysc_nr_ok
  227. # svc 0: system call number in %r1
  228. cl %r1,BASED(.Lnr_syscalls)
  229. jnl sysc_nr_ok
  230. lgfr %r7,%r1 # clear high word in r1
  231. sysc_nr_ok:
  232. mvc SP_ARGS(8,%r15),SP_R7(%r15)
  233. sysc_do_restart:
  234. sth %r7,SP_SVCNR(%r15)
  235. sllg %r7,%r7,2 # svc number * 4
  236. larl %r10,sys_call_table
  237. #ifdef CONFIG_COMPAT
  238. tm __TI_flags+5(%r9),(_TIF_31BIT>>16) # running in 31 bit mode ?
  239. jno sysc_noemu
  240. larl %r10,sys_call_table_emu # use 31 bit emulation system calls
  241. sysc_noemu:
  242. #endif
  243. tm __TI_flags+6(%r9),_TIF_SYSCALL
  244. lgf %r8,0(%r7,%r10) # load address of system call routine
  245. jnz sysc_tracesys
  246. basr %r14,%r8 # call sys_xxxx
  247. stg %r2,SP_R2(%r15) # store return value (change R2 on stack)
  248. sysc_return:
  249. tm __TI_flags+7(%r9),_TIF_WORK_SVC
  250. jnz sysc_work # there is work to do (signals etc.)
  251. sysc_restore:
  252. #ifdef CONFIG_TRACE_IRQFLAGS
  253. larl %r1,sysc_restore_trace_psw
  254. lpswe 0(%r1)
  255. sysc_restore_trace:
  256. TRACE_IRQS_CHECK
  257. LOCKDEP_SYS_EXIT
  258. #endif
  259. sysc_leave:
  260. RESTORE_ALL __LC_RETURN_PSW,1
  261. sysc_done:
  262. #ifdef CONFIG_TRACE_IRQFLAGS
  263. .section .data,"aw",@progbits
  264. .align 8
  265. .globl sysc_restore_trace_psw
  266. sysc_restore_trace_psw:
  267. .quad 0, sysc_restore_trace
  268. .previous
  269. #endif
  270. #
  271. # There is work to do, but first we need to check if we return to userspace.
  272. #
  273. sysc_work:
  274. tm SP_PSW+1(%r15),0x01 # returning to user ?
  275. jno sysc_restore
  276. #
  277. # One of the work bits is on. Find out which one.
  278. #
  279. sysc_work_loop:
  280. tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
  281. jo sysc_mcck_pending
  282. tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
  283. jo sysc_reschedule
  284. tm __TI_flags+7(%r9),_TIF_SIGPENDING
  285. jo sysc_sigpending
  286. tm __TI_flags+7(%r9),_TIF_NOTIFY_RESUME
  287. jo sysc_notify_resume
  288. tm __TI_flags+7(%r9),_TIF_RESTART_SVC
  289. jo sysc_restart
  290. tm __TI_flags+7(%r9),_TIF_SINGLE_STEP
  291. jo sysc_singlestep
  292. j sysc_return # beware of critical section cleanup
  293. #
  294. # _TIF_NEED_RESCHED is set, call schedule
  295. #
  296. sysc_reschedule:
  297. larl %r14,sysc_work_loop
  298. jg schedule # return point is sysc_work_loop
  299. #
  300. # _TIF_MCCK_PENDING is set, call handler
  301. #
  302. sysc_mcck_pending:
  303. larl %r14,sysc_work_loop
  304. jg s390_handle_mcck # TIF bit will be cleared by handler
  305. #
  306. # _TIF_SIGPENDING is set, call do_signal
  307. #
  308. sysc_sigpending:
  309. ni __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
  310. la %r2,SP_PTREGS(%r15) # load pt_regs
  311. brasl %r14,do_signal # call do_signal
  312. tm __TI_flags+7(%r9),_TIF_RESTART_SVC
  313. jo sysc_restart
  314. tm __TI_flags+7(%r9),_TIF_SINGLE_STEP
  315. jo sysc_singlestep
  316. j sysc_work_loop
  317. #
  318. # _TIF_NOTIFY_RESUME is set, call do_notify_resume
  319. #
  320. sysc_notify_resume:
  321. la %r2,SP_PTREGS(%r15) # load pt_regs
  322. larl %r14,sysc_work_loop
  323. jg do_notify_resume # call do_notify_resume
  324. #
  325. # _TIF_RESTART_SVC is set, set up registers and restart svc
  326. #
  327. sysc_restart:
  328. ni __TI_flags+7(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC
  329. lg %r7,SP_R2(%r15) # load new svc number
  330. mvc SP_R2(8,%r15),SP_ORIG_R2(%r15) # restore first argument
  331. lmg %r2,%r6,SP_R2(%r15) # load svc arguments
  332. j sysc_do_restart # restart svc
  333. #
  334. # _TIF_SINGLE_STEP is set, call do_single_step
  335. #
  336. sysc_singlestep:
  337. ni __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
  338. xc SP_SVCNR(2,%r15),SP_SVCNR(%r15) # clear svc number
  339. la %r2,SP_PTREGS(%r15) # address of register-save area
  340. larl %r14,sysc_work_loop # load adr. of system return
  341. jg do_single_step # branch to do_sigtrap
  342. #
  343. # call tracehook_report_syscall_entry/tracehook_report_syscall_exit before
  344. # and after the system call
  345. #
  346. sysc_tracesys:
  347. la %r2,SP_PTREGS(%r15) # load pt_regs
  348. la %r3,0
  349. srl %r7,2
  350. stg %r7,SP_R2(%r15)
  351. brasl %r14,do_syscall_trace_enter
  352. lghi %r0,NR_syscalls
  353. clgr %r0,%r2
  354. jnh sysc_tracenogo
  355. sllg %r7,%r2,2 # svc number *4
  356. lgf %r8,0(%r7,%r10)
  357. sysc_tracego:
  358. lmg %r3,%r6,SP_R3(%r15)
  359. lg %r2,SP_ORIG_R2(%r15)
  360. basr %r14,%r8 # call sys_xxx
  361. stg %r2,SP_R2(%r15) # store return value
  362. sysc_tracenogo:
  363. tm __TI_flags+6(%r9),_TIF_SYSCALL
  364. jz sysc_return
  365. la %r2,SP_PTREGS(%r15) # load pt_regs
  366. larl %r14,sysc_return # return point is sysc_return
  367. jg do_syscall_trace_exit
  368. #
  369. # a new process exits the kernel with ret_from_fork
  370. #
  371. .globl ret_from_fork
  372. ret_from_fork:
  373. lg %r13,__LC_SVC_NEW_PSW+8
  374. lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
  375. tm SP_PSW+1(%r15),0x01 # forking a kernel thread ?
  376. jo 0f
  377. stg %r15,SP_R15(%r15) # store stack pointer for new kthread
  378. 0: brasl %r14,schedule_tail
  379. TRACE_IRQS_ON
  380. stosm 24(%r15),0x03 # reenable interrupts
  381. j sysc_tracenogo
  382. #
  383. # kernel_execve function needs to deal with pt_regs that is not
  384. # at the usual place
  385. #
  386. .globl kernel_execve
  387. kernel_execve:
  388. stmg %r12,%r15,96(%r15)
  389. lgr %r14,%r15
  390. aghi %r15,-SP_SIZE
  391. stg %r14,__SF_BACKCHAIN(%r15)
  392. la %r12,SP_PTREGS(%r15)
  393. xc 0(__PT_SIZE,%r12),0(%r12)
  394. lgr %r5,%r12
  395. brasl %r14,do_execve
  396. ltgfr %r2,%r2
  397. je 0f
  398. aghi %r15,SP_SIZE
  399. lmg %r12,%r15,96(%r15)
  400. br %r14
  401. # execve succeeded.
  402. 0: stnsm __SF_EMPTY(%r15),0xfc # disable interrupts
  403. lg %r15,__LC_KERNEL_STACK # load ksp
  404. aghi %r15,-SP_SIZE # make room for registers & psw
  405. lg %r13,__LC_SVC_NEW_PSW+8
  406. lg %r9,__LC_THREAD_INFO
  407. mvc SP_PTREGS(__PT_SIZE,%r15),0(%r12) # copy pt_regs
  408. xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
  409. stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
  410. brasl %r14,execve_tail
  411. j sysc_return
  412. /*
  413. * Program check handler routine
  414. */
  415. .globl pgm_check_handler
  416. pgm_check_handler:
  417. /*
  418. * First we need to check for a special case:
  419. * Single stepping an instruction that disables the PER event mask will
  420. * cause a PER event AFTER the mask has been set. Example: SVC or LPSW.
  421. * For a single stepped SVC the program check handler gets control after
  422. * the SVC new PSW has been loaded. But we want to execute the SVC first and
  423. * then handle the PER event. Therefore we update the SVC old PSW to point
  424. * to the pgm_check_handler and branch to the SVC handler after we checked
  425. * if we have to load the kernel stack register.
  426. * For every other possible cause for PER event without the PER mask set
  427. * we just ignore the PER event (FIXME: is there anything we have to do
  428. * for LPSW?).
  429. */
  430. stpt __LC_SYNC_ENTER_TIMER
  431. SAVE_ALL_BASE __LC_SAVE_AREA
  432. tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
  433. jnz pgm_per # got per exception -> special case
  434. SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
  435. CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
  436. tm SP_PSW+1(%r15),0x01 # interrupting from user ?
  437. jz pgm_no_vtime
  438. UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
  439. UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
  440. mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
  441. pgm_no_vtime:
  442. lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
  443. mvc SP_ARGS(8,%r15),__LC_LAST_BREAK
  444. TRACE_IRQS_OFF
  445. lgf %r3,__LC_PGM_ILC # load program interruption code
  446. lghi %r8,0x7f
  447. ngr %r8,%r3
  448. pgm_do_call:
  449. sll %r8,3
  450. larl %r1,pgm_check_table
  451. lg %r1,0(%r8,%r1) # load address of handler routine
  452. la %r2,SP_PTREGS(%r15) # address of register-save area
  453. larl %r14,sysc_return
  454. br %r1 # branch to interrupt-handler
  455. #
  456. # handle per exception
  457. #
  458. pgm_per:
  459. tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on
  460. jnz pgm_per_std # ok, normal per event from user space
  461. # ok its one of the special cases, now we need to find out which one
  462. clc __LC_PGM_OLD_PSW(16),__LC_SVC_NEW_PSW
  463. je pgm_svcper
  464. # no interesting special case, ignore PER event
  465. lmg %r12,%r15,__LC_SAVE_AREA
  466. lpswe __LC_PGM_OLD_PSW
  467. #
  468. # Normal per exception
  469. #
  470. pgm_per_std:
  471. SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
  472. CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
  473. tm SP_PSW+1(%r15),0x01 # interrupting from user ?
  474. jz pgm_no_vtime2
  475. UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
  476. UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
  477. mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
  478. pgm_no_vtime2:
  479. lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
  480. TRACE_IRQS_OFF
  481. lg %r1,__TI_task(%r9)
  482. tm SP_PSW+1(%r15),0x01 # kernel per event ?
  483. jz kernel_per
  484. mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
  485. mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS
  486. mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
  487. oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
  488. lgf %r3,__LC_PGM_ILC # load program interruption code
  489. lghi %r8,0x7f
  490. ngr %r8,%r3 # clear per-event-bit and ilc
  491. je sysc_return
  492. j pgm_do_call
  493. #
  494. # it was a single stepped SVC that is causing all the trouble
  495. #
  496. pgm_svcper:
  497. SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
  498. CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
  499. UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
  500. UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
  501. mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
  502. llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore
  503. lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
  504. lg %r8,__TI_task(%r9)
  505. mvc __THREAD_per+__PER_atmid(2,%r8),__LC_PER_ATMID
  506. mvc __THREAD_per+__PER_address(8,%r8),__LC_PER_ADDRESS
  507. mvc __THREAD_per+__PER_access_id(1,%r8),__LC_PER_ACCESS_ID
  508. oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
  509. TRACE_IRQS_ON
  510. lmg %r2,%r6,SP_R2(%r15) # load svc arguments
  511. stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
  512. j sysc_do_svc
  513. #
  514. # per was called from kernel, must be kprobes
  515. #
  516. kernel_per:
  517. xc SP_SVCNR(2,%r15),SP_SVCNR(%r15) # clear svc number
  518. la %r2,SP_PTREGS(%r15) # address of register-save area
  519. larl %r14,sysc_restore # load adr. of system ret, no work
  520. jg do_single_step # branch to do_single_step
  521. /*
  522. * IO interrupt handler routine
  523. */
  524. .globl io_int_handler
  525. io_int_handler:
  526. stck __LC_INT_CLOCK
  527. stpt __LC_ASYNC_ENTER_TIMER
  528. SAVE_ALL_BASE __LC_SAVE_AREA+32
  529. SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+32
  530. CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+32
  531. tm SP_PSW+1(%r15),0x01 # interrupting from user ?
  532. jz io_no_vtime
  533. UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
  534. UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
  535. mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
  536. io_no_vtime:
  537. lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
  538. TRACE_IRQS_OFF
  539. la %r2,SP_PTREGS(%r15) # address of register-save area
  540. brasl %r14,do_IRQ # call standard irq handler
  541. io_return:
  542. tm __TI_flags+7(%r9),_TIF_WORK_INT
  543. jnz io_work # there is work to do (signals etc.)
  544. io_restore:
  545. #ifdef CONFIG_TRACE_IRQFLAGS
  546. larl %r1,io_restore_trace_psw
  547. lpswe 0(%r1)
  548. io_restore_trace:
  549. TRACE_IRQS_CHECK
  550. LOCKDEP_SYS_EXIT
  551. #endif
  552. io_leave:
  553. RESTORE_ALL __LC_RETURN_PSW,0
  554. io_done:
  555. #ifdef CONFIG_TRACE_IRQFLAGS
  556. .section .data,"aw",@progbits
  557. .align 8
  558. .globl io_restore_trace_psw
  559. io_restore_trace_psw:
  560. .quad 0, io_restore_trace
  561. .previous
  562. #endif
  563. #
  564. # There is work todo, find out in which context we have been interrupted:
  565. # 1) if we return to user space we can do all _TIF_WORK_INT work
  566. # 2) if we return to kernel code and kvm is enabled check if we need to
  567. # modify the psw to leave SIE
  568. # 3) if we return to kernel code and preemptive scheduling is enabled check
  569. # the preemption counter and if it is zero call preempt_schedule_irq
  570. # Before any work can be done, a switch to the kernel stack is required.
  571. #
  572. io_work:
  573. tm SP_PSW+1(%r15),0x01 # returning to user ?
  574. jo io_work_user # yes -> do resched & signal
  575. #if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE)
  576. lg %r2,SP_PSW+8(%r15) # check if current instruction is SIE
  577. lh %r1,0(%r2)
  578. chi %r1,-19948 # signed 16 bit compare with 0xb214
  579. jne 0f # no -> leave PSW alone
  580. aghi %r2,4 # yes-> add 4 bytes to leave SIE
  581. stg %r2,SP_PSW+8(%r15)
  582. 0:
  583. #endif
  584. #ifdef CONFIG_PREEMPT
  585. # check for preemptive scheduling
  586. icm %r0,15,__TI_precount(%r9)
  587. jnz io_restore # preemption is disabled
  588. # switch to kernel stack
  589. lg %r1,SP_R15(%r15)
  590. aghi %r1,-SP_SIZE
  591. mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
  592. xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
  593. lgr %r15,%r1
  594. io_resume_loop:
  595. larl %r14,io_resume_loop
  596. tm __TI_flags+7(%r12),_TIF_NEED_RESCHED
  597. jgo preempt_schedule_irq
  598. #endif
  599. j io_restore
  600. #
  601. # Need to do work before returning to userspace, switch to kernel stack
  602. #
  603. io_work_user:
  604. lg %r1,__LC_KERNEL_STACK
  605. aghi %r1,-SP_SIZE
  606. mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
  607. xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
  608. lgr %r15,%r1
  609. #
  610. # One of the work bits is on. Find out which one.
  611. # Checked are: _TIF_SIGPENDING, _TIF_NOTIFY_RESUME, _TIF_NEED_RESCHED
  612. # and _TIF_MCCK_PENDING
  613. #
  614. io_work_loop:
  615. tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
  616. jo io_mcck_pending
  617. tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
  618. jo io_reschedule
  619. tm __TI_flags+7(%r9),_TIF_SIGPENDING
  620. jo io_sigpending
  621. tm __TI_flags+7(%r9),_TIF_NOTIFY_RESUME
  622. jo io_notify_resume
  623. j io_return # beware of critical section cleanup
  624. #
  625. # _TIF_MCCK_PENDING is set, call handler
  626. #
  627. io_mcck_pending:
  628. brasl %r14,s390_handle_mcck # TIF bit will be cleared by handler
  629. j io_work_loop
  630. #
  631. # _TIF_NEED_RESCHED is set, call schedule
  632. #
  633. io_reschedule:
  634. TRACE_IRQS_ON
  635. stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
  636. brasl %r14,schedule # call scheduler
  637. stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
  638. TRACE_IRQS_OFF
  639. j io_work_loop
  640. #
  641. # _TIF_SIGPENDING or is set, call do_signal
  642. #
  643. io_sigpending:
  644. TRACE_IRQS_ON
  645. stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
  646. la %r2,SP_PTREGS(%r15) # load pt_regs
  647. brasl %r14,do_signal # call do_signal
  648. stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
  649. TRACE_IRQS_OFF
  650. j io_work_loop
  651. #
  652. # _TIF_NOTIFY_RESUME or is set, call do_notify_resume
  653. #
  654. io_notify_resume:
  655. TRACE_IRQS_ON
  656. stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
  657. la %r2,SP_PTREGS(%r15) # load pt_regs
  658. brasl %r14,do_notify_resume # call do_notify_resume
  659. stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
  660. TRACE_IRQS_OFF
  661. j io_work_loop
  662. /*
  663. * External interrupt handler routine
  664. */
  665. .globl ext_int_handler
  666. ext_int_handler:
  667. stck __LC_INT_CLOCK
  668. stpt __LC_ASYNC_ENTER_TIMER
  669. SAVE_ALL_BASE __LC_SAVE_AREA+32
  670. SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32
  671. CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32
  672. tm SP_PSW+1(%r15),0x01 # interrupting from user ?
  673. jz ext_no_vtime
  674. UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
  675. UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
  676. mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
  677. ext_no_vtime:
  678. lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
  679. TRACE_IRQS_OFF
  680. la %r2,SP_PTREGS(%r15) # address of register-save area
  681. llgh %r3,__LC_EXT_INT_CODE # get interruption code
  682. brasl %r14,do_extint
  683. j io_return
  684. __critical_end:
  685. /*
  686. * Machine check handler routines
  687. */
  688. .globl mcck_int_handler
  689. mcck_int_handler:
  690. stck __LC_INT_CLOCK
  691. la %r1,4095 # revalidate r1
  692. spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer
  693. lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs
  694. SAVE_ALL_BASE __LC_SAVE_AREA+64
  695. la %r12,__LC_MCK_OLD_PSW
  696. tm __LC_MCCK_CODE,0x80 # system damage?
  697. jo mcck_int_main # yes -> rest of mcck code invalid
  698. la %r14,4095
  699. mvc __LC_SAVE_AREA+104(8),__LC_ASYNC_ENTER_TIMER
  700. mvc __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA-4095(%r14)
  701. tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid?
  702. jo 1f
  703. la %r14,__LC_SYNC_ENTER_TIMER
  704. clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER
  705. jl 0f
  706. la %r14,__LC_ASYNC_ENTER_TIMER
  707. 0: clc 0(8,%r14),__LC_EXIT_TIMER
  708. jl 0f
  709. la %r14,__LC_EXIT_TIMER
  710. 0: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
  711. jl 0f
  712. la %r14,__LC_LAST_UPDATE_TIMER
  713. 0: spt 0(%r14)
  714. mvc __LC_ASYNC_ENTER_TIMER(8),0(%r14)
  715. 1: tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
  716. jno mcck_int_main # no -> skip cleanup critical
  717. tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit
  718. jnz mcck_int_main # from user -> load kernel stack
  719. clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_end)
  720. jhe mcck_int_main
  721. clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_start)
  722. jl mcck_int_main
  723. brasl %r14,cleanup_critical
  724. mcck_int_main:
  725. lg %r14,__LC_PANIC_STACK # are we already on the panic stack?
  726. slgr %r14,%r15
  727. srag %r14,%r14,PAGE_SHIFT
  728. jz 0f
  729. lg %r15,__LC_PANIC_STACK # load panic stack
  730. 0: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+64
  731. tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid?
  732. jno mcck_no_vtime # no -> no timer update
  733. tm SP_PSW+1(%r15),0x01 # interrupting from user ?
  734. jz mcck_no_vtime
  735. UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
  736. UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
  737. mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
  738. mcck_no_vtime:
  739. lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
  740. la %r2,SP_PTREGS(%r15) # load pt_regs
  741. brasl %r14,s390_do_machine_check
  742. tm SP_PSW+1(%r15),0x01 # returning to user ?
  743. jno mcck_return
  744. lg %r1,__LC_KERNEL_STACK # switch to kernel stack
  745. aghi %r1,-SP_SIZE
  746. mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
  747. xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
  748. lgr %r15,%r1
  749. stosm __SF_EMPTY(%r15),0x04 # turn dat on
  750. tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
  751. jno mcck_return
  752. TRACE_IRQS_OFF
  753. brasl %r14,s390_handle_mcck
  754. TRACE_IRQS_ON
  755. mcck_return:
  756. mvc __LC_RETURN_MCCK_PSW(16),SP_PSW(%r15) # move return PSW
  757. ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit
  758. lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15
  759. mvc __LC_ASYNC_ENTER_TIMER(8),__LC_SAVE_AREA+104
  760. tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
  761. jno 0f
  762. stpt __LC_EXIT_TIMER
  763. 0: lpswe __LC_RETURN_MCCK_PSW # back to caller
  764. /*
  765. * Restart interruption handler, kick starter for additional CPUs
  766. */
  767. #ifdef CONFIG_SMP
  768. __CPUINIT
  769. .globl restart_int_handler
  770. restart_int_handler:
  771. basr %r1,0
  772. restart_base:
  773. spt restart_vtime-restart_base(%r1)
  774. stck __LC_LAST_UPDATE_CLOCK
  775. mvc __LC_LAST_UPDATE_TIMER(8),restart_vtime-restart_base(%r1)
  776. mvc __LC_EXIT_TIMER(8),restart_vtime-restart_base(%r1)
  777. lg %r15,__LC_SAVE_AREA+120 # load ksp
  778. lghi %r10,__LC_CREGS_SAVE_AREA
  779. lctlg %c0,%c15,0(%r10) # get new ctl regs
  780. lghi %r10,__LC_AREGS_SAVE_AREA
  781. lam %a0,%a15,0(%r10)
  782. lmg %r6,%r15,__SF_GPRS(%r15) # load registers from clone
  783. lg %r1,__LC_THREAD_INFO
  784. mvc __LC_USER_TIMER(8),__TI_user_timer(%r1)
  785. mvc __LC_SYSTEM_TIMER(8),__TI_system_timer(%r1)
  786. xc __LC_STEAL_TIMER(8),__LC_STEAL_TIMER
  787. stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on
  788. jg start_secondary
  789. .align 8
  790. restart_vtime:
  791. .long 0x7fffffff,0xffffffff
  792. .previous
  793. #else
  794. /*
  795. * If we do not run with SMP enabled, let the new CPU crash ...
  796. */
  797. .globl restart_int_handler
  798. restart_int_handler:
  799. basr %r1,0
  800. restart_base:
  801. lpswe restart_crash-restart_base(%r1)
  802. .align 8
  803. restart_crash:
  804. .long 0x000a0000,0x00000000,0x00000000,0x00000000
  805. restart_go:
  806. #endif
  807. #ifdef CONFIG_CHECK_STACK
  808. /*
  809. * The synchronous or the asynchronous stack overflowed. We are dead.
  810. * No need to properly save the registers, we are going to panic anyway.
  811. * Setup a pt_regs so that show_trace can provide a good call trace.
  812. */
  813. stack_overflow:
  814. lg %r15,__LC_PANIC_STACK # change to panic stack
  815. aghi %r15,-SP_SIZE
  816. mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
  817. stmg %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
  818. la %r1,__LC_SAVE_AREA
  819. chi %r12,__LC_SVC_OLD_PSW
  820. je 0f
  821. chi %r12,__LC_PGM_OLD_PSW
  822. je 0f
  823. la %r1,__LC_SAVE_AREA+32
  824. 0: mvc SP_R12(32,%r15),0(%r1) # move %r12-%r15 to stack
  825. mvc SP_ARGS(8,%r15),__LC_LAST_BREAK
  826. xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) # clear back chain
  827. la %r2,SP_PTREGS(%r15) # load pt_regs
  828. jg kernel_stack_overflow
  829. #endif
  830. cleanup_table_system_call:
  831. .quad system_call, sysc_do_svc
  832. cleanup_table_sysc_return:
  833. .quad sysc_return, sysc_leave
  834. cleanup_table_sysc_leave:
  835. .quad sysc_leave, sysc_done
  836. cleanup_table_io_return:
  837. .quad io_return, io_leave
  838. cleanup_table_io_leave:
  839. .quad io_leave, io_done
  840. cleanup_critical:
  841. clc 8(8,%r12),BASED(cleanup_table_system_call)
  842. jl 0f
  843. clc 8(8,%r12),BASED(cleanup_table_system_call+8)
  844. jl cleanup_system_call
  845. 0:
  846. clc 8(8,%r12),BASED(cleanup_table_sysc_return)
  847. jl 0f
  848. clc 8(8,%r12),BASED(cleanup_table_sysc_return+8)
  849. jl cleanup_sysc_return
  850. 0:
  851. clc 8(8,%r12),BASED(cleanup_table_sysc_leave)
  852. jl 0f
  853. clc 8(8,%r12),BASED(cleanup_table_sysc_leave+8)
  854. jl cleanup_sysc_leave
  855. 0:
  856. clc 8(8,%r12),BASED(cleanup_table_io_return)
  857. jl 0f
  858. clc 8(8,%r12),BASED(cleanup_table_io_return+8)
  859. jl cleanup_io_return
  860. 0:
  861. clc 8(8,%r12),BASED(cleanup_table_io_leave)
  862. jl 0f
  863. clc 8(8,%r12),BASED(cleanup_table_io_leave+8)
  864. jl cleanup_io_leave
  865. 0:
  866. br %r14
  867. cleanup_system_call:
  868. mvc __LC_RETURN_PSW(16),0(%r12)
  869. cghi %r12,__LC_MCK_OLD_PSW
  870. je 0f
  871. la %r12,__LC_SAVE_AREA+32
  872. j 1f
  873. 0: la %r12,__LC_SAVE_AREA+64
  874. 1:
  875. clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+8)
  876. jh 0f
  877. mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
  878. 0: clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+16)
  879. jhe cleanup_vtime
  880. clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn)
  881. jh 0f
  882. mvc __LC_SAVE_AREA(32),0(%r12)
  883. 0: stg %r13,8(%r12)
  884. stg %r12,__LC_SAVE_AREA+96 # argh
  885. SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
  886. CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
  887. lg %r12,__LC_SAVE_AREA+96 # argh
  888. stg %r15,24(%r12)
  889. llgh %r7,__LC_SVC_INT_CODE
  890. cleanup_vtime:
  891. clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+24)
  892. jhe cleanup_stime
  893. UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
  894. cleanup_stime:
  895. clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+32)
  896. jh cleanup_update
  897. UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
  898. cleanup_update:
  899. mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
  900. mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_system_call+8)
  901. la %r12,__LC_RETURN_PSW
  902. br %r14
  903. cleanup_system_call_insn:
  904. .quad sysc_saveall
  905. .quad system_call
  906. .quad sysc_vtime
  907. .quad sysc_stime
  908. .quad sysc_update
  909. cleanup_sysc_return:
  910. mvc __LC_RETURN_PSW(8),0(%r12)
  911. mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_sysc_return)
  912. la %r12,__LC_RETURN_PSW
  913. br %r14
  914. cleanup_sysc_leave:
  915. clc 8(8,%r12),BASED(cleanup_sysc_leave_insn)
  916. je 3f
  917. clc 8(8,%r12),BASED(cleanup_sysc_leave_insn+8)
  918. jhe 0f
  919. mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
  920. 0: mvc __LC_RETURN_PSW(16),SP_PSW(%r15)
  921. cghi %r12,__LC_MCK_OLD_PSW
  922. jne 1f
  923. mvc __LC_SAVE_AREA+64(32),SP_R12(%r15)
  924. j 2f
  925. 1: mvc __LC_SAVE_AREA+32(32),SP_R12(%r15)
  926. 2: lmg %r0,%r11,SP_R0(%r15)
  927. lg %r15,SP_R15(%r15)
  928. 3: la %r12,__LC_RETURN_PSW
  929. br %r14
  930. cleanup_sysc_leave_insn:
  931. .quad sysc_done - 4
  932. .quad sysc_done - 16
  933. cleanup_io_return:
  934. mvc __LC_RETURN_PSW(8),0(%r12)
  935. mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_io_return)
  936. la %r12,__LC_RETURN_PSW
  937. br %r14
  938. cleanup_io_leave:
  939. clc 8(8,%r12),BASED(cleanup_io_leave_insn)
  940. je 3f
  941. clc 8(8,%r12),BASED(cleanup_io_leave_insn+8)
  942. jhe 0f
  943. mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
  944. 0: mvc __LC_RETURN_PSW(16),SP_PSW(%r15)
  945. cghi %r12,__LC_MCK_OLD_PSW
  946. jne 1f
  947. mvc __LC_SAVE_AREA+64(32),SP_R12(%r15)
  948. j 2f
  949. 1: mvc __LC_SAVE_AREA+32(32),SP_R12(%r15)
  950. 2: lmg %r0,%r11,SP_R0(%r15)
  951. lg %r15,SP_R15(%r15)
  952. 3: la %r12,__LC_RETURN_PSW
  953. br %r14
  954. cleanup_io_leave_insn:
  955. .quad io_done - 4
  956. .quad io_done - 16
  957. /*
  958. * Integer constants
  959. */
  960. .align 4
  961. .Lconst:
  962. .Lnr_syscalls: .long NR_syscalls
  963. .L0x0130: .short 0x130
  964. .L0x0140: .short 0x140
  965. .L0x0150: .short 0x150
  966. .L0x0160: .short 0x160
  967. .L0x0170: .short 0x170
  968. .Lcritical_start:
  969. .quad __critical_start
  970. .Lcritical_end:
  971. .quad __critical_end
  972. .section .rodata, "a"
  973. #define SYSCALL(esa,esame,emu) .long esame
  974. .globl sys_call_table
  975. sys_call_table:
  976. #include "syscalls.S"
  977. #undef SYSCALL
  978. #ifdef CONFIG_COMPAT
  979. #define SYSCALL(esa,esame,emu) .long emu
  980. sys_call_table_emu:
  981. #include "syscalls.S"
  982. #undef SYSCALL
  983. #endif